LTC4085-3 [Linear]
USB Power Manager with Ideal Diode Controller and 3.95V Li-Ion Charger; 与理想二极管控制器和3.95V锂离子电池充电器的USB电源管理器
| 型号： | LTC4085-3 |
| 厂家： | 
Linear |
| 描述： | USB Power Manager with Ideal Diode Controller and 3.95V Li-Ion Charger |
| 文件： | 总24页 (文件大小：270K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
LTC4085-3/LTC4085-4
USB Power Manager with
Ideal Diode Controller and
3.95V Li-Ion Charger
DESCRIPTION
FEATURES
■
Seamless Transition Between Input Power Sources:
The LTC®4085-3/LTC4085-4 is a USB power manager
and Li-Ion/Polymer battery charger designed for portable
battery-powered applications. The part controls the total
current used by the USB peripheral for operation and
battery charging. The total input current can be limited to
20% or 100% of a programmed value up to 1.5A (typically
100mA or 500mA). Battery charge current is automati-
cally reduced such that the sum of the load current and
charge current does not exceed the programmed input
current limit.
Li-Ion/Polymer Battery, USB and 5V Wall Adapter
■
215mΩ Internal Ideal Diode Plus Optional External
Ideal Diode Controller Provide Low Loss PowerPath™
When Wall Adapter/USB Input Not Present
■
Load Dependent Charging Guarantees Accurate
USB Input Current Compliance
■
3.95V Float Voltage Improves Battery Life Span and
High Temperature Safety Margin
■
Constant-Current/Constant-Voltage Operation with
Thermal Feedback to Maximize Charging Rate without
Risk of Overheating*
The LTC4085-3/LTC4085-4 includes a complete constant-
current/constant-voltagelinearchargerforsinglecellLi-Ion
batteries. These 3.95V versions of the standard LTC4085
are intended for applications which have extended battery
lifetimerequirementsorthosethatrequirehightemperature
(approximately >60°C) operation or storage. Under these
conditions, a reduced float voltage will trade-off initial cell
capacity for the benefit of increased capacity retention
over the life of the battery. A reduced float voltage also
minimizes swelling in prismatic and polymer cells, and
avoids open CID (pressure fuse) in cylindrical cells.
■
Selectable 100% or 20% Input Current Limit
(e.g., 500mA/100mA)
■
Battery Charge Current Independently Programmable
Up to 1.2A
■
Automatic Output Undervoltage Charge Current
Reduction (LTC4085-3)
■
Tiny (4mm × 3mm × 0.75mm) 14-Lead DFN Package
APPLICATIONS
■
Portable USB Devices
The LTC4085-3/LTC4085-4 also includes a programmable
terminationtimer,automaticrecharging,anend-of-charge
status output and an NTC thermistor.
L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks and
Bat-Track, PowerPath and ThinSOT are trademarks of Linear Technology Corporation. All other
trademarks are the property of their respective owners. Protected by U.S. Patents, including
6522118, 6700364. Other patents pending.
TYPICAL APPLICATION
I
LOAD
Input and Battery Current vs Load Current
5V WALL
ADAPTER
INPUT
TO LDOs,
RPROG = 100k, RCLPROG = 2k
REGs, ETC
600
4.7μF
1k
I
IN
510Ω
I
5V (NOM)
IN
500
400
300
200
100
0
FROM USB
IN
WALL
ACPR
OUT
CABLE V
BUS
SUSPEND USB POWER
100mA 500mA SELECT
SUSP
HPWR
4.7μF
I
LOAD
LTC4085-3/
LTC4085-4
I
BAT
(CHARGING)
PROG
GATE
*
CLPROG
NTC
BAT
CHRG
TIMER
I
BAT
(DISCHARGING)
WALL = 0V
100
I
GND
V
NTC
BAT
–100
0
200
300 500
400
(mA)
600
+
10k
I
LOAD
408534 TA01b
*
OPTIONAL - TO LOWER
IDEAL DIODE IMPEDANCE
0.1μF
100k
2k
10k
408534 TA01
408534fb
1
LTC4085-3/LTC4085-4
ABSOLUTE MAXIMUM RATINGS
PIN CONFIGURATION
(Notes 1, 2, 3, 4, 5)
Terminal Voltage
TOP VIEW
IN, OUT
IN
OUT
1
2
3
4
5
6
7
14 BAT
t < 1ms and Duty Cycle < 1%................... –0.3V to 7V
Steady State............................................. –0.3V to 6V
BAT, CHRG, HPWR, SUSP, WALL, ACPR....... –0.3V to 6V
NTC, TIMER, PROG, CLPROG.......–0.3V to (V + 0.3V)
Pin Current (Steady State)
13 GATE
12 PROG
11 CHRG
10 ACPR
CLPROG
HPWR
SUSP
15
CC
TIMER
WALL
9
8
V
NTC
NTC
IN, OUT, BAT (Note 6)...............................................2.5A
Operating Temperature Range.................. –40°C to 85°C
Maximum Operating Junction Temperature .......... 110°C
Storage Temperature Range................... –65°C to 125°C
DE PACKAGE
14-LEAD (4mm × 3mm) PLASTIC DFN
T
JMAX
= 125°C, θ = 43°C/W
JA
EXPOSED PAD (PIN 15) IS GND, MUST BE CONNECTED TO PCB
ORDER INFORMATION
LEAD FREE FINISH
LTC4085EDE-3#PBF
LTC4085EDE-4#PBF
TAPE AND REEL
PART MARKING
40853
PACKAGE DESCRIPTION
TEMPERATURE RANGE
–40°C to 85°C
LTC4085EDE-3#TRPBF
LTC4085EDE-4#TRPBF
14-Lead (4mm × 3mm) Plastic DFN
14-Lead (4mm × 3mm) Plastic DFN
40854
–40°C to 85°C
Consult LTC Marketing for parts specified with wider operating temperature ranges.
Consult LTC Marketing for information on non-standard lead based finish parts.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
LTC4085 Options
PART NUMBER
LTC4085
FLOAT VOLTAGE
4.2V
NTC HOT THRESHOLD
29% V
UNDERVOLTAGE CURRENT LIMIT*
Yes
Yes
Yes
No
VNTC
LTC4085-1
LTC4085-3
LTC4085-4
4.1V
32.6% V
32.6% V
32.6% V
VNTC
VNTC
VNTC
3.95V
3.95V
*Undervoltage current limit reduces charge current as V
falls below approximately 4.45V.
OUT
The ● indicates specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C (Note 5). VIN = 5V, VBAT = 3.7V, HPWR = 5V, WALL = 0V, RPROG = 100k,
ELECTRICAL CHARACTERISTICS
RCLPROG = 2k, unless otherwise noted.
SYMBOL
PARAMETER
CONDITIONS
IN and OUT
BAT
MIN
TYP
MAX
5.5
UNITS
VIN
Input Supply Voltage
Input Voltage
4.35
V
V
V
4.3
BAT
●
●
●
I
IN
Input Supply Current
I
= 0 (Note 7)
0.5
50
60
1.2
100
110
mA
μA
μA
BAT
Suspend Mode; SUSP = 5V
Suspend Mode; SUSP = 5V, WALL = 5V,
V
OUT = 4.8V
●
IOUT
Output Supply Current
Battery Drain Current
VOUT = 5V, V = 0V, NTC = V
0.7
1.4
mA
IN
NTC
●
●
●
I
V
BAT
= 4.05V, Charging Stopped
15
22
60
27
35
100
μA
μA
μA
BAT
Suspend Mode; SUSP = 5V
= 0V, BAT Powers OUT, No Load
V
IN
408534fb
2
LTC4085-3/LTC4085-4
The ● indicates specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C (Note 5). VIN = 5V, VBAT = 3.7V, HPWR = 5V, WALL = 0V, RPROG = 100k,
ELECTRICAL CHARACTERISTICS
RCLPROG = 2k, unless otherwise noted.
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
●
●
VUVLO
Input or Output Undervoltage Lockout
V
V
Powers Part, Rising Threshold
3.6
2.75
3.8
2.95
4
3.15
V
V
IN
OUT Powers Part, Rising Threshold
ΔVUVLO
Input or Output Undervoltage Lockout
V
Rising – V Falling
130
mV
IN
IN
or VOUT Rising – VOUT Falling
Current Limit
●
●
ILIM
Current Limit
RCLPROG = 2k (0.1%), HPWR = 5V
475
90
500
100
525
110
mA
mA
R
CLPROG = 2k (0.1%), HPWR = 0V
I
Maximum Input Current Limit
(Note 8)
= 100mA Load
2.4
A
IN(MAX)
RON
ON Resistance V to V
I
215
mΩ
IN
OUT
OUT
●
●
VCLPROG
CLPROG Pin Voltage
RPROG = 2k
PROG = 1k
IN or OUT
(V – V ) V Rising
0.98
0.98
1
1
1.02
1.02
V
V
R
ISS
Soft Start Inrush Current
5
mA/μs
VCLEN
Input Current Limit Enable Threshold
Voltage
20
50
–60
80
mV
mV
IN
IN
OUT
(V – V ) V Falling
IN
IN
OUT
Battery Charger
VFLOAT
Regulated Output Voltage
IBAT = 2mA
BAT = 2mA, (0°C – 85°C)
RPROG = 100k (0.1%), No Load
PROG = 50k (0.1%), No Load
3.915
3.910
3.95
3.95
3.985
3.990
V
V
I
●
●
IBAT
Current Mode Charge Current
465
900
500
1000
535
1080
mA
mA
R
IBAT(MAX)
VPROG
Maximum Charge Current
PROG Pin Voltage
(Note 8)
1.5
A
●
●
RPROG = 100k
0.98
0.98
1
1
1.02
1.02
V
V
RPROG = 50k
●
●
●
kEOC
Ratio of End-of-Charge Current to
Charge Current
VBAT = VFLOAT (3.95V)
0.085
0.1
0.11
mA/mA
ITRIKL
VTRIKL
VCEN
Trickle Charge Current
VBAT = 2V, RPROG = 100k (0.1%)
35
50
60
3
mA
V
Trickle Charge Threshold Voltage
Charger Enable Threshold Voltage
2.75
2.9
(VOUT – VBAT) Falling; VBAT = 4V
(VOUT – VBAT) Rising; VBAT = 4V
55
80
mV
mV
VRECHRG
tTIMER
Recharge Battery Threshold Voltage
TIMER Accuracy
VFLOAT – VRECHRG
60
95
130
10
mV
%
VBAT = 4.05V
–10
Recharge Time
Percent of Total Charge Time
Percent of Total Charge Time, VBAT < 2.8V
50
25
%
Low Battery Trickle Charge Time
%
TLIM
Junction Temperature in Constant
Temperature Mode
105
°C
Internal Ideal Diode
RFWD
Incremental Resistance, VON Regulation IBAT = 100mA
125
215
mΩ
mΩ
RDIO(ON)
VFWD
ON Resistance VBAT to VOUT
IBAT = 600mA
IBAT = 5mA
●
Voltage Forward Drop (VBAT – VOUT
)
10
30
55
160
50
mV
mV
mV
I
I
BAT = 100mA
BAT = 600mA
VOFF
Diode Disable Battery Voltage
2.8
550
2.2
V
mA
A
IFWD
Load Current Limit, for VON Regulation
Diode Current Limit
ID(MAX)
408534fb
3
LTC4085-3/LTC4085-4
The ● indicates specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C (Note 5). VIN = 5V, VBAT = 3.7V, HPWR = 5V, WALL = 0V, RPROG = 100k,
ELECTRICAL CHARACTERISTICS
R
CLPROG = 2k, unless otherwise noted.
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
20
MAX
UNITS
External Ideal Diode
VFWD,EDA
Logic
VOL
External Ideal Diode Forward Voltage
VGATE = 1.85V; IGATE = 0
mV
●
●
●
Output Low Voltage CHRG, ACPR
Input High Voltage
ISINK = 5mA
0.1
0.4
0.4
0.4
V
V
VIH
SUSP, HPWR Pin
SUSP, HPWR Pin
SUSP, HPWR
1.2
VIL
Input Low Voltage
V
IPULLDN
VCHG(SD)
Logic Input Pull-Down Current
2
μA
V
●
●
●
Charger Shutdown Threshold Voltage
on TIMER
0.14
5
ICHG(SD)
Charger Shutdown Pull-Up Current
on TIMER
VTIMER = 0V
14
μA
VWAR
VWAF
VWDR
VWDF
IWALL
NTC
Absolute Wall Input Threshold Voltage
Absolute Wall Input Threshold Voltage
Delta Wall Input Threshold Voltage
Delta Wall Input Threshold Voltage
Wall Input Current
VWALL Rising Threshold
VWALL Falling Threshold
VWALL – VBAT Rising Threshold
VWALL – VBAT Falling Threshold
VWALL = 5V
4.15
4.25
3.12
75
4.35
V
V
mV
mV
μA
●
●
0
25
60
75
150
VVNTC
INTC
VNTC Bias Voltage
IVNTC = 500μA
VNTC = 1V
4.4
4.85
0
V
NTC Input Leakage Current
1
μA
VCOLD
Cold Temperature Fault Threshold
Voltage
Rising Threshold
Hysteresis
0.738 • V
0.018 • V
V
V
VNTC
VNTC
VHOT
VDIS
Hot Temperature Fault Threshold
Voltage
Falling Threshold
Hysteresis
0.326 • V
0.015 • V
V
V
VNTC
VNTC
●
NTC Disable Voltage
NTC Input Voltage to GND (Falling)
Hysteresis
75
100
35
125
mV
mV
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 5: The LTC4085-3/LTC4085-4 is tested under pulsed load conditions
such that T ≈ T . The LTC4085E-3/LTC4085E-4 is guaranteed to meet
specified performance from 0° to 85°C. Specifications over the –40°C to
85°C operating temperature range are assured by design, characterization
and correlation with statistical process controls.
J
A
Note 2: V is the greater of V , V
or V
.
BAT
CC
IN OUT
Note 6: Guaranteed by long term current density limitations.
Note 3: All voltage values are with respect to GND.
Note 7: Total input current is equal to this specification plus 1.002 • I
BAT
Note 4: This IC includes overtemperature protection that is intended
to protect the device during momentary overload conditions. Junction
temperatures will exceed 110°C when overtemperature protection is
active. Continuous operation above the specified maximum operating
junction temperature may result in device degradation or failure.
where I is the charge current.
BAT
Note 8: Accuracy of programmed current may degrade for currents greater
than 1.5A.
408534fb
4
LTC4085-3/LTC4085-4
TYPICAL PERFORMANCE CHARACTERISTICS TA = 25°C unless otherwise noted.
Battery Drain Current
Input Supply Current
vs Temperature
Input Supply Current vs
Temperature (Suspend Mode)
vs Temperature
(BAT Powers OUT, No Load)
70
60
50
40
30
20
10
0
900
800
700
600
500
400
300
200
100
100
90
80
70
60
50
40
30
20
10
0
V
V
R
R
= 5V
V
V
= 0V
BAT
V
V
R
R
= 5V
IN
IN
IN
= 3.95V
= 100k
= 3.95V
= 3.95V
= 100k
BAT
PROG
BAT
PROG
= 2k
= 2k
CLPROG
CLPROG
SUSP = 5V
0
50
TEMPERATURE (°C)
100
–50
25
0
25
75
–50
–25
0
25
100
–50
–25
25
50
75
100
50
75
0
TEMPERATURE (°C)
TEMPERATURE (°C)
408534 G02
408534 G01
408534 G03
Input Current Limit
vs Temperature, HPWR = 5V
Input Current Limit
vs Temperature, HPWR = 0V
CLPROG Pin Voltage
vs Temperature
1.2
1.0
0.8
0.6
0.4
0.2
0
525
515
505
495
110
108
106
104
102
100
98
V = 5V
IN
CLPROG
V
V
R
R
= 5V
V
V
R
R
= 5V
IN
IN
R
= 2k
= 3.7V
= 3.7V
BAT
PROG
BAT
PROG
= 100k
= 100k
HPWR = 5V
= 2k
= 2k
CLPROG
CLPROG
96
HPWR = 0V
50
94
485
475
92
90
–50
0
25
75
100
–25
–50
0
25
50
75
100
–50
–25
25
50
75
100
–25
0
TEMPERATURE (°C)
TEMPERATURE (°C)
TEMPERATURE (°C)
408534 G06
408534 G04
408534 G05
PROG Pin Voltage
vs Temperature
Battery Regulation (Float)
Voltage vs Temperature
VFLOAT Load Regulation
4.05
4.00
1.020
1.015
1.010
1.005
3.970
3.965
3.960
3.955
R
= 34k
V
V
R
R
= 5V
V
BAT
= 5V
PROG
IN
IN
= 3.80V
I
= 2mA
BAT
PROG
= 100k
= 2k
CLPROG
3.95
3.90
1.000
0.995
3.950
3.945
3.85
3.80
3.75
0.990
0.985
0.980
3.940
3.935
3.930
0
200
400
600
(mA)
800
1000
–25
0
50
–25
0
50
–50
75
100
–50
75
100
25
25
I
TEMPERATURE (°C)
BAT
TEMPERATURE (°C)
408534 G08
408534 G07
408534 G09
408534fb
5
LTC4085-3/LTC4085-4
TYPICAL PERFORMANCE CHARACTERISTICS TA = 25°C unless otherwise noted.
Battery Current and Voltage
vs Time
Charge Current vs Temperature
(Thermal Regulation)
Input RON vs Temperature
275
250
225
200
175
150
125
600
500
6
5
600
500
400
300
I
= 400mA
LOAD
CHRG
I
BAT
V
= 4.5V
IN
V
BAT
V
= 5V
400
300
4
3
IN
V
= 5.5V
IN
200
100
0
2
1
0
200
100
0
C/10
TERMINATION
400mAhr CELL
= 5V
V
V
V
= 5V
IN
IN
R
R
= 100k
= 3.5V
BAT
PROG
CLPROG
= 2.1k
V
= 50°C/W
JA
50
TEMPERATURE (°C)
100 125
–50
0
25
50
75
100
0
50
100
150
200
–50 –25
0
25
75
–25
TEMPERATURE (°C)
TIME (min)
408534 G10
408534 G11
408534 G12
Ideal Diode Current vs Forward
Voltage and Temperature
(No External Device)
Charging from USB, Low Power,
IBAT vs VBAT
Charging from USB, IBAT vs VBAT
1000
900
800
700
600
500
400
300
200
100
0
600
500
120
100
V
V
R
R
= 5V
V
V
R
R
= 5V
V
V
= 3.7V
IN
OUT
IN
OUT
BAT
IN
= NO LOAD
= 100k
= NO LOAD
= 100k
= 0V
PROG
PROG
= 2k
= 2k
CLPROG
CLPROG
HPWR = 5V
HPWR = 0V
400
80
300
200
60
40
–50°C
0°C
50°C
100°C
100
0
20
0
0
50
100
(mV)
150
200
0
0.5
1
1.5
2
2.5
(V)
3
3.5
4
4.5
0
0.5
1
1.5
2
V
BAT
2.5
(V)
3
3.5
4
4.5
V
V
FWD
BAT
408534 G15
408534 G13
408534 G14
Ideal Diode Resistance and
Current vs Forward Voltage
(No External Device)
Ideal Diode Current vs Forward
Voltage and Temperature with
External Device
Ideal Diode Resistance and
Current vs Forward Voltage with
External Device
1000
900
800
700
600
500
400
300
200
100
0
5000
4500
4000
3500
3000
2500
2000
1500
1000
500
5000
4500
4000
3500
3000
2500
2000
1500
1000
500
V
V
= 3.7V
V
V
= 3.7V
V
V
= 3.7V
BAT
BAT
IN
BAT
IN
= 0V
= 0V
= 0V
IN
Si2333 PFET
Si2333 PFET
I
OUT
R
DIO
–50°C
0°C
50°C
100°C
0
0
0
20
40
60
80
100
0
20
40
60
80
100
408534 G18
0
50
100
(mV)
150
200
V
V
(mV)
V (mV)
FWD
FWD
FWD
408534 G17
408534 G16
408534fb
6
LTC4085-3/LTC4085-4
TYPICAL PERFORMANCE CHARACTERISTICS
TA = 25°C unless otherwise noted.
Input Connect Waveforms
Input Disconnect Waveforms
V
V
IN
5V/DIV
IN
5V/DIV
V
V
OUT
OUT
5V/DIV
5V/DIV
I
I
IN
0.5A/DIV
IN
0.5A/DIV
I
I
BAT
BAT
0.5A/DIV
0.5A/DIV
1ms/DIV
1ms/DIV
408534 G19
408534 G20
V
= 3.85V
= 100mA
V
= 3.85V
= 100mA
BAT
OUT
BAT
OUT
I
I
Wall Connect Waveforms,
VIN = 0V
Wall Disconnect Waveforms,
VIN = 0V
HPWR
5V/DIV
WALL
5V/DIV
I
IN
V
OUT
0.5A/DIV
5V/DIV
I
WALL
I
BAT
0.5A/DIV
0.5A/DIV
I
BAT
0.5A/DIV
1ms/DIV
100μs/DIV
408534 G22
408534 G21
V
I
= 3.85V
V
I
= 3.85V
= 50mA
BAT
OUT
R
BAT
OUT
= 100mA
= 100k
PROG
Response to HPWR
Response to Suspend
WALL
5V/DIV
SUSP
5V/DIV
V
OUT
V
OUT
5V/DIV
5V/DIV
I
WALL
0.5A/DIV
I
IN
I
BAT
0.5A/DIV
0.5A/DIV
I
BAT
0.5A/DIV
1ms/DIV
100μs/DIV
408534 G23
408534 G24
V
I
= 3.85V
V
I
= 3.85V
= 50mA
BAT
OUT
R
BAT
OUT
= 100mA
= 100k
PROG
408534fb
7
LTC4085-3/LTC4085-4
PIN FUNCTIONS
IN (Pin 1): Input Supply. Connect to USB supply, V
.
BUS
HPWR (Pin 4): High Power Select. This logic input is used
to control the input current limit. A voltage greater than
1.2V on the pin will set the input current limit to 100% of
the current programmed by the CLPROG pin. A voltage
less than 0.4V on the pin will set the input current limit to
20%ofthecurrentprogrammedbytheCLPROGpin.A2μA
pull-downisinternallyappliedtothispintoensureitislow
at power up when the pin is not being driven externally.
Input current to this pin is limited to either 20% or 100%
of the current programmed by the CLPROG pin as deter-
mined by the state of the HPWR pin. Charge current (to
BAT pin) supplied through the input is set to the current
programmed by the PROG pin but will be limited by the
input current limit if charge current is set greater than the
input current limit.
OUT (Pin 2): Voltage Output. This pin is used to provide
SUSP (Pin 5): Suspend Mode Input. Pulling this pin above
1.2V will disable the power path from IN to OUT. The sup-
ply current from IN will be reduced to comply with the
USB specification for suspend mode. Both the ability to
charge the battery from OUT and the ideal diode function
(from BAT to OUT) will remain active. Suspend mode will
controlled power to a USB device from either USB V
BUS
(IN) or the battery (BAT) when the USB is not present. This
pin can also be used as an input for battery charging when
the USB is not present and a wall adapter is applied to this
pin. OUT should be bypassed with at least 4.7μF to GND.
reset the charge timer if V
is less than V
while in
OUT
BAT
BAT
CLPROG (Pin 3): Current Limit Program and Input Cur-
suspend mode. If V
is kept greater than V , such as
OUT
rent Monitor. Connecting a resistor, R
, to ground
CLPROG
when a wall adapter is present, the charge timer will not
be reset when the part is put in suspend. A 2μA pull-down
is internally applied to this pin to ensure it is low at power
up when the pin is not being driven externally.
programs the input to output current limit. The current
limit is programmed as follows:
1000V
ICL(A) =
RCLPROG
TIMER(Pin6):TimerCapacitor.Placingacapacitor,C
,
TIMER
to GND sets the timer period. The timer period is:
In USB applications the resistor R
to no less than 2.1k.
should be set
CLPROG
CTIMER •RPROG • 3Hours
tTIMER(Hours) =
0.1μF • 100k
The voltage on the CLPROG pin is always proportional to
the current flowing through the IN to OUT power path.
This current can be calculated as follows:
Charge time is increased if charge current is reduced
due to undervoltage current limit, load current, thermal
regulation and current limit selection (HPWR).
VCLPROG
RCLPROG
IIN(A) =
• 1000
ShortingtheTIMERpintoGNDdisablesthebatterycharg-
ing functions.
408534fb
8
LTC4085-3/LTC4085-4
PIN FUNCTIONS
WALL (Pin 7): Wall Adapter Present Input. Pulling this
pin above 4.25V will disconnect the power path from IN
to OUT. The ACPR pin will also be pulled low to indicate
that a wall adapter has been detected.
PROG (Pin 12): Charge Current Program. Connecting a
resistor, R
, to ground programs the battery charge
PROG
current. The battery charge current is programmed as
follows:
NTC (Pin 8): Input to the NTC Thermistor Monitoring
Circuits. The NTC pin connects to a negative temperature
coefficient thermistor which is typically co-packaged with
the battery pack to determine if the battery is too hot or
too cold to charge. If the battery’s temperature is out of
range, chargingispauseduntilthebatterytemperaturere-
enters the valid range. A low drift bias resistor is required
50,000V
ICHG(A) =
RPROG
GATE (Pin 13): External Ideal Diode Gate Pin. This pin
can be used to drive the gate of an optional external
PFET connected between BAT and OUT. By doing so, the
impedance of the ideal diodebetween BAT and OUT can be
reduced. When not in use, this pin should be left floating.
It is important to maintain a high impedance on this pin
and minimize all leakage paths.
from V
to NTC and a thermistor is required from NTC
NTC
to ground. If the NTC function is not desired, the NTC pin
should be grounded.
V
(Pin 9): Output Bias Voltage for NTC. A resistor
BAT (Pin 14): Connect to a single cell Li-Ion battery. This
pin is used as an output when charging the battery and
as an input when supplying power to OUT. When the OUT
pin potential drops below the BAT pin potential, an ideal
NTC
from this pin to the NTC pin will bias the NTC thermistor.
ACPR (Pin 10): Wall Adapter Present Output. Active low
open drain output pin. A low on this pin indicates that the
wall adapter input comparator has had its input pulled
above the input threshold. This feature is disabled if no
power is present on IN or OUT or BAT (i.e., below UVLO
thresholds).
diode function connects BAT to OUT and prevents V
OUT
fromdroppingsignificantlybelowV .Aprecisioninternal
BAT
resistor divider sets the final float (charging) potential on
thispin. Theinternalresistordividerisdisconnectedwhen
IN and OUT are in undervoltage lockout.
CHRG (Pin 11): Open-Drain Charge Status Output. When
the battery is being charged, the CHRG pin is pulled low by
aninternalN-channelMOSFET. Whenthetimerrunsoutor
the charge current drops below 10% of the programmed
charge current (while in voltage mode) or the input supply
or output supply is removed, the CHRG pin is forced to a
high impedance state.
GND (Pin 15): Ground. The exposed package pad is
electrical ground and must be soldered to the PC board
for proper functionality and rated thermal performance.
408534fb
9
LTC4085-3/LTC4085-4
BLOCK DIAGRAM
V
BUS
1
IN
CURRENT LIMIT
OUT
GATE
BAT
I
LIM_CNTL
2
–
ENABLE
+
25mV
I
SOFT-START
IN
1000
–
+
+
–
I
LIM
1V
25mV
+
EDA
–
CURRENT CONTROL
CL
CLPROG
HPWR
CC/CV REGULATOR
CHARGER
3
4
13
14
2k
IN OUT BAT
IDEAL_DIODE
ENABLE
500mA/100mA
2μA
105°C
DIE TEMP
–
+
TA
SOFT-START2
I
CHRG
CHARGE CONTROL
+
–
1V
+
CHG
–
0.25V
2.9V
PROG
12
+
–
+
25mV
–
BATTERY UVLO
100k
–
+
+
–
3.85V
RECHARGE
WALL
VOLTAGE DETECT
UVLO
7
+
–
ACPR
4.25V
10
BAT_UV
TIMER
RECHRG
OSCILLATOR
6
V
NTC
9
8
CONTROL LOGIC
CLK
–
+
HOLD
100k
CHRG
TOO C0LD
11
NTC
STOP
NTCERR
RESET
COUNTER
NTC
–
+
100k
TOO HOT
NTC_ENABLE
C/10
EOC
2μA
+
–
0.1V
408534 BD
GND
SUSP
408534fb
10
LTC4085-3/LTC4085-4
OPERATION
The LTC4085 is a complete PowerPath controller for bat-
tery powered USB applications. The LTC4085 is designed
to receive power from a USB source, a wall adapter, or a
battery. It can then deliver power to an application con-
nected to the OUT pin and a battery connected to the
BAT pin (assuming that an external supply other than the
battery is present). Power supplies that have limited cur-
Furthermore,poweringswitchingregulatorloadsfromthe
OUT pin (rather than directly from the battery) results in
shorter battery charge times. This is due to the fact that
switchingregulatorstypicallyrequireconstantinputpower.
WhenthispowerisdrawnfromtheOUTpinvoltage(rather
than the lower BAT pin voltage) the current consumed
by the switching regulator is lower leaving more current
available to charge the battery.
rent resources (such as USB V
supplies) should be
BUS
connectedtotheINpinwhichhasaprogrammablecurrent
limit. Batterychargecurrentwillbeadjustedtoensurethat
the sum of the charge current and load current does not
exceed the programmed input current limit.
The LTC4085 also has the ability to receive power from
a wall adapter. Wall adapter power can be connected to
the output (load side) of the LTC4085 through an exter-
nal device such as a power Schottky or FET, as shown in
Figure 1. The LTC4085 has the unique ability to use the
output, which is powered by the wall adapter, as a path
to charge the battery while providing power to the load. A
walladaptercomparatorontheLTC4085canbeconfigured
to detect the presence of the wall adapter and shut off the
connection to the USB to prevent reverse conduction out
to the USB bus.
An ideal diode function provides power from the battery
whenoutput/loadcurrentexceedstheinputcurrentlimitor
when input power is removed. Powering the load through
the ideal diode instead of connecting the load directly to
the battery allows a fully charged battery to remain fully
charged until external power is removed. Once external
power is removed the output drops until the ideal diode is
forward biased. The forward biased ideal diode will then
provide the output power to the load from the battery.
408534fb
11
LTC4085-3/LTC4085-4
OPERATION
WALL
ADAPTER
10
ACPR
4.25V
(RISING)
–
3.15V
(FALLING)
+
WALL
7
+
–
75mV (RISING)
25mV (FALLING)
+
ENABLE
CURRENT LIMIT
CONTROL
–
IN
OUT
USB V
1
2
BUS
LOAD
CHRG
CONTROL
IDEAL
DIODE
BAT
14
+
Li-Ion
408534 F01
Figure 1: Simplified Block Diagram—PowerPath
408534fb
12
LTC4085-3/LTC4085-4
OPERATION
Table 1. Operating Modes—PowerPath States
Current Limited Input Power (IN to OUT)
WALL PRESENT
SUSPEND
VIN > 3.8V
VIN > (VOUT + 100mV)
VIN > (VBAT + 100mV) CURRENT LIMIT ENABLED
Y
X
X
X
X
N
X
Y
X
X
X
N
X
X
N
X
X
Y
X
X
X
N
X
Y
X
X
X
X
N
Y
N
N
N
N
N
Y
Battery Charger (OUT to BAT)
WALL PRESENT
SUSPEND
VOUT > 4.35V
VOUT > (VBAT + 100mV)
CHARGER ENABLED
X
X
X
X
X
X
N
X
Y
X
N
Y
N
N
Y
Ideal Diode (BAT to OUT)
WALL PRESENT
SUSPEND
VIN
X
VBAT > VOUT
VBAT > 2.8V
DIODE ENABLED
X
X
X
X
X
X
X
N
Y
N
X
Y
N
N
Y
X
X
Operating Modes—Pin Currents vs Programmed Currents (Powered from IN)
PROGRAMMING
OUTPUT CURRENT
BATTERY CURRENT
INPUT CURRENT
ICL = ICHG
IOUT < ICL
IOUT = ICL = ICHG
IOUT > ICL
IBAT = ICL – IOUT
IBAT = 0
IIN = IQ + ICL
IIN = IQ + ICL
IIN = IQ + ICL
I
BAT = ICL – IOUT
ICL > ICHG
IOUT < (ICL – ICHG
OUT > (ICL – ICHG
OUT = ICL
)
)
IBAT = ICHG
IBAT = ICL – IOUT
IBAT = 0
IIN = IQ + ICHG + IOUT
IIN = IQ + ICL
I
I
IIN = IQ + ICL
IOUT > ICL
I
BAT = ICL – IOUT
IIN = IQ + ICL
ICL < ICHG
IOUT < ICL
IOUT > ICL
IBAT = ICL – IOUT
IBAT = ICL – IOUT
IIN = IQ + ICL
IIN = IQ + ICL
408534fb
13
LTC4085-3/LTC4085-4
OPERATION
USB Current Limit and Charge Current Control
ThecurrentlimitingcircuitryintheLTC4085canandshould
be configured to limit current to 500mA for USB applica-
tions (selectable using the HPWR pin and programmed
using the CLPROG pin).
The current limit and charger control circuits of the
LTC4085 are designed to limit input current as well as
control battery charge current as a function of I . The
programmed current limit, I is defined as:
OUT
The LTC4085 reduces battery charge current such that the
sum of the battery charge current and the load current
does not exceed the programmed input current limit (one-
fifth of the programmed input current limit when HPWR
is low, see Figure 2). The battery charge current goes to
zero when load current exceeds the programmed input
current limit (one-fifth of the limit when HPWR is low). If
theloadcurrentisgreaterthanthecurrentlimit, theoutput
voltage will drop to just under the battery voltage where
the ideal diode circuit will take over and the excess load
current will be drawn from the battery.
CL,
⎛
⎞
1000
1000V
RCLPROG
ICL =
• VCLPROG
=
⎜
⎟
R
⎝
⎠
CLPROG
Theprogrammedbatterychargecurrent,I ,isdefinedas:
CHG
⎛
⎞
50,000
50,000V
RPROG
ICHG
=
• VPROG
=
⎜
⎟
R
⎝
⎠
PROG
Input current, I , is equal to the sum of the BAT pin output
IN
current and the OUT pin output current:
I = I
IN
+ I
BAT
OUT
600
500
400
300
200
100
0
120
100
80
600
500
I
IN
I
IN
I
IN
400
300
200
100
0
I
I
I
I
I
LOAD
LOAD
LOAD
60
I
= I
BAT CHG
40
BAT
CHARGING
BAT
CHARGING
I
= I – I
BAT CL OUT
I
BAT
CHARGING
20
0
–100
0
–20
–100
100
200
300
(mA)
400
500
600
0
20
40
60
(mA)
80
100
120
0
100
200
300
(mA)
400
500
600
I
I
I
BAT
BAT
BAT
I
I
I
LOAD
LOAD
LOAD
(IDEAL DIODE)
(IDEAL DIODE)
(IDEAL DIODE)
408534 F02a
408534 F02b
408534 F02c
(2c) High Power Mode with
ICL = 500mA and ICHG = 250mA
RPROG = 100k and RCLPROG = 2k
(2b) Low Power Mode/Full Charge
RPROG = 100k and RCLPROG = 2k
(2a) High Power Mode/Full Charge
RPROG = 100k and RCLPROG = 2k
Figure 2: Input and Battery Currents as a Function of Load Current
408534fb
14
LTC4085-3/LTC4085-4
OPERATION
Programming Current Limit
ventstheOUTpinvoltagefromdroppingsignificantlybelow
the BAT pin voltage. A comparison of the I-V curve of the
ideal diode and a Schottky diode can be seen in Figure 3.
The formula for input current limit is:
⎛
⎞
1000
1000V
RCLPROG
If the input current increases beyond the programmed
input current limit additional current will be drawn from
the battery via the internal ideal diode. Furthermore, if
ICL
=
• VCLPROG
=
⎜
⎟
R
⎝
⎠
CLPROG
where V
is the CLPROG pin voltage and R
power to IN (USB V ) or OUT (external wall adapter) is
CLPROG
CLPROG
BUS
is the total resistance from the CLPROG pin to ground.
removed, then all of the application power will be provided
by the battery via the ideal diode. A 4.7μF capacitor at OUT
issufficienttokeepatransitionfrominputpowertobattery
power from causing significant output voltage droop. The
ideal diode consists of a precision amplifier that enables a
large P-Channel MOSFET transistor whenever the voltage
For example, if typical 500mA current limit is required,
calculate:
1V
500mA
RCLPROG
=
• 1000 = 2k
atOUTisapproximately20mV(V )belowthevoltageat
FWD
In USB applications, the minimum value for R
BAT. The resistance of the internal ideal diode is approxi-
mately 200mΩ. If this is sufficient for the application then
no external components are necessary. However, if more
conductanceisneeded,anexternalPFETcanbeaddedfrom
BAT to OUT. The GATE pin of the LTC4085 drives the gate
of the PFET for automatic ideal diode control. The source
of the external PFET should be connected to OUT and the
drain should be connected to BAT. In order to help protect
the external PFET in over-current situations, it should be
placed in close thermal contact to the LTC4085.
CLPROG
should be 2.1k. This will prevent the application current
from exceeding 500mA due to LTC4085 tolerances and
quiescent currents. A 2.1k CLPROG resistor will give
a typical current limit of 476mA in high power mode
(HPWR = 1) or 95mA in low power mode (HPWR = 0).
V
will track the input current according to the fol-
CLPROG
lowing equation:
VCLPROG
RCLPROG
I =
• 1000
IN
I
MAX
For best stability over temperature and time, 1% metal
film resistors are recommended.
Ideal Diode from BAT to OUT
SLOPE: 1/R
DIO(ON)
The LTC4085 has an internal ideal diode as well as a con-
trollerforanoptionalexternalidealdiode. Ifabatteryisthe
only power supply available or if the load current exceeds
the programmed input current limit, then the battery will
automatically deliver power to the load via an ideal diode
circuit between the BAT and OUT pins. The ideal diode
circuit (along with the recommended 4.7μF capacitor on
the OUT pin) allows the LTC4085 to handle large transient
SCHOTTKY
DIODE
408534 F03
FORWARD VOLTAGE (V)
(BAT-OUT)
V
FWD
loads and wall adapter or USB V
connect/disconnect
BUS
Figure 3. LTC4085 Schottky Diode vs Forward Voltage Drop
scenarios without the need for large bulk capacitors. The
ideal diode responds within a few microseconds and pre-
408534fb
15
LTC4085-3/LTC4085-4
OPERATION
Battery Charger
the battery approaches the final float voltage, the charge
current begins to decrease as the LTC4085 switches to
constant-voltage mode. When the charge current drops
below 10% of the programmed charge current while in
constant-voltage mode the CHRG pin assumes a high
impedance state.
The battery charger circuits of the LTC4085 are designed
for charging single cell lithium-ion batteries. Featuring
an internal P-channel power MOSFET, the charger uses a
constant-current/constant-voltage charge algorithm with
programmable current and a programmable timer for
charge termination. Charge current can be programmed
up to 1.5A. The final float voltage accuracy is 0.8% typi-
cal. No blocking diode or sense resistor is required when
powering the IN pin. The CHRG open-drain status output
provides information regarding the charging status of the
LTC4085 at all times. An NTC input provides the option of
charge qualification using battery temperature.
An external capacitor on the TIMER pin sets the total
minimum charge time. When this time elapses the
charge cycle terminates and the CHRG pin assumes a
high impedance state, if it has not already done so. While
charging in constant-current mode, if the charge current
is decreased by thermal regulation or in order to maintain
the programmed input current limit the charge time is
automatically increased. In other words, the charge time
is extended inversely proportional to charge current de-
livered to the battery. For Li-Ion and similar batteries that
require accurate final float potential, the internal bandgap
reference,voltageamplifierandtheresistordividerprovide
regulation with 0.8% accuracy.
An internal thermal limit reduces the programmed charge
current if the die temperature attempts to rise above a
presetvalueofapproximately105°C. Thisfeatureprotects
the LTC4085 from excessive temperature, and allows the
usertopushthelimitsofthepowerhandlingcapabilityofa
given circuit board without risk of damaging the LTC4085.
Anotherbenefitofthe LTC4085 thermallimitisthat charge
current can be set according to typical, not worst-case,
ambient temperatures for a given application with the
assurance that the charger will automatically reduce the
current in worst-case conditions.
Trickle Charge and Defective Battery Detection
At the beginning of a charge cycle, if the battery voltage
is low (below 2.8V) the charger goes into trickle charge
reducing the charge current to 10% of the full-scale cur-
rent. If the low battery voltage persists for one quarter
of the total charge time, the battery is assumed to be
defective, the charge cycle is terminated and the CHRG
pin output assumes a high impedance state. If for any
reason the battery voltage rises above ~2.8V the charge
cyclewillberestarted.Torestartthechargecycle(i.e.when
the dead battery is replaced with a discharged battery),
simply remove the input voltage and reapply it or cycle
the TIMER pin to 0V.
The charge cycle begins when the voltage at the OUT pin
rises above the output UVLO level and the battery voltage
isbelowtherechargethreshold.Nochargecurrentactually
flowsuntiltheOUTvoltageisgreaterthantheoutputUVLO
level and 100mV above the BAT voltage. At the beginning
of the charge cycle, if the battery voltage is below 2.8V,
the charger goes into trickle charge mode to bring the
cell voltage up to a safe level for charging. The charger
goes into the fast charge constant-current mode once
the voltage on the BAT pin rises above 2.8V. In constant-
current mode, the charge current is set by R
. When
PROG
408534fb
16
LTC4085-3/LTC4085-4
OPERATION
Programming Charge Current
The formula for the battery charge current is:
VPROG
therechargethresholdthetimerwillnotstartandcharging
is prevented. If after power-up the battery voltage drops
below the recharge threshold or if after a charge cycle the
battery voltage is still below the recharge threshold the
charge time is set to one half of a full cycle.
ICHG = I
• 50,000 =
• 50,000
(
)
PROG
RPROG
The LTC4085 has a feature that extends charge time au-
tomatically. Charge time is extended if the charge current
in constant-current mode is reduced due to load current
or thermal regulation. This change in charge time is in-
versely proportional to the change in charge current. As
theLTC4085approachesconstant-voltagemodethecharge
current begins to drop. This change in charge current is
due to normal charging operation and does not affect the
timer duration.
where V
is the PROG pin voltage and R
is the
PROG
PROG
total resistance from the PROG pin to ground. Keep in
mind that when the LTC4085 is powered from the IN pin,
the programmed input current limit takes precedent over
the charge current. In such a scenario, the charge current
cannot exceed the programmed input current limit.
For example, if typical 500mA charge current is required,
calculate:
Once a time-out occurs and the voltage on the battery is
greater than the recharge threshold, the charge current
stops, and the CHRG output assumes a high impedance
state if it has not already done so.
1V
500mA
⎛
⎞
RPROG
=
•50,000=100k
⎜
⎝
⎟
⎠
Forbeststabilityovertemperatureandtime,1%metalfilm
resistors are recommended. Under trickle charge condi-
tions,thiscurrentisreducedto10%ofthefull-scalevalue.
Connecting the TIMER pin to ground disables the battery
charger.
The Charge Timer
CHRG Status Output Pin
The programmable charge timer is used to terminate the
charge cycle. The timer duration is programmed by an
external capacitor at the TIMER pin. The charge time is
typically:
When the charge cycle starts, the CHRG pin is pulled to
groundbyaninternalN-channelMOSFETcapableofdriving
an LED. When the charge current drops below 10% of the
programmed full charge current while in constant-voltage
mode,thepinassumesahighimpedancestate(butcharge
current continues to flow until the charge time elapses).
If this state is not reached before the end of the program-
mable charge time, the pin will assume a high impedance
statewhenatime-outoccurs. TheCHRGcurrentdetection
threshold can be calculated by the following equation:
CTIMER •RPROG •3Hours
tTIMER(Hours)=
0.1μF •100k
The timer starts when an input voltage greater than the
undervoltage lockout threshold level is applied or when
leavingshutdownandthevoltageonthebatteryislessthan
the recharge threshold. At power up or exiting shutdown
with the battery voltage less than the recharge threshold
the charge time is a full cycle. If the battery is greater than
0.1V
5000V
RPROG
IDETECT
=
• 50,000 =
RPROG
408534fb
17
LTC4085-3/LTC4085-4
OPERATION
For example, if the full charge current is programmed
to 500mA with a 100k PROG resistor the CHRG pin will
change state at a battery charge current of 50mA.
when V
falls to approximately 4.2V. The LTC4085-4
OUT
does not include this Undervoltage Current Limit feature.
Suspend
Note: The end-of-charge (EOC) comparator that moni-
tors the charge current latches its decision. Therefore,
the first time the charge current drops below 10% of the
programmed full charge current while in constant-voltage
mode will toggle CHRG to a high impedance state. If, for
some reason, the charge current rises back above the
threshold the CHRG pin will not resume the strong pull-
down state. The EOC latch can be reset by a recharge cycle
The LTC4085 can be put in suspend mode by forcing the
SUSP pin greater than 1.2V. In suspend mode the ideal
diode function from BAT to OUT is kept alive. If power is
applied to the OUT pin externally (i.e., a wall adapter is
present) then charging will be unaffected. Current drawn
from the IN pin is reduced to 50μA. Suspend mode is
intended to comply with the USB power specification
mode of the same name.
(i.e. V drops below the recharge threshold) or toggling
BAT
the input power to the part.
NTC Thermistor—Battery Temperature Charge
Qualification
Current Limit Undervoltage Lockout
The battery temperature is measured by placing a nega-
tive temperature coefficient (NTC) thermistor close to
the battery pack. The NTC circuitry is shown in Figure 4.
An internal undervoltage lockout circuit monitors the
input voltage and disables the input current limit circuits
until V rises above the undervoltage lockout threshold.
IN
The current limit UVLO circuit has a built-in hysteresis of
125mV. Furthermore, to protect against reverse current in
the power MOSFET, the current limit UVLO circuit disables
the current limit (i.e. forces the input power path to a high
To use this feature, connect the NTC thermistor (R
)
NTC
)from
betweentheNTCpinandgroundandaresistor(R
NOM
the NTC pin to VNTC. R
should be a 1% resistor with
NOM
a value equal to the value of the chosen NTC thermistor at
25°C(thisvalueis10kforaVishayNTHS0603N02N1002J
thermistor). The LTC4085 goes into hold mode when the
impedance state) if V
exceeds V . If the current limit
OUT
IN
UVLO comparator is tripped, the current limit circuits will
not come out of shutdown until V
falls 50mV below
OUT
resistance (R ) of the NTC thermistor drops to 0.48
HOT
the V voltage.
IN
times the value of R
, or approximately 4.8k, which
NOM
Charger Undervoltage Lockout
should be at 45°C. The hold mode freezes the timer and
stops the charge cycle until the thermistor indicates a
return to a valid temperature. As the temperature drops,
the resistance of the NTC thermistor rises. The LTC4085 is
designed to go into hold mode when the value of the NTC
AninternalundervoltagelockoutcircuitmonitorstheV
OUT
voltage and disables the battery charger circuits until
rises above the undervoltage lockout threshold. The
V
OUT
battery charger UVLO circuit has a built-in hysteresis of
125mV. Furthermore, to protect against reverse current
in the power MOSFET, the charger UVLO circuit keeps the
thermistor increases to 2.82 times the value of R
. This
NOM
resistance is R
. For a Vishay NTHS0603N02N1002J
COLD
thermistor, this value is 28.2k which corresponds to ap-
proximately 0°C. The hot and cold comparators each have
approximately 2°C of hysteresis to prevent oscillation
about the trip point. Grounding the NTC pin will disable
the NTC function.
charger shut down if V
exceeds V . If the charger
BAT
OUT
UVLO comparator is tripped, the charger circuits will not
come out of shutdown until V exceeds V by 50mV.
OUT
BAT
Finally,theLTC4085-3willattempttopreventaV
UVLO
OUT
conditionbyreducingchargecurrentwhenV fallsbelow
OUT
approximately 4.45V. Charge current is reduced to zero
408534fb
18
LTC4085-3/LTC4085-4
APPLICATIONS INFORMATION
V
V
NTC
9
LTC4085-3/
LTC4085-4
NTC
9
LTC4085-3/
LTC4085-4
ꢀꢁꢂꢃꢄꢅtꢅ7
ꢀꢁꢂꢃꢄꢅtꢅ7
NTC
NTC
R
R
NOM
NOM
–
+
–
10k
124k
TOO_COLD
TOO_COLD
NTC
NTC
8
8
+
R
NTC
R1
24.3k
10k
–
+
–
TOO_HOT
TOO_HOT
ꢀꢁꢃꢆꢇꢅtꢅ7
ꢀꢁꢃꢆꢇꢅtꢅ7
NTC
NTC
+
R
NTC
100k
+
–
+
NTC_ENABLE
NTC_ENABLE
0.1V
0.1V
–
408534 F04a
408534 F04b
(4a)
(4b)
Figure 4. NTC Circuits
Alternate NTC Thermistors
To calculate R
for a shift to lower temperature, for
NOM
example, use the following equation:
The LTC4085 NTC trip points were designed to work
with thermistors whose resistance-temperature charac-
teristics follow Vishay Dale’s “R-T Curve 2.” The Vishay
NTHS0603N02N1002J is an example of such a thermis-
tor. However, Vishay Dale has many thermistor products
that follow the “R-T Curve 2” characteristic in a variety of
RCOLD
2.816
RNOM
=
•RNTC at 25°C
where R
is the resistance ratio of R
at the desired
NTC
COLD
coldtemperaturetrippoint.Toshiftthetrippointstohigher
temperatures use the following equation:
sizes. Furthermore, any thermistor whose ratio of R
COLD
to R
is about 6.0 will also work (Vishay Dale R-T Curve
HOT
RHOT
0.484
RNOM
=
•RNTC at 25°C
2 shows a ratio of 2.816/0.4839 = 5.82).
Power conscious designs may want to use thermistors
whoseroomtemperaturevalueisgreaterthan10k. Vishay
Dalehasanumberofvaluesofthermistorfrom10kto100k
that follow the “R-T Curve 1.” Using these as indicated
in the NTC Thermistor section will give temperature trip
points of approximately 3°C and 42°C, a delta of 39°C.
This delta in temperature can be moved in either direc-
where R
is the resistance ratio of R
at the desired
NTC
HOT
hot temperature trip point.
Thefollowingexampleusesa100kR-TCurve1Thermistor
from Vishay Dale. The difference between the trip points
is 39°C, from before—and the desired cold trip point of
0°C, would put the hot trip point at about 39°C. The R
needed is calculated as follows:
NOM
tion by changing the value of R
with respect to R
.
NOM
NTC
Increasing R
will move both trip points to lower
NOM
RCOLD
temperatures. Likewise, a decrease in R
with respect
NOM
RNOM
=
•RNTC at 25°C=
2.816
to R
will move the trip points to higher temperatures.
NTC
3.266
2.816
•100kꢀ=116kꢀ
408534fb
19
LTC4085-3/LTC4085-4
APPLICATIONS INFORMATION
The nearest 1% value for R
is 115k. This is the value
Using the WALL Pin to Detect the Presence of a Wall
Adapter
NOM
used to bias the NTC thermistor to get cold and hot trip
points of approximately 0°C and 39°C, respectively. To
extend the delta between the cold and hot trip points, a
The WALL input pin identifies the presence of a wall
adapter (the pin should be tied directly to the adapter
outputvoltage).Thisinformationisusedtodisconnectthe
input pin, IN, from the OUT pin in order to prevent back
conduction to whatever may be connected to the input.
It also forces the ACPR pin low when the voltage at the
WALL pin exceeds the input threshold. In order for the
presence of a wall adapter to be acknowledged, both of
the following conditions must be satisfied:
resistor(R1)canbeaddedinserieswithR (seeFigure4).
NTC
The values of the resistors are calculated as follows:
RCOLD – RHOT
2.816 – 0.484
RNOM
=
0.484
2.816 – 0.484
⎡
⎣
⎤
R1=
• R
[
– RHOT – R
]
COLD
HOT
⎢
⎥
⎦
1. The WALL pin voltage exceeds V
4.25V); and
(approximately
WAR
where R
COLD
is the value of the bias resistor, R
and
NOM
HOT
2. The WALL pin voltage exceeds V
(approximately
WDR
R
are the values of R
at the desired temperature
NTC
75mV above V
)
BAT
trip points. Continuing the forementioned example with
a desired hot trip point of 50°C:
The input power path (between IN and OUT) is re-enabled
and the ACPR pin assumes a high impedance state when
either of the following conditions is met:
RCOLD – RHOT
2.816 – 0.484
RNOM
=
1. The WALL pin voltage falls below V
(approximately
WDF
25mV above V ); or
BAT
100k •(3.266 – 0.3602)
2.816– 0.484
2. The WALL pin voltage falls below V
3.12V)
(approximately
=
WAF
Each of these thresholds is suitably filtered in time to
prevent transient glitches on the WALL pin from falsely
triggering an event.
= 124.6k,124k nearest 1%
⎡
0.484
2.816– 0.484
⎤
⎥
⎥
⎛
⎞
Power Dissipation
•
⎢⎜
⎝
⎟
⎠
R1= 100k •
= 24.3k
The conditions that cause the LTC4085 to reduce charge
current due to the thermal protection feedback can be
approximated by considering the power dissipated in the
part. For high charge currents and a wall adapter applied
⎢
⎢
(
⎥
⎦
3.266 – 0.3602 – 0.3602
)
⎣
to V , the LTC4085 power dissipation is approximately:
OUT
The final solution is shown in Figure 4, where
= 124k, R1 = 24.3k and R = 100k at 25°C
P = (V
– V ) • I
BAT BAT
D
OUT
R
NOM
NTC
408534fb
20
LTC4085-3/LTC4085-4
APPLICATIONS INFORMATION
Where, P is the power dissipated, V
is the supply
BAT
Board Layout Considerations
D
OUT
voltage, V is the battery voltage, and I is the battery
BAT
In order to be able to deliver maximum charge current
under all conditions, it is critical that the Exposed Pad on
the backside of the LTC4085 package is soldered to the
charge current. It is not necessary to perform any worst-
case power dissipation scenarios because the LTC4085
will automatically reduce the charge current to maintain
the die temperature at approximately 105°C. However, the
approximate ambient temperature at which the thermal
feedback begins to protect the IC is:
2
board. Correctly soldered to a 2500mm double-sided
1oz. copper board the LTC4085 has a thermal resistance
of approximately 43°C/W. Failure to make thermal contact
between the Exposed Pad on the backside of the package
and the copper board will result in thermal resistances far
greater than 43°C/W. As an example, a correctly soldered
LTC4085 can deliver over 1A to a battery from a 5V supply
at room temperature. Without a backside thermal connec-
tion, this number could drop to less than 500mA.
T = 105°C – P • θ
JA
A
D
T = 105°C – (V
A
– V ) • I • θ
BAT BAT JA
OUT
Example: Consider an LTC4085 operating from a wall
adapterwith5VatV providing0.8Atoa3VLi-Ionbattery.
OUT
The ambient temperature above which the LTC4085 will
V and Wall Adapter Bypass Capacitor
IN
begin to reduce the 0.8A charge current, is approximately
Many types of capacitors can be used for input bypassing.
However,cautionmustbeexercisedwhenusingmultilayer
ceramic capacitors. Because of the self resonant and high
Qcharacteristicsofsometypesofceramiccapacitors,high
voltage transients can be generated under some start-up
conditions, such as connecting the charger input to a hot
power source. For more information, refer to Application
Note 88.
T = 105°C – (5V – 3V) • 0.8A • 43°C/W
A
T = 105°C – 1.6W • 43°C/W = 105°C – 69°C = 36°C
A
The LTC4085 can be used above 36°C, but the charge
current will be reduced below 0.8A. The charge current
at a given ambient temperature can be approximated by:
105°C – TA
IBAT
=
V
– V
• θ
(
)
BAT JA
OUT
Stability
Considertheaboveexamplewithanambienttemperatureof
55°C.Thechargecurrentwillbereducedtoapproximately:
Theconstant-voltagemodefeedbackloopisstablewithout
any compensation when a battery is connected. However,
a 4.7μF capacitor with a 1Ω series resistor to GND is
recommended at the BAT pin to keep ripple voltage low
when the battery is disconnected.
105°C – 55°C
50°C
IBAT
=
=
= 0.58A
5V – 3V • 43°C/W 86°C/A
(
)
408534fb
21
LTC4085-3/LTC4085-4
PACKAGE DESCRIPTION
Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.
DE Package
14-Lead Plastic DFN (4mm × 3mm)
(Reference LTC DWG # 05-08-1708 Rev B)
0.70 0.05
3.30 0.05
1.70 0.05
3.60 0.05
2.20 0.05
PACKAGE
OUTLINE
0.25 0.05
0.50 BSC
3.00 REF
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED
R = 0.115
TYP
0.40 0.10
4.00 0.10
(2 SIDES)
8
14
R = 0.05
TYP
3.30 0.10
3.00 0.10
(2 SIDES)
1.70 0.10
PIN 1 NOTCH
R = 0.20 OR
0.35 ¥ 45
PIN 1
TOP MARK
(SEE NOTE 6)
CHAMFER
(DE14) DFN 0806 REV B
7
1
0.25 0.05
0.50 BSC
0.75 0.05
0.200 REF
3.00 REF
0.00 – 0.05
BOTTOM VIEW—EXPOSED PAD
NOTE:
1. DRAWING PROPOSED TO BE MADE VARIATION OF VERSION (WGED-3) IN JEDEC
PACKAGE OUTLINE MO-229
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE
TOP AND BOTTOM OF PACKAGE
408534fb
22
LTC4085-3/LTC4085-4
REVISION HISTORY
REV DATE
DESCRIPTION
PAGE NUMBER
A
B
4/10
5/12
Updated Block Diagram
10
Added new part number LTC4085-4
throughout
Added feature bullet for LTC4085-3 version
Added table of product options
1
2
Enhanced Note 5 to add testing conditions
Enhanced Charger Undervoltage Lockout section for LTC4085-3 version
4
18
408534fb
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
23
LTC4085-3/LTC4085-4
TYPICAL APPLICATION
USB Power Control Application with Wall Adapter Input
5V WALL
ADAPTER
INPUT
TO LDOs
REGs, ETC
4.7μF
1Ω*
4.7μF
1k
510Ω 510Ω
OUT
5V (NOM)
FROM USB
IN
CABLE V
BUS
4.7μF
1Ω*
CHRG
ACPR
WALL
GATE
BAT
LTC4085-3/
LTC4085-4
V
+
NTC
Li-Ion
CELL
R
NTCBIAS
10k
NTC
R
NTC
SUSPEND USB POWER
500mA/100mA SELECT
SUSP
10k
HPWR
TIMER
GND
CLPROG
PROG
R
0.15μF
*SERIES 1Ω RESISTOR ONLY
NEEDED FOR INDUCTIVE
INPUT SUPPLIES
R
PROG
CLPROG
71.5k
2.1k
408534 TA02
RELATED PARTS
PART NUMBER
DESCRIPTION
COMMENTS
Battery Chargers
LTC4065/LTC4065A
Standalone Li-Ion Battery Chargers in 2 × 2 DFN
4.2V, 0.6% Float Voltage, Up to 750mA Charge Current, 2mm × 2mm DFN,
“A” Version has ACPR Function.
LTC4095
Standalone LSB Li-Ion Polymer Battery Charger
2mm × 2mm DFN
950μA Charge Current, Timer Termination +C/10 Detection Output, 4.2V 0.6%
Accurate Float Voltage 4 CHRG Pin Indicator States
Power Management
LTC3455
Dual DC/DC Converter with USB Power Manager
and Li-Ion Battery Charger
Seamless Transition Between Power Souces: USB, Wall Adapter and Battery;
95% Efficient DC/DC Conversion
LTC4055
LTC4066
LTC4085
USB Power Controller and Battery Charger
Charges Single Cell Li-Ion Batteries Directly from a USB Port, Thermal
Regulation, 200mΩ Ideal Diode, 4mm × 4mm QFN16 Package
USB Power Controller and Battery Charger
Charges Single Cell Li-Ion Batteries Directly from a USB Port, Thermal
Regulation, 50mΩ Ideal Diode, 4mm × 4mm QFN24 Package
USB Power Manager with Ideal Diode Controller
and Li-Ion Charger
Charges Single Cell Li-Ion Batteries Directly from a USB Port, Thermal
Regulation, 200mΩ Ideal Diode with <50mΩ Option, 4mm × 3mm DFN14
Package
LTC4089/LTC4089-1/ High Voltage USB Power Manager with Ideal
High Efficiency 1.2A Charger from 6V to 36V (40V max) Input Charges Single
LTC4089-5
Diode Controller and High Efficiency Li-Ion Battery Cell Li-Ion Batteries Directly from a USB Port, Thermal Regulation; 200mΩ
Charger
Ideal Diode with <50mΩ option, 3mm × 4mm DFN-14 Package, Bat-Track™
Adaptive Output Control (LTC4089/-1); Fixed 5V Output (LTC4089-5) “-1” for
4.1V Float Voltage Batteries
LTC4090
High Voltage USB Power Manager with Ideal
High Efficiency 1.2A Charger from 6V to 36V (60V max) Input Charges Single
Diode Controller and High Efficiency Li-Ion Battery Cell Li-Ion Batteries Directly from a USB Port, Thermal Regulation; 200mΩ
Charger
Ideal Diode with <50mΩ option, 3mm × 4mm DFN-14 Package, Bat-Track
Adaptive Output Control
LTC4411/LTC4412
Low Loss PowerPath Controller in ThinSOT
Automatic Switching Between DC Sources, Load Sharing,
Replaces ORing Diodes
408534fb
LT 0512 REV B • PRINTED IN USA
LinearTechnology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
24
●
●
(408) 432-1900 FAX: (408) 434-0507 www.linear.com
© LINEAR TECHNOLOGY CORPORATION 2011
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