LTC3639 [Linear]
High Efficiency, 150V High Efficiency, 150V Step-Down Regulator; 高效率， 150V高效率， 150V降压型稳压器
| 型号： | LTC3639 |
| 厂家： | 
Linear |
| 描述： | High Efficiency, 150V High Efficiency, 150V Step-Down Regulator |
| 文件： | 总24页 (文件大小：373K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
LTC3639
High Efficiency, 150V
100mA Synchronous
Step-Down Regulator
FeaTures
DescripTion
The LTC®3639 is a high efficiency step-down DC/DC
regulator with internal high side and synchronous power
switches that draws only 12μA typical DC supply current
while maintaining a regulated output voltage at no load.
n
Wide Operating Input Voltage Range: 4V to 150V
n
Synchronous Operation for Highest Efficiency
n
Internal High Side and Low Side Power MOSFETs
n
No Compensation Required
n
Adjustable 10mA to 100mA Maximum Output
The LTC3639 can supply up to 100mA load current and
features a programmable peak current limit that provides
a simple method for optimizing efficiency and for reduc-
ing output ripple and component size. The LTC3639’s
combination of Burst Mode® operation, integrated power
switches, low quiescent current, and programmable peak
current limit provides high efficiency over a broad range
of load currents.
Current
n
Low Dropout Operation: 100% Duty Cycle
n
Low Quiescent Current: 12µA
Wide Output Range: 0.8V to V
n
IN
n
n
n
n
n
n
n
0.8V 1% Feedback Voltage Reference
Precise RUN Pin Threshold
Internal or External Soft-Start
Programmable 1.8V, 3.3V, 5V or Adjustable Output
Few External Components Required
Programmable Input Overvoltage Lockout
Thermally Enhanced High Voltage MSOP Package
Withitswideinputrangeof4Vto150Vandprogrammable
overvoltage lockout, the LTC3639 is a robust regulator
suitedforregulatingfromawidevarietyofpowersources.
Additionally, theLTC3639includesaprecise runthreshold
and soft-start feature to guarantee that the power system
start-up is well-controlled in any environment. A feedback
comparator output enables multiple LTC3639s to be con-
nected in parallel for higher current applications.
applicaTions
n
Industrial Control Supplies
n
Medical Devices
n
Distributed Power Systems
The LTC3639 is available in a thermally enhanced high
voltage-capable16-leadMSEpackagewithfourmissingpins.
L, LT, LTC, LTM, Burst Mode, Linear Technology and the Linear logo are registered trademarks
of Linear Technology Corporation. All other trademarks are the property of their respective
owners.
n
Portable Instruments
n
Battery-Operated Devices
n
Automotive
Avionics
n
Typical applicaTion
Efficiency and Power Loss vs Load Current
100
V
= 5V
OUT
EFFICIENCY
90
80
70
60
50
40
30
20
10
0
5V to 150V Input to 5V Output, 100mA Step-Down Regulator
1000
100
10
470µH
V
OUT
V
IN
V
IN
V
IN
V
IN
V
IN
= 12V
= 36V
= 72V
= 150V
5V
V
SW
LTC3639
IN
5V TO 150V
1µF
200V
100mA
10µF
RUN
V
FB
OVLO
SS
POWER LOSS
V
PRG2
V
PRG1
GND
3639 TA01a
1
0.1
1
10
100
LOAD CURRENT (mA)
3639 TA01b
3639f
1
For more information www.linear.com/LTC3639
LTC3639
absoluTe MaxiMuM raTings
pin conFiguraTion
(Note 1)
TOP VIEW
V Supply Voltage................................... –0.3V to 150V
IN
1
3
SW
16 GND
14 RUN
12 OVLO
RUN Voltage............................................. –0.3V to 150V
V
IN
17
SS, FBO, OVLO, I
FB PRG1 PRG2
Voltages...................... –0.3V to 6V
SET
5
6
7
8
FBO
PRG2
PRG1
GND
GND
V
V
11
I
SET
V , V
, V
Voltages ......................... –0.3V to 6V
10 SS
Operating Junction Temperature Range (Notes 2, 3)
LTC3639E, LTC3639I......................... –40°C to 125°C
LTC3639H.......................................... –40°C to 150°C
LTC3639MP....................................... –55°C to 150°C
Storage Temperature Range .................. –65°C to 150°C
Lead Temperature (Soldering, 10 sec)...................300°C
9
V
FB
MSE PACKAGE
VARIATION: MSE16 (12)
16-LEAD PLASTIC MSOP
= 150°C, θ = 40°C/W, θ = 10°C/W
JA JC
EXPOSED PAD (PIN 17) IS GND, MUST BE SOLDERED TO PCB
T
JMAX
orDer inForMaTion
LEAD FREE FINISH
LTC3639EMSE#PBF
LTC3639IMSE#PBF
LTC3639HMSE#PBF
LTC3639MPMSE#PBF
TAPE AND REEL
PART MARKING*
PACKAGE DESCRIPTION
TEMPERATURE RANGE
LTC3639EMSE#TRPBF
LTC3639IMSE#TRPBF
LTC3639HMSE#TRPBF
3639
3639
3639
16-Lead Plastic MSOP
16-Lead Plastic MSOP
16-Lead Plastic MSOP
16-Lead Plastic MSOP
–40°C to 125°C
–40°C to 125°C
–40°C to 150°C
–55°C to 150°C
LTC3639MPMSE#TRPBF 3639
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
Consult LTC Marketing for information on non-standard lead based finish parts.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
elecTrical characTerisTics The l denotes the specifications which apply over the specified operating
junction temperature range, otherwise specifications are at TA = 25°C (Note 2). VIN = 12V, unless otherwise noted.
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
Input Supply (V )
IN
V
V
Input Voltage Operating Range
Output Voltage Operating Range
4
150
V
V
IN
0.8
V
IN
OUT
l
l
UVLO
V
Undervoltage Lockout
V
V
Rising
Falling
3.5
3.3
3.75
3.5
250
4.0
3.8
V
V
mV
IN
IN
IN
Hysteresis
I
DC Supply Current (Note 4)
Active Mode
Q
150
12
1.4
350
22
6
µA
µA
µA
Sleep Mode
No Load
RUN
Shutdown Mode
V
= 0V
V
RUN Pin Threshold
RUN Rising
RUN Falling
Hysteresis
1.17
1.06
1.21
1.10
110
1.25
1.14
V
V
mV
RUN
I
RUN Pin Leakage Current
OVLO Pin Threshold
RUN = 1.3V
–10
0
10
nA
RUN
V
OVLO Rising
OVLO Falling
Hysteresis
1.17
1.06
1.21
1.10
110
1.25
1.14
V
V
mV
OVLO
3639f
2
For more information www.linear.com/LTC3639
LTC3639
elecTrical characTerisTics The l denotes the specifications which apply over the specified operating
junction temperature range, otherwise specifications are at TA = 25°C (Note 2). VIN = 12V, unless otherwise noted.
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
Output Supply (V
)
FB
V
V
Feedback Comparator Threshold
(Adjustable Output)
V
Rising, V
= V
PRG2
= 0V
= 0V
FB(ADJ)
FBH
FB
PRG1
l
l
LTC3639E, LTC3639I
LTC3639H, LTC3639MP
0.792
0.788
0.800
0.800
0.808
0.812
V
V
l
Feedback Comparator Hysteresis
(Adjustable Output)
V
Falling, V
= V
PRG2
3
5
9
mV
FB
PRG1
I
Feedback Pin Current
V
= 1V, V
= V = 0V
PRG2
–10
0
10
nA
FB
FB
PRG1
l
l
V
Feedback Comparator Thresholds
(Fixed Output)
V
V
Rising, V
Falling, V
= SS, V
= SS, V
= 0V
= 0V
4.94
4.91
5.015
4.985
5.09
5.06
V
V
FB(FIXED)
FB
FB
PRG1
PRG1
PRG2
PRG2
l
l
V
V
Rising, V
Falling, V
= 0V, V
= 0V, V
= SS
= SS
3.26
3.24
3.31
3.29
3.36
3.34
V
V
FB
FB
PRG1
PRG1
PRG2
PRG2
l
l
V
V
Rising, V
Falling, V
= V
= V
= SS
= SS
1.78
1.77
1.81
1.80
1.84
1.83
V
V
FB
FB
PRG1
PRG1
PRG2
PRG2
Operation
l
l
l
I
Peak Current Comparator Threshold
I
Floating
200
100
17
230
120
25
260
140
30
mA
mA
mA
PEAK
SET
100k Resistor from I to GND
SET
I
Shorted to GND
SET
R
Power Switch On-Resistance
Top Switch
Bottom Switch
ON
I
SW
I
SW
= –50mA
= 50mA
4.2
2.2
Ω
Ω
I
I
t
Switch Pin Leakage Current
Soft-Start Pin Pull-Up Current
Internal Soft-Start Time
V
V
= 150V, SW = 0V
< 2.5V
0.1
5
1
6
μA
μA
ms
LSW
SS
IN
4
SS
SS Pin Floating
1
INT(SS)
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
maximum ambient temperature consistent with these specifications is
determined by specific operating conditions in conjunction with board
layout, the rated package thermal impedance and other environmental
factors.
Note 2: The LTC3639 is tested under pulsed load conditions such that
Note 3: The junction temperature (T , in °C) is calculated from the ambient
temperature (T , in °C) and power dissipation (P , in Watts) according to
A D
J
T ≈ T . The LTC3639E is guaranteed to meet performance specifications
J
A
from 0°C to 85°C. Specifications over the –40°C to 125°C operating
junction temperature range are assured by design, characterization and
correlation with statistical process controls. The LTC3639I is guaranteed
over the –40°C to 125°C operating junction temperature range, the
LTC3639H is guaranteed over the –40°C to 150°C operating junction
temperature range and the LTC3639MP is tested and guaranteed over the
–55°C to 150°C operating junction temperature range.
the formula:
T = T + (P • θ )
JA
J
A
D
where θ is 40°C/W for the MSOP package.
JA
Note that the maximum ambient temperature consistent with these
specifications is determined by specific operating conditions in
conjunction with board layout, the rated package thermal impedance and
other environmental factors.
Note 4: Dynamic supply current is higher due to the gate charge being
delivered at the switching frequency. See Applications Information.
High junction temperatures degrade operating lifetimes; operating lifetime
is derated for junction temperatures greater than 125°C. Note that the
3639f
3
For more information www.linear.com/LTC3639
LTC3639
Typical perForMance characTerisTics
Efficiency vs Load Current,
VOUT = 5V
Efficiency vs Load Current,
VOUT = 3.3V
Efficiency vs Load Current,
VOUT = 1.8V
100
90
80
70
60
50
40
30
20
10
0
100
90
80
70
60
50
40
30
20
10
0
100
90
80
70
60
50
40
30
20
10
0
I
OPEN
I
OPEN
I
OPEN
SET
SET
SET
FIGURE 14 CIRCUIT
FIGURE 14 CIRCUIT
FIGURE 14 CIRCUIT
V
V
V
V
= 12V
= 36V
= 72V
= 150V
V
V
V
V
= 12V
= 36V
= 72V
= 150V
V
IN
V
IN
V
IN
V
IN
= 12V
= 36V
= 72V
= 150V
IN
IN
IN
IN
IN
IN
IN
IN
0.1
1
10
100
0.1
1
10
100
0.1
1
10
100
LOAD CURRENT (mA)
LOAD CURRENT (mA)
LOAD CURRENT (mA)
3639 G01
3639 G02
3639 G03
Efficiency vs Input Voltage,
OUT = 5V
Feedback Comparator Trip
Threshold vs Temperature
RUN and OVLO Comparator
Threshold vs Temperature
V
100
90
80
70
60
50
40
30
20
10
0
802
801
800
799
I
OPEN
SET
1.24
1.22
1.20
1.18
1.16
1.14
1.12
1.10
1.08
1.06
FIGURE 14 CIRCUIT
RISING
FALLING
I
I
I
= 100mA
= 10mA
= 1mA
LOAD
LOAD
LOAD
798
0
25
50
75
100
125
150
–55 –25
5
35
65
95 125 155
65
TEMPERATURE (°C)
125 155
–55 –25
5
35
95
TEMPERATURE (°C)
V
VOLTAGE (V)
IN
3639 G05
3639 G04
3639 G06
Peak Current Trip Threshold
vs RISET
Peak Current Trip Threshold
vs Temperature
Peak Current Trip Threshold
vs Input Voltage
300
250
200
150
100
50
300
250
200
150
100
50
250
200
150
100
50
I
OPEN
SET
I
OPEN
SET
R
= 100kΩ
R
ISET
= 100kΩ
ISET
I
= GND
65
I
= GND
90
SET
SET
0
0
0
95
60
–55 –25
5
35
125 155
0
30
120
150
25 50 75 100 125 150
200
175
0
TEMPERATURE (°C)
V
VOLTAGE (V)
IN
R
ISET
(kΩ)
3639 G08
3639 G09
3639 G07
3639f
4
For more information www.linear.com/LTC3639
LTC3639
Typical perForMance characTerisTics
Quiescent Supply Current
vs Input Voltage
Quiescent Supply Current
vs Temperature
Switch Leakage Current
vs Temperature
15
10
5
30
25
20
15
10
5
8
7
V
= 150V
V
= 150V
IN
IN
6
SLEEP
5
4
3
SLEEP
2
SW = 150V
1
0
SHUTDOWN
SW = 0V
–1
SHUTDOWN
–2
0
0
–25
5
65
95 125 155
–55
35
0
30
60
90
120
150
–55 –25
5
35
65
95 125 155
V
VOLTAGE (V)
TEMPERATURE (°C)
TEMPERATURE (°C)
IN
3639 G12
3639 G10
3639 G11
Switch On-Resistance
vs Input Voltage
Switch On-Resistance
vs Temperature
Load Step Transient Response
7
6
5
4
3
2
1
8
7
6
5
4
3
2
1
OUTPUT
VOLTAGE
50mV/DIV
TOP
LOAD
CURRENT
50mA/DIV
TOP
3639 G15
BOTTOM
V
V
= 48V
200µs/DIV
IN
OUT
= 3.3V
BOTTOM
1mA TO 100mA LOAD STEP
FIGURE 15 CIRCUIT
–25
5
65
95 125 155
0
30
60
VOLTAGE (V)
90
120
150
–55
35
V
TEMPERATURE (°C)
IN
3639 G14
3639 G13
Operating Waveforms, VIN = 48V
Operating Waveforms, VIN = 150V
Short-Circuit and Recovery
OUTPUT
VOLTAGE
50mV/DIV
OUTPUT
VOLTAGE
50mV/DIV
OUTPUT
VOLTAGE
1V/DIV
SWITCH
VOLTAGE
20V/DIV
SWITCH
VOLTAGE
50V/DIV
INDUCTOR
CURRENT
100mA/DIV
INDUCTOR
CURRENT
200mA/DIV
INDUCTOR
CURRENT
200mA/DIV
3639 G18
3639 G16
3639 G17
500µs/DIV
FIGURE 15 CIRCUIT
V
V
= 48V
10µs/DIV
V
V
= 150V
= 3.3V
10µs/DIV
IN
IN
OUT
OUT
= 3.3V
OUT
OUT
I
= 100mA
I
= 50mA
FIGURE 15 CIRCUIT
FIGURE 15 CIRCUIT
3639f
5
For more information www.linear.com/LTC3639
LTC3639
pin FuncTions
SW (Pin 1): Switch Node Connection to Inductor. This
pin connects to the drains of the internal power MOSFET
switches.
I
(Pin 11): Peak Current Set Input. A resistor from this
SET
pin to ground sets the peak current comparator threshold.
Leave floating for the maximum peak current (230mA
typical) or short to ground for minimum peak current
(25mA typical). The maximum output current is one-half
the peak current. The 5µA current that is sourced out of
this pin when switching is reduced to 1µA in sleep. Op-
tionally, a capacitor can be placed from this pin to GND
to trade off efficiency for light load output voltage ripple.
See Applications Information.
V (Pin 3): Main Supply Pin. A ceramic bypass capacitor
IN
should be tied between this pin and GND.
FBO(Pin5):FeedbackComparatorOutput. Connecttothe
V
pins of additional LTC3639s to combine the output
FB
current.Thetypicalpull-upcurrentis20µA.Thetypicalpull-
down impedance is 70Ω. See Applications Information.
V
, V
(Pins 6, 7): Output Voltage Selection. Short
OVLO (Pin 12): Overvoltage Lockout Input. Connect to
the input supply through a resistor divider to set the over-
voltage lockout level. A voltage on this pin above 1.21V
disables the internal MOSFET switches. Normal operation
resumes when the voltage on this pin decreases below
1.10V. Exceeding the OVLO lockout threshold triggers a
soft-start reset, resulting in a graceful recovery from an
input supply transient.
PRG2 PRG1
both pins to ground for a resistive divider programmable
output voltage. Short V to SS and short V to
PRG1
PRG2
to ground
ground for a 5V output voltage. Short V
PRG1
and short V
to SS for a 3.3V output voltage. Short
PRG2
both pins to SS for a 1.8V output voltage.
GND (Pin 8, 16, Exposed Pad Pin 17): Ground. The ex-
posed pad must be soldered to the PCB ground plane for
rated thermal performance.
RUN (Pin 14): Run Control Input. A voltage on this pin
above 1.21V enables normal operation. Forcing this pin
below 0.7V shuts down the LTC3639, reducing quiescent
current to approximately 1.4µA. Optionally, connect to
the input supply through a resistor divider to set the
undervoltage lockout.
V
(Pin 9): Output Voltage Feedback. When configured
FB
for an adjustable output voltage, connect to an external
resistive divider to divide the output voltage down for
comparison to the 0.8V reference. For the fixed output
configuration, directly connect this pin to the output.
SS (Pin 10): Soft-Start Control Input. A capacitor to
ground at this pin sets the output voltage ramp time. A
50µA current initially charges the soft-start capacitor until
switching begins, at which time the current is reduced to
its nominal value of 5µA. The output voltage ramp time
from zero to its regulated value is 1ms for every 6.25nF
of capacitance from SS to GND. If left floating, the ramp
time defaults to an internal 1ms soft-start.
3639f
6
For more information www.linear.com/LTC3639
LTC3639
block DiagraM
1.3V
V
IN
ACTIVE: 5µA
SLEEP: 1µA
3
+
I
SET
11
C
IN
PEAK CURRENT
COMPARATOR
+
–
RUN
14
12
+
–
1.21V
OVLO
LOGIC
AND
L1
SW
SHOOT-
1
V
OUT
THROUGH
PREVENTION
–
+
C
OUT
GND
16
1.21V
+
–
5V
REVERSE CURRENT
COMPARATOR
20µA
FEEDBACK
COMPARATOR
VOLTAGE
5V
REFERENCE
FBO
START-UP: 50µA
NORMAL: 5µA
0.800V
+
+
–
5
SS
70Ω
10
R1
V
FB
9
7
6
V
V
PRG1
PRG2
R2
GND
GND
8
V
V
V
R1
R2
PRG2
PRG1
OUT
17
GND GND ADJUSTABLE 1.0M
∞
IMPLEMENT DIVIDER
EXTERNALLY FOR
ADJUSTABLE VERSION
GND
SS
SS
SS
GND
SS
5V FIXED 4.2M 800k
3.3V FIXED 2.5M 800k
1.8V FIXED 1.0M 800k
3639 BD
3639f
7
For more information www.linear.com/LTC3639
LTC3639
(Refer to Block Diagram)
operaTion
TheLTC3639isasynchronousstep-downDC/DCregulator
with internal power switches that uses Burst Mode con-
trol, combining low quiescent current with high switching
frequency, which results in high efficiency across a wide
range of load currents. Burst Mode operation functions by
using short “burst” cycles to switch the inductor current
through the internal power MOSFETs, followed by a sleep
cycle where the power switches are off and the load cur-
rent is supplied by the output capacitor. During the sleep
cycle, the LTC3639 draws only 12µA of supply current.
At light loads, the burst cycles are a small percentage of
the total cycle time which minimizes the average supply
current, greatly improving efficiency. Figure 1 shows an
exampleofBurstModeoperation.Theswitchingfrequency
is dependent on the inductor value, peak current, input
voltage and output voltage.
Externalfeedbackresistors(adjustablemode)canbeused
by connecting both V
and V to ground.
PRG1
PRG2
In adjustable mode the feedback comparator monitors
the voltage on the V pin and compares it to an internal
FB
800mV reference. If this voltage is greater than the refer-
ence, the comparator activates a sleep mode in which the
power switches and current comparators are disabled,
reducing the V pin supply current to only 12µA. As the
IN
load current discharges the output capacitor, the voltage
on the V pin decreases. When this voltage falls 5mV
FB
below the 800mV reference, the feedback comparator
trips and enables burst cycles.
At the beginning of the burst cycle, the internal high side
power switch (P-channel MOSFET) is turned on and the
inductor current begins to ramp up. The inductor current
increases until either the current exceeds the peak cur-
SLEEP
CYCLE
rent comparator threshold or the voltage on the V pin
FB
SWITCHING
FREQUENCY
exceeds 800mV, at which time the high side power switch
is turned off and the low side power switch (N-channel
MOSFET)turnson. Theinductorcurrentrampsdownuntil
the reverse current comparator trips, signaling that the
BURST
CYCLE
INDUCTOR
CURRENT
current is close to zero. If the voltage on the V pin is
FB
BURST
FREQUENCY
still less than the 800mV reference, the high side power
switch is turned on again and another cycle commences.
The average current during a burst cycle will normally be
greaterthantheaverageloadcurrent.Forthisarchitecture,
the maximum average output current is equal to half of
the peak current.
OUTPUT
VOLTAGE
∆V
3639 F01
OUT
Figure 1. Burst Mode Operation
The hysteretic nature of this control architecture results
in a switching frequency that is a function of the input
voltage, output voltage, and inductor value. This behavior
provides inherent short-circuit protection. If the output is
shorted to ground, the inductor current will decay very
slowly during a single switching cycle. Since the high side
switch turns on only when the inductor current is near
zero,theLTC3639inherentlyswitchesatalowerfrequency
during start-up or short-circuit conditions.
Main Control Loop
The LTC3639 uses the V
connect internal feedback resistors to the V pin. This
enables fixed outputs of 1.8V, 3.3V or 5V without increas-
ing component count, input supply current or exposure to
noise on the sensitive input to the feedback comparator.
and V
control pins to
PRG2
PRG1
FB
3639f
8
For more information www.linear.com/LTC3639
LTC3639
(Refer to Block Diagram)
operaTion
Start-Up and Shutdown
For applications requiring higher output current, the
LTC3639providesafeedbackcomparatoroutputpin(FBO)
for combining the output current of multiple LTC3639s.
IfthevoltageontheRUNpinislessthan0.7V, theLTC3639
enters a shutdown mode in which all internal circuitry is
disabled,reducingtheDCsupplycurrentto1.4µA.Whenthe
voltageontheRUNpinexceeds1.21V,normaloperationof
the main control loop is enabled. The RUN pin comparator
has 110mV of internal hysteresis, and therefore must fall
below 1.1V to disable the main control loop.
By connecting the FBO pin of a master LTC3639 to the V
FB
pin of one or more slave LTC3639s, the output currents
can be combined to source 100mA times the number of
LTC3639s.
Dropout Operation
An internal 1ms soft-start function limits the ramp rate of
the output voltage on start-up to prevent excessive input
supply droop. If a longer ramp time and consequently less
supplydroopisdesired,acapacitorcanbeplacedfromthe
SS pin to ground. The 5µA current that is sourced out of
thispinwillcreateasmoothvoltageramponthecapacitor.
If this ramp rate is slower than the internal 1ms soft-start,
then the output voltage will be limited by the ramp rate
on the SS pin instead. The internal and external soft-start
functions are reset on start-up and after an undervoltage
or overvoltage event on the input supply.
When the input supply decreases toward the output sup-
ply, the duty cycle increases to maintain regulation. The
P-channel MOSFET top switch in the LTC3639 allows
the duty cycle to increase all the way to 100%. At 100%
duty cycle, the P-channel MOSFET stays on continuously,
providing output current equal to the peak current, which
is twice the maximum load current when not in dropout.
Input Undervoltage and Overvoltage Lockout
The LTC3639 additionally implements protection features
whichinhibitswitchingwhentheinputvoltageisnotwithin
a programmable operating range. By use of a resistive
divider from the input supply to ground, the RUN and
OVLO pins serve as a precise input supply voltage moni-
tor. Switching is disabled when either the RUN pin falls
below 1.1V or the OVLO pin rises above 1.21V, which can
beconfiguredtolimitswitchingtoaspecificrangeofinput
supplyvoltage.Furthermore,iftheinputvoltagefallsbelow
3.5V typical (3.8V maximum), an internal undervoltage
detector disables switching.
Peak Inductor Current Programming
The peak current comparator nominally limits the peak
inductor current to 230mA. This peak inductor current
can be adjusted by placing a resistor from the I pin to
SET
ground. The 5µA current sourced out of this pin through
the resistor generates a voltage that adjusts the peak cur-
rent comparator threshold.
During sleep mode, the current sourced out of the I pin
SET
isreducedto1µA.TheI currentisincreasedbackto5µA
SET
Whenswitchingisdisabled,theLTC3639cansafelysustain
input voltages up to the absolute maximum rating of 150V.
Input supply undervoltage or overvoltage events trigger a
soft-start reset, which results in a graceful recovery from
an input supply transient.
on the first switching cycle after exiting sleep mode. The
I
current reduction in sleep mode, along with adding
SET
a filtering capacitor, C , from the I
pin to ground,
ISET
SET
provides a method of reducing light load output voltage
ripple at the expense of lower efficiency and slightly de-
graded load step transient response.
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ThebasicLTC3639applicationcircuitisshownonthefront
page of this data sheet. External component selection is
determinedbythemaximumloadcurrentrequirementand
beginswiththeselectionofthepeakcurrentprogramming
The internal 5μA current source is reduced to 1μA in sleep
mode to maximize efficiency and to facilitate a tradeoff
between efficiency and light load output voltage ripple, as
describedintheOptimizingOutputVoltageRipplesection.
resistor,R .TheinductorvalueLcanthenbedetermined,
ISET
The peakcurrent is internallylimited to be within the range
followed by capacitors C and C
.
IN
OUT
of 20mA to 200mA. Shorting the I pin to ground pro-
SET
gramsthecurrentlimitto20mA,andleavingitfloatingsets
the current limit to the maximum value of 200mA. When
selecting this resistor value, be aware that the maximum
average output current for this architecture is limited to
halfofthepeakcurrent.Therefore,besuretoselectavalue
that sets the peak current with enough margin to provide
adequate load current under all conditions. Selecting the
peak current to be 2.2 times greater than the maximum
load current is a good starting point for most applications.
Peak Current Resistor Selection
The peak current comparator has a maximum current
limit of at least 200mA, which guarantees a maximum
average current of 100mA. For applications that demand
less current, the peak current threshold can be reduced
to as little as 20mA. This lower peak current allows the
efficiency and component selection to be optimized for
lower current applications.
The peak current threshold is linearly proportional to the
Inductor Selection
voltageontheI pin, with100mVand1Vcorresponding
SET
to 20mA and 200mA peak current respectively. This pin
may be driven by an external voltage source to modulate
the peak current, which may be beneficial in some appli-
cations. Usually, the peak current is programmed with an
Theinductor,inputvoltage,outputvoltage,andpeakcurrent
determine the switching frequency during a burst cycle
of the LTC3639. For a given input voltage, output voltage,
and peak current, the inductor value sets the switching
frequency during a burst cycle when the output is in regu-
lation. Generally, switching at a frequency between 50kHz
and 200kHz yields high efficiency, and 100kHz is a good
first choice for many applications. The inductor value can
be determined by the following equation:
appropriately chosen resistor (R ) between the I pin
ISET
SET
andground. ThevoltagegeneratedontheI pinbyR
SET
ISET
and the internal 5µA current source sets the peak current.
The value of resistor for a particular peak current can be
computed by using Figure 2 or the following equation:
6
R
= I
• 10
ISET
PEAK
VOUT
f •I
VOUT
L =
• 1–
PEAK
where 20mA < I
< 200mA.
V
PEAK
IN
250
The variation in switching frequency during a burst cycle
withinputvoltageandinductanceisshowninFigure3. For
200
150
100
50
lower values of I
, multiply the frequency in Figure 3
PEAK
.
TYPICAL PEAK
INDUCTOR
CURRENT
by 230mA/I
PEAK
AnadditionalconstraintontheinductorvalueistheLTC3639’s
150nsminimumon-timeofthehighsideswitch. Therefore,
in order to keep the current in the inductor well-controlled,
MAXIMUM
LOAD
CURRENT
0
0
25 50 75 100 125 150 175 200
(kΩ)
R
ISET
3639 F02
Figure 2. RISET Selection
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140
10000
1000
100
I
OPEN
SET
120
100
80
60
40
20
0
L = 100µH
L = 220µH
L = 330µH
30
60
90
0
120
150
10
100
300
V
INPUT VOLTAGE (V)
PEAK INDUCTOR CURRENT (mA)
IN
3639 F03
3639 F04
Figure 4. Recommended Inductor Values for Maximum Efficiency
Figure 3. Switching Frequency for VOUT = 3.3V
the inductor value must be chosen so that it is larger than a
minimum value which can be computed as follows:
Inductor Core Selection
Once the value for L is known, the type of inductor must
be selected. High efficiency regulators generally cannot
affordthecorelossfoundinlowcostpowderedironcores,
forcing the use of the more expensive ferrite cores. Actual
core loss is independent of core size for a fixed inductor
value but is very dependent of the inductance selected.
As the inductance increases, core losses decrease. Un-
fortunately, increased inductance requires more turns of
wire and therefore copper losses will increase.
V
IN(MAX) •t
L >
ON(MIN) •1.2
IPEAK
whereV
isthemaximuminputsupplyvoltagewhen
IN(MAX)
switching is enabled, t
is 150ns, I
is the peak
ON(MIN)
PEAK
current, and the factor of 1.2 accounts for typical inductor
tolerance and variation over temperature.
For applications that have large input supply transients,
the OVLO pin can be used to disable switching above the
Ferrite designs have very low core losses and are pre-
ferred at high switching frequencies, so design goals
can concentrate on copper loss and preventing satura-
tion. Ferrite core material saturates “hard,” which means
that inductance collapses abruptly when the peak design
current is exceeded. This results in an abrupt increase in
inductor ripple current and consequently output voltage
ripple. Do not allow the core to saturate!
maximumoperatingvoltageV
sothattheminimum
IN(MAX)
inductor value is not artificially limited by a transient
condition. Inductor values that violate the above equation
will cause the peak current to overshoot and permanent
damage to the part may occur.
Although the previous equation provides the minimum
inductorvalue, higherefficiencyisgenerallyachievedwith
a larger inductor value, which produces a lower switching
frequency. For a given inductor type, however, as induc-
tance is increased DC resistance (DCR) also increases.
HigherDCRtranslatesintohighercopperlossesandlower
current rating, both of which place an upper limit on the
inductance. The recommended range of inductor values
for small surface mount inductors as a function of peak
current is shown in Figure 4. The values in this range are a
goodcompromisebetweenthetrade-offsdiscussedabove.
For applications where board area is not a limiting factor,
inductors with larger cores can be used, which extends
the recommended range of Figure 4 to larger values.
Different core materials and shapes will change the size/
currentandprice/currentrelationshipofaninductor.Toroid
or shielded pot cores in ferrite or permalloy materials are
small and do not radiate energy but generally cost more
than powdered iron core inductors with similar charac-
teristics. The choice of which style inductor to use mainly
depends on the price versus size requirements and any
radiated field/EMI requirements. New designs for surface
mount inductors are available from Coiltronics, Coilcraft,
TDK, Toko, and Sumida.
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C and C
Selection
Theoutputrippleisamaximumatnoloadandapproaches
lower limit of V /160 at full load. Choose the output
IN
OUT
OUT
The input capacitor, C , is needed to filter the trapezoidal
IN
capacitor C
to limit the output voltage ripple ∆V
OUT
OUT
currentatthesourceofthetophighsideMOSFET.C should
IN
using the following equation:
be sized to provide the energy required to magnetize the
I
PEAK •2•10–6
inductor without causing a large decrease in input voltage
COUT
≥
(∆V ). The relationship between C and ∆V is given by:
IN
IN
IN
VOUT
∆VOUT
–
2
L•IPEAK
160
CIN >
2•V •∆V
IN
IN
Thevalueoftheoutputcapacitormustalsobelargeenough
to accept the energy stored in the inductor without a large
change in output voltage during a single switching cycle.
It is recommended to use a larger value for C than
IN
calculated by the previous equation since capacitance
decreases with applied voltage. In general, a 1µF X7R ce-
Setting this voltage step equal to 1% of the output voltage,
the output capacitor must be:
ramic capacitor is a good choice for C in most LTC3639
IN
applications.
2
L
COUT > •
2
IPEAK
100%
1%
To prevent large ripple voltage, a low ESR input capacitor
sized for the maximum RMS current should be used. RMS
current is given by:
•
V
OUT
Typically, a capacitor that satisfies the voltage ripple re-
quirementisadequatetofiltertheinductorripple. Toavoid
overheating, the output capacitor must also be sized to
handle the ripple current generated by the inductor. The
worst-case ripple current in the output capacitor is given
VOUT
V
VOUT
IN
IRMS =IOUT(MAX)
•
•
–1
V
IN
This formula has a maximum at V = 2V , where I =
RMS
IN
OUT
by I
= I /2. Multiple capacitors placed in parallel
PEAK
I
/2.Thissimpleworst-caseconditioniscommonlyused
RMS
OUT
maybeneededtomeettheESRandRMScurrenthandling
requirements.
fordesignbecauseevensignificantdeviationsdonotoffer
muchrelief.Notethatripplecurrentratingsfromcapacitor
manufacturers are often based only on 2000 hours of life
which makes it advisable to further derate the capacitor,
or choose a capacitor rated at a higher temperature than
required.Severalcapacitorsmayalsobeparalleledtomeet
size or height requirements in the design.
Dry tantalum, special polymer, aluminum electrolytic,
and ceramic capacitors are all available in surface mount
packages. Special polymer capacitors offer very low ESR
but have lower capacitance density than other types.
Tantalum capacitors have the highest capacitance density
but it is important only to use types that have been surge
tested for use in switching power supplies. Aluminum
electrolytic capacitors have significantly higher ESR but
can be used in cost-sensitive applications provided that
consideration is given to ripple current ratings and long-
termreliability.CeramiccapacitorshaveexcellentlowESR
characteristics but can have high voltage coefficient and
audible piezoelectric effects. The high quality factor (Q)
of ceramic capacitors in series with trace inductance can
also lead to significant input voltage ringing.
The output capacitor, C , filters the inductor’s ripple
OUT
current and stores energy to satisfy the load current when
the LTC3639 is in sleep. The output ripple has a lower limit
of V /160 due to the 5mV typical hysteresis of the feed-
OUT
back comparator. The time delay of the comparator adds
an additional ripple voltage that is a function of the load
current. During this delay time, the LTC3639 continues to
switch and supply current to the output. The output ripple
can be approximated by:
4•10–6
COUT
VOUT
160
I
PEAK
2
∆VOUT
≈
–I
LOAD
•
+
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Input Voltage Steps
of current through the long wires can potentially cause
a voltage spike at V large enough to damage the part.
IN
If the input voltage falls below the regulated output volt-
age, the body diode of the internal high side MOSFET will
conduct current from the output supply to the input sup-
ply. If the input voltage falls rapidly, the voltage across the
inductorwillbesignificantandmaysaturatetheinductor.A
large current will then flow through the high side MOSFET
body diode, resulting in excessive power dissipation that
may damage the part.
For applications with inductive source impedance, such
as a long wire, a series RC network may be required in
parallel with C to dampen the ringing of the input supply.
IN
Figure 6 shows this circuit and the typical values required
todampentheringing. RefertoApplicationNote88forad-
ditionalinformationonsuppressinginputsupplytransients.
L
LTC3639
IN
If rapid voltage steps are expected on the input supply, put
V
IN
a small silicon or Schottky diode in series with the V pin
IN
LIN
CIN
R=
to prevent reverse current and inductor saturation, shown
below as D1 in Figure 5. The diode should be sized for a
reverse voltage of greater than the regulated output volt-
age, and to withstand repetitive currents higher than the
maximum peak current of the LTC3639.
3639 F06
C
IN
4 • C
IN
Figure 6. Series RC to Reduce VIN Ringing
LTC3639
Ceramic capacitors are also piezoelectric. The LTC3639’s
burst frequency depends on the load current, and in some
applications the LTC3639 can excite the ceramic capaci-
tor at audio frequencies, generating audible noise. This
noise is typically very quiet to a casual ear; however, if the
noise is unacceptable, use a high performance tantalum
or electrolytic capacitor at the output.
D1
L
V
SW
IN
INPUT
SUPPLY
V
OUT
C
C
OUT
IN
3639 F05
Figure 5. Preventing Current Flow to the Input
Ceramic Capacitors and Audible Noise
Output Voltage Programming
Higher value, lower cost ceramic capacitors are now be-
coming available in smaller case sizes. Their high ripple
current, high voltage rating, and low ESR make them ideal
for switching regulator applications. However, care must
be taken when these capacitors are used at the input and
output. When a ceramic capacitor is used at the input and
thepowerissuppliedbyawalladapterthroughlongwires,
a load step at the output can induce ringing at the input,
The LTC3639 has three fixed output voltage modes and
an adjustable mode that can be selected with the V
PRG1
and V
pins. The fixed output modes use an internal
PRG2
feedback divider which enables higher efficiency, higher
noise immunity, and lower output voltage ripple for 5V,
3.3V, and 1.8V applications. To select the fixed 5V output
voltage, connect V
to SS and V
to GND. For 3.3V,
to SS. For 1.8V, connect
PRG1
to GND and V
PRG2
V . At best, this ringing can couple to the output and be
IN
connect V
PRG1
PRG2
mistaken as loop instability. At worst, a sudden inrush
both V
and V
to SS. For any of the fixed output
PRG1
PRG2
voltage options, directly connect the V pin to V
.
FB
OUT
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V
OUT
For the adjustable output mode (V
= V
= GND),
PRG1
PRG2
the output voltage is set by an external resistive divider
according to the following equation:
R1
LTC3639
4.2M
V
5V
FB
R2
R1
R2
0.8V
VOUT = 0.8V • 1+
800k
SS
V
V
PRG1
PRG2
The resistive divider allows the V pin to sense a fraction
FB
of the output voltage as shown in Figure 7. The output
3639 F08
voltage can range from 0.8V to V . Be careful to keep
IN
Figure 8. Setting the Output Voltage with
External and Internal Resistors
the divider resistors very close to the V pin to minimize
FB
noise pick-up on the sensitive V trace.
FB
chosen to be less than 200k to keep the output voltage
variationlessthan1%duetothetoleranceoftheLTC3639’s
internal resistor.
V
OUT
R1
0.8V
V
FB
LTC3639
R2
RUN Pin and Overvoltage/Undervoltage Lockout
V
PRG1
V
PRG2
The LTC3639 has a low power shutdown mode controlled
by the RUN pin. Pulling the RUN pin below 0.7V puts the
LTC3639 into a low quiescent current shutdown mode
3639 F07
Figure 7. Setting the Output Voltage with External Resistors
(I ~ 1.4µA). When the RUN pin is greater than 1.21V,
Q
To minimize the no-load supply current, resistor values in
the megohm range may be used; however, large resistor
values should be used with caution. The feedback divider
is the only load current when in shutdown. If PCB leakage
currenttotheoutputnodeorswitchnodeexceedstheload
current, the output voltage will be pulled up. In normal
operation, this is generally a minor concern since the load
current is much greater than the leakage.
switching is enabled. Figure 9 shows examples of con-
figurations for driving the RUN pin from logic.
The RUN and OVLO pins can alternatively be configured
as precise undervoltage (UVLO) and overvoltage (OVLO)
lockoutsontheV supplywitharesistivedividerfromV
IN
IN
toground. Asimpleresistivedividercanbeusedasshown
in Figure 10 to meet specific V voltage requirements.
IN
The current that flows through the R3-R4-R5 divider will
directly add to the shutdown, sleep, and active current of
the LTC3639, and care should be taken to minimize the
impact of this current on the overall efficiency of the ap-
plicationcircuit.Resistorvaluesinthemegohmrangemay
berequiredtokeeptheimpactonquiescentshutdownand
sleep currents low. To pick resistor values, the sum total
To avoid excessively large values of R1 in high output volt-
age applications (V
≥ 10V), a combination of external
OUT
and internal resistors can be used to set the output volt-
age. This has an additional benefit of increasing the noise
immunity on the V pin. Figure 8 shows the LTC3639
FB
with the V pin configured for a 5V fixed output with an
FB
external divider to generate a higher output voltage. The
internal 5M resistance appears in parallel with R2, and the
value of R2 must be adjusted accordingly. R2 should be
of R3 + R4 + R5 (R
) should be chosen first based
TOTAL
on the allowable DC current that can be drawn from V .
IN
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V
IN
Be aware that the OVLO pin cannot be allowed to exceed
its absolute maximum rating of 6V. To keep the voltage
on the OVLO pin from exceeding 6V, the following relation
should be satisfied:
SUPPLY
4.7M
LTC3639
RUN
LTC3639
RUN
3639 F09
R5
V
•
<6V
IN(MAX)
R3+R4+R5
Figure 9. RUN Pin Interface to Logic
Soft-Start
V
IN
Soft-start is implemented by ramping the effective refer-
ence voltage from 0V to 0.8V. To increase the duration of
the reference voltage soft-start, place a capacitor from
the SS pin to ground. An internal 5µA pull-up current will
charge this capacitor. The value of the soft-start capacitor
can be calculated by the following equation:
R3
R4
R5
RUN
LTC3639
OVLO
3639 F10
Figure 10. Adjustable UV and OV Lockout
5µA
CSS = Soft-Start Time •
0.8V
The individual values of R3, R4 and R5 can then be cal-
culated from the following equations:
The minimum soft-start time is limited to the internal
soft-start timer of 1ms. When the LTC3639 detects a fault
condition (input supply undervoltage or overvoltage) or
when the RUN pin falls below 1.1V, the SS pin is quickly
pulled to ground and the internal soft-start timer is reset.
This ensures an orderly restart when using an external
soft-start capacitor.
1.21V
R5=RTOTAL
R4=RTOTAL
•
•
Rising V OVLO Threshold
IN
1.21V
–R5
Rising V UVLO Threshold
IN
R3=RTOTAL –R5–R4
Note that the soft-start capacitor may not be the limiting
factor in the output voltage ramp. The maximum output
current, which is equal to half of the peak current, must
charge the output capacitor from 0V to its regulated value.
For small peak currents or large output capacitors, this
ramptimecanbesignificant.Therefore,theoutputvoltage
For applications that do not need a precise external OVLO,
the OVLO pin can be tied directly to ground. The RUN pin
in this type of application can be used as an external UVLO
using the previous equations with R5 = 0Ω.
Similarly, for applications that do not require a precise
ramp time from 0V to the regulated V
to a minimum of
value is limited
OUT
UVLO, theRUNpincanbetiedtoV . Inthisconfiguration,
IN
the UVLO threshold is limited to the internal V UVLO
IN
2COUT
IPEAK
thresholdsasshownintheElectricalCharacteristicstable.
The resistor values for the OVLO can be computed using
the previous equations with R3 = 0Ω.
Ramp Time ≥
VOUT
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Optimizing Output Voltage Ripple
L1
V
OUT
5V
V
SW
LTC3639
V
IN
IN
200mA
C
C
OUT
IN
After the peak current resistor and inductor have been
selected to meet the load current and frequency require-
R3
(MASTER)
V
FB
SS
RUN
ments, anoptionalcapacitor, C
canbeaddedinparallel
R4
R5
ISET
C
SS
V
PRG1
V
PRG2
with R
to reduce the output voltage ripple dependency
OVLO
ISET
on load current.
FBO
At light loads the output voltage ripple will be a maximum.
The peak inductor current is controlled by the voltage on
V
V
FB
LTC3639
(SLAVE)
IN
L2
the I
pin. The current out of the I
pin is 5µA while
SET
SET
SW
SS
RUN
the LTC3639 is active and is reduced to 1µA during sleep
mode. The I current will return to 5µA on the first
V
V
PRG1
PRG2
SET
OVLO
switching cycle after sleep mode. Placing a parallel RC
FBO
network to ground on the I pin filters the I voltage
3639 F11
SET
SET
as the LTC3639 enters and exits sleep mode, which in turn
will affect the output voltage ripple, efficiency, and load
step transient performance.
Figure 11. 5V, 200mA Regulator
useful to analyze individual losses to determine what is
limiting the efficiency and which change would produce
the most improvement. Efficiency can be expressed as:
Higher Current Applications
For applications that require more than 100mA, the
LTC3639 provides a feedback comparator output pin
(FBO) for driving additional LTC3639s. When the FBO pin
Efficiency = 100% – (L1 + L2 + L3 + ...)
where L1, L2, etc. are the individual losses as a percent-
age of input power.
of a master LTC3639 is connected to the V pin of one
FB
or more slave LTC3639s, the master controls the burst
cycle of the slaves.
Although all dissipative elements in the circuit produce
losses, two main sources usually account for most of
2
the losses: V operating current and I R losses. The V
Figure 11 shows an example of a 5V, 200mA regulator
using two LTC3639s. The master is configured for a 5V
IN
IN
operating current dominates the efficiency loss at very
2
low load currents whereas the I R loss dominates the
fixed output with external soft-start and V UVLO/OVLO
IN
efficiency loss at medium to high load currents.
levels set by the RUN and OVLO pins. Since the slave is
directlycontrolledbythemaster,itsSSpinshouldbefloat-
1. The V operating current comprises two components:
IN
ing, RUN should be tied to V , and OVLO should be tied
IN
The DC supply current as given in the electrical charac-
teristics and the internal MOSFET gate charge currents.
The gate charge current results from switching the gate
capacitance of the internal power MOSFET switches.
Each time the gate is switched from high to low to
to ground. Furthermore, the slave should be configured
for a 1.8V fixed output (V
FB
= V
= SS) to set the
PRG1
PRG2
V
pin threshold at 1.8V. The inductors L1 and L2 do not
necessarily have to be the same, but should both meet
the criteria described in the Inductor Selection section.
high again, a packet of charge, ∆Q, moves from V to
IN
ground. The resulting ∆Q/dt is the current out of V
IN
Efficiency Considerations
that is typically larger than the DC bias current.
Theefficiencyofaswitchingregulatorisequaltotheoutput
power divided by the input power times 100%. It is often
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2
2. I R losses are calculated from the resistances of the
The junction temperature is given by:
T = T + T
internal switches, R and external inductor R . When
SW
L
J
A
R
switching, the average output current flowing through
the inductor is “chopped” between the high side PMOS
switch and the low side NMOS switch. Thus, the series
resistance looking back into the switch pin is a function
Generally, the worst-case power dissipation is in dropout
at low input voltage. In dropout, the LTC3639 can provide
a DC current as high as the full 230mA peak current to the
output. At low input voltage, this current flows through a
higher resistance MOSFET, which dissipates more power.
of the top and bottom switch R
values and the
DS(ON)
duty cycle (DC = V /V ) as follows:
OUT IN
Asanexample,considertheLTC3639indropoutataninput
voltage of 5V, a load current of 230mA and an ambient
temperatureof85°C.FromtheTypicalPerformancegraphs
R
= (R
)DC + (R
)(1 – DC)
SW
DS(ON)TOP
DS(ON)BOT
The R
for both the top and bottom MOSFETs can
DS(ON)
be obtained from the Typical Performance Characteris-
of Switch On-Resistance, the R
of the top switch
DS(ON)
2
tics curves. Thus, to obtain the I R losses, simply add
at V = 5V and 100°C is approximately 7.5Ω. Therefore,
IN
R
to R and multiply the result by the square of the
SW
L
the power dissipated by the part is:
average output current:
2
2
P = (I
) • R
= (230mA) • 7.5Ω = 0.4W
D
LOAD
DS(ON)
2
2
I R Loss = I (R + R )
O
SW
L
For the MSOP package the θ is 40°C/W. Thus, the junc-
JA
Other losses, including C and C
ESR dissipative
OUT
IN
tion temperature of the regulator is:
losses and inductor core losses, generally account for
40°C
W
less than 2% of the total power loss.
TJ = 85°C+0.4W•
=101°C
Thermal Considerations
which is below the maximum junction temperature of
150°C.
Inmostapplications,theLTC3639doesnotdissipatemuch
heat due to its high efficiency. But, in applications where
the LTC3639 is running at high ambient temperature with
low supply voltage and high duty cycles, such as dropout,
the heat dissipated may exceed the maximum junction
temperature of the part.
Pin Clearance/Creepage Considerations
The LTC3639 MSE package has been uniquely designed to
meet high voltage clearance and creepage requirements.
Pins 2, 4, 13, and 15 are omitted to increase the spac-
ing between adjacent high voltage solder pads (V , SW,
IN
To prevent the LTC3639 from exceeding the maximum
junctiontemperature,theuserwillneedtodosomethermal
analysis. The goal of the thermal analysis is to determine
whetherthepowerdissipatedexceedsthemaximumjunc-
tion temperature of the part. The temperature rise from
ambient to junction is given by:
and RUN) to a minimum of 0.657mm which is sufficient
for most applications. For more information, refer to the
printed circuit board design standards described in IPC-
2221 (www.ipc.org).
Design Example
T = P • θ
JA
R
D
As a design example, consider using the LTC3639 in an
Where P is the power dissipated by the regulator and
D
application with the following specifications: V = 36V to
IN
θ
is the thermal resistance from the junction of the die
JA
72V(48Vnominal), V
=12V, I
=100mA, f=200kHz,
and that switching is enabled when V is between 30V
OUT
OUT
to the ambient temperature.
IN
and 90V.
3639f
17
For more information www.linear.com/LTC3639
LTC3639
applicaTions inForMaTion
First, calculate the inductor value based on the switching
frequency:
C
also needs an ESR that will satisfy the output voltage
OUT
ripple requirement. The required ESR can be calculated
from:
12V
200kHz •0.23A
12V
48V
L =
• 1–
≅196µH
120mV
0.23A
ESR<
≅ 522mΩ
Choose a 220µH inductor as a standard value. Next, verify
A 10µF ceramic capacitor has significantly less ESR than
522mΩ. The output voltage can now be programmed by
choosing the values of R1 and R2. Since the output volt-
age is higher than 10V, the LTC3639 should be set for a
5V fixed output with an external divider to divide the 12V
output down to 5V. R2 is chosen to be less than 200k to
keep the output voltage variation to less than 1% due
to the internal 5M resistor tolerance. Set R2 = 196k and
calculate R1 as:
that this meets the L
input voltage:
requirement at the maximum
MIN
90V •150ns
LMIN
=
•1.2= 70µH
0.23A
Therefore, the minimum inductor requirement is satisfied
and the 220μH inductor value may be used.
Next,C andC areselected.Forthisdesign,C should
IN
OUT
IN
be sized for a current rating of at least:
12V –5V
R1=
• 196kΩ5MΩ = 264kΩ
(
)
12V
36V
36V
12V
5V
IRMS =100mA •
•
–1≅ 47mARMS
Choose a standard value of 267k for R1.
The value of C is selected to keep the input from droop-
IN
The undervoltage and overvoltage lockout requirements
ing less than 360mV (1%) at low line:
on V can be satisfied with a resistive divider from V to
IN
IN
220µH•0.23A2
the RUN and OVLO pins (refer to Figure 10). Choose R3 +
CIN >
≅ 0.45µF
R4 + R5 = 2.5M to minimize the loading on V . Calculate
IN
2•36V •360mV
R3, R4 and R5 as follows:
Since the capacitance of capacitors decreases with DC
bias, a 1µF capacitor should be chosen.
1.21V •2.5MΩ
R5=
R4=
= 33.6k
V
IN_OV(RISING)
C
will be selected based on a value large enough to
OUT
1.21V •2.5MΩ
satisfy the output voltage ripple requirement. For a 1%
output ripple (120mV), the value of the output capacitor
can be calculated from:
–R5= 67.2k
V
IN_UV(RISING)
R3= 2.5MΩ–R4–R5= 2.4M
0.23A •2•10–6
COUT
≥
≅10µF
Since specific resistor values in the megohm range are
generally less available, it may be necessary to scale R3,
R4, and R5 to a standard value of R3. For this example,
12V
120mV –
160
3639f
18
For more information www.linear.com/LTC3639
LTC3639
applicaTions inForMaTion
choose R3 = 2.2M and scale R4 and R5 by 2.2M/2.4M.
Then, R4 = 61.6k and R5 = 30.8k. Choose standard values
of R3 = 2.2M, R4 = 62k, and R5 = 30.9k. Note that the fall-
ing thresholds for both UVLO and OVLO will be 10% less
than the rising thresholds, or 27V and 81V respectively.
2. Connect the (+) terminal of the input capacitor, C , as
IN
close as possible to the V pin. This capacitor provides
IN
the AC current into the internal power MOSFETs.
3. Keep the switching node, SW, away from all sensitive
smallsignalnodes.Therapidtransitionsontheswitching
node can couple to high impedance nodes, in particular
The I pin should be left open in this example to select
SET
maximum peak current (230mA). Figure 12 shows a
V , and create increased output ripple.
FB
complete schematic for this design example.
L1
V
V
SW
LTC3639
V
OUT
IN
IN
220µH
V
OUT
V
IN
R3
R4
R5
R1
R2
12V
V
SW
IN
36V TO 72V
100mA
V
FB
RUN
2.2M
62k
LTC3639
267k
196k
FBO
V
RUN
FB
C
C
OUT
IN
OVLO
SS
I
SET
FBO
V
PRG1
V
PRG2
I
SET
SS
1µF
10µF
R
ISET
OVLO
C
SS
GND
V
PRG1
30.9k
V
PRG2
GND
3639 F12
L1
Figure 12. 36V to 72V Input to 12V Output, 100mA Regulator
GND
PC Board Layout Checklist
C
V
OUT
IN
When laying out the printed circuit board, the following
checklist should be used to ensure proper operation of
the LTC3639. Check the following in your layout:
C
OUT
R3
R5
ISET
SS
V
IN
1. Large switched currents flow in the power switches
and input capacitor. The loop formed by these compo-
nents should be as small as possible. A ground plane
is recommended to minimize ground impedance.
R4
R
C
R2R1
GND
3639 F13
VIAS TO GROUND PLANE
VIAS TO INPUT SUPPLY (V
)
IN
VIAS TO OUTPUT SUPPLY (V
)
OUT
OUTLINE OF LOCAL GROUND PLANE
Figure 13. Example PCB Layout
3639f
19
For more information www.linear.com/LTC3639
LTC3639
Typical applicaTions
Efficiency vs Input Voltage
L1
1000µH
95
90
85
80
75
70
65
60
V
*
OUT
I
= 50mA
OUT
V
IN
V
SW
5V
IN
4V TO 150V
100mA
LTC3639
V
FB
RUN
V
= 5V
OUT
FBO
C
C
IN
OUT
10µF
10V
1µF
SS
I
SET
250V
V
V
OVLO
PRG1
V
= 3.3V
OUT
PRG2
GND
V
= 1.8V
OUT
3639 F14
C
C
: TDK C5750X7R2E105K
*V = V FOR V < 5V
OUT IN IN
IN
: TDK C3216X7R1C106M
OUT
0
30
60
90
120
150
L1: TDK SLF12555T-102MR34
V
INPUT VOLTAGE (V)
IN
3639 F14b
Figure 14. High Efficiency 100mA Regulator
L1
150µH
V
OUT
V
IN
Soft-Start Waveform
V
SW
3.3V
IN
4V TO 150V
100mA
LTC3639
V
FB
RUN
FBO
C
IN
OUTPUT
VOLTAGE
500mV/DIV
1µF
C
OUT
SS
I
SET
250V
22µF
6.3V
X5R
V
V
OVLO
PRG1
220pF
PRG2
220k
470nF
GND
3639 F15b
3639 F15
10ms/DIV
C
: TDK C5750X7R2E105K
IN
L1: COILCRAFT LPS6235-154ML
Figure 15. Low Output Voltage Ripple 100mA Regulator with 75ms Soft-Start
Maximum Load Current
vs Input Voltage
4V to 135V Input to –15V Output Positive-to-Negative Regulator
L1
100
90
80
70
60
50
40
30
20
220µH
V
= –5V
OUT
V
IN
V
SW
IN
4V TO 135V
C
IN
LTC3639
200k
102k
1µF
200V
V
= –15V
OUT
V
FB
RUN
FBO
C
10µF
25V
OUT
SS
V
V
I
SET
OVLO
PRG1
PRG2
GND
V
–15V
OUT
V
IPEAK
IN
MAXIMUM LOAD CURRENT ≈
•
VIN + VOUT
2
0
30
60
90
120
150
C
C
: VISHAY VJ2225Y105KXCA
IN
V
INPUT VOLTAGE (V)
IN
: AVX 12103C106KAT
3639 TA04b
OUT
L1: SUMIDA CDRH105RNP-221NC
3639 TA04a
3639f
20
For more information www.linear.com/LTC3639
LTC3639
Typical applicaTions
4V to 90V Input to 12V/200mA Output Regulator with Overvoltage Lockout
L1
Low Dropout Startup and
100µH
V
*
OUT
V
IN
V
SW
12V
200mA
Shutdown
IN
4V TO 90V
UP TO 150V
TRANSIENT
LTC3639
267k
(MASTER)
V
1M
IN
V
FB
RUN
OVLO
SS
V
/V
IN OUT
V
5V/DIV
OUT
C
C
22µF
16V
IN1
OUT
1µF
I
SET
200V
V
V
FBO
PRG1
L1 CURRENT
200mA/DIV
13.7k
196k
PRG2
GND
L2 CURRENT
200mA/DIV
3639 TA05b
1s/DIV
L2
100µH
V
SW
IN
LTC3639
(SLAVE)
Overvoltage Lockout Operation
V
FB
RUN
TRANSIENT TO 150V
72V
OVLO
SS
C
IN2
V
IN
1µF
50V/DIV
V
I
SET
200V
OUT
10V/DIV
V
V
FBO
PRG1
PRG2
GND
L1 CURRENT
200mA/DIV
3639 TA05a
L2 CURRENT
200mA/DIV
C
C
/C : VISHAY VJ2225Y105KXCA
OUT
IN1 IN2
3639 TA05c
100ms/DIV
: TDK C3225X7R1C226M
L1/L2: TDK SLF7045T-101MR60-1
*V = V FOR V < 12V
OUT
IN
IN
Output Voltage Ripple
vs Load Current
4V to 150V Input to 1.2V/50mA Output Regulator with Low Output Voltage Ripple
L1
45
V
= 36V
IN
330µH
V
OUT
V
40
35
30
25
20
15
10
5
IN
V
SW
1.2V
IN
4V TO 150V
50mA
C
C
= 47µF
= OPEN
OUT
SET
100k
LTC3639
V
FB
RUN
FBO
C
IN
C
OUT
100µF
1µF
C
C
= 47µF
= 1nF
OUT
SET
SS
V
V
I
SET
250V
OVLO
200k
PRG1
C
SET
PRG2
100k
1nF
C
C
= 100µF
= 1nF
GND
OUT
SET
3639 TA03a
C
C
: AVX 2225PC105MAT1A
IN
OUT
0
: KEMET C1210C107M9PAC
0
10
20
30
40
50
L1: COOPER SD25-331
LOAD CURRENT (mA)
3639 TA03b
3639f
21
For more information www.linear.com/LTC3639
LTC3639
Typical applicaTions
40V to 150V Input to 36V/100mA Output with 25mA Input Current Limit
Maximum Load and Input Current
vs Input Voltage
L1
220µH
120
100
80
60
40
20
0
V
OUT
V
IN
36V
V
SW
IN
40V TO 150V
100mA*
LTC3639
221k
MAXIMUM LOAD CURRENT
R1
715k
V
FB
RUN
C
C
OUT
IN
1µF
2.2µF
50V
I
SS
SET
250V
FBO
OVLO
V
V
35.7k
PRG1
PRG2
R2
5k
GND
MAXIMUM INPUT CURRENT
3639 TA06a
VOUT
R2
5µA •R1 VOUT
R2
INPUT CURRENT LIMIT =
•
• 1+
≈
•
40 50 60 70 80 90 100 110 120 130 140 150
10 R1+R2
V
10 R1+R2
IN
V
INPUT VOLTAGE (V)
IN
V
36V
IN
3639 TA06b
*MAXIMUM LOAD CURRENT =
•25mA ≤100mA
C
C
: MURATA GRM55DR72E105KW01L
IN
: TDK C3225X7R1H225M
OUT
L1: WÜRTH 744 778 922 2
Burst Frequency vs Load Current
100
10
1
V
= 36V
IN
WITH BURST FREQUENCY LIMIT
5V to 150V Input to 5V/100mA Output with 20kHz Minimum Burst Frequency
L1
220µH
V
OUT
V
WITHOUT BURST FREQUENCY LIMIT
IN
V
SW
5V
IN
5V TO 150V
100mA
0.1
953k
100k
30Ω
LTC3639
C
+
IN
0.1
1
10
100
V
C
OUT
10µF
10V
1µF
V
FB
RUN
LTC6994-1
LOAD CURRENT (mA)
250V
3639 TA08b
2N7000
I
FBO
IN
OUT
SET
V
V
PRG2
PRG1
DIV
SET
Input Current vs Load Current
OVLO
SS
GND
200k
100
10
1
GND
V
= 36V
IN
3639 TA08a
C
C
: KEMET C2225C105KARACTU
: MURATA GRM40X5R106K10H520
IN
WITH BURST FREQUENCY LIMIT
OUT
L1: BOURNS SRR1005-221KCT-ND
0.1
WITHOUT BURST FREQUENCY LIMIT
0.01
0.1
1
10
100
LOAD CURRENT (mA)
3639 TA08c
3639f
22
For more information www.linear.com/LTC3639
LTC3639
package DescripTion
Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.
MSE Package
Variation: MSE16 (12)
16-Lead Plastic MSOP with 4 Pins Removed
Exposed Die Pad
(Reference LTC DWG # 05-08-1871 Rev C)
BOTTOM VIEW OF
EXPOSED PAD OPTION
2.845 ±0.102
(.112 ±.004)
2.845 ±0.102
(.112 ±.004)
0.889 ±0.127
(.035 ±.005)
1
8
0.35
REF
5.23
(.206)
MIN
1.651 ±0.102
(.065 ±.004)
1.651 ±0.102
(.065 ±.004)
3.20 – 3.45
(.126 – .136)
0.12 REF
DETAIL “B”
CORNER TAIL IS PART OF
THE LEADFRAME FEATURE.
FOR REFERENCE ONLY
DETAIL “B”
16
9
0.305 ±0.038
0.50
NO MEASUREMENT PURPOSE
4.039 ±0.102
(.159 ±.004)
(NOTE 3)
(.0120 ±.0015)
(.0197)
1.0
(.039)
BSC
TYP
BSC
0.280 ±0.076
(.011 ±.003)
16 14 121110
9
RECOMMENDED SOLDER PAD LAYOUT
REF
DETAIL “A”
0.254
(.010)
3.00 ±0.102
(.118 ±.004)
(NOTE 4)
0° – 6° TYP
4.90 ±0.152
(.193 ±.006)
GAUGE PLANE
0.53 ±0.152
(.021 ±.006)
1
3 5 6 7 8
1.0
DETAIL “A”
0.86
(.034)
REF
1.10
(.043)
MAX
0.18
(.007)
(.039)
BSC
SEATING
PLANE
0.17 – 0.27
(.007 – .011)
TYP
0.1016 ±0.0508
(.004 ±.002)
MSOP (MSE16(12)) 0911 REV C
0.50
(.0197)
BSC
NOTE:
1. DIMENSIONS IN MILLIMETER/(INCH)
2. DRAWING NOT TO SCALE
3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.
INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX
6. EXPOSED PAD DIMENSION DOES INCLUDE MOLD FLASH. MOLD FLASH ON E-PAD SHALL
NOT EXCEED 0.254mm (.010") PER SIDE.
3639f
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-
tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.
23
LTC3639
Typical applicaTion
12V/100mA Automotive Supply
Efficiency and Power Loss vs
Load Current
L1
470µH
100
90
80
70
60
50
40
30
20
10
0
V
V
OUT
EFFICIENCY
IN
V
SW
IN
4V TO 150V
12V*
267k
100mA
LTC3639
V
FB
RUN
V
V
V
= 24V
= 48V
= 120V
1000
100
10
IN
IN
IN
C
C
IN
OUT
1µF
250V
X7R
4.7µF
I
SS
SET
16V
X7R
FBO
OVLO
V
V
196k
PRG1
PRG2
GND
POWER LOSS
3639 TA07
1
C
C
: AVX 2225PC105MAT1A
*V
= V FOR V < 12V
OUT IN IN
IN
: KEMET C1206C475K4RAC
OUT
L1: COILCRAFT MSS1048T-474KL
0.1
1
10
100
LOAD CURRENT (mA)
3639 TA07b
relaTeD parTs
PART NUMBER
DESCRIPTION
COMMENTS
LTC3630
65V, 500mA Synchronous Step-Down DC/DC
Converter
V : 4V to 65V, V
= 0.8V, I = 12µA, I < 3µA,
OUT(MIN) Q SD
IN
3mm × 5mm DFN16, MSOP16E Packages
LTC3642
45V (Transient to 60V), 50mA Synchronous Step-
Down DC/DC Converter
V : 4.5V to 45V, V = 0.8V, I = 12µA, I < 3µA,
IN
OUT(MIN)
Q
SD
3mm × 3mm DFN8, MSOP8 Packages
LTC3631/LTC3631-3.3 45V (Transient to 60V), 100mA Synchronous Step- V : 4.5V to 45V, V
= 0.8V, I = 12µA, I < 3µA,
IN
OUT(MIN)
Q
SD
LTC3631-5
Down DC/DC Converter
3mm × 3mm DFN8, MSOP8 Packages
LTC3632
50V (Transient to 60V), 20mA Synchronous Step-
Down DC/DC Converter
V : 4.5V to 45V, V = 0.8V, I = 12µA, I < 3µA,
IN
OUT(MIN)
Q
SD
3mm × 3mm DFN8, MSOP8 Packages
LT®3990/LT3990-3.3/ 62V, 350mA 2.2MHz High Efficiency Micropower
V : 4.2V to 62V, V = 1.21V, I = 2.5µA, I < 1µA,
IN
OUT(MIN)
Q
SD
LT3990-5
Step-Down DC/DC Converter with I = 2.5µA
3mm × 2mm DFN10, MSOP10 Packages
Q
LT3970/LT3970-3.3
LT3970-5
40V, 350mA 2.2MHz High Efficiency Micropower
V : 4.2V to 40V, V = 1.21V, I = 2.5µA, I < 1µA,
IN
OUT(MIN)
Q
SD
Step-Down DC/DC Converter with I = 2.5µA
3mm × 2mm DFN10, MSOP10 Packages
Q
LTC3810
100V Synchronous Step-Down DC/DC Controller
V : 6.4V to 100V, V
= 0.8V, I = 2mA, I < 240µA,
OUT(MIN) Q SD
IN
SSOP28 Package
LTC3891
60V Synchronous Step-Down DC/DC Controller with V : 4V to 60V, V
= 0.8V, I = 50µA, I < 14µA,
Q SD
IN
OUT(MIN)
Burst Mode Operation
3mm × 4mm QFN20, TSSOP20E Packages
3639f
LT 0413 • PRINTED IN USA
24 LinearTechnology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
●
●
LINEAR TECHNOLOGY CORPORATION 2013
(408)432-1900 FAX: (408) 434-0507 www.linear.com/LTC3639
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