LTC3636IUFD-1#PBF [Linear]
LTC3636 - Dual Channel 6A, 20V Monolithic Synchronous Step-Down Regulator; Package: QFN; Pins: 28; Temperature Range: -40°C to 85°C;
| 型号： | LTC3636IUFD-1#PBF |
| 厂家： | 
Linear |
| 描述： | LTC3636 - Dual Channel 6A, 20V Monolithic Synchronous Step-Down Regulator; Package: QFN; Pins: 28; Temperature Range: -40°C to 85°C |
| 文件： | 总28页 (文件大小：1142K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
LTC3636/LTC3636-1
Dual Channel 6A, 20V
Monolithic Synchronous
Step-Down Regulator
FeaTures
DescripTion
TheLTC®3636/LTC3636-1isahighefficiency,dual-channel
monolithicsynchronousbuckregulatorusingacontrolled
on-time current mode architecture, with phase lockable
switchingfrequency.Theoperatingsupplyvoltagerangeis
from 3.1V to 20V, making it suitable for lithium-ion battery
stacks as well as point of load power supply applications
from a 12V or 5V input.
n
Wide V Range: 3.1V to 20V
IN
n
Wide V
Range:
OUT
0.6V to 5V (LTC3636)
1.8V to 12V (LTC3636-1)
n
n
n
n
n
n
Output Current per Channel: 6A
High Efficiency: Up to 95%
Die Temperature Monitor
Adjustable Switching Frequency: 500kHz to 4MHz
External Frequency Synchronization
Current Mode Operation for Excellent Line and
Load Transient Response
Theoperatingfrequencyisprogrammablefrom500kHzto
4MHz with an external resistor and may be synchronized
to an external clock signal. The high frequency capability
allows the use of small surface mount inductors and
capacitors. The unique constant frequency/controlled
on-time architecture is ideal for high step-down ratio ap-
plications that operate at high frequency while demanding
fast transient response.
n
n
0.6V Reference Allows Low Output Voltages
User Selectable Burst Mode® Operation or Forced
Continuous Operation
n
n
n
n
n
Output Voltage Tracking and Soft-Start Capability
Short-Circuit Protected
Overvoltage Input and Overtemperature Protection
Power Good Status Outputs
Low Profile 4mm × 5mm 28-Lead QFN Package
The LTC3636/LTC3636-1 can select between forced con-
tinuous mode and high efficiency Burst Mode operation.
The LTC3636 and LTC3636-1 differ in their output voltage
sense range.
L, LT, LTC, LTM, Burst Mode, Silent Switcher, Linear Technology and the Linear logo are
registered trademarks of Analog Devices, Inc. All other trademarks are the property of their
respective owners. Protected by U.S. Patents including 5481178, 5847554, 6580258, 6304066,
6476589, 6774611.
applicaTions
n
Distributed Power Systems
n
Battery-Powered Instruments
n
Point-of-Load Power Supplies
Typical applicaTion
V
IN
10V TO 20V
Efficiency vs Load Current
47µF
x2
V
V
IN1
IN2
100
RUN1
RUN2
INTV
CC
f
= 2MHz
= 12V
SW
IN
ITH1
ITH2
RT
97
94
91
88
85
82
79
76
73
70
4.7µF
V
LTC3636/
LTC3636-1
TMON
MODE/SYNC
TRACKSS1
PGOOD1
TRACKSS2
PGOOD2
BOOST2
BOOST1
0.1µF
0.1µF
0.56µH
0.56µH
V
V
OUT1
3.3V AT 6A
OUT2
5V AT 6A
SW2
SW1
47µF
22pF
47µF
22pF
73.2k
10k
45.3k
V
V
= 5V
= 3.3V
OUT
OUT
V
FB2
V
GND
FB1
0
0.6 1.2 1.8 2.4
3
3.6 4.2 4.8 5.4 6.0
10k
LOAD CURRENT (A)
3636 TA01a
3636 TA01b
3636fa
1
For more information www.linear.com/LTC3636
LTC3636/LTC3636-1
absoluTe MaxiMuM raTings
pin conFiguraTion
(Note 1)
TOP VIEW
V
, V ................................................... –0.3V to 22V
IN1 IN2
PGOOD1, PGOOD2..................................... –0.3V to 22V
BOOST1-SW1, BOOST2-SW2................... –0.3V to 3.6V
TRACKSS1, TRACKSS2 ............................ –0.3V to 3.6V
28 27 26 25 24 23
ITH1
RUN1
1
2
3
4
5
6
7
8
22
21
20
19
18
17
16
15
V
V
IN1
33
ITH1, ITH2, RT, MODE/SYNC........–0.3V to INTV + 0.3V
CC
SW1T
IN1
V
, V , TMON. ......................–0.3V to INTV + 0.3V
FB1 FB2
CC
MODE/SYNC
RT
SW1
GND
GND
SW2
30
RUN1, RUN2.............................................. –0.3V to 22V
GNDT
32
GNDT
Operating Junction Temperature Range
INTV
CC
29
INTV
(Notes 3, 4)............................................ –40°C to 125°C
Storage Temperature Range................... –65°C to 150°C
TMON
RUN2
ITH2
CCT
31
34
GNDT
V
IN2
SW2T
V
IN2
9
10 11 12 13 14
UFD PACKAGE
VARIATION: AA
28-LEAD (4mm × 5mm) PLASTIC QFN
= 125°C, θ = 21°C/W, θ = 7°C/W
T
JMAX
JA
JC
θ
DERIVED FROM 6-LAYER PCB DC2335 DEMO BOARD
JA
http://www.linear.com/product/LTC3636#orderinfo
orDer inForMaTion
LEAD FREE FINISH
LTC3636IUFD#PBF
LTC3636EUFD#PBF
LTC3636IUFD-1#PBF
LTC3636EUFD-1#PBF
TAPE AND REEL
PART MARKING*
3636
PACKAGE DESCRIPTION
TEMPERATURE RANGE
–40°C to 125°C
LTC3636IUFD#TRPBF
LTC3636EUFD#TRPBF
LTC3636IUFD-1#TRPBF
LTC3636EUFD-1#TRPBF
28-Lead (4mm × 5mm) Plastic QFN
28-Lead (4mm × 5mm) Plastic QFN
28-Lead (4mm × 5mm) Plastic QFN
28-Lead (4mm × 5mm) Plastic QFN
3636
–40°C to 125°C
36361
–40°C to 125°C
36361
–40°C to 125°C
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
Consult LTC Marketing for information on non-standard lead based finish parts.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/. Some packages are available in 500 unit reels through
designated sales channels with #TRMPBF suffix.
Selection Table
PART NUMBER
LTC3636
V
SENSE RANGE
OUT
0.6V to 5V
LTC3636-1
1.8V to 12V
3636fa
2
For more information www.linear.com/LTC3636
LTC3636/LTC3636-1
elecTrical characTerisTics The l denotes the specifications which apply over the specified operating
junction temperature range, otherwise specifications are at TJ = 25°C (Note 2). VIN1 = VIN2 = 12V unless otherwise noted.
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
l
V
Supply Range
3.1
20
V
IN1
l
l
V
V
Supply Range
Supply Range
3.1
1.5
20
20
V
V
IN1
IN2
3.1V < V < 20V
IN1
Output Voltage Range (Note 4)
LTC3636
LTC3636-1
0.6
1.8
5
12
V
V
I
Input DC Supply Current (V + V
)
IN2
Q
IN1
Both Channels Active (Note 5)
Sleep Current
MODE = 0V
1.3
600
13
mA
µA
µA
MODE = INTV , V , V
> 0.6
CC FB1 FB2
Shutdown
RUN1 = RUN2 = 0V
l
V
Feedback Reference Voltage
0.594
0.6
0.002
0.05
0.606
30
V
%/V
%
FB
∆V
∆V
Reference Voltage Line Regulation
Output Voltage Load Regulation
Feedback Pin Input Current
Error Amplifier Transconductance
Minimum On Time
V = 3.1V to 20V
IN
LINE_REG
LOAD_REG
ITH = 0.8V to 1.6V
I
nA
FB
g
ITH = 1.2V
1.8
30
mS
ns
m(EA)
t
t
f
ON
Minimum Off Time
100
ns
OFF
OSC
Oscillator Frequency
V
= INTV
1.4
1.7
3.4
2
2
4
2.6
2.3
4.6
MHz
MHz
MHz
RT
CC
RT = 162k
RT = 80.6k
I
Valley Switch Current Limit
ITH = 1.8V
6
6.6
7.2
A
A
LIM
Negative Valley Switch Current Limit
–4.2
R
Top Switch On-Resistance
Bottom Switch On-Resistance
32
18
mΩ
mΩ
DS(ON)
I
Switch Leakage Current
V
= 20V, V = 0V
RUN
0.01
1.5
1
µA
V
SW(LKG)
IN
Internal Temperature Monitor
T = 25°C
A
Internal Temperature Monitor Slope (Note 6)
Overvoltage Lockout Threshold
200
°C/V
V
V
V
V
Rising
Falling
22.5
21.5
V
V
VIN-OV
IN
IN
IN
20.3
3.1
22.5
3.5
INTV Voltage
3.6V < V < 20V, 0mA Load
3.3
1.3
V
CC
IN
INTV Load Regulation
0mA to 50mA Load, V = 4V to 20V
%
CC
IN
INTV Undervoltage Lockout Threshold
INTV Rising, V = INTV
CC
2.7
2.55
2.9
V
V
CC
CC
IN
INTV Falling, V = INTV
CC
IN
CC
l
l
RUN Threshold Rising
RUN Threshold Falling
1.16
0.96
1.22
1.01
1.28
1.06
V
V
RUN Leakage Current
0
3
µA
PGOOD Good-to-Bad Threshold
V
V
Rising
Falling
8
–8
10
–10
%
%
FB
FB
PGOOD Bad-to-Good Threshold
V
V
Rising
Falling
–3
3
–5
5
%
%
FB
FB
3636fa
3
For more information www.linear.com/LTC3636
LTC3636/LTC3636-1
elecTrical characTerisTics The l denotes the specifications which apply over the specified operating
junction temperature range, otherwise specifications are at TJ = 25°C (Note 2). VIN1 = VIN2 = 12V unless otherwise noted.
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
25
MAX
UNITS
Ω
R
PGOOD Pull-Down Resistance
Power Good Filter Time
Internal Soft-Start Time
10mA Load
PGOOD
PGOOD
SS
t
t
20
40
µs
10% to 90% Rise Time
TRACKSS = 0.3V
1000
0.3
1500
µs
V
During Tracking
0.28
0.315
V
FB
I
TRACKSS Pull-Up Current
1.4
µA
TRACKSS
V
MODE/SYNC Threshold Voltage
MODE V
MODE V
1
V
V
MODE/SYNC
IH
IL
0.4
SYNC Threshold Voltage
MODE/SYNC Input Current
SYNC V
0.95
V
IH
I
MODE = 0V
MODE = INTV
1.5
–1.5
µA
µA
MODE
CC
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
power dissipation (P , in Watts) according to the formula:
D
T = T + (P • θ ), where θ (in °C/W) is the package thermal
J
A
D
JA
JA
impedance.
Note 3: This IC includes overtemperature protection that is intended
Note 2: The LTC3636 is tested under pulsed load conditions such
to protect the device during momentary overload conditions. Junction
temperature will exceed 125°C when overtemperature protection is active.
Continuous operation above the specified maximum operating junction
temperature may impair device reliability.
Note 4: Output voltages outside the specified range are not optimized for
controlled on-time operation. Refer to the Applications Information section
for further discussions related to the output voltage range.
Note 5: Dynamic supply current is higher due to the internal gate charge
being delivered at the switching frequency.
Note 6: Guaranteed by design.
that T ≈ T . The LTC3636E is guaranteed to meet specifications from
J
A
0°C to 85°C junction temperature. Specifications over the –40°C to
125°C operating junction temperature range are assured by design,
characterization and correlation with statistical process controls. The
LTC3636I is guaranteed over the –40°C to 125°C operating junction
temperature range. Note that the maximum ambient temperature
consistent with these specifications is determined by specific operating
conditions in conjunction with board layout, the rated package thermal
impedance and other environmental factors. The junction temperature
(T , in °C) is calculated from the ambient temperature (T , in °C) and
J
A
3636fa
4
For more information www.linear.com/LTC3636
LTC3636/LTC3636-1
Typical perForMance characTerisTics TJ = 25°C, VIN1 = VIN2 = 12V, fSW = 1MHz, L = 0.55µH
unless otherwise noted.
Efficiency vs Load Current
Efficiency vs Load Current
Burst Mode Operation
Forced Continuous Mode
Operation
Efficiency vs Load Current
100
90
80
70
60
50
40
30
20
10
0
100
97
94
91
88
85
82
79
76
73
70
100
90
80
70
60
50
40
30
20
10
0
Burst Mode OPERATION
V
OUT
= 1.8V
V
= 1.8V
OUT
FORCED
CONTINUOUS
MODE
L = 1µH
V
V
V
V
= 4V
V
= 5V
V
V
V
V
= 4V
IN
IN
IN
IN
OUT
IN
IN
IN
IN
= 8V
V
V
V
= 3.3V
= 5V
= 8V
OUT
OUT
OUT
= 12V
= 20V
= 12V
= 20V
= 3.3V
0.001
0.01
0.1
1
10
10
6
0
0.6 1.2 1.8 2.4
3
3.6 4.2 4.8 5.4 6.0
0.001
0.01
0.1
1
10
LOAD CURRENT (A)
LOAD CURRENT (A)
LOAD CURRENT (A)
3636 G01
3636 G02
3636 G03
Efficiency vs Load Current
Burst Mode Operation
Efficiency vs Input Voltage
Burst Mode Operation
Reference Voltage
vs Temperature
100
90
80
70
60
50
40
30
20
10
0
100
95
90
85
80
75
70
65
60
55
50
0.606
0.604
0.602
0.600
0.598
0.596
0.594
V
= 1.2V
V
= 1.8V
OUT
OUT
V
V
V
V
V
= 4V
= 8V
= 12V
= 15V
= 20V
IN
IN
IN
IN
IN
I
= 10mA
= 100mA
= 1A
LOAD
LOAD
LOAD
LOAD
I
I
I
= 6A
0.001
0.01
0.1
1
4
6
8
10 12 14 16 18 20
INPUT VOLTAGE (V)
–50 –25
0
25
50
75 100 125
LOAD CURRENT (A)
TEMPERATURE (°C)
3636 G04
3636 G05
3636 G06
Oscillator Frequency
vs Temperature
Oscillator Internal Set Frequency
vs Temperature
Load Regulation
2.4
2.2
2.0
1.8
1.6
1.4
1.2
1.6
10
8
R
T
= INTV
CC
V
OUT
= 1.8V
R = 324k
T
1.2
0.8
0.4
0
6
4
2
0
–2
–4
–6
–8
–10
Burst Mode OPERATION
FORCED CONTINUOUS
–0.4
–50 –25
0
25
50
75 100 125
0
1
2
3
4
5
–50 –25
0
25
50
75 100 125
TEMPERATURE (°C)
I
(A)
TEMPERATURE (°C)
LOAD
3636 G09
237820 G07
3636 G08
3636fa
5
For more information www.linear.com/LTC3636
LTC3636/LTC3636-1
Typical perForMance characTerisTics TJ = 25°C, VIN1 = VIN2 = 12V, fSW = 1MHz, L = 0.55µH
unless otherwise noted.
Internal MOSFET RDS(ON)
vs Temperature
Temperature Monitor vs
Temperature
Quiescent Current vs VIN
Burst Mode Operation
60
50
40
30
20
10
0
2.0
1.9
1.8
1.7
1.6
1.5
1.4
1.3
1.2
1.1
900
800
700
600
500
400
300
200
100
0
90°C
25°C
–40°C
TOP SWITCH
BOTTOM SWITCH
–50 –25
0
25
50
75 100 125
–50 –25
0
25
50
75 100 125
4
6
8
10 12 14 16 18 20
(V)
TEMPERATURE (°C)
TEMPERATURE (°C)
V
IN
3636 G10
3636 G11
3636 G12
Valley Current Limit
vs Temperature
TRACKSS Pull-Up Current
vs Temperature
Switch Leakage vs Temperature
16
14
12
10
8
7.6
7.2
6.8
6.4
6.0
5.6
5.2
1.8
1.6
1.4
1.2
1.0
0.8
0.6
MAIN SWITCH
SYNCHRONOUS SWITCH
6
4
2
0
–50 –25
0
25 50 75 100 125 150
–50 –25
0
25
50
75 100 125
–50 –25
0
25
50
75 100 125
TEMPERATURE (°C)
TEMPERATURE (°C)
TEMPERATURE (°C)
3636 G13
3636 G14
3636 G15
Shutdown Current vs VIN
Burst Mode Operation
22
20
18
16
14
12
10
8
SW
10V/DIV
V
OUT
50mV/DIV
I
L
2A/DIV
3636 G17
5µs/DIV
6
V
LOAD
= 1.8V
= 200mA
OUT
I
4
4
6
8
10 12 14 16 18 20
(V)
V
IN
3636 G16
3636fa
6
For more information www.linear.com/LTC3636
LTC3636/LTC3636-1
Typical perForMance characTerisTics TJ = 25°C, VIN1 = VIN2 = 12V, fSW = 1MHz, L = 0.55µH
unless otherwise noted.
Start-Up (Burst Mode Operation)
Load Step (Internal Compensation)
Load Step
V
V
RUN
OUT
OUT
AC-COUPLED
100mV/DIV
AC-COUPLED
100mV/DIV
2V/DIV
V
OUT
1V/DIV
I
I
L
L
I
L
5A/DIV
5A/DIV
2A/DIV
3636 G19
3636 G20
3636 G18
20µs/DIV
400µs/DIV
20µs/DIV
V
I
= 1.8V
V
I
= 1.8V
= 100mA
V
I
= 1.8V
OUT
LOAD
OUT
LOAD
OUT
LOAD
= 400mA to 6A
= 400mA to 6A
= 330pF
ITH = INTV
C
CC
COMP
C = 33pF
R
= 13kΩ
F
OUT
COMP
C
= 47µF ×2
C = 33pF
F
OUT
C
= 47µF ×2
Start-Up into Prebiased Output
(Burst Mode Operation)
Start-Up (Forced Continuous Mode)
RUN
2V/DIV
RUN
2V/DIV
V
OUT
V
OUT
= 1.8V
1V/DIV
1V/DIV
I
L
I
L
2A/DIV
2A/DIV
3636 G22
3636 G21
400µs/DIV
400µs/DIV
I
= 0mA
V
LOAD
= 1.8V
= 100mA
LOAD
OUT
I
Start-Up into Prebiased Output
(Forced Continuous Mode)
Short-Circuit and Soft-Start
RUN
2V/DIV
I
L
10A/DIV
V
OUT
= 1.8V
1V/DIV
V
IN
5V/DIV
V
I
OUT
L
1V/DIV
5A/DIV
3636 G23
400µs/DIV
3636 G24
200µs/DIV
I
= 0mA
LOAD
V
= 1.8V
OUT
3636fa
7
For more information www.linear.com/LTC3636
LTC3636/LTC3636-1
pin FuncTions
ITH1 (Pin 1): Channel 1 Error Amplifier Output and
Switching Regulator Compensation Pin. Connect this pin
to appropriate external components to compensate the
regulator loop frequency response. Connect this pin to
ITH2 (Pin 8): Channel 2 Error Amplifier Output and
Switching Regulator Compensation Pin. Connect this pin
to appropriate external components to compensate the
regulator loop frequency response. Connect this pin to
INTV to use the default internal compensation.
INTV to use the default internal compensation.
CC
CC
RUN1 (Pin 2): Channel 1 Regulator Enable Pin. Enables
channel 1 operation by tying RUN above 1.25V. Tying it
below1Vplacesthepartintoshutdown.Donotfloatthispin.
V
(Pin 9): Channel 2 Output Feedback Voltage Pin.
FB2
Input to the error amplifier that compares the feedback
voltagetotheinternal0.6Vreferencevoltage. Connectthis
pin to a resistor divider network to program the desired
output voltage.
MODE/SYNC (Pin 3): Mode Select and External Synchro-
nization Input. Tie this pin to ground to force continuous
synchronous operation. Floating this pin or tying it to
PGOOD2 (Pin 10): Channel 2 Open-Drain Power Good
INTV enables high efficiency Burst Mode operation at
Output Pin. PGOOD2 is pulled to ground when the voltage
CC
light loads. Drive this pin with a clock to synchronize the
LTC3636/LTC3636-1 switching frequency. An internal
phase-locked loop will force the bottom power NMOS’s
turn on signal to be synchronized with the rising edge of
the CLKIN signal. When this pin is driven with a clock,
forced continuous mode is automatically selected.
on the V pin is not within 8ꢀ (typical) of the internal
FB2
0.6V reference. PGOOD2 becomes high impedance once
the V pin returns to within 5ꢀ (typical) of the internal
FB2
reference.
TRACKSS2 (Pin 11): Output Tracking and Soft-Start Input
Pin for Channel 2. Forcing a voltage below 0.6V on this pin
bypassestheinternalreferenceinputtotheerroramplifier.
TheLTC3636/LTC3636-1willservotheFBpintotheTRACK
voltage. Above 0.6V, the tracking function stops and the
internal reference resumes control of the error amplifier.
RT (Pin 4): Oscillator Frequency Program Pin. Connect an
external resistor (between 80k to 640k) from this pin to
GND in order to program the frequency from 500kHz to
4MHz. When RT is tied to INTV , the switching frequency
CC
will default to 2MHz.
An internal 1.4μA pull up current from INTV allows a
CC
soft-start function to be implemented by connecting a
INTV (Pin 5): Internal 3.3V Regulator Output. The inter-
CC
capacitor between this pin and PGND.
nal power drivers and control circuits are powered from
this voltage. Decouple this pin to power ground with a
minimum of 4.7µF low ESR ceramic capacitor.
GND(Pins12,18,19,25):PowerandSignalGround.These
pins must be tied together and soldered to PCB ground.
TMON (Pin 6): Temperature Monitor Output. A voltage
proportional to the measured on-die temperature will ap-
pear at this pin. The voltage-to-temperature scaling factor
is 200°K/V. See the Applications Information section for
detailed information on the TMON function. Tie this pin to
SW2 (Pins 13, 17): Channel 2 Switch Node Connection
to External Inductor. Voltage swing of SW is from a diode
voltage drop below ground to V .
IN
BOOST2 (Pin 14): Boosted Floating Driver supply for
Channel 2. The (+) terminal of the bootstrap capacitor
connects to this pin while the (–) terminal connects to
the SW pin. The normal operational voltage swing of this
INTV to disable the temperature monitor circuit.
CC
RUN2 (Pin 7): Channel 2 Regulator Enable Pin. Enables
channel 2 operation by tying RUN above 1.22V. Tying it
below1Vplacesthepartintoshutdown.Donotfloatthispin.
pin ranges from a diode voltage drop below INTV up
CC
to V +INTV .
IN
CC
3636fa
8
For more information www.linear.com/LTC3636
LTC3636/LTC3636-1
pin FuncTions
V
(Pins 15, 16): Power Supply Input for Channel 2.
PGOOD1 (Pin 27): Channel 1 Open-Drain Power Good
IN2
This input is capable of operating from a separate supply
Output Pin. PGOOD1 is pulled to ground when the voltage
voltage than V
.
on the V pin is not within 8ꢀ (typical) of the internal
IN1
FB1
0.6V reference. PGOOD1 becomes high impedance once
SW1 (Pins 20, 24): Channel 1 Switch Node Connection
the V pin returns to within 5ꢀ (typical) of the internal
FB1
to External Inductor. Voltage swing of SW is from a diode
reference.
voltage drop below ground to V .
IN
V
(Pin 28): Channel 1 Output Feedback Voltage Pin.
FB1
V
(Pins 21, 22): Power Supply Input for Channel 1.
IN1
Input to the error amplifier that compares the feedback
voltagetotheinternal0.6Vreferencevoltage. Connectthis
pin to a resistor divider network to program the desired
output voltage.
Input voltage to the on chip power MOSFETs on channel 1.
The internal LDO for INTV is powered off of this pin.
CC
BOOST1 (Pin 23): Boosted Floating Driver Supply for
Channel 1. The (+) terminal of the bootstrap capacitor
connects to this pin while the (–) terminal connects to
the SW pin. The normal operational voltage swing of this
pin ranges from a diode voltage drop below INTV up
to V + INTV .
INTV
(Pin 29): Additional INTV pin. Not required to
CC
CCT
be connected to INTV pin for operation.
CC
GNDT (Pins 30, 31, 32): Power Ground. Additional power
ground pins for improved thermal dissipation when con-
nected to the GND pins. Not required to be connected to
GND pins for operation.
CC
IN
CC
TRACKSS1 (Pin 26): Output Tracking and Soft-Start Input
Pin for Channel 1. Forcing a voltage below 0.6V on this pin
bypassestheinternalreferenceinputtotheerroramplifier.
TheLTC3636/LTC3636-1willservotheFBpintotheTRACK
voltage. Above 0.6V, the tracking function stops and the
internal reference resumes control of the error amplifier.
SWT1T ( Pin 33): Additional SW1 pin. Not required to be
connected to SW1 pins 20 and 24 for operation.
SWT2T (Pins 34): Additional SW2 pin. Not required to be
connected to SW2 pins 13 and 17 for operation.
An internal 1.4μA pull up current from INTV allows a
CC
soft-start function to be implemented by connecting a
capacitor between this pin and PGND.
3636fa
9
For more information www.linear.com/LTC3636
LTC3636/LTC3636-1
block DiagraM
C
IN
RUN
1.22V
V
IN
V
ON
SW
A = 1
V
+
RUN
–
450k
V
IN
INTV
CC
0.6V (LTC3636)
1.8V (LTC3636-1)
5V (LTC3636)
12V (LTC3636-1)
RUN
I
ON
I
V
VON
ON
OSC1
R
S
t
ON
=
CONTROLLER
ON
I
ION
Q
BOOST
SW
SWITCH
LOGIC
TG
AND
M1
M2
C
BOOST
L1
ANTI-
SHOOT
THROUGH
C
OUT
BG
–
I
I
REV
CMP
GND
+
+
–
–
R2
R1
COMP
SELECT
SENSE
+
SENSE
ITH
FB
R
C
IDEAL DIODES
C
0.6V
REF
C1
–
EA
0.648V
–
+
+
INTERNAL
SOFT-START
0V
PGOOD
INTV
CC
1.4µA
TRACKSS
TRACK
–
+
–
+
FC BURST
UV
SS
MODE
SELECT
C
SS
0.552V
0.48V AT START-UP
0.10V AFTER START-UP
CHANNEL 1
RT
OSC1
OSC
PLL-SYNC
MODE/SYNC
INTV
OSC
CC
3.3V
REG
R
RT
V
IN1
C
VCC
PHASE
180°C
TMON
T
1V/200k
J
OSC2
CHANNEL 2 (SAME AS CHANNEL 1)
3636 BD
3636fa
10
For more information www.linear.com/LTC3636
LTC3636/LTC3636-1
operaTion
The LTC3636/LTC3636-1 is a dual-channel, current mode
monolithic step down regulator capable of providing 6A
of output current from each channel. Its unique controlled
on-time architecture allows extremely low step-down
ratios while maintaining a constant switching frequency.
Both channels share the same clock and run 180° out of
phase. Each channel is enabled by raising the voltage on
the RUN pin above 1.22V nominally.
ing in discontinuous operation and increased efficiency.
Both power MOSFETs will remain off until the ITH voltage
rises above the zero current level to initiate another cycle.
During this time, the output capacitor supplies the load
current and the part is placed into a low current sleep
mode. Discontinuous mode operation is disabled by tying
the MODE/SYNC pin to ground, which forces continuous
synchronous operation regardless of output load current.
“Power Good” Status Output
Main Control Loop
The PGOOD open-drain output will be pulled low if the
regulatoroutputexitsa 8ꢀwindowaroundtheregulation
point. This condition is released once regulation within a
5ꢀ window is achieved. To prevent unwanted PGOOD
In normal operation, the internal top power MOSFET is
turned on for a fixed interval determined by a fixed one-
shot timer (“ON” signal in Block Diagram). When the top
powerMOSFETturnsoff,thebottompowerMOSFETturns
glitches during transients or dynamic V
changes, the
on until the current comparator I
trips, thus restarting
OUT
CMP
LTC3636/LTC3636-1 PGOOD falling edge includes a filter
time of approximately 40µs.
the one shot timer and initiating the next cycle. Inductor
current is measured by sensing the voltage drop across
the SW and GND nodes of the bottom power MOSFET. The
voltage on the ITH pin sets the comparator threshold cor-
responding to inductor valley current. The error amplifier
EA adjusts this ITH voltage by comparing an internal 0.6V
V Overvoltage Protection
IN
In order to protect the internal power MOSFET devices
against transient input voltage spikes, the LTC3636/
referencetothefeedbacksignalV derivedfromtheoutput
LTC3636-1 constantly monitors each V pin for an
FB
IN
voltage. If the load current increases, it causes a drop in
the feedback voltage relative to the internal reference. The
ITH voltage then rises until the average inductor current
matches that of the load current.
overvoltage condition. When V rises above 22.5V, the
IN
regulator suspends operation by shutting off both power
MOSFETs on the corresponding channel. Once V drops
IN
below 21.5V, the regulator immediately resumes normal
operation. The regulator executes its soft-start function
when exiting an overvoltage condition.
The operating frequency is determined by the value of the
RT resistor, which programs the current for the internal
oscillator.Aninternalphase-lockedloopservostheswitch-
ing regulator on-time to track the internal oscillator edge
and force a constant switching frequency. A clock signal
can be applied to the MODE/SYNC pin to synchronize the
switching frequency to an external source. The regulator
defaults to forced continuous operation once the clock
signal is applied.
Overcurrent and Short-Circuit Protection
The LTC3636 protects itself against output overcurrent
and short-circuits by sensing the inductor valley current.
Whenthecurrentlimitisreached, theoutputbeginstofall,
resulting in decreased on-time of the top power MOSFET.
If the short is prolonged enough for the on-time to reach
its minimum, the off-time will lengthen, lowering the
switching frequency and preventing excess current from
Atlightloadcurrents,theinductorcurrentcandroptozero
and become negative. In Burst Mode operation, a current
being drawn from V . After the overcurrent or short is
IN
reversal comparator (I ) detects the negative inductor
REV
removed, the regulator executes its soft-start function to
prevent the output voltage from overshooting.
current and shuts off the bottom power MOSFET, result-
3636fa
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For more information www.linear.com/LTC3636
LTC3636/LTC3636-1
applicaTions inForMaTion
and temperature variations than an external resistor
(seeTypicalPerformanceCharacteristics)andisbestused
for applications where switching frequency accuracy is
not critical.
AgeneralLTC3636/LTC3636-1applicationcircuitisshown
on the first page of this data sheet. External component
selection is largely driven by the load requirement and
switchingfrequency.Componentselectiontypicallybegins
with the selection of the inductor L and resistor R . Once
T
Dual-Phase Single V
Operation
the inductor is chosen, the input capacitor, C , and the
OUT
IN
outputcapacitor, C , canbeselected. Next, thefeedback
OUT
For output loads that demand more than 6A of current,
the two channels can be configured in parallel as a single
output to provide more output current. During dual-
phase operation, it is recommended to set the switching
frequency above 800kHz to ensure stability over a wide
input voltage range.
resistors are selected to set the desired output voltage.
Finally,theremainingoptionalexternalcomponentscanbe
selectedforfunctionssuchasexternalloopcompensation,
tracking/soft-start, input UVLO, and PGOOD.
Programming Switching Frequency
Withdual-phaseoperation,thetwochannelsoftheLTC3636
are operated 180 degrees out of phase. This effectively
interleaves the current pulses coming from the switches,
greatly reducing the overlap time when they add together.
The result is a significant reduction in total RMS input cur-
rent,whichinturnallowslessexpensiveinputcapacitorsto
be used and reduces the voltage noise on the supply line.
Selectionoftheswitchingfrequencyisatrade-offbetween
efficiency and component size. High frequency operation
allows the use of smaller inductor and capacitor values.
Operation at lower frequencies improves efficiency by
reducing internal gate charge losses but requires larger
inductance values and/or capacitance to maintain low
output ripple voltage.
The two channels in parallel will inherently share current
well, because the LTC3636 is a current mode controlled
regulator. Good current sharing balances the thermals on
the design.
Connecting a resistor from the RT pin to GND programs
the switching frequency (f) between 500kHz and 4MHz
according to the following formula:
3.2E11
RRT
=
f
Inductor Selection
where R is in Ω and f is in Hz.
RT
Foragiveninputandoutputvoltage,theinductorvalueand
operatingfrequencydeterminetheinductorripplecurrent.
More specifically, the inductor ripple current decreases
with higher inductor value or higher operating frequency
according to the following equation:
When RT is tied to INTV , the switching frequency will
CC
default to approximately 2MHz, as set by an internal re-
sistor. This internal resistor is more sensitive to process
6000
⎛
⎞
⎛
⎜
⎝
⎞
⎟
⎠
VOUT
f •L
VOUT
V
IN
ΔI =
1–
⎜
⎟
5000
4000
3000
2000
1000
L
⎝
⎠
Where∆I =inductorripplecurrent,f=operatingfrequency
L
L=inductorvalueandV istheinputpowersupplyvoltage
IN
applied to the V inputs. A trade-off between component
IN
size, efficiency and operating frequency can be seen from
this equation. Accepting larger values of ∆I allows the
L
useoflowervalueinductorsbutresultsingreaterinductor
0
0
100 200 300 400 500 600 700
R RESISTOR (kΩ)
T
3636 F01
Figure 1. Switching Frequency vs RT
3636fa
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For more information www.linear.com/LTC3636
LTC3636/LTC3636-1
applicaTions inForMaTion
core loss, greater ESR loss in the output capacitor, and
larger output voltage ripple. Generally, highest efficiency
operation is obtained at low operating frequency with
small ripple current.
Table 1. Inductor Selection Table
INDUCTANCE DCR
MAX
CURRENT
(A)
DIMENSIONS
(mm)
HEIGHT
(mm)
(µH) (mΩ)
Würth Electronik WE-HC 744312 Series
0.25
0.47
0.72
1.0
2.5
3.4
18
16
12
11
9
7 × 7.7
5.2 × 5.5
7.4 × 6.7
6.4 × 6.6
5.2 × 5
3.8
A reasonable starting point is to choose a ripple current
of 2.4A which is about 40ꢀ of I
. Exceeding 60ꢀ
7.5
OUT(MAX)
9.5
10.5
of I
is not recommended. Note that the largest
OUT(MAX)
1.5
ripple current occurs at the highest V . To guarantee that
IN
Vishay IHLP-2020BZ-01 Series
ripple current does not exceed a specified maximum, the
0.22
0.33
0.47
0.68
1
5.2
8.2
8.8
12.4
20
15
12
2
inductance should be chosen according to:
11.5
10
⎛
⎞⎛
⎞
VOUT
f • ΔIL(MAX)
VOUT
7
⎜
⎜
⎟⎜
⎟⎜
⎟
⎟
L =
1–
V
Toko FDVE0603 Series
IN(MAX)
⎝
⎠⎝
⎠
0.33
0.47
0.68
0.75
1
2.7
3.7
6
6.2
8.5
15.9
15.6
10.4
10.9
9.5
3.0
3
Once the value for L is known, the type of inductor must
be selected. Actual core loss is independent of core size
for a fixed inductor value, but is very dependent on the
inductance selected. As the inductance increases, core
losses decrease. Unfortunately, increased inductance
requires more turns of wire, leading to increased DCR
and copper loss.
Coilcraft XAL6030 Series
0.20
0.33
0.56
0.82
1.0
3.04
5.18
8
11.8
13.25
17.2
15.4
13.8
11.5
9.6
TDK SMP5030 Series
Ferrite designs exhibit very low core loss and are pre-
ferred at high switching frequencies, so design goals
can concentrate on copper loss and preventing satura-
tion. Ferrite core material saturates “hard”, which means
that inductance collapses abruptly when the peak design
current is exceeded. This results in an abrupt increase in
inductor ripple current, so it is important to ensure that
the core will not saturate.
0.2
0.35
0.75
1
2.31
4.29
9.35
11.44
21
14.9
9.7
3
8.5
C and C
Selection
IN
OUT
The input capacitance, C , is needed to filter the trapezoi-
IN
dal wave current at the drain of the top power MOSFET.
To prevent large voltage transients from occurring, a low
ESRinputcapacitorsizedforthemaximumRMScurrentis
recommended. The maximum RMS current is given by:
Differentcorematerialsandshapeswillchangethesize/cur-
rent and price/current relationship of an inductor. Toroid
or shielded pot cores in ferrite or permalloy materials are
small and don’t radiate much energy, but generally cost
more than powdered iron core inductors with similar
characteristics. The choice of which style inductor to use
mainly depends on the price versus size requirements
and any radiated field/EMI requirements. Table 1 gives a
sampling of available surface mount inductors.
VOUT V − V
(
)
IN
OUT
I
RMS =IOUT(MAX)
V
IN
This formula has a maximum at V = 2V , where
IN
OUT
I
≅ I /2. This simple worst case condition is com-
RMS
OUT
monlyusedfordesignbecauseevensignificantdeviations
do not offer much relief. Note that ripple current ratings
from capacitor manufacturers are often based on only
2000 hours of life which makes it advisable to further de-
rate the capacitor, or choose a capacitor rated at a higher
temperature than required.
3636fa
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For more information www.linear.com/LTC3636
LTC3636/LTC3636-1
applicaTions inForMaTion
Several capacitors may also be paralleled to meet size or
height requirements in the design. For low input voltage
applications, sufficient bulk input capacitance is needed
to minimize transient effects during output load changes.
Even though the LTC3636/LTC3636-1 design includes an
overvoltage protection circuit, care must always be taken
toensureinputvoltagetransientsdonotposeanovervolt-
age hazard to the part.
ratingandlowESRmakethemidealforswitchingregulator
applications. However, due to the self-resonant and high-
Q characteristics of some types of ceramic capacitors,
care must be taken when these capacitors are used at
the input. When a ceramic capacitor is used at the input
and the power is supplied by a wall adapter through long
wires, a load step at the output can induce ringing at the
V input. Atbest, thisringingcancoupletotheoutputand
IN
be mistaken as loop instability. At worst, a sudden inrush
The selection of C
is determined by the effective series
OUT
of current through the long wires can potentially cause a
resistance(ESR)thatisrequiredtominimizevoltageripple
and load step transients as well as the amount of bulk
capacitance that is necessary to ensure that the control
loop is stable. Loop stability can be checked by viewing
voltage spike at V large enough to damage the part. For
IN
a more detailed discussion, refer to Application Note 88.
When choosing the input and output ceramic capacitors,
choose the X5R and X7R dielectric formulations. These
dielectrics have the best temperature and voltage charac-
teristics of all the ceramics for a given value and size.
the load transient response. The output ripple, ∆V , is
approximated by:
OUT
⎛
⎞
⎟
⎠
1
ΔVOUT < ΔI ESR+
⎜
⎝
L
8 • f • COUT
INTV Regulator Bypass Capacitor
CC
An internal low dropout (LDO) regulator draws power
When using low-ESR ceramic capacitors, it is more useful
tochoosetheoutputcapacitorvaluetofulfillachargestor-
age requirement. During a load step, the output capacitor
mustinstantaneouslysupplythecurrenttosupporttheload
until the feedback loop raises the switch current enough
to support the load. The time required for the feedback
looptorespondisdependentonthecompensationandthe
output capacitor size. Typically, 3 to 4 cycles are required
to respond to a load step, but only in the first cycle does
from the V input and produces the 3.3V supply that
IN1
powers the internal bias circuitry and drives the gate of
the internal MOSFET switches. The INTV pin connects
CC
to the output of this regulator and must have a minimum
of 4.7μF ceramic decoupling capacitance to ground. The
decouplingcapacitorshouldhavelowimpedanceelectrical
connections to the INTV and GND pins to provide the
CC
transient currents required by the LTC3636/LTC3636-1.
High input voltage and high switching frequency will
increase die temperature because of the higher power
dissipation across the LDO. Connecting any external load
the output drop linearly. The output droop, V
, is
DROOP
usually about 3 times the linear drop of the first cycle.
Thus, a good place to start is with the output capacitor
of approximately:
to the INTV pin is not recommended since it may impact
CC
LTC3636/LTC3636-1 operation while increasing power
3 • ΔIOUT
f • VDROOP
dissipation and die temperature.
COUT
≈
Boost Capacitor
Thoughthisequationprovidesagoodapproximation,more
capacitance may be required depending on the duty cycle
The LTC3636/LTC3636-1 uses a “bootstrap” circuit to
create a voltage rail above the applied input voltage V .
IN
and load step requirements. The actual V
should be
DROOP
Specifically,aboostcapacitor,C
,ischargedtoavolt-
age approximately equal to INTV each time the bottom
BOOST
verified by applying a load step to the output.
CC
power MOSFET is turned on. The charge on this capaci-
tor is then used to supply the required transient current
during the remainder of the switching cycle. When the
top MOSFET is turned on, the BOOST pin voltage will be
Using Ceramic Input and Output Capacitors
Higher values, lower cost ceramic capacitors are available
in small case sizes. Their high ripple current, high voltage
3636fa
14
For more information www.linear.com/LTC3636
LTC3636/LTC3636-1
applicaTions inForMaTion
equal to approximately V + 3.3V. For most applications,
wherefistheswitchingfrequency, t
isthenonoverlap
DEAD
IN
a 0.1µF ceramic capacitor closely connected between the
time, or “dead time” (typically 5ns) and t
is the
OFF(MIN)
BOOST and SW pins will provide adequate performance.
minimumoff-time.Ifthemaximumdutycycleissurpassed,
due to a dropping input voltage for example, the output
will drop out of regulation. The minimum input voltage to
avoid this dropout condition is:
Output Voltage Programming
Each regulator’s output voltage is set by an external resis-
tive divider according to the following equation:
VOUT
V
=
IN(MIN)
1− f • t
+2 • tDEAD
⎛
⎞
⎟
⎠
OFF(MIN)
R2
R1
VOUT = 0.6V 1+
⎜
⎝
Conversely, the minimum on-time is the smallest dura-
tion of time in which the top power MOSFET can be in
its “on” state. This time is typically 30ns. In continuous
mode operation, the minimum on-time limit imposes a
minimum duty cycle of:
The desired output voltage is set by appropriate selection
of resistors R1 and R2 as shown in Figure 2. Choosing
large values for R1 and R2 will result in improved zero-
load efficiency but may lead to undesirable noise coupling
or phase margin reduction due to stray capacitances
DC(MIN) = f • t
ON(MIN)
at the V node. Care should be taken to route the V
FB
FB
trace away from any noise source, such as the SW trace.
where t
is the minimum on-time. As the equation
ON(MIN)
To improve the frequency response of the main control
shows, reducing the operating frequency will alleviate the
minimum duty cycle constraint.
loop, a feedforward capacitor, C , may be used as shown
F
in Figure 2.
In the rare cases where the minimum duty cycle is
surpassed, the output voltage will still remain in regula-
tion, but the switching frequency will decrease from its
programmed value. This constraint may not be of critical
importance in most cases, so high switching frequencies
may be used in the design without any fear of severe
consequences. As the sections on Inductor and Capacitor
selection show, high switching frequencies allow the use
of smaller board components, thus reducing the footprint
of the application circuit.
V
OUT
R2
R1
C
F
FB
LTC3636/
LTC3636-1
SGND
3636 F02
Figure 2. Setting the Output Voltage
If the output voltage is outside the V sense range (0.6V
ON
– 5V for the LTC3636, 1.8V – 12V for the LTC3636-1), the
output voltage will stay in regulation, but the switching
frequency may deviate from the programmed frequency.
Internal/External Loop Compensation
The LTC3636/LTC3636-1 provides the option to use a
fixed internal loop compensation network to reduce both
the required external component count and design time.
The internal loop compensation network can be selected
Minimum Off-Time/On-Time Considerations
The minimum off-time is the smallest amount of time that
the LTC3636/LTC3636-1 can turn on the bottom power
MOSFET, trip the current comparator and turn the power
MOSFET back off. This time is typically 100ns. For the
controlled on-time architecture, the minimum off-time
limit imposes a maximum duty cycle of:
by connecting the ITH pin to the INTV pin. To ensure
CC
stabilityitisrecommendedthatinternalcompensationonly
be used with applications with f > 1MHz. Alternatively,
SW
the user may choose specific external loop compensation
components to optimize the main control loop transient
responseasdesired.Externalloopcompensationischosen
by simply connecting the desired network to the ITH pin.
DC(MAX) = 1– f • t
+2 • tDEAD
OFF(MIN)
3636fa
15
For more information www.linear.com/LTC3636
LTC3636/LTC3636-1
applicaTions inForMaTion
Suggestedcompensationcomponentvaluesareshownin
Figure 3. For a 2MHz application, an R-C network of 220pF
and 13kΩ provides a good starting point. The bandwidth
of the loop increases with decreasing C. If R is increased
by the same factor that C is decreased, the zero frequency
will be kept the same, thereby keeping the phase the same
in the most critical frequency range of the feedback loop.
A 10pF bypass capacitor on the ITH pin is recommended
for the purposes of filtering out high frequency coupling
from stray board capacitance. In addition, a feedforward
produce output voltage and ITH pin waveforms that will
give a sense of the overall loop stability without breaking
the feedback loop.
Switching regulators take several cycles to respond to a
step in load current. When a load step occurs, V
im-
OUT
•ESR,where
mediatelyshiftsbyanamountequalto∆I
LOAD
ESR is the effective series resistance of C . ∆I
also
OUT
LOAD
begins to charge or discharge C
generating a feedback
OUT
error signal used by the regulator to return V
to its
can
OUT
steady-state value. During this recovery time, V
OUT
capacitor C can be added to improve the high frequency
F
be monitored for overshoot or ringing that would indicate
a stability problem.
response, as previously shown in Figure 2. Capacitor C
F
provides phase lead by creating a high frequency zero
When observing the response of V
to a load step, the
with R2 which improves the phase margin.
OUT
initialoutputvoltagestepmaynotbewithinthebandwidth
of the feedback loop, so the standard second order over-
shoot/DCratiocannotbeusedtodeterminephasemargin.
Theoutputvoltagesettlingbehaviorisrelatedtothestability
of the closed-loop system and will demonstrate the actual
overall supply performance. For a detailed explanation of
optimizing the compensation components, including a
review of control loop theory, refer to Linear Technology
Application Note 76.
ITH
R
COMP
LTC3636/
LTC3636-1
13k
C
BYP
C
COMP
220pF
GND
3636 F03
Figure 3. Compensation Component
Checking Transient Response
The regulator loop response can be checked by observing
theresponseofthesystemtoaloadstep.Whenconfigured
for external compensation, the availability of the ITH pin
not only allows optimization of the control loop behavior
butalsoprovidesaDC-coupledandACfilteredclosedloop
response test point. The DC step, rise time, and settling
behavioratthistestpointreflecttheclosedloopresponse.
Assuming a predominantly second order system, phase
margin and/or damping factor can be estimated using the
percentage of overshoot seen at this pin.
In some applications, a more severe transient can be
caused by switching in loads with large (>10µF) input
capacitors. The discharged input capacitors are effec-
tively put in parallel with C , causing a rapid drop in
OUT
V
. No regulator can deliver enough current to prevent
OUT
this problem, if the switch connecting the load has low
resistance and is driven quickly. The solution is to limit
the turn-on speed of the load switch driver. A hot swap
controller is designed specifically for this purpose and
usuallyincorporatescurrentlimiting,short-circuitprotec-
tion, and soft starting.
The ITH external components shown in Figure 3 circuit
will provide an adequate starting point for most applica-
tions. The series R-C filter sets the dominant pole-zero
loop compensation. The values can be modified slightly
(from 0.5 to 2 times their suggested values) to optimize
transient response once the final PC layout is done and
the particular output capacitor type and value have been
determined. The output capacitors need to be selected
because their various types and values determine the
loop gain and phase. An output current pulse of 20ꢀ to
100ꢀ of full load current having a rise time of ~1µs will
On-Die Temperature Monitor
The LTC3636/LTC3636-1 produces a voltage at the TMON
pinproportionaltothemeasuredjunctiontemperature.The
junction temperature-to-voltage scaling factor is 200°K/V.
Thus,toobtainthejunctiontemperatureindegreesKelvin,
simply multiply the voltage provided at the TMON pin by
the scaling factor. To obtain the junction temperature in
degrees Celsius, subtract 273 from the value obtained in
degrees Kelvin.
3636fa
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pin. When TRACKSS is above 0.6V, tracking is disabled
and the feedback voltage will regulate to the internal
reference voltage.
The temperature monitor function uses a chopping tech-
niquetoachievehighprecision.Asaresult,asmallperiodic
ripple may be seen at the TMON pin, the average of which
is the measured value of interest. The ripple frequency
will be the operating frequency divided by 32. If required,
a 1µF or greater capacitor to GND may be placed on the
output to reduce the magnitude of the ripple.
The voltage at the TRACKSS pin may be driven from an
external source, or alternatively, the user may leverage
the internal 1.4µA pull-up current source to implement
a soft-start function by connecting an external capacitor
(C ) from the TRACKSS pin to ground. The relationship
SS
MODE/SYNC Operation
between output rise time and TRACKSS capacitance is
The MODE/SYNC pin is a multipurpose pin allowing both
mode selection and operating frequency synchroniza-
given by:
t
= 430000Ω • C
SS
SS
tion. Floating this pin or connecting it to INTV enables
CC
A default internal soft-start ramp forces a minimum soft-
start time of 1000µs by overriding the TRACKSS pin input
during this time period. Hence, capacitance values less
than approximately 2200pF will not significantly affect
soft-start behavior.
Burst Mode operation for superior efficiency at low load
currents at the expense of slightly higher output voltage
ripple. When the MODE/SYNC pin is tied to ground, forced
continuousmodeoperationisselected,creatingthelowest
fixed output ripple at the expense of light load efficiency.
WhendrivingtheTRACKSSpinfromanothersource, each
channel’s output can be set up to either coincidentally or
ratiometrically track another supply’s output, as shown
The LTC3636/LTC3636-1 will detect the presence of the
external clock signal on the MODE/SYNC pin and syn-
chronize the internal oscillator to the phase and frequency
of the incoming clock. The presence of an external clock
will place both regulators into forced continuous mode
operation.
in Figure 4. In the following discussions, V
refers to
OUT1
the LTC3636/LTC3636-1 output 1 as a master channel and
V
refers to output 2 as a slave channel. In practice,
OUT2
either channel can be used as the master.
Output Voltage Tracking and Soft-Start
To implement the coincident tracking in Figure 4a, con-
The LTC3636/LTC3636-1 allows the user to control the
output voltage ramp rate by means of the TRACKSS pin.
From 0 to 0.6V, the TRACKSS voltage will override the
internal 0.6V reference input to the error amplifier, thus
regulating the feedback voltage to that of the TRACKSS
nect an additional resistive divider to V
and connect
OUT1
its midpoint to the TRACKSS pin of the slave channel.
The ratio of this divider should be the same as that of the
slave channel’s feedback divider shown in Figure 5a. In
this tracking mode, V
must be set higher than V
.
OUT1
OUT2
V
V
OUT1
OUT1
V
V
OUT2
OUT2
3636 F04b
TIME
TIME
3636 F04a
(4a) Coincident Tracking
(4b) Ratiometric Tracking
Figure 4. Two Different Modes of Output Voltage Tracking
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V
OUT1
V
OUT1
V
OUT2
V
OUT2
R3
R4
R1
R2
R3
R1
R2
R3
R4
TO
TRACKSS2
PIN
TO
TRACKSS2
PIN
TO
FB1
PIN
TO
FB2
PIN
TO
FB2
PIN
TO
V
V
V
V
FB1
PIN
R4
3636 F05
(5a) Coincident Tracking Setup
(5b) Ratiometric Tracking Setup
Figure 5. Setup for Coincident and Ratiometric Tracking
NOMINAL OUTPUT
To implement the ratiometric tracking, the feedback pin of
the master channel should connect to the TRACKSS pin of
the slave channel (as in Figure 5b). By selecting different
resistors, the LTC3636/LTC3636-1 can achieve different
modes of tracking including the two in Figure 4.
PGOOD
VOLTAGE
Uponstart-up,theregulatordefaultstoBurstModeopera-
–8% –5%
0%
5%
8%
OUTPUT VOLTAGE
tion until the output exceeds 80ꢀ of its final value (V
>
FB
3636 F06
0.48V).Oncetheoutputreachesthisvoltage,theoperating
mode of the regulator switches to the mode selected by
the MODE/SYNC pin as described above. During normal
operation, if the output drops below 10ꢀ of its final value
(as it may when tracking down, for instance), the regula-
tor will automatically switch to Burst Mode operation to
prevent inductor saturation and improve TRACKSS pin
accuracy.
Figure 6. PGOOD Pin Behavior
Efficiency Considerations
The percent efficiency of a switching regulator is equal to
the output power divided by the input power times 100ꢀ.
It is often useful to analyze individual losses to determine
what is limiting the efficiency and which change would
produce the most improvement. Percent efficiency can
be expressed as:
Output Power Good
The PGOOD output of the LTC3636/LTC3636-1 is driven
by a 25Ω (typical) open-drain pull-down device. This
device will be turned off once the output voltage is within
5ꢀ (typical) of the target regulation point, allowing the
voltage at PGOOD to rise via an external pull-up resistor. If
theoutputvoltageexitsan8ꢀ(typical)regulationwindow
around the target regulation point, the open-drain output
will pull down with 20Ω output resistance to ground,
thus dropping the PGOOD pin voltage. This behavior is
described in Figure 6.
ꢀ Efficiency = 100ꢀ – (L1 + L2 + L3 +…)
where L1, L2, etc. are the individual losses as a percent-
age of input power.
Although all dissipative elements in the circuit produce
losses, three main sources usually account for most of
the losses in LTC3636/LTC3636-1 circuits: 1) I R losses,
2)switchinglossesandquiescentpowerloss3)transition
losses and other losses.
2
2
1. I R losses are calculated from the DC resistances of the
internal switches, R , and external inductor, R . In con-
A filter time of 40µs (typical) acts to prevent unwanted
SW
L
tinuous mode, the average output current flows through
inductor L but is “chopped” between the internal top and
bottompowerMOSFETs.Thus,theseriesresistancelook-
ing into the SW pin is a function of both top and bottom
PGOOD output changes during V
transient events.
OUT
As a result, the output voltage must be within the target
regulation window of 5ꢀ for 40µs before the PGOOD pin
pulls high. Conversely, the output voltage must exit the
8ꢀ regulation window for 40µs before the PGOOD pin
pulls to ground.
MOSFET R
and the duty cycle (DC) as follows:
DS(ON)
R
SW
= (R )(DC) + (R )(1 – DC)
DS(ON)TOP DS(ON)BOT
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TheR
forboththetopandbottomMOSFETscanbe
In a majority of applications, the LTC3636/LTC3636-1
does not dissipate much heat due to its high efficiency
and low thermal resistance of its QFN package. However,
in applications where the LTC3636/LTC3636-1 is running
at high ambient temperature, high input supply voltage,
high switching frequency, and maximum output current
load, the heat dissipated may exceed the maximum junc-
tion temperature of the part. If the junction temperature
reaches approximately 160°C, both power switches will
be turned off until temperature returns to 150°C.
DS(ON)
obtained from the Typical Performance Characteristics
2
curves. Thus to obtain I R losses:
2
2
I R losses = I
(R + R )
SW L
OUT
2. The internal LDO draws power from the V input to
IN
regulate the INTV rail. The total power loss here is
CC
the sum of the switching losses and quiescent current
losses from the control circuitry.
Each time a power MOSFET gate is switched from low
to high to low again, a packet of charge dQ moves
To prevent the LTC3636/LTC3636-1 from exceeding the
maximum junction temperature of 125°C, the user will
need to do some thermal analysis. The goal of the thermal
analysis is to determine whether the power dissipated
exceeds the maximum junction temperature of the part.
The temperature rise is given by:
from V to ground. The resulting dQ/dt is a current
IN
out of INTV that is typically much larger than the DC
CC
control bias current. In continuous mode, I
=
GATECHG
f(Q + Q ), where Q and Q are the gate charges of
T
B
T
B
the internal top and bottom power MOSFETs and f is
the switching frequency. For estimation purposes, the
T
RISE
= P • θ
D JA
gate charges (Q + Q ) on each LTC3636/LTC3636-1
T
B
As an example, consider the case when one of the regula-
tors is used in an application where V = 12V, I = 6A,
regulator channel are approximately 7.5nC.
IN
OUT
To calculate the total power loss from the LDO load,
simply add the gate charge current and quiescent cur-
rent and multiply by the voltage applied to V :
frequency = 1MHz, V
= 1.8V. From the R
graphs
OUT
DS(ON)
intheTypicalPerformanceCharacteristicssection,thetop
switch on-resistance is nominally 36mΩ and the bottom
switch on-resistance is nominally 19mΩ at 50°C ambient.
IN
P
LDO
= (I
+ I ) • V
GATECHG Q IN
The equivalent power MOSFET resistance R is:
SW
3. Other “hidden” losses such as transition loss, cop-
per trace resistances, and internal load currents can
account for additional efficiency degradations in the
overall power system. Transition loss arises from the
brief amount of time the top power MOSFET spends
in the saturated region during switch node transitions.
The LTC3636/LTC3636-1 internal power devices switch
quickly enough that these losses are not significant
compared to other sources.
1.8V
12V
10.2V
12V
RDS(ON)
•
+RDS(ON)
•
= 21.6mΩ
TOP
BOT
From the previous section’s discussion on gate drive, we
estimate the total gate drive current through the LDO to be
1MHz • 7.5nC = 7.5mA, and I of one channel is 0.65mA
Q
(see Electrical Characteristics). Therefore, the total power
dissipated by a single regulator is:
2
P = I
D
• R + V • (I
+ I )
GATECHG Q
OUT
SW
IN
Other losses, including diode conduction losses during
dead-time and inductor core losses, generally account
for less than 2ꢀ total additional loss.
2
P = (6A) • (0.0216Ω) + (12V) • (7.5mA + 0.65mA)
D
= 0.874W
Running two regulators under the same conditions would
result in a power dissipation of 1.748W. The QFN 5mm
× 4mm package junction-to-ambient thermal resistance,
Thermal Considerations
The LTC3636/LTC3636-1 requires the ground pins to be
well soldered to the PC board to provide good thermal
contact. This gives the QFN package exceptional thermal
properties, which is necessary to prevent excessive self-
heating of the part in normal operation.
θ ,isaround21°C/W.Therefore,thejunctiontemperature
JA
of the regulator operating in a 50°C ambient temperature
is approximately:
T = 1.748W • 21°C/W + 50°C = 87°C
J
3636fa
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which is below the maximum junction temperature of
125°C. With higher ambient temperatures, a heat sink or
cooling fan should be considered to drop the junction-to-
ambient thermal resistance.
2) The output capacitor, C , and inductor L should be
OUT
closely connected to minimize loss. The (–) plate of
C
should be closely connected to both GND and
OUT
the (–) plate of C .
IN
Remembering that the above junction temperature is
3) The resistive divider, (e.g. R1 to R4 in Figure 8) must be
obtained from an R
at 50°C, we might recalculate
connected between the (+) plate of C
and a ground
DS(ON)
OUT
the junction temperature based on a higher R
since
line terminated near GND. The feedback signal V
DS(ON)
FB
it increases with temperature. Redoing the calculation
should be routed away from noisy components and
traces, such as the SW line, and its trace length should
be minimized. Keep R1 and R2 close to the IC.
assuming that R increased 15ꢀ at 87°C yields a new
SW
junction temperature of 92°C. If the application calls for a
higher ambient temperature and/or higher load currents,
care should be taken to reduce the temperature rise of the
part by using a heat sink or air flow.
4) Keep sensitive components away from the SW pin. The
R resistor,thecompensationcomponents,thefeedback
T
resistors, and the INTV bypass capacitor should all
CC
Figure 7 is a temperature derating curve based on the
DC2335 demo board (QFN package). It can be used to
estimate the maximum allowable ambient temperature
for given DC load currents in order to avoid exceeding
the maximum operating junction temperature of 125°C.
be routed away from the SW trace and the inductor L.
5) A ground plane is preferred.
6) Flood all unused areas on all layers with copper in order
to reduce the temperature rise of power components.
Thesecopperareasshouldbeconnectedtotheexposed
backside of the package (GND).
7.0
6.0
5.0
4.0
Refer to Figure 9 for board layout examples.
Design Example
V
V
V
= 12V
IN
As a design example, consider using the LTC3636/
LTC3636-1 in an application with the following specifi-
= 1.8V
OUT1
OUT2
= 1MHz
3.0
2.0
1.0
0
= 3.3V
f
SW
cations: V
OUT(MAX)
= 13.2V, V
OUT(MIN)
= 1.8V, V
= 3.3V,
IN(MAX)
= 6A, I
OUT1
OUT2
CH1 LOAD = 0A
CH1 LOAD = 2A
CH1 LOAD = 4A
CH1 LOAD = 6A
I
= 10mA, f = 2MHz, V
~
DROOP
(5% • V ). The following discussion will use equations
OUT
from the previous sections.
0
25
50
75
100
125
MAXIMUM ALLOWABLE AMBIENT TEMPERATURE (°C)
3636 F07
Because efficiency is important at both high and low load
current, Burst Mode operation will be utilized.
Figure 7. Temperature Derating Curve for DC2335 Demo Circuit
First, the correct R resistor value for 2MHz switching fre-
T
Board Layout Considerations
quency must be chosen. Based on the equation discussed
When laying out the printed circuit board, the following
checklist should be used to ensure proper operation of the
LTC3636/LTC3636-1. Check the following in your layout:
earlier, R should be 160k; the closest standard value is
T
162k. RT can be tied to INTV if switching frequency
CC
accuracy is not critical.
1) Do the input capacitors connect to the V and GND
IN
Next, determine the channel 1 inductor value for about
pins as close as possible? These capacitors provide
the AC current to the internal power MOSFETs and their
drivers.
40ꢀ ripple current at maximum V :
IN
⎛
⎜
⎝
⎞⎛
⎟⎜
⎠⎝
⎞
⎟
⎠
1.8V
2MHz • 2.4A
1.8V
13.2V
L1=
1−
= 0.32µH
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A standard value of 0.33µH should work well here. Solv-
ing the same equation for channel 2 results in a 0.47µH
inductor.
Solving this equation for channel 2 results in an RMS
input current of 2.8A. Decoupling each V input with
IN
a 47µF ceramic capacitor should be adequate for most
applications.
C
will be selected based on the charge storage require-
OUT
ment. For a V
of 90mV for a 6A load step:
Lastly, the feedback resistors must be chosen. Picking
R1 and R3 to be 13.7k, R2 and R4 are calculated to be:
DROOP
3 • ΔIOUT
f • VDROOP (2MHz)(90mV)
3 •(6A)
COUT1
≈
=
= 100µF
⎛
⎜
⎝
⎞
1.8V
0.6V
R2 = (13.7k) •
R4 = (13.7k) •
– 1 = 27.4k
⎟
⎠
Two 47µF ceramic capacitor should be used for channel 1.
Solving the same equation for channel 2 (using 5ꢀ of
⎛
⎜
⎝
⎞
3.3V
0.6V
– 1 = 61.9k
⎟
V
for V
) results in 55µF of capacitance (47µF is
OUT
DROOP
⎠
the closest standard value).
The final circuit is shown in Figure 8.
C should be sized for a maximum current rating of:
IN
1.8V 13.2V −1.8V
(
)
IRMS = 6A
= 2.1A
13.2V
V
IN
12V
C
47µF
×2
IN
V
IN2
V
IN1
RUN1
RUN2
INTV
CC
C2
4.7µF
MODE/SYNC
ITH1
ITH2
R
R
COMP1
COMP2
10.5k
C
BYP2
10pF
C
BYP1
10pF
11k
LTC3636/
LTC3636-1
C
C
COMP2
220pF
COMP1
330pF
TMON
RT
R5
162k
TRACKSS2
PGOOD2
BOOST2
TRACKSS1
PGOOD1
BOOST1
L2
0.68µH
L1
0.33µH
0.1µF
0.1µF
V
V
OUT1
OUT2
SW2
SW1
3.3V AT 6A
1.8V AT 6A
C
C
F1
33pF
F2
R4
R2
22pF
C
61.9k
27.4k
OUT1
47µF
×2
C
OUT2
V
V
FB1
FB2
GND
47µF
R3
13.7k
R1
13.7k
3636 F08
Figure 8. Design Example Circuit
3636fa
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V
V
OUT1
OUT1
C
C
OUT1
OUT1
L1
L1
VIAS
TO
SW1
GND
GND
VIAS TO GROUND
PLANE
VIAS TO GROUND
PLANE
SW1
SW1
C
BOOST1
C
C
C
C
IN
IN
VIAS TO GROUND
PLANE
VIAS TO GROUND
PLANE
V
V
IN
IN
C
C
VCC
VCC
IN
IN
C
BOOST2
SW2
SW2
VIAS
TO
SW2
GND
GND
VIAS TO GROUND
PLANE
VIAS TO GROUND
PLANE
L2
L2
C
C
OUT2
OUT2
V
V
OUT2
OUT2
3636 F09a
3636 F09b
Figure 9a. Example of Power Component Layout for
QFN Package
Figure 9b. Alternate Layout with GNDT Pins Connected to GND
V
OUT1
C
OUT1
L1
VIAS
TO
SW1
GND
VIAS TO GROUND
PLANE
SW1
C
C
IN
VIAS TO
V
IN
GROUND
PLANE
C
VCC
IN
SW2
VIAS
TO
SW2
GND
VIAS TO GROUND
PLANE
L2
C
OUT2
V
OUT2
3636 F09c
Figure 9c. Alternate Layout with Pins 29 to 34 Unconnected
3636fa
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Typical applicaTions
1.8V/2.5V 3MHz Buck Regulator
V
IN
12V
C1
47µF
×2
V
IN2
V
IN1
RUN1
RUN2
ITH2
INTV
CC
C2
4.7µF
ITH1
R
R
COMP2
12.1k
COMP1
C
BYP2
10pF
C
BYP1
10pF
11.5k
LTC3636/
LTC3636-1
C
C
COMP2
220pF
COMP1
220pF
RT
MODE/SYNC
R5
107k
BOOST2
SW2
BOOST1
SW1
L2
0.33µH
L1
0.22µH
0.1µF
0.1µF
V
V
OUT1
OUT2
2.5V AT 6A
1.8V AT 6A
C
C
F1
33pF
F2
R4
47.5k
R2
22pF
27.4k
C
C
OUT1
OUT2
V
V
FB1
FB2
47µF
47µF
GND
R3
15k
R1
13.7k
3636 TA02
3.3V/1.8V Sequenced Regulator with 8V Input UVLO (VOUT1 Enabled After VOUT2
)
V
IN
8V TO 20V
R6
100k
C1
47µF
×2
V
V
IN1
IN2
R7
215k
RUN1
INTV
CC
C2
4.7µF
PGOOD2
RUN2
MODE/SYNC
RT
R5
162k
R8
40.2k
ITH2
ITH1
LTC3636/
LTC3636-1
R
R
COMP1
COMP2
10.5k
C
C
BYP1
10pF
11k
BYP2
10pF
C
C
COMP2
220pF
COMP1
330pF
BOOST2
SW2
BOOST1
SW1
L2
L1
0.33µH
0.1µF
0.1µF
0.68µH
V
V
OUT1
OUT2
3.3V AT 6A
1.8V AT 6A
C
C
F2
F1
R4
R2
22pF
33pF
C
OUT1
47µF
×2
54.9k
24.3k
C
OUT2
V
V
47µF
FB2
FB1
GND
R3
R1
12.1k
12.1k
3636 TA03
3636fa
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Typical applicaTions
1.2V/1.8V Buck Regulator with Coincident Tracking and 6V Input UVLO
V
IN
6V TO 20V
C1
R7
V
V
IN1
IN2
47µF
×2
154k
RUN1
RUN2
INTV
CC
C2
4.7µF
MODE/SYNC
RT
R8
40.2k
R5
196k
ITH2
ITH1
R
R
COMP1
COMP2
18.7k
15k
LTC3636
C
C
COMP2
1nF
COMP1
1nF
BOOST2
SW2
BOOST1
SW1
L2
0.33µH
L1
0.47µH
0.1µF
0.1µF
V
V
OUT1
1.8V AT 6A
OUT2
1.2V AT 6A
C
47µF
×2
C
47µF
×2
OUT2
OUT1
R2
R4
10k
15k
TRACKSS2
C
C
F1
62pF
F2
R6
4.99k
82pF
V
V
FB1
FB2
GND
R3
10k
R1
10k
3636 TA04
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LTC3636/LTC3636-1
Typical applicaTions
Dual Output Regulator from Multiple Input Supplies (Powers VIN1 Before VIN2
)
12V
OUT2
5V
(POWERS V
)
(POWERS V
)
OUT1
47µF
47µF
787k
100k
274k
100k
V
V
IN1
IN2
RUN2
RUN1
LTC3636/
LTC3636-1
RT
INTV
CC
R5
162k
C2
4.7µF
MODE/SYNC
ITH1
ITH2
R
R
COMP1
COMP2
10.5k
C
C
11k
BYP2
BYP1
10pF
10pF
C
C
COMP2
220pF
COMP1
330pF
BOOST2
SW2
BOOST1
SW1
L2
0.68µH
L1
0.33µH
0.1µF
0.1µF
V
V
OUT1
OUT2
3.3V AT 6A
1.8V AT 6A
C
C
F1
33pF
R4
54.9k
R2
F2
22pF
24.3k
C
OUT1
47µF
×2
C
OUT2
V
V
FB1
FB2
47µF
GND
R3
12.1k
R1
12.1k
3636 TA05
3636fa
25
For more information www.linear.com/LTC3636
LTC3636/LTC3636-1
package DescripTion
Please refer to http://www.linear.com/product/LTC3636#packaging for the most recent package drawings.
UFD Package
28-Lead Plastic QFN (4mm × 5mm)
(Reference LTC DWG # 05-08-1538 Rev A)
Exposed Pad Variation AA
0.70 0.05
0.075
0.23
0.28
4.50 0.05
0.155
0.095
0.30
0.25
0.155
0.86
0.095
0.30
0.47
3.10 0.05
2.50 REF
0.53
0.56
0.56
0.25
0.25
1.05
0.25
1.05
PACKAGE OUTLINE
0.25
0.05
0.50 BSC
3.50 REF
4.10 0.05
5.50 0.05
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED
0.75 0.05
2.50 REF
0.50 0.10
4.00 0.10
23
28
PIN 1 ID
0.12 × 45°
1
22
0.56
0.25
0.155
0.095
0.25
PIN 1
TOP MARK
(NOTE 5)
1.05
1.05
0.53
3.50 REF
0.075
0.25
5.00 0.10
0.23
0.30
0.30
0.47
0.56
0.25
0.05
0.28
0.095
0.86
0.155
0.25
8
15
(UDC28) QFN 0816 REV A
14
R = 0.110
TYP
9
0.200 REF
0.00 – 0.05
0.50 BSC
BOTTOM VIEW—EXPOSED PAD
NOTE:
1. DRAWING IS NOT A JEDEC PACKAGE OUTLINE
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION
ON THE TOP AND BOTTOM OF PACKAGE
3636fa
26
For more information www.linear.com/LTC3636
LTC3636/LTC3636-1
revision hisTory
REV
DATE DESCRIPTION
PAGE NUMBER
A
07/17 Revised thermal resistance values in Pin Configuration
Revised Thermal Considerations section
2
19, 20
3636fa
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-
27
tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.
LTC3636/LTC3636-1
Typical applicaTion
12A 1MHz 2-Phase Buck Regulator
V
IN
3.1V TO 20V
V
V
BOOST1
SW1
IN1
C1
47µF
×2
0.1µF
0.1µF
IN2
0.56µH
0.56µH
V
OUT
RUN1
RUN2
1.5V AT 12A
C
OUT
47µF
×4
BOOST2
SW2
INTV
CC
C2
4.7µF
68pF
LTC3636
ITH1
ITH2
29.4k
19.6k
4.53k
2.2nF
68pF
V
V
FB1
FB2
RT
MODE/SYNC
324k
GND
3636 TA06
relaTeD parTs
PART NUMBER DESCRIPTION
COMMENTS
LTC3633/
LTC3633A
15V/20V, Dual 3A (I ), 4MHz Synchronous Step-
95ꢀ Efficiency, V : 3.6V to 15V, V
= 0.6V, I = 500µA, I < 13µA,
OUT(MIN) Q SD
OUT
IN
Down DC/DC Converter
4mm × 5mm QFN-28, TSSOP-28E
LTC3605/
LTC3605A
15V/20V, 5A (I ), 4MHz, Synchronous Step-Down 95ꢀ Efficiency, V : 4V to 15V, V
= 0.6V, I = 2mA, I < 15µA,
OUT(MIN) Q SD
OUT
IN
DC/DC Converter
4mm × 4mm QFN-24
LTC3603
LTC3601
LTC3604
LTC3626
LTC7124
LTC3622
15V, 2.5A (I ), 3MHz, Synchronous Step-Down
95ꢀ Efficiency, V : 4.5V to 15V, V
= 0.6V, I = 75µA, I < 1µA,
Q SD
OUT
IN
OUT(MIN)
OUT(MIN)
OUT(MIN)
OUT(MIN)
OUT(MIN)
DC/DC Converter
4mm × 4mm QFN-20, MSOP-16E
15V, 1.5A (I ), 4MHz, Synchronous Step-Down
95ꢀ Efficiency, V : 4.5V to 15V, V
= 0.6V, I = 300µA, I < 1µA,
Q SD
OUT
IN
DC/DC Converter
4mm × 4mm QFN-20, MSOP-16E
15V, 2.5A (I ), 4MHz, Synchronous Step-Down
95ꢀ Efficiency, V : 3.6V to 15V, V
= 0.6V, I = 300µA, I < 15µA,
Q SD
OUT
IN
DC/DC Converter
3mm × 3mm QFN-16, MSOP-16E
20V, 2.5A Synchronous Monolithic Step-Down
Regulator with Current and Temperature Monitoring 3mm × 4mm QFN-20
95ꢀ Efficiency, V : 3.6V to 20V, V
= 0.6V, I = 300μA, I < 15μA,
Q SD
IN
17V, Dual 3.5A Synchronous Step-Down Regulator
with Ultralow Quiescent Current
95ꢀ Efficiency, V : 3.1V to 17V, V
= 0.6V, I < 8µA (Both Channels
Q
IN
Enabled), I < 1µA, 3mm × 5mm QFN-24 Package
SD
17V, Dual 1A Synchronous Step-Down Regulator
with Ultralow Quiescent Current
95ꢀ Efficiency, V : 2.7V to 17V, V
= 0.6V, I < 5µA (Both Channels
OUT(MIN) Q
IN
Enabled), I < 1µA, 3mm × 4mm DFN-14 and MSOP-16 Packages
SD
3636fa
LT 0717 • PRINTED IN USA
www.linear.com/LTC3636
28
LINEAR TECHNOLOGY CORPORATION 2017
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