LTC3225 [Linear]
150mA Supercapacitor Charger; 150毫安超级电容器充电器
| 型号： | LTC3225 |
| 厂家： | 
Linear |
| 描述： | 150mA Supercapacitor Charger |
| 文件： | 总12页 (文件大小：199K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
LTC3225
150mA Supercapacitor
Charger
FEATURES
DESCRIPTION
The LTC®3225 is a programmable supercapacitor charger
designed to charge two supercapacitors in series to a
fixedoutputvoltage(4.8V/5.3Vselectable)froma2.8V/3V
to 5.5V input supply. Automatic cell balancing prevents
overvoltagedamagetoeithersupercapacitor.Nobalancing
resistors are required.
n
Low Noise Constant Frequency Charging of Two
Series Supercapacitors
n
Automatic Cell Balancing Prevents Capacitor
Overvoltage During Charging
n
Programmable Charging Current (Up to 150mA)
n
Selectable 2.4V or 2.65V Regulation per Cell
n
Automatic Recharge
Low input noise, low quiescent current and low external
parts count (one flying capacitor, one bypass capacitor
n
I
I
= 20ꢀA in Standby Mode
COUT
No Inductors
VIN
n
n
n
< 1ꢀA When Input Supply is Removed
at V and one programming resistor) make the LTC3225
IN
ideally suited for small battery-powered applications.
Tiny Application Circuit (3mm × 2mm DFN Package,
All Components <1mm High)
Charging current level is programmed with an external
resistor. When the input supply is removed, the LTC3225
automaticallyentersalowcurrentstate, drawinglessthan
1μA from the supercapacitors.
APPLICATIONS
n
Current Limited Applications with High Peak Power
The LTC3225 is available in a 10-lead 3mm × 2mm DFN
package.
L, LT, LTC and LTM are registered trademarks of Linear Technology Corporation.
All other trademarks are the property of their respective owners.
Loads (LED Flash, PCMCIA Tx Bursts, HDD Bursts,
GPRS/GSM Transmitter)
Backup Supplies
n
TYPICAL APPLICATION
Charging Profile with 30% Mismatch
in Output Capacitance, CTOP < CBOT
V
V
OUT
SHDN
IN
V
C
C
C
IN
+
OUT
CX
2.8V/3V TO 5.5V
4.8V/5.3V
5V/DIV
0.6F
0.6F
2.2ꢀF
1ꢀF
I
VIN
LTC3225
300mA/DIV
–
GND
100k
V
COUT
SHDN PGOOD
ON/OFF
2V/DIV
V
SEL
OUTPUT
PROGRAMMING
PROG
V
-V
TOP BOT
200mV/DIV
12k
3225 TA01b
V
= V
PROG
5s/DIV
SEL
IN
3225 TA01a
R
= 12k
C
C
C
C
= 1.1F
= 1.43F
INITIAL VOLTAGE = 0V
INITIAL VOLTAGE = 0V
TOP
BOT
TOP
BOT
3225f
1
LTC3225
ABSOLUTE MAXIMUM RATINGS
PIN CONFIGURATION
(Note 1)
V , C
to GND ......................................... –0.3V to 6V
TOP VIEW
IN OUT
SHDN, V ...................................... –0.3V to V + 0.3V
SEL
IN
+
1
2
3
4
5
10
9
C
C
C
V
OUT
C
I
OUT
Short-Circuit Duration............................. Indefinite
Continuous (Note 2)......................................350mA
Continuous (Note 2).....................................175mA
–
OUT
VIN
IN
11
8
CX
SHDN
GND
I
7
PROG
6
PGOOD
V
SEL
Operating Temperature Range (Note 3).... –40°C to 85°C
Storage Temperature Range................... –65°C to 125°C
DDB PACKAGE
10-LEAD (3mm s 2mm) PLASTIC DFN
T
= 125°C, θ = 76°C/W
JA
JMAX
EXPOSED PAD (PIN 11) MUST BE SOLDERED TO
LOW IMPEDANCE GND PLANE (PIN 8) ON PCB
ORDER INFORMATION
Lead Free Finish
TAPE AND REEL (MINI)
LTC3225EDDB#TRMPBF
TRM = 500 pieces.
TAPE AND REEL
PART MARKING
PACKAGE DESCRIPTION
10-Lead (3mm × 2mm) Plastic DFN
TEMPERATURE RANGE
–40°C to 85°C
LTC3225EDDB#TRPBF
LCYR
Consult LTC Marketing for parts specified with wider operating temperature ranges.
Consult LTC Marketing for information on lead based finish parts.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VIN = 3.6V, CIN = 2.2μF, CFLY = 1μF, unless otherwise specified.
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
l
l
V
V
V
V
V
Input Supply Undervoltage Lockout
High-to-Low Threshold
V
V
= V
= 0
2.65
2.4
2.75
2.5
2.85
2.6
V
V
IN-UVLO
IN-UVLO-HYS
IN
SEL
SEL
IN
IN
IN
Input Supply Undervoltage Lockout
Hysteresis
V
V
= V
= 0
150
140
mV
mV
SEL
SEL
l
l
Input Voltage Range
V
V
= V
= 0V
3
2.8
5.5
5.5
V
V
SEL
SEL
l
l
Charge Termination Voltage
Sleep Mode Threshold (Rising Edge)
V
V
= V
IN
= 0V
5.2
4.7
5.3
4.8
5.4
4.9
V
V
COUT
SEL
SEL
Output Comparator Hysteresis
100
mV
COUT-HYS
l
l
V
Maximum Voltage Across Each of the
Supercapacitors After Charging
V
V
= V
IN
= 0V
2.75
2.5
V
V
TOP/BOT
SEL
SEL
l
l
I
I
I
No Load Operating Current at V
Shutdown Current
I
= 0mA
20
40
1
ꢀA
ꢀA
Q-VIN
IN
OUT
SHDN = 0V, V
= 0V
0.1
SHDN-VIN
COUT
OUT
l
l
C
Leakage Current
V
V
V
= 5.6V, SHDN = 0V
1
2
3
4
1
ꢀA
ꢀA
ꢀA
OUT
OUT
OUT
OUT
= 5.6V, Charge Pump in Sleep Mode
= 5.6V, SHDN Connected to V with
IN
Input Supply Removed
I
Input Charging Current
V
IN
V
IN
= 3.6V, R
= 3.6V, R
= 12k, C
= 60k, C
= C
= C
306
55
mA
mA
VIN
PROG
PROG
TOP
TOP
BOT
BOT
3225f
2
LTC3225
ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VIN = 3.6V, CIN = 2.2μF, CFLY = 1μF, unless otherwise specified.
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
I
Output Charging Current
V
C
= 3.6V, R
= 12k, V
= 60k, V
= 4.5V,
= 4.5V,
125
150
175
mA
OUT
IN
PROG
OUT
= C
TOP
BOT
V
C
= 3.6V, R
26
mA
IN
TOP
PROG
OUT
= C
BOT
l
l
l
l
V
PGOOD Low Output Voltage
I
= –1.6mA
= 5V
0.4
10
V
ꢀA
%
%
Ω
PGOOD
PGOOD
I
PGOOD High Impedance Leakage Current
PGOOD Low-to-High Threshold
PGOOD Threshold Hysteresis
V
PGOOD
PGOOD-LEAK
V
V
Relative to Output Voltage Threshold
Relative to Output Voltage Threshold
92
94
1.2
8
96
PG
0.25
2.5
PG-HYS
R
Effective Open-Loop Output Impedance
(Note 4)
V
= 3.6V, V
= 4.5V
OUT
OL
IN
l
f
CLK Frequency
0.6
1.3
0.9
1.5
MHz
OSC
V
V
V
, SHDN
SEL
l
l
l
l
Input High Voltage
Input Low Voltage
Input High Current
Input Low Current
V
V
IH
0.4
1
IL
I
I
–1
–1
ꢀA
ꢀA
IH
IL
1
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliabilty and lifetime.
Note 3: The LTC3225 is guaranteed to meet performance specifications
from 0°C to 85°C. Specifications over the –40°C to 85°C operating
temperature range are assured by design, characterization and correlation
with statistical process controls.
Note 2: Based on long-term current density limitations.
Note 4: Output not in regulation;
R
≡ (2 • V – V )/I
IN OUT OUT
OL
TYPICAL PERFORMANCE CHARACTERISTICS
(TA = 25°C, CFLY = 1μF, CIN = 2.2μF, CTOP = CBOT, unless otherwise specified)
IOUT vs RPROG
IOUT vs VOUT (RPROG = 12k)
Efficiency vs VIN
100
90
80
70
60
50
40
30
20
10
0
160
140
120
100
180
160
140
120
100
80
V
V
= 3.6V
IN
OUT
= 4.5V
V
= V
IN
SEL
V
SEL
= 0
80
60
60
C
TOP
= C
BOT
40
20
0
40
V
V
V
= 2.8V
= 3.6V
= 5.5V
IN
IN
IN
I
= 100mA
BOT
LOAD
TOP
20
C
= C
0
20
30
50
0
10
60
70
40
(kΩ)
2.5
3
3.5
4
5.5
0
0.5
4
4.5
5
4.5
5
1
1.5
2
V
2.5
(V)
3
3.5
R
V
IN
(V)
PROG
OUT
3225 G01
3525 G03
3225 G02
3225f
3
LTC3225
TYPICAL PERFORMANCE CHARACTERISTICS
(TA = 25°C, CFLY = 1μF, CIN = 2.2μF, CTOP = CBOT, unless otherwise specified)
Charge Pump Open-Loop Output
Resistance vs Temperature
(2VIN – VCOUT)/IOUT
Extra Input Current vs Output
No-Load Input Current vs
Supply Voltage
Current (IVIN – 2 • IOUT
)
7
6
30
25
20
15
10
5
10
9
8
7
6
5
4
3
2
1
0
V
V
= 3.6V
V
V
= 3.6V
IN
OUT
IN
OUT
= 4.5V
= 4.5V
T
T
= 85°C
= 25°C
= –40°C
A
A
5
4
3
2
1
T
A
0
0
100 140 160
120
2.5
3.5
4
4.5
5
5.5
0
20 40 60 80
3
–40
–15
10
35
60
85
V
IN
(V)
I
(mA)
TEMPERATURE (°C)
OUT
3225 G04
3225 G05
3225 G08
Charging Profile with Unequal
Initial Output Capacitor Voltage
(Initial VTOP = 1.3V, VBOT = 1V)
Oscillator Frequency vs
Supply Voltage
Input Ripple and Input Current
0.94
SHDN
5V/DIV
V
IN
0.93
0.92
0.91
0.90
0.89
0.88
20mV/DIV
I
VIN
300mA/DIV
T
= 25°C
A
I
VIN
V
200mA/DIV
0mA
COUT
T
= –40°C
2V/DIV
A
V
-V
TOP BOT
T
= 85°C
A
500mV/DIV
3225 G06
R
PROG
= 12k
200ns/DIV
3225 G09
V
= V
2s/DIV
SEL
IN
R
= 12k
PROG
TOP
C
= C
= 1.1F
BOT
2.5
3
4
4.5
5
5.5
3.5
V
(V)
IN
3225 G07
Charging Profile with Unequal
Initial Output Capacitor Voltage
(Initial VTOP = 1V, VBOT = 1.3V)
Charging Profile with 30%
Mismatch in Output Capacitance
(CTOP > CBOT
Charging Profile with 30%
Mismatch in Output Capacitance
(CTOP < CBOT
)
)
SHDN
5V/DIV
SHDN
5V/DIV
SHDN
5V/DIV
I
I
I
VIN
VIN
VIN
300mA/DIV
300mA/DIV
300mA/DIV
V
COUT
V
V
COUT
COUT
2V/DIV
2V/DIV
2V/DIV
V
-V
V
-V
TOP BOT
TOP BOT
V
-V
TOP BOT
200mV/DIV
200mV/DIV
500mV/DIV
3225 G11
3225 G12
3225 G10
V
= V
IN
PROG
5s/DIV
= V
PROG
5s/DIV
V
R
C
= V
2s/DIV
SEL
SEL
IN
SEL
IN
R
C
= 12k
= 12k
= 12k
PROG
= 1.43F
= 1.1F
INITIAL VOLTAGE = 0V
INITIAL VOLTAGE = 0V
= 1.1F
= 1.43F
INITIAL VOLTAGE = 0V
INITIAL VOLTAGE = 0V
= C
= 1.1F
TOP
TOP
BOT
C
C
C
BOT
TOP
BOT
3225f
4
LTC3225
PIN FUNCTIONS
+
C (Pin 1): Flying Capacitor Positive Terminal. A 1ꢀF X5R
V
(Pin 6): Output Voltage Selection Input. A logic low
SEL
+
or X7R ceramic capacitor should be connected from C
to C .
at V sets the regulated C
to 4.8V; a logic high sets
SEL
OUT
–
the regulated C
to 5.3V. Do not float the V pin.
OUT
SEL
–
C (Pin 2): Flying Capacitor Negative Terminal.
PROG(Pin7):ChargingCurrentProgrammingPin.Aresis-
tor connected between this pin and GND sets the charging
current. (See Applications Information section).
CX (Pin 3): Midpoint of Two Series Supercapacitors. This
pin voltage is monitored and forced to track C
OUT
(CX =
OUT
C
/2) during charging to achieve voltage balancing of
GND (Pin 8): Charge Pump Ground. This pin should be
connected directly to a low impedance ground plane.
the top and bottom supercapacitors.
SHDN(Pin4):ActiveLowShutdownInput.AlowonSHDN
puts the LTC3225 in low current shutdown mode. Do not
float the SHDN pin.
V
(Pin 9): Power Supply for the LTC3225. V should
IN
IN
be bypassed to GND with a low ESR ceramic capacitor of
more than 2.2ꢀF.
PGOOD(Pin5):Open-DrainOutputStatusIndicator.Upon
C
(Pin 10): Charge Pump Output Pin. Connect C
OUT
OUT
start-up, this open-drain pin remains low until the output
to the top plate of the top supercapacitor. C
provides
OUT
voltage, V , is within 6% (typical) of its final value. Once
charge current to the supercapacitors and regulates the
final voltage to 4.8V/5.3V.
OUT
V
OUT
is valid, PGOOD becomes Hi-Z. If V
falls 7.2%
OUT
(typical) below its correct regulation level, PGOOD is
pulled low. PGOOD may be pulled up through an external
resistor to an appropriate reference level. This pin is Hi-Z
in shutdown mode.
Exposed Pad (Pin 11): This pad must be soldered to
a low impedance ground plane for optimum thermal
performance.
3225f
5
LTC3225
SIMPLIFIED BLOCK DIAGRAM
C
FLY
9
1
2
4
V
IN
+
–
V
IN
C
C
SHDN
UVLO
SOFT-START AND
SHUTDOWN CONTROL
THERMAL
PROTECTION
3000i
POR
1.2V
C
OUT
CX
10
3
C
C
TOP
BOT
CHARGE
PUMP
RUN
GND
8
i
PROG
CLK
7
R
PROG
RUN/STOP
R1
R2
OSCILLATOR
–
+
C1
V
REF
– 2%
POR
PGOOD
1.2V
1.088V
V
REF
5
+
C2
V
– 6%
V
REF
SEL
6
–
V
– 7.2%
REF
3225 F01
Figure 1
3225f
6
LTC3225
OPERATION
The LTC3225 is a dual cell supercapacitor charger. Its
unique topology maintains a constant output voltage with
programmable charging current. Its ability to maintain
equal voltages on both cells while charging protects the
supercapacitors from damage that is possible with other
charging methods, without the use of external balancing
resistors. The LTC3225 includes an internal switched
1
2
ICOUT
=
•IVIN
If the leakage currents or capacitances of the two su-
percapacitors are mismatched enough that varying the
charging current is not sufficient to balance their volt-
ages, the LTC3225 stops charging the capacitor with the
higher voltage until they are again balanced. This feature
protectseithercapacitorfromexperiencinganovervoltage
condition.
capacitor charge pump to boost V to a regulated output
IN
voltage.Auniquearchitecturemaintainsrelativelyconstant
inputcurrentforthelowestpossibleinputnoise. Thebasic
charger circuit requires only three external components.
Shutdown Mode
Normal Charge Cycle
Asserting SHDN low causes the LTC3225 to enter shut-
down mode. When the charge pump is first disabled, the
LTC3225 draws approximately 1μA of supply current from
Operation begins when the SHDN pin is pulled above 1.3V.
TheC
pinvoltageissensedandcomparedwithapreset
OUT
V and C . After V is discharged to 0V, the current
voltage threshold using an internal resistor divider and
IN
OUT
OUT
from V drops to less than 1μA. With SHDN connected
a comparator. The preset voltage threshold is 4.8V/5.3V
selectable with the V pin. If the voltage at the C
IN
to V , the output sinks less than 1ꢀA when the input sup-
pin
IN
SEL
OUT
ply is removed. Since the SHDN pin is a high impedance
is lower than the preset voltage threshold, the oscillator is
enabled. The oscillator operates at a typical frequency of
0.9MHz. When the oscillator is enabled, the charge pump
CMOS input, it should never be allowed to float.
Output Status Indicator (PGOOD)
operates charging up C . The input current drawn by the
OUT
internalchargepumprampsupatapproximately20mA/ꢀs
Duringshutdown,thePGOODpinishighimpedance.When
the charge cycle starts, an internal N-channel MOSFET
pulls the PGOOD pin to ground. When the output voltage,
each time the charge pump starts up from shutdown.
Once the output voltage is charged to the preset voltage
threshold,thepartshutsdowntheinternalchargepumpand
enters into a low current state. In this state, the LTC3225
consumes only about 20μA from the input supply. The
V
, is within 6% (typical) of its final value, the PGOOD
OUT
pinbecomeshighimpedance,butchargecurrentcontinues
to flow until V crosses the charge termination voltage.
OUT
When V drops 7% below the charge termination volt-
age, the PGOOD pin again pulls low.
current drawn from C
is approximately 2ꢀA.
OUT
OUT
Automatic Cell Balancing
Current Limit/Thermal Protection
The LTC3225 constantly monitors the voltage across both
supercapacitors while charging. When the voltage across
the supercapacitors is equal, both capacitors are charged
withequalcurrents.Ifthevoltageacrossonesupercapacitor
is lower than the other, the lower supercapacitor’s charge
currentisincreasedandthehighersupercapacitor’scharge
current is decreased. The greater the difference between
the supercapacitor voltages, the greater the difference
in charge current per capacitor. The charge currents can
increase or decrease as much as 50% to balance the volt-
age across the supercapacitors. When the cell voltages
are balanced, the supercapacitors are charged at a rate
of approximately:
The LTC3225 has built-in current limit as well as overtem-
perature protection. If the PROG pin is shorted to ground,
a protection circuit automatically shuts off the internal
charge pump. At higher temperatures, or if the input
voltage is high enough to cause excessive self-heating
of the part, the thermal shutdown circuitry shuts down
the charge pump once the junction temperature exceeds
approximately 150°C. It will enable the charge pump once
the junction temperature drops back to approximately
135°C. The LTC3225 is able to cycle in and out of thermal
shutdownindefinitelywithoutlatch-upordamageuntilthe
overcurrent condition is removed.
3225f
7
LTC3225
APPLICATIONS INFORMATION
Programming Charge Current
the internal switch resistances (R ) and the ESR of the
S
external capacitors.
Thechargingcurrentisprogrammedwithasingleresistor
connecting the PROG pin to ground. The program resistor
and the input/output charge currents are calculated using
the following equations:
Output Voltage Programming
The LTC3225 has a V input pin that allows the user to
SEL
set the output threshold voltage to either 4.8V or 5.3V by
3600V
RPROG
IVIN
forcing a low or high at the V pin respectively.
IVIN
=
SEL
Charging Time Estimation
IOUT
=
(with matched output capacitors)
2
The estimated charging time when the initial voltage
across the two output supercapacitors is equal is given
by the equation:
An R
resistor value of 2k or less (i.e., short circuit)
PROG
causes the LTC3225 to enter overcurrent shutdown mode.
This mode prevents damage to the part by shutting down
the internal charge pump.
COUT • VCOUT – VINI
(
)
tCHRG
=
IOUT
Power Efficiency
where C
is the series output capacitance, V
is the
OUT
COUT
voltage threshold set by the V
pin, V is the initial
SEL
INI
The power efficiency (η) of the LTC3225 is similar to that
of a linear regulator with an effective input voltage of twice
the actual input voltage. In an ideal regulating voltage
doubler the power efficiency is given by:
voltage at the C
current given by:
pin and I
is the output charging
OUT
OUT
1800V
RPROG
IOUT
=
POUT VOUT •IOUT VOUT
η2xIDEAL
=
=
=
P
V • 2IOUT 2V
IN
IN IN
When the charging process starts with unequal initial
voltages across the output supercapacitors, only the ca-
pacitor with the lower voltage level is charged; the other
capacitor is not charged until the voltages equalize. This
extends the charging time slightly. Under the worst-case
condition, whereby one capacitor is fully depleted while
the other remains fully charged due to significant leakage
current mismatch, the charging time is about 1.5 times
longer than normal.
At moderate to high output power the switching losses
and quiescent current of the LTC3225 are negligible and
theaboveexpressionisvalid. Forexample, withV =3.6V,
IN
I
= 100mA and V
regulated to 5.3V, the measured
OUT
OUT
efficiency is 71.2% which is in close agreement with the
theoretical 73.6% calculation.
Effective Open-Loop Output Resistance (R )
OL
Theeffectiveopen-loopoutputresistance(R )ofacharge
OL
Thermal Management
pumpisanimportantparameterthatdescribesthestrength
For higher input voltages and maximum output current,
therecanbesubstantialpowerdissipationintheLTC3225.
Ifthejunctiontemperatureincreasesaboveapproximately
of the charge pump. The value of this parameter depends
on many factors including the oscillator frequency (f ),
OSC
value of the flying capacitor (C ), the non-overlap time,
FLY
3225f
8
LTC3225
APPLICATIONS INFORMATION
Flying Capacitor Selection
150°C, the thermal shutdown circuitry automatically
deactivates the output. To reduce the maximum junction
temperature, a good thermal connection to the PC board
is recommended. Connecting the GND pin (Pin 8) and the
Exposed Pad (Pin 11) of the DFN package to a ground
plane under the device on two layers of the PC board
can reduce the thermal resistance of the package and PC
board considerably.
Warning: Polarized capacitors such as tantalum or alumi-
num should never be used for the flying capacitor since
its voltage can reverse upon start-up of the LTC3225.
Low ESR ceramic capacitors should always be used for
the flying capacitor.
The flying capacitor controls the strength of the charge
pump. In order to achieve the rated output current, it is
necessary to use at least 0.6ꢀF of capacitance for the
flying capacitor.
V Capacitor Selection
IN
The type and value of C controls the amount of ripple
IN
Theeffectivecapacitanceofaceramiccapacitorvarieswith
temperatureandvoltageinamannerprimarilydetermined
by its formulation. For example, a capacitor made of X5R
or X7R material retains most of its capacitance from
–40°C to 85°C whereas a Z5U or Y5V type capacitor loses
considerable capacitance over that range. X5R, Z5U and
Y5V capacitors may also have a poor voltage coefficient
causing them to lose 60% or more of their capacitance
when the rated voltage is applied. Therefore, when com-
paring different capacitors, it is often more appropriate to
compare the amount of achievable capacitance for a given
case size rather than comparing the specified capacitance
value. For example, over rated voltage and temperature
conditions, a 4.7ꢀF 10V Y5V ceramic capacitor in a 0805
casemaynotprovideanymorecapacitancethana1ꢀF10V
X5R or X7R capacitor available in the same 0805 case. In
fact, over bias and temperature range, the 1ꢀF 10V X5R
or X7R provides more capacitance than the 4.7ꢀF 10V
Y5V capacitor. The capacitor manufacturer’s data sheet
should be consulted to determine what value of capacitor
is needed to ensure minimum capacitance values are met
over operating temperature and bias voltage.
present at the input pin (V ). To reduce noise and ripple,
IN
it is recommended that low equivalent series resistance
(ESR) multilayer ceramic chip capacitors (MLCCs) be
used for C . Tantalum and aluminum capacitors are not
IN
recommended because of their high ESR.
TheinputcurrenttotheLTC3225isrelativelyconstantdur-
ing both the input charging phase and the output charging
phasebutdropstozeroduringtheclocknon-overlaptimes.
Sincethenon-overlaptimeissmall(~40ns)thesemissing
“notches” result in only a small perturbation on the input
power supply line. Note that a higher ESR capacitor, such
as a tantalum, results in higher input noise. Therefore,
ceramiccapacitorsarerecommendedfortheirexceptional
ESR performance. Further input noise reduction can be
achieved by powering the LTC3225 through a very small
series inductor as shown in Figure 2.
A 10nH inductor will reject the fast current notches,
thereby presenting a nearly constant current load to the
input power supply. For economy, the 10nH inductor can
be fabricated on the PC board with about 1cm (0.4") of
PC board trace.
10nH
9
V
IN
V
IN
LTC3225
0.1ꢀF
2.2ꢀF
8, 11
GND
3225 F02
Figure 2. 10nH Inductor Used for Input Noise Reduction
3225f
9
LTC3225
APPLICATIONS INFORMATION
Table 1 contains a list of ceramic capacitor manufacturers
and how to contact them.
+
–
The voltages on the flying capacitor pins C and C have
very fast rise and fall times. The high dv/dt values on
these pins can cause energy to capacitively couple to
adjacent printed circuit board traces. Magnetic fields can
also be generated if the flying capacitors are far from the
part (i.e. the loop area is large). To prevent capacitive
energy transfer, a Faraday shield may be used. This is a
grounded PC trace between the sensitive node and the
LTC3225 pins. For a high quality AC ground it should be
returned to a solid ground plane that extends all the way
to the LTC3225.
Table 1. Capacitor Manufacturers
AVX
www.avxcorp.com
www.kemet.com
Kemet
Murata
Taiyo Yuden
Vishay
TDK
www.murata.com
www.t-yuden.com
www.vishay.com
www.component.tdk.com
Layout Considerations
Table 2. Supercapacitor Manufacturers
Due to the high switching frequency and high transient
currents produced by the LTC3225, careful board layout is
necessaryforoptimumperformance.Anunbrokenground
plane and short connections to all the external capacitors
improves performance and ensures proper regulation
under all conditions.
CAP-XX
NESS CAP
Maxwell
Bussmann
AVX
www.cap-xx.com
www.nesscap.com
www.maxwell.com
www.cooperbussmann.com
www.avx.com
TYPICAL APPLICATION
5V Supercapacitor Backup Supply
D2
7
8
1
2
3
4
V
O
V
V
V
V
IN
IN
O
O
1.8V
C4
47ꢀF
10V
C7
1ꢀF
10V
C8
+
C3
150ꢀF
10V
D3
1ꢀF
10V
10
ENA
SEN
9
8
1
2
4
5
10
3
V
IN
5V
V
C
C5
0.22ꢀF
6.3V
IN
OUT
V
O
C2
2.2ꢀF
10V
TYCO
C
0.80F
5.5V
OUT
AUSTIN
CX
GND
SUPERLYNX
9
5
6
LTC3225
HS208F
TRIM
GND
GND
+
C
R1
C1
1ꢀF
10V
15k
1%
–
C
V
O
3225 TA02
7
6
R3
100k
5%
SHDN
PROG
R1
23.7k
1%
PGOOD
PGOOD
V
SEL
GND
11
3225f
10
LTC3225
PACKAGE DESCRIPTION
DDB Package
10-Lead Plastic DFN (3mm × 2mm)
(Reference LTC DWG # 05-08-1722 Rev Ø)
0.64 p0.05
(2 SIDES)
0.70 p0.05
2.55 p0.05
1.15 p0.05
PACKAGE
OUTLINE
0.25 p 0.05
0.50 BSC
2.39 p0.05
(2 SIDES)
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
R = 0.115
0.40 p 0.10
3.00 p0.10
(2 SIDES)
TYP
6
R = 0.05
TYP
10
2.00 p0.10
PIN 1 BAR
TOP MARK
PIN 1
(2 SIDES)
R = 0.20 OR
(SEE NOTE 6)
0.25 s 45o
0.64 p 0.05
CHAMFER
(2 SIDES)
5
1
(DDB10) DFN 0905 REV Ø
0.25 p 0.05
0.75 p0.05
0.200 REF
0.50 BSC
2.39 p0.05
(2 SIDES)
0 – 0.05
BOTTOM VIEW—EXPOSED PAD
NOTE:
1. DRAWING CONFORMS TO VERSION (WECD-1) IN JEDEC PACKAGE OUTLINE M0-229
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE
3225f
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-
tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.
11
LTC3225
TYPICAL APPLICATION
12V Supercapacitor Backup Supply
LT3740
HIGH EFFICIENCY
DOWN CONVERTER
D1
CSHD6-40C
DPAK
V
1.8V
10A
OUT
V
IN
+
V
IN
V
CHARGER 3
OUT
12V
V
IN
C
OUT
C1
LT3740
+
47ꢀF
25V
DCAP
LTC3225
GND
GND
+
C2
1ꢀF
10V
C
C
CX
GND
–
GND
GND
10A
R6
1k
D2
CMSH3-20
M4
Si4410DY
M2
IRF7424
V
BIAS
3.3V
C5
10ꢀF
D3
CMSH3-20
CHARGER 2
GND
V
IN
C
OUT
LTC3225
+
D4
CMSH3-20
C3
1ꢀF
10V
C
C
CX
GND
–
1
8
R5
1k
VM
V
CC
1
8
LTC2915
SEL1 SEL2
R7
M3
Si4410DY
M1
IRF7424
2
3
4
7
6
5
PGND OUT
LTC4441-1
10k
2
3
4
7
6
5
R1
2k
TOL/MR RT
SGND DRV
CC
R3
IN
V
IN
GND
RST
332k
CHARGER 1
R2
100k
C7
10ꢀF
EN/SHDN FB
C6
0.1ꢀF
V
IN
C
OUT
R4
84.5k
LTC3225
+
C4
1ꢀF
10V
C
C
CX
GND
–
3225 TA03
RELATED PARTS
PART NUMBER
DESCRIPTION
COMMENTS
I = 20ꢀA, Up to 100mA Output, SOT-23 Package
LTC1751-3.3/LTC1751-5
LTC1754-3.3/LTC1754-5
LTC3200
Micropower 5V/3.3V Doubler Charge Pumps
Micropower 5V/3.3V Doubler Charge Pumps
Constant Frequency Doubler Charge Pump
Q
I = 13ꢀA, Up to 50mA Output, SOT-23 Package
Q
Low Noise, 5V Output or Adjustable
LTC3203/LTC3203B/
LTC3203B-1/LTC3203-1
500mA Low Noise High Efficiency Dual Mode
Step-Up Charge Pumps
V : 2.7V to 5.5V, 3mm × 3mm 10-Lead DFN Package
IN
LTC3204/LTC3204B-3.3/
LTC3204-5
Low Noise Regulating Charge Pumps
Up to 150mA (LTC3204-5), Up to 50mA (LTC3204-3.3)
Up to 60mA Output
LTC3221/LTC3221-3.3/
LTC3221-5
Micropower Regulated Charge Pump
LTC3240-3.3/LTC3240-2.5 Step-Up/Step-Down Regulated Charge Pumps
Up to 150mA Output
LT®3420/LT3420-1
1.4A/1A Photoflash Capacitor Charger with
Automatic Top-Off
Charges 220ꢀF to 320V in 3.7 Seconds from 5V, V : 2.2V to 16V,
SD
IN
I
< 1ꢀA, 10-Lead MS Package
LT3468/LT3468-1/
LT3468-2
1.4A/1A/0.7A, Photoflash Capacitor Charger
V : 2.5V to 16V, Charge Time = 4.6 Seconds for the LT3468 (0V to 320V,
IN
100ꢀF, V = 3.6V), I < 1ꢀA, ThinSOTTM Package
IN
SD
LTC3484-0/LTC3484-1/
LTC3484-2
1.4A/0.7A/1A, Photoflash Capacitor Charger
V : 1.8V to 16V, Charge Time = 4.6 Seconds for the LT3484-0 (0V to 320V,
IN
100ꢀF, V = 3.6V), I < 1ꢀA, 2mm × 3mm 6-Lead DFN Package
IN
SD
LT3485-0/LT3485-1/
LT3485-2/LT3485-3
1.4A/0.7A/1A/2A Photoflash Capacitor Charger V : 1.8V to 10V, Charge Time = 3.7 Seconds for the LT3485-0 (0V to 320V,
IN
with Output Voltage Monitor and Integrated
IGBT
100ꢀF, V = 3.6V), I < 1ꢀA, 3mm × 3mm 10-Lead DFN Driver
IN SD
LT3750
Capacitor Charger Controller
Charges Any Size Capacitor, 10-Lead MS Package
ThinSOT is a trademark of Linear Technology Corporation.
3225f
LT 0508 • PRINTED IN USA
LinearTechnology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
12
●
●
© LINEAR TECHNOLOGY CORPORATION 2008
(408) 432-1900 FAX: (408) 434-0507 www.linear.com
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