LTC3225EDDB#TRMPBF [Linear]
LTC3225 - 150mA Supercapacitor Charger; Package: DFN; Pins: 10; Temperature Range: -40°C to 85°C;
| 型号： | LTC3225EDDB#TRMPBF |
| 厂家： | 
Linear |
| 描述： | LTC3225 - 150mA Supercapacitor Charger; Package: DFN; Pins: 10; Temperature Range: -40°C to 85°C 光电二极管 |
| 文件： | 总14页 (文件大小：268K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
LTC3225/LTC3225-1
150mA Supercapacitor
Charger
FEATURES
DESCRIPTION
TheLTC®3225/LTC3225-1areprogrammablesupercapaci-
tor chargers designed to charge two supercapacitors in
series to a selectable fixed output voltage (4.8V/5.3V for
the LTC3225 and 4V/4.5V for the LTC3225-1) from input
supplies as low as 2.8V to 5.5V. Automatic cell balancing
prevents overvoltage damage to either supercapacitor. No
balancing resistors are required.
n
Low Noise Constant Frequency Charging of Two
Series Supercapacitors
n
Automatic Cell Balancing Prevents Capacitor
Overvoltage During Charging
n
Programmable Charge Current (Up to 150mA)
n
Selectable 2.4V or 2.65V Regulation per Cell
(LTC3225)
n
Selectable 2V or 2.25V Regulation per Cell
Low input noise, low quiescent current and low external
parts count (one flying capacitor, one bypass capacitor at
(LTC3225-1)
Automatic Recharge
n
V
and one programming resistor) make the LTC3225/
IN
n
I
I
= 20ꢀA in Standby Mode
COUT
No Inductors
VIN
LTC3225-1 ideally suited for small battery-powered
n
n
n
< 1ꢀA When Input Supply is Removed
applications.
Charge current level is programmed with an external
resistor. When the input supply is removed, the LTC3225/
LTC3225-1automaticallyenteralowcurrentstate,drawing
less than 1μA from the supercapacitors.
Tiny Application Circuit (2mm × 3mm DFN Package,
All Components <1mm High)
APPLICATIONS
The LTC3225/LTC3225-1 are available in a 10-lead 2mm
× 3mm DFN package.
L, LT, LTC and LTM are registered trademarks and ThinSOT is a trademark of Linear
Technology Corporation. All other trademarks are the property of their respective owners.
n
Current Limited Applications with High Peak Power
Loads (LED Flash, PCMCIA Tx Bursts, HDD Bursts,
GPRS/GSM Transmitter)
Backup Supplies
n
TYPICAL APPLICATION
Charging Profile with 30% Mismatch
in Output Capacitance, CTOP < CBOT
V
OUT
V
IN
SHDN
V
C
C
C
4.8V/5.3V (LTC3225)
4V/4.5V (LTC3225-1)
IN
+
OUT
2.8V/3V TO 5.5V
5V/DIV
0.6F
0.6F
2.2ꢀF
1ꢀF
CX
LTC3225
LTC3225-1
I
VIN
300mA/DIV
–
GND
100k
V
COUT
SHDN PGOOD
ON/OFF
2V/DIV
V
OUTPUT
PROGRAMMING
SEL
PROG
12k
3225 TA01a
V
-V
TOP BOT
200mV/DIV
3225 TA01b
LTC3225
= V
5 SEC/DIV
V
R
SEL
IN
= 12k
PROG
C
C
C
C
= 1.1F
= 1.43F
TOP
BOT
TOP
BOT
INITIAL VOLTAGE = 0V
INITIAL VOLTAGE = 0V
3225fb
1
LTC3225/LTC3225-1
ABSOLUTE MAXIMUM RATINGS
PIN CONFIGURATION
(Note 1)
V , C
to GND ......................................... –0.3V to 6V
TOP VIEW
IN OUT
SHDN, V ...................................... –0.3V to V + 0.3V
SEL
IN
+
1
2
3
4
5
10
9
C
C
C
V
OUT
C
I
OUT
Short-Circuit Duration............................. Indefinite
Continuous (Note 2)......................................350mA
Continuous (Note 2).....................................175mA
–
OUT
VIN
IN
11
8
CX
SHDN
GND
I
7
PROG
6
PGOOD
V
Operating Temperature Range (Note 3).... –40°C to 85°C
Storage Temperature Range................... –65°C to 125°C
SEL
DDB PACKAGE
10-LEAD (3mm s 2mm) PLASTIC DFN
T
= 125°C, θ = 76°C/W
JA
JMAX
EXPOSED PAD (PIN 11) MUST BE SOLDERED TO
LOW IMPEDANCE GND PLANE (PIN 8) ON PCB
ORDER INFORMATION
Lead Free Finish
TAPE AND REEL (MINI)
TAPE AND REEL
PART MARKING
PACKAGE DESCRIPTION
TEMPERATURE RANGE
LTC3225EDDB#TRMPBF
LTC3225EDDB-1#TRMPBF LTC3225EDDB-1#TRPBF LFFS
TRM = 500 pieces.
LTC3225EDDB#TRPBF
LCYR
–40°C to 85°C
–40°C to 85°C
10-Lead (3mm × 2mm) Plastic DFN
10-Lead (3mm × 2mm) Plastic DFN
Consult LTC Marketing for parts specified with wider operating temperature ranges.
Consult LTC Marketing for information on lead based finish parts.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VIN = 3.6V, CIN = 2.2μF, CFLY = 1μF, unless otherwise specified (Note 3).
SYMBOL
LTC3225
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
l
l
V
V
V
V
V
Input Supply Undervoltage Lockout
High-to-Low Threshold
V
V
= V
= 0
2.65
2.4
2.75
2.5
2.85
2.6
V
V
IN-UVLO
IN-UVLO-HYS
IN
SEL
SEL
IN
IN
IN
Input Supply Undervoltage Lockout
Hysteresis
V
V
= V
= 0
150
140
mV
mV
SEL
SEL
l
l
Input Voltage Range
V
V
= V
= 0V
3
2.8
5.5
5.5
V
V
SEL
SEL
l
l
Charge Termination Voltage
Sleep Mode Threshold (Rising Edge)
V
V
= V
IN
= 0V
5.2
4.7
5.3
4.8
5.4
4.9
V
V
COUT
SEL
SEL
Output Comparator Hysteresis
100
mV
COUT-HYS
l
l
V
Maximum Voltage Across Each of the
Supercapacitors After Charging
V
V
= V
IN
= 0V
2.75
2.5
V
V
TOP/BOT
SEL
SEL
LTC3225-1
l
l
V
Input Supply Undervoltage Lockout
High-to-Low Threshold
V
V
= V
= 0
2.25
2.0
2.35
2.1
2.45
2.2
V
V
IN-UVLO
SEL
SEL
IN
V
Input Supply Undervoltage Lockout
Hysteresis
V
V
= V
= 0
150
140
mV
mV
IN-UVLO-HYS
SEL
SEL
IN
3225fb
2
LTC3225/LTC3225-1
ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VIN = 3.6V, CIN = 2.2μF, CFLY = 1μF, unless otherwise specified (Note 3).
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
l
l
V
V
V
Input Voltage Range
V
V
= V
= 0
2.8
2.8
5.5
5.5
V
V
IN
SEL
SEL
IN
l
l
Charge Termination Voltage
Sleep Mode Threshold (Rising Edge)
V
V
= V
= 0
4.4
3.9
4.5
4.0
4.6
4.1
V
V
COUT
COUT-HYS
SEL
SEL
IN
Output Comparator Hysteresis
100
mV
l
l
V
Maximum Voltage Across Each of the
Supercapacitors After Charging
V
V
= V
= 0
2.35
2.1
V
V
TOP/BOT
SEL
SEL
IN
LTC3225/LTC3225-1
l
l
I
I
I
No Load Operating Current at V
Shutdown Current
I
= 0mA
20
40
1
ꢀA
ꢀA
Q-VIN
IN
OUT
SHDN = 0V, V
= 0V
0.1
SHDN-VIN
COUT
OUT
l
l
C
Leakage Current
V
V
V
= 5.6V, SHDN = 0V
1
2
3
4
1
ꢀA
ꢀA
ꢀA
OUT
OUT
OUT
OUT
= 5.6V, Charge Pump in Sleep Mode
= 5.6V, SHDN Connected to V with
IN
Input Supply Removed
I
I
Input Charge Current
Output Charge Current
V
V
= 3.6V, R
= 3.6V, R
= 3.6V, R
= 12k, C
= 60k, C
= 12k, C
= C
= C
= C
306
55
mA
mA
mA
VIN
IN
IN
PROG
PROG
PROG
TOP
TOP
TOP
BOT
BOT
V
V
V
,
BOT
125
150
175
OUT
IN
OUT
OUT
= 4.5V (LTC3225),
= 3.7V (LTC3225-1)
V
V
V
= 3.6V, R
OUT
OUT
= 60k, C
= C ,
BOT
26
mA
IN
PROG
TOP
= 4.5V (LTC3225),
= 3.7V (LTC3225-1)
l
l
l
l
V
PGOOD Low Output Voltage
I
= –1.6mA
= 5V
0.4
10
V
ꢀA
%
%
Ω
PGOOD
PGOOD
I
PGOOD High Impedance Leakage Current
PGOOD Low-to-High Threshold
PGOOD Threshold Hysteresis
V
PGOOD
PGOOD-LEAK
V
V
Relative to Output Voltage Threshold
Relative to Output Voltage Threshold
92
94
96
PG
0.25
1.2
2.5
PG-HYS
R
Effective Open-Loop Output Impedance
(Note 4)
V
V
= 3.6V, V
= 3.6V, V
= 4.5V (LTC3225)
= 3.7V (LTC3225-1)
8
9
OL
IN
IN
OUT
OUT
l
f
CLK Frequency
0.6
1.3
0.9
1.5
MHz
OSC
V
V
V
, SHDN
SEL
l
l
l
l
Input High Voltage
Input Low Voltage
Input High Current
Input Low Current
V
V
IH
0.4
1
IL
I
–1
–1
ꢀA
ꢀA
IH
IL
I
1
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 3: The LTC3225/LTC3225-1 are tested under pulsed load conditions
such that T ≈ T . The LTC3225/LTC3225-1 are guaranteed to meet
performance specifications from 0°C to 85°C. Specifications over the
–40°C to 85°C operating temperature range are assured by design,
characterization and correlation with statistical process controls.
J
A
Note 2: Based on long-term current density limitations.
Note 4: Output not in regulation;
R
OL
≡ (2 • V – V )/I
IN OUT OUT
3225fb
3
LTC3225/LTC3225-1
TYPICAL PERFORMANCE CHARACTERISTICS
(TA = 25°C, CFLY = 1μF, CIN = 2.2μF, CTOP = CBOT, unless otherwise specified)
I
OUT vs RPROG
IOUT vs VOUT (RPROG = 12k)
Efficiency vs VIN
100
90
80
70
60
50
40
30
20
10
0
160
140
120
100
180
160
140
120
100
80
V
V
= 3.6V
IN
OUT
= 4.5V (LTC3225)
LTC3225
80
60
LTC3225-1
60
I
= 100mA
BOT
LOAD
TOP
C
= C
BOT
40
20
0
TOP
40
C
= C
V
V
V
= 2.8V
= 3.6V
= 5.5V
IN
IN
IN
V
V
= V
IN
SEL
SEL
20
= 0
3.5
0
20
30
R
50
10
60
40
(kΩ)
2.5
3
4
(V)
5.5
4.5
5
0
0.5
4
4.5
5
1
1.5
2
V
2.5
(V)
3
3.5
V
PROG
IN
OUT
3225 G01
3525 G03
3225 G02
Charge Pump Open-Loop Output
Resistance vs Temperature
(2VIN – VCOUT)/IOUT
Extra Input Current vs Output
Current (IVIN – 2 • IOUT
No-Load Input Current vs
Supply Voltage
)
7
6
5
4
3
2
30
25
20
15
10
5
10.0
9.5
9.0
8.5
V
= 3.6V
V
= 3.6V
IN
IN
CHARGE PUMP IS ON
T
T
= 85°C
= 25°C
= –40°C
A
A
V
= 3.7V
OUT
V
= 5V
(LTC3225-1)
OUT
T
A
V
= 4.5V
OUT
V
= 4.5V
OUT
8.0
7.5
V
= 3.7V
OUT
(LTC3225)
7.0
6.5
6.0
V
= 4.2V
OUT
0
100
(mA)
140 160
2.5
3.5
4
4.5
5
5.5
20
40
60
80
120
3
–15
10
TEMPERATURE (°C)
60
–40
85
35
V
(V)
I
IN
OUT
3225 G04
3225 G05
3225 G06
Charging Profile with Unequal
Initial Output Capacitor Voltage
(Initial VTOP = 1.3V, VBOT = 1V)
Oscillator Frequency vs
Supply Voltage
Input Ripple and Input Current
0.94
0.93
0.92
0.91
0.90
0.89
0.88
SHDN
5V/DIV
V
IN
I
VIN
20mV/DIV
300mA/DIV
T
= 25°C
A
I
V
VIN
COUT
200mA/DIV
0mA
2V/DIV
T
= –40°C
A
V
-V
TOP BOT
T
= 85°C
500mV/DIV
A
3225 G08
3225 G09
R
= 12k
200ns/DIV
LTC3225
= V
2 SEC/DIV
PROG
V
R
SEL
IN
= 12k
PROG
TOP
C
C
C
= C
= 1.1F
BOT
INITIAL VOLTAGE = 1.3V
INITIAL VOLTAGE = 1V
TOP
BOT
2.5
3
4
4.5
5
5.5
3.5
V
(V)
IN
3225 G07
3225fb
4
LTC3225/LTC3225-1
TYPICAL PERFORMANCE CHARACTERISTICS
(TA = 25°C, CFLY = 1μF, CIN = 2.2μF, CTOP = CBOT, unless otherwise specified)
Charging Profile with Unequal
Initial Output Capacitor Voltage
(Initial VTOP = 1V, VBOT = 1.3V)
Charging Profile with 30%
Charging Profile with 30%
Mismatch in Output Capacitance
Mismatch in Output Capacitance
(CTOP > CBOT
)
(CTOP < CBOT)
SHDN
5V/DIV
SHDN
5V/DIV
SHDN
5V/DIV
I
I
I
VIN
VIN
VIN
300mA/DIV
300mA/DIV
300mA/DIV
V
COUT
V
V
COUT
COUT
2V/DIV
2V/DIV
2V/DIV
V
-V
V
-V
TOP BOT
TOP BOT
V
-V
TOP BOT
200mV/DIV
200mV/DIV
500mV/DIV
3225 G11
3225 G12
3225 G10
LTC3225
5 SEC/DIV
LTC3225
5 SEC/DIV
LTC3225
= V
2 SEC/DIV
V
= V
V
= V
V
SEL
PROG
TOP
BOT
TOP
BOT
IN
SEL
PROG
TOP
BOT
TOP
BOT
IN
SEL
IN
R
C
= 12k
= 1.43F
= 1.1F
R
C
C
C
C
= 12k
R
C
= 12k
PROG
= 1.1F
= C
= 1.1F
TOP
TOP
BOT
BOT
C
C
C
= 1.43F
C
C
INITIAL VOLTAGE = 1V
INITIAL VOLTAGE = 1.3V
INITIAL VOLTAGE = 0V
INITIAL VOLTAGE = 0V
INITIAL VOLTAGE = 0V
INITIAL VOLTAGE = 0V
PIN FUNCTIONS
+
C (Pin 1): Flying Capacitor Positive Terminal. A 1ꢀF X5R
V
(Pin 6): Output Voltage Selection Input. A logic
SEL
low at V
+
or X7R ceramic capacitor should be connected from C
to C .
sets the regulated C
to 4.8V (LTC3225)
SEL
OUT
–
or 4V (LTC3225-1); a logic high sets the regulated C
OUT
to 5.3V (LTC3225) or 4.5V (LTC3225-1). Do not float the
pin.
–
C (Pin 2): Flying Capacitor Negative Terminal.
V
SEL
CX (Pin 3): Midpoint of Two Series Supercapacitors. This
pin voltage is monitored and forced to track C
OUT
PROG (Pin 7): Charge Current Programming Pin. A resis-
tor connected between this pin and GND sets the charge
current. (See Applications Information section).
(CX =
OUT
C
/2) during charging to achieve voltage balancing of
the top and bottom supercapacitors.
GND (Pin 8, Exposed Pad Pin 11): Charge Pump Ground.
These pins must be soldered directly to PCB ground. The
exposed pad must be soldered to a low impedance PCB
ground for rated thermal performance.
SHDN(Pin4):ActiveLowShutdownInput.AlowonSHDN
puts the LTC3225/LTC3225-1 in low current shutdown
mode. Do not float the SHDN pin.
PGOOD(Pin5):Open-DrainOutputStatusIndicator.Upon
V
(Pin 9): Power Supply for the LTC3225/LTC3225-1.
IN
start-up, this open-drain pin remains low until the output
V should be bypassed to GND with a low ESR ceramic
IN
voltage, V , is within 6% (typical) of its final value. Once
OUT
capacitor of more than 2.2ꢀF.
V
OUT
is valid, PGOOD becomes Hi-Z. If V
falls 7.2%
OUT
(typical) below its correct regulation level, PGOOD is
pulled low. PGOOD may be pulled up through an external
resistor to an appropriate reference level. This pin is Hi-Z
in shutdown mode.
C
(Pin 10): Charge Pump Output Pin. Connect C
to
OUT
OUT
thetopplateofthetopsupercapacitor.C providescharge
OUT
current to the supercapacitors and regulates the final volt-
age to 4.8V/5.3V (LTC3225) or 4V/4.5V (LTC3225-1).
3225fb
5
LTC3225/LTC3225-1
SIMPLIFIED BLOCK DIAGRAM
C
FLY
9
1
2
4
V
IN
+
–
V
C
C
SHDN
IN
UVLO
SOFT-START AND
SHUTDOWN CONTROL
THERMAL
PROTECTION
3000i
POR
1.2V
C
OUT
CX
10
3
C
C
TOP
CHARGE
PUMP
RUN
GND
BOT
8
i
PROG
CLK
7
R
PROG
RUN/STOP
R1
R2
OSCILLATOR
–
+
C1
V
REF
– 2%
POR
PGOOD
1.2V
V
REF
5
+
1.088V (LTC3225)
1.067V (LTC3225-1)
C2
V
– 6%
REF
V
SEL
–
6
V
– 7.2%
REF
3225 F01
Figure 1
OPERATION
TheLTC3225/LTC3225-1aredualcellsupercapacitorchar-
gers. Their unique topology maintains a constant output
voltage with programmable charge current. Their ability
to maintain equal voltages on both cells while charging
protectsthesupercapacitorsfromdamagethatispossible
with other charging methods, without the use of external
balancing resistors. The LTC3225/LTC3225-1 include an
Normal Charge Cycle
Operation begins when the SHDN pin is pulled above 1.3V.
TheC pinvoltageissensedandcomparedwithapreset
OUT
voltage threshold using an internal resistor divider and
a comparator. The preset voltage threshold is selectable
with the V
pin. If the voltage at the C
pin is lower
SEL
OUT
thanthepresetvoltagethreshold, theoscillatorisenabled.
The oscillator operates at a typical frequency of 0.9MHz.
When the oscillator is enabled, the charge pump operates
internal switched capacitor charge pump to boost V to a
IN
regulated output voltage. A unique architecture maintains
relatively constant input current for the lowest possible
input noise. The basic charger circuit requires only three
external components.
charging up C . Each time the charge pump starts up
OUT
from shutdown, the input current drawn by the internal
charge pump ramps up at approximately 20mA/ꢀs until it
reaches a level which is determined by R
.
PROG
3225fb
6
LTC3225/LTC3225-1
OPERATION
Once the output voltage is charged to the preset volt-
age threshold, the part shuts down the internal charge
pump and enters into a low current state. In this state,
the LTC3225/LTC3225-1 consume only about 20μA
Shutdown Mode
Asserting SHDN low causes the LTC3225/LTC3225-1 to
enter shutdown mode. With the SHDN pin connected to
V and the input supply removed or grounded, less than
IN
from the input supply. The current drawn from C
approximately 2ꢀA.
is
OUT
1ꢀA is consumed from the output, allowing the superca-
pacitors to remain charged.
Automatic Cell Balancing
If the input supply is present at V and the SHDN pin is
IN
grounded, the LTC3225/LTC3225-1 draw approximately
Duetomanufacturingtolerances,capacitanceandleakage
current can vary from supercapacitor to supercapacitor.
Without the automatic cell balancing scheme used in the
LTC3225/LTC3225-1,thevoltagesacrossthesupercapaci-
torscoulddifferfromeachotherandpotentiallyovervoltage
a cell. This can affect the performance and lifetime of a
supercapacitor.
1ꢀA of supply current. With the voltage at the C
pin
OUT
dischargedto0V,thiscurrentdropstolessthan1ꢀA.Since
the SHDN pin is a high impedance CMOS input, it should
never be allowed to float.
Output Voltage Programming
The LTC3225/LTC3225-1 have a V input pin that allows
SEL
The LTC3225/LTC3225-1 constantly monitor the volt-
age across both supercapacitors while charging. When
the voltage across the supercapacitors is equal, both
capacitors are charged with equal currents. If the voltage
across one supercapacitor is lower than the other, the
lower supercapacitor’s charge current is increased and
the higher supercapacitor’s charge current is decreased.
The greater the difference between the supercapacitor
voltages, the greater the difference in charge current per
capacitor. The charge currents can increase or decrease
as much as 50% to balance the voltage across the su-
percapacitors. When the cell voltages are balanced, the
supercapacitors are charged at a rate of approximately:
the user to set the output threshold voltage to either 4.8V
or 5.3V for the LTC3225 and 4V or 4.5V for the LTC3225-1
by forcing a low or high at the V pin respectively.
SEL
Output Status Indicator (PGOOD)
Duringshutdown,thePGOODpinishighimpedance.When
the charge cycle starts, an internal N-channel MOSFET
pulls the PGOOD pin to ground. When the output voltage,
V
, is within 6% (typical) of its final value, the PGOOD
OUT
pinbecomeshighimpedance,butchargecurrentcontinues
to flow until V crosses the charge termination voltage.
OUT
When V
drops 7% below the charge termination volt-
OUT
age, the PGOOD pin again pulls low.
1
ICOUT = •IVIN
2
Current Limit/Thermal Protection
The LTC3225/LTC3225-1 have built-in current limit as well
as overtemperature protection. If the PROG pin is shorted
to ground, a protection circuit automatically shuts off the
internal charge pump. At higher temperatures, or if the
input voltage is high enough to cause excessive self-heat-
ing of the part, the thermal shutdown circuitry shuts down
the charge pump once the junction temperature exceeds
approximately 150°C. It will enable the charge pump once
the junction temperature drops back to approximately
135°C. The LTC3225/LTC3225-1 are able to cycle in and
out of thermal shutdown indefinitely without latch-up or
damage until the overcurrent condition is removed.
If the leakage currents or capacitances of the two superca-
pacitors are mismatched enough that varying the charge
current is not sufficient to balance their voltages, the
LTC3225/LTC3225-1 stop charging the capacitor with the
higher voltage until they are again balanced. This feature
protectseithercapacitorfromexperiencinganovervoltage
condition.Attemptingtoequalizethevoltagesusingparallel
resistors wastes power, discharges the supercapacitors,
andtakestimetoequalizethevoltages.A30%capacitance
mismatch leads to a 30% initial voltage difference after
charging. It takes hours to equalize the voltages across
1F supercapacitors using 10k resistors.
3225fb
7
LTC3225/LTC3225-1
APPLICATIONS INFORMATION
Programming Charge Current
Charging Time Estimation
The charge current is programmed with a single resistor
connecting the PROG pin to ground. The program resistor
and the input/output charge currents are calculated using
the following equations:
The estimated charging time with equal initial voltages
across the two supercapacitors is given by the equation:
COUT • V
– VINI
(
)
COUT
tCHRG
=
IOUT
is the series output capacitance, V is the
COUT
3600V
RPROG
IVIN
=
where C
OUT
voltage threshold set by the V
pin, V is the initial
SEL
INI
IVIN
2
voltage at the C
pin and I
is the output charge
IOUT
=
(with matched output capacitors)
OUT
OUT
current given by:
An R
resistor value of 2k or less (i.e., short circuit)
1800V
RPROG
PROG
IOUT
=
causes the LTC3225/LTC3225-1 to enter overcurrent
shutdown mode. This mode prevents damage to the part
by shutting down the internal charge pump.
Whenthechargingprocessstartswithunequalinitialvolt-
ages across the supercapacitors, only the capacitor with
the lower voltage level is charged; the other capacitor is
not charged until the voltages equalize. This extends the
charging time slightly. Under the worst-case condition,
whereby one capacitor is fully depleted while the other
remains fully charged due to significant leakage current
mismatch, the charging time is about 1.5 times longer
than normal.
Power Efficiency
The power efficiency (η) of the LTC3225/LTC3225-1 is
similar to that of a linear regulator with an effective input
voltageoftwicetheactualinputvoltage.Inanidealregulat-
ing voltage doubler the power efficiency is given by:
POUT VOUT •IOUT VOUT
η2xIDEAL
=
=
=
P
V •2I
2V
IN
IN
IN
OUT
Thermal Management
At moderate to high output power the switching losses
and quiescent current of the LTC3225/LTC3225-1 are
negligible and the above expression is valid. For example,
For higher input voltages and maximum output current,
therecanbesubstantialpowerdissipationintheLTC3225/
LTC3225-1. If the junction temperature increases above
approximately150°C,thethermalshutdowncircuitryauto-
matically deactivates the output. To reduce the maximum
junctiontemperature,agoodthermalconnectiontothePC
board is recommended. Connecting the GND pin (Pin 8)
and the Exposed Pad (Pin 11) of the DFN package to a
ground plane under the device on two layers of the PC
board can reduce the thermal resistance of the package
and PC board considerably.
with V = 3.6V, I
= 100mA and V
regulated to 5.3V,
IN
OUT
OUT
the measured efficiency is 71.2% which is in close agree-
ment with the theoretical 73.6% calculation.
Effective Open-Loop Output Resistance (R )
OL
Theeffectiveopen-loopoutputresistance(R )ofacharge
OL
pumpisanimportantparameterthatdescribesthestrength
of the charge pump. The value of this parameter depends
on many factors including the oscillator frequency (f ),
OSC
value of the flying capacitor (C ), the non-overlap time,
FLY
the internal switch resistances (R ) and the ESR of the
S
external capacitors.
3225fb
8
LTC3225/LTC3225-1
APPLICATIONS INFORMATION
V Capacitor Selection
IN
its voltage can reverse upon start-up of the LTC3225/
LTC3225-1. Low ESR ceramic capacitors should always
be used for the flying capacitor.
The type and value of C controls the amount of ripple
IN
present at the input pin (V ). To reduce noise and ripple,
IN
The flying capacitor controls the strength of the charge
pump. In order to achieve the rated output current, it is
necessary to use at least 0.6ꢀF of capacitance for the
flying capacitor.
it is recommended that low equivalent series resistance
(ESR) multilayer ceramic chip capacitors (MLCCs) be
used for C . Tantalum and aluminum capacitors are not
IN
recommended because of their high ESR.
Theeffectivecapacitanceofaceramiccapacitorvarieswith
temperatureandvoltageinamannerprimarilydetermined
by its formulation. For example, a capacitor made of X5R
or X7R material retains most of its capacitance from
–40°C to 85°C whereas a Z5U or Y5V type capacitor loses
considerable capacitance over that range. X5R, Z5U and
Y5V capacitors may also have a poor voltage coefficient
causing them to lose 60% or more of their capacitance
when the rated voltage is applied. Therefore, when com-
paring different capacitors, it is often more appropriate to
compare the amount of achievable capacitance for a given
case size rather than comparing the specified capacitance
value. For example, over rated voltage and temperature
conditions, a 4.7ꢀF 10V Y5V ceramic capacitor in a 0805
casemaynotprovideanymorecapacitancethana1ꢀF10V
X5R or X7R capacitor available in the same 0805 case. In
fact, over bias and temperature range, the 1ꢀF 10V X5R
or X7R provides more capacitance than the 4.7ꢀF 10V
Y5V capacitor. The capacitor manufacturer’s data sheet
should be consulted to determine what value of capacitor
is needed to ensure minimum capacitance values are met
over operating temperature and bias voltage.
The input current to the LTC3225/LTC3225-1 is relatively
constant during both the input charging phase and the
output charging phase but drops to zero during the clock
non-overlap times. Since the non-overlap time is small
(~40ns) these missing “notches” result in only a small
perturbation on the input power supply line. Note that a
higher ESR capacitor, such as a tantalum, results in higher
input noise. Therefore, ceramic capacitors are recom-
mended for their exceptional ESR performance. Further
input noise reduction can be achieved by powering the
LTC3225/LTC3225-1 through a very small series inductor
as shown in Figure 2.
A 10nH inductor will reject the fast current notches,
thereby presenting a nearly constant current load to the
input power supply. For economy, the 10nH inductor can
be fabricated on the PC board with about 1cm (0.4") of
PC board trace.
Flying Capacitor Selection
Warning: Polarized capacitors such as tantalum or alumi-
num should never be used for the flying capacitor since
10nH
9
V
V
IN
IN
LTC3225
0.1ꢀF
2.2ꢀF
8, 11
LTC3225-1
GND
3225 F02
Figure 2. 10nH Inductor Used for Input Noise Reduction
3225fb
9
LTC3225/LTC3225-1
APPLICATIONS INFORMATION
Table 1 contains a list of ceramic capacitor manufacturers
and how to contact them.
also be generated if the flying capacitors are far from the
part (i.e. the loop area is large). To prevent capacitive
energy transfer, a Faraday shield may be used. This is a
grounded PC trace between the sensitive node and the
LTC3225/LTC3225-1 pins. For a high quality AC ground it
should be returned to a solid ground plane that extends
all the way to the LTC3225/LTC3225-1.
Table 1. Capacitor Manufacturers
AVX
www.avx.com
Kemet
Murata
Taiyo Yuden
Vishay
TDK
www.kemet.com
www.murata.com
www.t-yuden.com
www.vishay.com
www.component.tdk.com
Table 2. Supercapacitor Manufacturers
CAP-XX
www.cap-xx.com
NESS CAP
Maxwell
www.nesscap.com
www.maxwell.com
www.cooperbussmann.com
www.avx.com
Layout Considerations
Bussmann
AVX
Due to the high switching frequency and high transient
currents produced by the LTC3225/LTC3225-1, careful
board layout is necessary for optimum performance. An
unbroken ground plane and short connections to all the
external capacitors improves performance and ensures
proper regulation under all conditions.
Illinois Capacitor
Tecate Group
www.illcap.com
www.tecategroup.com
Charging a Single Supercapacitor
The LTC3225/LTC3225-1 can also be used to charge a
singlesupercapacitorbyconnectingtwoseries-connected
matched ceramic capacitors with a minimum capacitance
of 100ꢀF in parallel with the supercapacitor as shown in
Figure 3.
+
–
The voltages on the flying capacitor pins C and C have
very fast rise and fall times. The high dV/dt values on
these pins can cause energy to capacitively couple to
adjacent printed circuit board traces. Magnetic fields can
LTC3225
LTC3225-1
10
C
V
OUT
OUT
C1
3
C
X
C
SUP
C2
8, 11
GND
3225 F03
C1 = C2 ≥ 100ꢀF
Figure 3. Charging a Single Supercapacitor
3225fb
10
LTC3225/LTC3225-1
TYPICAL APPLICATION
5V Supercapacitor Back-Up Supply
Q2
Si4421DY
LTM4616
1.8V
V
IN
V
V
V
IN1 OUT1
5V
C6
100ꢀF
FB1
IN2
R3
C5
22ꢀF
4.78k
Q1
Si4421DY
GND
I
THM1
1.2V
V
OUT2
FB2
C7
C8
100ꢀF
100ꢀF
R2
10k
3225 TA02
V
C
C
OUT
IN
+
LTC4412
SENSE
C2
I
THM2
10F
V
IN
GND
C
X
R2
470k
C1
1ꢀF
LTC3225
LTC3225-1
C3
10F
GND GATE
CTL STAT
–
C
GND
SHDN
C4
2.2ꢀF
V
SEL
PROG
R1
12k
3225fb
11
LTC3225/LTC3225-1
PACKAGE DESCRIPTION
DDB Package
10-Lead Plastic DFN (3mm × 2mm)
(Reference LTC DWG # 05-08-1722 Rev Ø)
R = 0.115
0.64 p0.05
(2 SIDES)
0.40 p 0.10
3.00 p0.10
(2 SIDES)
TYP
6
R = 0.05
TYP
10
0.70 p0.05
2.55 p0.05
1.15 p0.05
2.00 p0.10
PIN 1 BAR
TOP MARK
PIN 1
(2 SIDES)
R = 0.20 OR
(SEE NOTE 6)
0.25 s 45o
PACKAGE
OUTLINE
0.64 p 0.05
(2 SIDES)
0.25 p 0.05
CHAMFER
5
1
(DDB10) DFN 0905 REV Ø
0.25 p 0.05
0.75 p0.05
0.200 REF
0.50 BSC
0.50 BSC
2.39 p0.05
2.39 p0.05
(2 SIDES)
(2 SIDES)
0 – 0.05
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
BOTTOM VIEW—EXPOSED PAD
NOTE:
1. DRAWING CONFORMS TO VERSION (WECD-1) IN JEDEC PACKAGE OUTLINE M0-229
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE
3225fb
12
LTC3225/LTC3225-1
REVISION HISTORY (Revision history begins at Rev B)
REV
DATE
DESCRIPTION
PAGE NUMBER
B
6/10
Updated Note 3 in Electrical Characteristics section.
Updates to Pins 8 and 11 in Pin Functions.
Update to text in Layout Considerations section.
Updated Typical Application and Related Parts.
2, 3
5
10
14
3225fb
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-
tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.
13
LTC3225/LTC3225-1
TYPICAL APPLICATION
12V Supercapacitor Back-Up Supply
LT3740
HIGH EFFICIENCY
DOWN CONVERTER
D1
CSHD6-40C
DPAK
*
V
1.8V
10A
CHARGER 3
OUT
V
IN
+
V
V
OUT
IN
12V
V
IN
C
OUT
C1
LT3740
LTC3225/
+
47ꢀF
25V
DCAP
LTC3225-1
GND
GND
+
C2
1ꢀF
10V
C
C
CX
–
GND
GND
GND
10A
R6
1k
D2
CMSH3-20
M4
Si4410DY
M2
IRF7424
V
BIAS
3.3V
C5
10ꢀF
D3
CMSH3-20
*
CHARGER 2
GND
V
IN
C
OUT
LTC3225/
D4
CMSH3-20
LTC3225-1
+
C3
1ꢀF
10V
C
C
CX
–
GND
1
8
VM
V
CC
1
8
LTC2915
R7
2
3
4
7
6
5
PGND OUT
LTC4441-1
R5
1k
SEL1 SEL2
10k
M3
Si4410DY
2
3
4
7
6
5
M1
IRF7424
R1
2k
TOL/MR RT
SGND DRV
CC
R3
CHARGER 1
IN
V
IN
GND
RST
332k
R2
100k
V
IN
C
OUT
LTC3225/
LTC3225-1
C7
10ꢀF
EN/SHDN FB
C6
0.1ꢀF
R4
84.5k
+
C4
1ꢀF
10V
C
C
CX
–
GND
3225 TA03
* REQUIRES PIN 8 (GND) AND EXPOSED PAD TO BE CONNECTED TO A
THERMAL PAD ISOLATED FROM THE SYSTEM GROUND.
RELATED PARTS
PART NUMBER
LTC1751-3.3/LTC1751-5
LTC3200
DESCRIPTION
COMMENTS
Micropower 5V/3.3V Doubler Charge Pumps
Constant Frequency Doubler Charge Pump
I = 20ꢀA, Up to 100mA Output, MS-8 Package
Q
Low Noise, 5V Output or Adjustable
LTC3203/LTC3203B/
LTC3203B-1/LTC3203-1
500mA Low Noise High Efficiency Dual Mode
Step-Up Charge Pumps
V : 2.7V to 5.5V, 3mm × 3mm 10-Lead DFN Package
IN
LTC3204/LTC3204B-3.3/
LTC3204-5
Low Noise Regulating Charge Pumps
Up to 150mA (LTC3204-5), Up to 50mA (LTC3204-3.3)
Up to 60mA Output
LTC3221/LTC3221-3.3/
LTC3221-5
Micropower Regulated Charge Pump
LTC3240-3.3/LTC3240-2.5 Step-Up/Step-Down Regulated Charge Pumps
Up to 150mA Output
LT®3420/LT3420-1
1.4A/1A Photoflash Capacitor Charger with
Automatic Top-Off
Charges 220ꢀF to 320V in 3.7 Seconds from 5V, V : 2.2V to 16V,
SD
IN
I
< 1ꢀA, 10-Lead MS Package
LT3468/LT3468-1/
LT3468-2
1.4A/1A/0.7A, Photoflash Capacitor Charger
V : 2.5V to 16V, Charge Time = 4.6 Seconds for the LT3468 (0V to 320V,
IN
100ꢀF, V = 3.6V), I < 1ꢀA, ThinSOT™ Package
IN
SD
LTC3484-0/LTC3484-1/
LTC3484-2
1.4A/0.7A/1A, Photoflash Capacitor Charger
V : 1.8V to 16V, Charge Time = 4.6 Seconds for the LT3484-0 (0V to 320V,
IN
100ꢀF, V = 3.6V), I < 1ꢀA, 2mm × 3mm 6-Lead DFN Package
IN
SD
LT3485-0/LT3485-1/
LT3485-2/LT3485-3
1.4A/0.7A/1A/2A Photoflash Capacitor Charger V : 1.8V to 10V, Charge Time = 3.7 Seconds for the LT3485-0 (0V to 320V,
IN
with Output Voltage Monitor and Integrated
IGBT
100ꢀF, V = 3.6V), I < 1ꢀA, 3mm × 3mm 10-Lead DFN Driver
IN SD
LT3750
LT3751
Capacitor Charger Controller
Charges Any Size Capacitor, 10-Lead MS Package
Capacitor Controller with Regulation
Charges Any Size Capacitor, 4mm × 5mm QFN-20 Package
3225fb
LT 0610 REV B • PRINTED IN USA
LinearTechnology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
14
●
●
© LINEAR TECHNOLOGY CORPORATION 2008
(408) 432-1900 FAX: (408) 434-0507 www.linear.com
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