LTC1545CG#TR [Linear]
LTC1545 - Software-Selectable Multiprotocol Transceiver; Package: SSOP; Pins: 36; Temperature Range: 0°C to 70°C;
| 型号： | LTC1545CG#TR |
| 厂家： | 
Linear |
| 描述： | LTC1545 - Software-Selectable Multiprotocol Transceiver; Package: SSOP; Pins: 36; Temperature Range: 0°C to 70°C 驱动 光电二极管 接口集成电路 驱动器 |
| 文件： | 总16页 (文件大小：255K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
LTC1545
Software-Selectable
Multiprotocol Transceiver
U
FEATURES
DESCRIPTIO
The LTC®1545 is a 5-driver/5-receiver multiprotocol trans-
ceiver. The LTC1545 and LTC1543 form the core of a
complete software-selectable DTE or DCE interface port that
supports the RS232, RS449, EIA530, EIA530-A, V.35, V.36
or X.21 protocols. Cable termination may be implemented
using the LTC1344A software-selectable cable termination
chip or by using existing discrete designs.
■
Software-Selectable Transceiver Supports:
RS232, RS449, EIA530, EIA530-A, V.35, V.36, X.21
■
TUV/Detecon Inc. Certified NET1 and NET2
Compliant (Test Report No. NET2/071601/98)
■
TBR2 Compliant (Test Report No. CTR2/071601/98)
■
Software-Selectable Cable Termination Using
the LTC1344A
■
Complete DTE or DCE Port with LTC1543, LTC1344A
TheLTC1545runsfroma5Vsupplyandthechargepumpon
the LTC1543. The part is available in a 36-lead SSOP surface
mount package.
■
Operates from Single 5V Supply with LTC1543
U
APPLICATIO S
■
Data Networking
■
CSU and DSU
■
, LTC and LT are registered trademarks of Linear Technology Corporation.
Data Routers
U
TYPICAL APPLICATIO
DTE or DCE Multiprotocol Serial Interface with DB-25 Connector
RL TM
RI
LL CTS
DSR
DCD
DTR
RTS
TXC
SCTE
TXD
D1
RXD
RXC
LTC1543
LTC1545
D3
D2
D3
D2
D1
D5
R5
D4
R3
R3
R2
R1
R2
R1
R4
LTC1344A
21 25
*
18 13
5
22
6
10
8
23 20 19
4
1
7
16
3
9
17
12 15 11 24 14
2
*OPTIONAL
DB-25 CONNECTOR
1545 TA01
1
LTC1545
W W U W
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ABSOLUTE MAXIMUM RATINGS
PACKAGE/ORDER INFORMATION
(Note 1)
TOP VIEW
Supply Voltage
ORDER PART
VCC ..................................................................... 6.5V
VEE........................................................ –10V to 0.3V
VDD ....................................................... –0.3V to 10V
Input Voltage
V
V
1
2
36 V
EE
NUMBER
CC
35 GND
34 D1 A
33 D1 B
32 D2 A
31 D2 B
30 D3/R1 A
29 D3/R1 B
28 R2 A
27 R2 B
26 R3 A
25 R3 B
24 D4 A
23 R4 A
22 R5 A
21 D5 A
DD
D1
3
D1
D2
D3
D2
D3
R1
R2
R3
D4
R4
4
LTC1545CG
LTC1545IG
5
Transmitters ........................... –0.3V to (VCC + 0.3V)
Receivers............................................... –18V to 18V
Logic Pins .............................. –0.3V to (VCC + 0.3V)
Output Voltage
Transmitters .................. (VEE – 0.3V) to (VDD + 0.3V)
Receivers................................ –0.3V to (VCC + 0.3V)
Short-Circuit Duration
Transmitter Output ..................................... Indefinite
Receiver Output.......................................... Indefinite
VEE.................................................................. 30 sec
Operating Temperature Range
LTC1545C .............................................. 0°C to 70°C
LTC1545I........................................... –40°C to 85°C
Storage Temperature Range ................ –65°C to 150°C
Lead Temperature (Soldering, 10 sec)................. 300°C
6
7
8
9
R1
10
R2
R3
M0 11
M1
M2
12
13
14
15
16
17
18
D4
D5
DCE/DTE
D4ENB
R4EN
R5
R4
R5
20
19
V
DD
V
CC
D5
G PACKAGE
36-LEAD PLASTIC SSOP
TJMAX = 150°C, θJA = 65°C/ W
Consult factory for Military grade parts.
ELECTRICAL CHARACTERISTICS
The ● denotes specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C.
VCC = 5V, VDD = 8V, VEE = – 7V for V.28, – 5.5V for V.10, V.11 (Notes 2, 3)
SYMBOL PARAMETER
Supplies
CONDITIONS
MIN
TYP
MAX
UNITS
I
I
V
Supply Current (DCE Mode,
CC
RS530, RS530-A, X.21 Modes, No Load
RS530, RS530-A, X.21 Modes, Full Load
V.28 Mode, No Load
V.28 Mode, Full Load
No-Cable Mode, D4ENB = HIGH
●
●
●
●
●
2.7
110
1
1
10
5
150
3
3
500
mA
mA
mA
mA
µA
CC
EE
All Digital Pins = GND or V
)
CC
V
Supply Current (DCE Mode,
RS530, RS530-A, X.21 Modes, No Load
RS530, X.21 Modes, Full Load
RS530-A, Full Load
V.28 Mode, No Load
V.28 Mode, Full Load
●
●
●
●
●
●
2.0
23
34
1
12
10
4.0
35
50
3
18
500
mA
mA
mA
mA
mA
µA
EE
All Digital Pins = GND or V
)
CC
No-Cable Mode, D4ENB = HIGH
I
V
Supply Current (DCE Mode,
DD
RS530, RS530-A, X.21 Modes, NoLoad
RS530, RS530-A, X.21 Modes, Full Load
V.28 Mode, No Load
V.28 Mode, Full Load
No-Cable Mode, D4ENB = HIGH
●
●
●
●
●
0.3
0.3
1
13.5
10
2
2
3
18
500
mA
mA
mA
mA
µA
DD
All Digital Pins = GND or V
)
CC
P
Internal Power Dissipation (DCE Mode,
(All Digital Pins = GND or V
RS530, RS530-A, X.21 Modes, Full Load
V.28 Mode, Full Load
340
64
mW
mW
D
)
CC
2
LTC1545
ELECTRICAL CHARACTERISTICS
The ● denotes specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C.
VCC = 5V, VDD = 8V, VEE = – 7V for V.28, – 5.5V for V.10, V.11 (Notes 2, 3)
SYMBOL PARAMETER
Logic Inputs and Outputs
CONDITIONS
MIN
TYP
MAX
UNITS
V
V
Logic Input High Voltage
Logic Input Low Voltage
Logic Input Current
●
●
2
V
V
IH
IL
0.8
I
IN
D1, D2, D3, D4, D5
M0, M1, M2, DCE, D4ENB, R4EN = GND (LTC1545C)
M0, M1, M2, DCE, D4ENB, R4EN = GND (LTC1545I)
●
●
●
●
±10
–30
–30
±10
µA
µA
µA
µA
–100
–120
–50
–50
M0, M1, M2, DCE, D4ENB, R4EN = V
CC
V
V
Output High Voltage
I = –4mA
●
●
●
3
4.5
0.3
40
V
V
OH
OL
O
Output Low Voltage
I = 4mA
O
0.8
50
I
I
Output Short-Circuit Current
Three-State Output Current
0V ≤ V ≤ V
CC
–50
mA
µA
OSR
OZR
O
M0 = M1 = M2 = V , 0V ≤ V ≤ V
CC
±1
CC
O
V.11 Driver
V
V
Open Circuit Differential Output Voltage
Loaded Differential Output Voltage
R = 1.95k (Figure 1)
●
±5
V
ODO
ODL
L
R = 50Ω (Figure 1)
0.5V
±2
0.67V
ODO
L
ODO
R = 50Ω (Figure 1)
L
●
●
V
V
∆V
Change in Magnitude of Differential
Output Voltage
R = 50Ω (Figure 1)
L
0.2
OD
V
Common Mode Output Voltage
R = 50Ω (Figure 1)
●
●
3
V
V
OC
L
∆V
Change in Magnitude of Common Mode R = 50Ω (Figure 1)
0.2
OC
L
Output Voltage
I
I
Short-Circuit Current
V
= GND
±150
±100
mA
SS
OZ
OUT
Output Leakage Current
–0.25V ≤ V ≤ 0.25V, Power Off or
No-Cable Mode or Driver Disabled
●
± 1
µA
O
t , t
Rise or Fall Time
LTC1545C (Figures 2, 5)
LTC1545I (Figures 2, 5)
●
●
2
2
15
15
25
35
ns
ns
r
f
PLH
PHL
t
t
Input to Output
LTC1545C (Figures 2, 5)
LTC1545I (Figures 2, 5)
●
●
20
20
40
40
65
75
ns
ns
Input to Output
LTC1545C (Figures 2, 5)
LTC1545I (Figures 2, 5)
●
●
20
20
40
40
65
75
ns
ns
∆t
Input to Output Difference, t
Output to Output Skew
– t
PHL
LTC1545C (Figures 2, 5)
LTC1545I (Figures 2, 5)
●
●
0
0
3
3
12
17
ns
ns
PLH
t
(Figures 2, 5)
3
ns
SKEW
V.11 Receiver
V
Input Threshold Voltage
Input Hysteresis
–7V ≤ V ≤ 7V
●
●
●
●
–0.2
15
0.2
40
V
mV
mA
kΩ
ns
TH
CM
∆V
–7V ≤ V ≤ 7V
15
TH
CM
I
Input Current (A, B)
Input Impedance
Rise or Fall Time
Input to Output
–10V ≤ V ≤ 10V
±0.66
IN
A,B
R
–10V ≤ V ≤ 10V
30
15
IN
A,B
t , t
r
(Figures 2, 6)
f
t
LTC1545C (Figures 2, 6)
LTC1545I (Figures 2, 6)
●
●
50
50
80
90
ns
ns
PLH
t
Input to Output
LTC1545C (Figures 2, 6)
LTC1545I (Figures 2, 6)
●
●
50
50
80
90
ns
ns
PHL
∆t
Input to Output Difference, t
– t
PHL
LTC1545C (Figures 2, 6)
LTC1545I (Figures 2, 6)
●
●
0
0
4
4
16
21
ns
ns
PLH
3
LTC1545
ELECTRICAL CHARACTERISTICS
The ● denotes specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C.
VCC = 5V, VDD = 8V, VEE = – 7V for V.28, – 5.5V for V.10, V.11 (Notes 2, 3)
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
V.10 Driver
V
V
Output Voltage
Output Voltage
Open Circuit, R = 3.9k
●
●
±4
±6
V
V
O
T
L
R = 450Ω (Figure 3)
±3.6
0.9V
L
R = 450Ω (Figure 3)
L
O
I
I
Short-Circuit Current
V = GND
±150
±100
mA
SS
OZ
O
Output Leakage Current
–0.25V ≤ V ≤ 0.25V, Power Off or
No-Cable Mode or Driver Disabled
●
±0.1
µA
O
t , t
Rise or Fall Time
Input to Output
Input to Output
R = 450Ω, C = 100pF (Figures 3, 7)
2
1
1
µs
µs
µs
r
f
PLH
PHL
L
L
t
t
R = 450Ω, C = 100pF (Figures 3, 7)
L L
R = 450Ω, C = 100pF (Figures 3, 7)
L
L
V.10 Receiver
V
Receiver Input Threshold Voltage
Receiver Input Hysteresis
Receiver Input Current
Receiver Input Impedance
Rise or Fall Time
●
●
●
●
–0.25
15
0.25
50
V
mV
mA
kΩ
ns
TH
∆V
25
TH
I
–10V ≤ V ≤ 10V
±0.66
IN
A
R
–10V ≤ V ≤ 10V
30
15
IN
A
t , t
r
(Figures 4, 8)
(Figures 4, 8)
(Figures 4, 8)
(Figures 4, 8)
f
t
t
Input to Output
55
ns
PLH
PHL
Input to Output
109
60
ns
∆t
Input to Output Difference, t
Output Voltage
– t
PHL
ns
PLH
V.28 Driver
V
Open Circuit
R = 3k (Figure 3)
L
●
●
±10
V
V
O
±5
±8.5
±1
I
I
Short-Circuit Current
V = GND
O
●
●
±150
±100
mA
SS
OZ
Output Leakage Current
–0.25V ≤ V ≤ 0.25V, Power Off or
µA
O
No-Cable Mode or Driver Disabled
SR
Slew Rate
R = 3k, C = 2500pF (Figures 3, 7)
●
●
●
4
30
2.5
2.5
V/µs
µs
L
L
t
t
Input to Output
Input to Output
R = 3k, C = 2500pF (Figures 3, 7)
1.3
1.3
PLH
PHL
L
L
R = 3k, C = 2500pF (Figures 3, 7)
µs
L
L
V.28 Receiver
V
V
Input Low Threshold Voltage
Input High Threshold Voltage
Receiver Input Hysterisis
Receiver Input Impedance
Rise or Fall Time
●
●
●
●
1.5
1.6
0.1
5
0.8
V
V
THL
TLH
2
3
∆V
0.3
7
V
TH
R
–15V ≤ V ≤ 15V
kΩ
ns
ns
ns
IN
A
t , t
r
(Figures 4, 8)
(Figures 4, 8)
(Figures 4, 8)
15
f
t
t
Input to Output
●
●
60
100
450
PLH
PHL
Input to Output
150
Note 1: Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 3: All typicals are given for V = 5V, V = 8V, V = –7V for V.28,
CC DD EE
–5.5V for V.10, V.11 and T = 25°C.
A
Note 2: All currents into device pins are positive; all currents out of device
are negative. All voltages are referenced to device ground unless otherwise
specified.
4
LTC1545
U
U
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PIN FUNCTIONS
VCC (Pins 1, 19): Positive Supply for the Transceivers.
4.75V ≤ VCC ≤ 5.25V. Connect a 1µF capacitor to ground.
R5 (Pin 17): CMOS Level Receiver 5 Output.
D5 (Pin 18): TTL Level Driver 5 Input.
D5 A (Pin 21): Driver 5 Output.
VDD (Pins 2, 20): Positive Supply Voltage for V.28. Con-
nect to VDD Pin 3 on LTC1543 or 8V supply. Connect a 1µF
capacitor to ground.
R5 A (Pin 22): Receiver 5 Input.
R4 A (Pin 23): Receiver 4 Input.
D1 (Pin 3): TTL Level Driver 1 Input.
D2 (Pin 4): TTL Level Driver 2 Input.
D3 (Pin 5): TTL Level Driver 3 Input.
R1 (Pin 6): CMOS Level Receiver 1 Output.
R2 (Pin 7): CMOS Level Receiver 2 Output.
R3 (Pin 8): CMOS Level Receiver 3 Output.
D4 (Pin 9): TTL Level Driver 4 Input.
R4 (Pin 10): CMOS Level Receiver 4 Output.
D4 A (Pin 24): Driver 4 Input.
R3 B (Pin 25): Receiver 3 Noninverting Input.
R3 A (Pin 26): Receiver 3 Inverting Input.
R2 B (Pin 27): Receiver 2 Noninverting Input.
R2 A (Pin 28): Receiver 2 Inverting Input.
D3/R1 B (Pin 29): Receiver 1 Noninverting Input and
Driver 3 Noninverting Output.
D3/R1 A (Pin 30): Receiver 1 Inverting Input and Driver 3
Inverting Output.
M0 (Pin 11): TTL Level Mode Select Input 0 with Pull-Up
to VCC.
D2 B (Pin 31): Driver 2 Noninverting Output.
D2 A (Pin 32): Driver 2 Inverting Output.
D1 B (Pin 33): Driver 1 Noninverting Output.
D1 A (Pin 34): Driver 1 Inverting Output.
GND (Pin 35): Ground.
M1 (Pin 12): TTL Level Mode Select Input 1 with Pull-Up
to VCC.
M2 (Pin 13): TTL Level Mode Select Input 2 with Pull-Up
to VCC.
DCE/DTE (Pin 14): TTL Level Mode Select Input with
Pull-Up to VCC. Logic high enables Driver 3. Logic low
enables Receiver 1.
VEE (Pin 36): Negative Supply Voltage. Connect to VEE Pin
26 on LTC1543. Connect a 1µF capacitor to ground.
D4ENB (Pin 15): TTL Level Enable Input with Pull-Up to
VCC. Logic low enables Driver 4.
R4EN(Pin16):TTLLevelEnableInputwithPull-UptoVCC.
Logic high enables Receiver 4.
TEST CIRCUITS
A
C
L
B
A
100pF
B
A
R
R
L
R
L
100Ω
C
L
100pF
V
OD
15pF
V
OC
R
L
1545 F02
1545 F01
B
Figure 1. V.11 Driver Test Circuit
Figure 2. V.11 Driver/Receiver AC Test Circuit
5
LTC1545
TEST CIRCUITS
D
A
A
R
D
A
15pF
R
C
L
L
1545 F04
1545 F03
Figure 3. V.10/V.28 Driver Test Circuit
Figure 4. V.10/V.28 Receiver Test Circuit
W
U
ODE SELECTIO
(Note 1) (Note 2)
(Note 1)
R1
(Note 3)
R4
LTC1545 MODE NAME
M2
0
M1
0
M0
0
D1
D2
D3
D4
D5
R2
R3
R5
Not Used (Default V.11)
RS530A
V.11
V.11
V.11
V.11
V.28
V.11
V.28
Z
V.11
V.10
V.11
V.11
V.28
V.11
V.28
Z
V.11
V.11
V.11
V.11
V.28
V.11
V.28
Z
V.10
V.10
V.10
V.10
V.28
V.10
V.28
Z
V.10
V.10
V.10
V.10
V.28
V.10
V.28
Z
V.11
V.11
V.11
V.11
V.28
V.11
V.28
Z
V.11
V.10
V.11
V.11
V.28
V.11
V.28
Z
V.11
V.11
V.11
V.11
V.28
V.11
V.28
Z
V.10
V.10
V.10
V.10
V.28
V.10
V.28
Z
V.10
V.10
V.10
V.10
V.28
V.10
V.28
Z
0
0
1
RS530
0
1
0
X.21
0
1
1
V.35
1
0
0
RS449/V.36
V.28/RS232
1
0
1
1
1
0
D4ENB = 1, R4EN = 0
M0 = M1 = M2 = 1
1
1
1
Note 1: Driver 3 and Receiver 1 are enabled (and disabled) by
DCE/DTE (Pin 14). Logic high enables Driver 3. Logic low enables
Receiver 1.
Note 2: Driver 4 is enabled by D4ENB = 0 (Pin 15).
Note 3: Receiver 4 is enabled by R4EN = 1 (Pin 16).
U
W
W
SWITCHI G TI E WAVEFOR S
5V
f = 1MHz : t ≤ 10ns : t ≤ 10ns
r
f
1.5V
1.5V
D
0V
t
t
PHL
PLH
V
O
90%
90%
10%
V
= V(B) – V(A)
DIFF
B – A
50%
50%
10%
–V
O
1/2 V
O
t
t
f
r
A
V
O
B
t
t
1545 F05
SKEW
SKEW
Figure 5. V.11 Driver Propagation Delays
6
LTC1545
U
W
W
SWITCHI G TI E WAVEFOR S
V
OD2
f = 1MHz : t ≤ 10ns : t ≤ 10ns
INPUT
r
f
0V
0V
B – A
–V
OD2
t
t
PLH
PHL
V
R
OH
OUTPUT
1.5V
1.5V
V
OL
1545 F06
Figure 6. V.11 Receiver Propagation Delays
3V
0V
D
1.5V
t
1.5V
PHL
3V
t
PLH
V
O
3V
1545 F07
0V
0V
A
–3V
–3V
–V
O
t
t
r
f
Figure 7. V.10, V.28 Driver Propagation Delays
V
IH
1.5V
A
1.5V
V
IL
t
PHL
t
PLH
V
OH
1.5V
1.5V
R
1545 F08
V
OL
Figure 8. V.10, V.28 Receiver Propagation Delays
U
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APPLICATIONS INFORMATION
Mode Selection
Overview
The interface protocol is selected using the mode select
pins M0, M1 and M2 (see the Mode Selection table).
The LTC1543/LTC1545 form the core of a complete soft-
ware-selectable DTE or DCE interface port that supports
the RS232, RS449, EIA530, EIA530-A, V.35, V.36 or X.21
protocols. Cable termination may be implemented using
the LTC1344A software-selectable cable termination chip
or by using existing discrete designs.
For example, if the port is configured as a V.35 interface,
the mode selection pins should be M2 =1, M1= 0, M0 = 0.
For the control signals, the drivers and receivers will
operateinV.28(RS232)electricalmode. Fortheclockand
data signals, the drivers and receivers will operate in V.35
electrical mode. The DCE/DTE pin will configure the port
for DCE mode when high, and DTE when low.
A complete DCE-to-DTE interface operating in EIA530
mode is shown in Figure 9. The LTC1543 of each port is
used to generate the clock and data signals. The LTC1545
isusedtogeneratethecontrolsignalsalongwithLL(Local
Loop-Back), RL (Remote Loop-Back), TM (Test Mode)
and RI (Ring Indicate). The LTC1344A cable termination
chip is used only for the clock and data signals because
they must support V.35 cable termination. The control
signals do not need any external resistors.
Theinterfaceprotocolmaybeselectedsimplybyplugging
the appropriate interface cable into the connector. The
mode pins are routed to the connector and are left uncon-
nected (1) or wired to ground (0) in the cable as shown in
Figure 10.
7
LTC1545
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APPLICATIONS INFORMATION
DTE
DCE
SERIAL
LTC1344A
LTC1543
D1
LTC1344A
LTC1543
SERIAL
CONTROLLER
CONTROLLER
TXD
103Ω
R3
R2
R1
TXD
TXD
SCTE
103Ω
D2
D3
SCTE
SCTE
D3
D2
D1
TXC
RXC
RXD
R1
R2
R3
103Ω
103Ω
103Ω
TXC
RXC
RXD
TXC
RXC
RXD
LTC1545
D1
LTC1545
R3
RTS
DTR
RTS
DTR
RTS
DTR
D2
D3
R2
R1
D3
DCD
DSR
R1
R2
R3
DCD
DSR
CTS
DCD
DSR
D2
D1
CTS
CTS
LL
LL
LL
D4
R4
R4
D4
TM
TM
TM
RI
RI
R5
D5
RI
D5
R5
RL
RL
RL
1545 F09
Figure 9. Complete Multiprotocol Interface in EIA530 Mode
The mode selection may also be accomplished by using
jumpers to connect the mode pins to ground or VCC.
The internal pull-up current sources will ensure a binary 1
when a pin is left unconnected and that the LTC1543/
LTC1545 and the LTC1344A enter the no-cable mode
when the cable is removed. In the no-cable mode the
LTC1543/LTC1545 supply current drops to less than
200µA and all LTC1543/LTC1545 driver outputs and
LTC1344A resistive terminations are forced into a high
impedance state.
Cable Termination
Traditional implementations have included switching
resistors with expensive relays, or required the user to
change termination modules every time the interface
standard has changed. Custom cables have been used
8
LTC1545
U
W U U
APPLICATIONS INFORMATION
21
LATCH
LTC1344A
DCE/
DTE M2 M1 M0 (DATA)
22 23 24
1
(DATA)
M0
CONNECTOR
11
12
13
14
LTC1543
M1
M2
NC
NC
DCE/DTE
14
13
12
11
15
16
CABLE
V
CC
DCE/DTE
M2
M1
M0
D4ENB
R4EN
LTC1545
10k
(DATA)
1545 F10
Figure 10: Single Port DCE V.35 Mode Selection in the Cable
The V.10 receiver configuration in the LTC1545 is shown
in Figure 13. In V.10 mode switch S3 inside the LTC1545
is turned off. The noninverting input is disconnected
inside the LTC1545 receiver and connected to ground.The
cable termination is then the 30k input impedance to
ground of the LTC1545 V.10 receiver.
withtheterminationinthecableheadorseparatetermina-
tions are built on the board and a custom cable routes the
signals to the appropriate termination. Switching the
terminations with FETs is difficult because the FETs must
remain off even though the signal voltage is beyond the
supply voltage for the FET drivers or the power is off.
Using the LTC1344A along with the LTC1543/LTC1545
solves the cable termination switching problem. Via soft-
ware control, the LTC1344A provides termination for the
V.10 (RS423), V.11 (RS422), V.28 (RS232) and V.35
electrical protocols.
V.11 (RS422) Interface
A typical V.11 balanced interface is shown in Figure 14. A
V.11 differential generator with outputs A and B with
ground C is connected to a differential receiver with
groundC',inputsA'connectedtoA,B'connectedtoB.The
V.11 interface has a differential termination at the receiver
end that has a minimum value of 100Ω. The termination
resistor is optional in the V.11 specification, but for the
highspeedclockanddatalines,theterminationisrequired
to prevent reflections from corrupting the data. The
receiver inputs must also be compliant with the imped-
ance curve shown in Figure 12.
V.10 (RS423) Interface
A typical V.10 unbalanced interface is shown in Figure 11.
A V.10 single-ended generator output A with ground C is
connected to a differential receiver with inputs A
' con-
nected to A, and input C connected to the signal return
'
ground C. Usually, no cable termination is required for
V.10 interfaces, but the receiver inputs must be compliant
with the impedance curve shown in Figure 12.
9
LTC1545
U
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APPLICATIONS INFORMATION
BALANCED
INTERCONNECTING
CABLE
BALANCED
INTERCONNECTING
LOAD
CABLE
LOAD
GENERATOR
GENERATOR
CABLE
TERMINATION
CABLE
TERMINATION
RECEIVER
RECEIVER
A
A'
A
A'
100Ω
MIN
B
C
B'
C'
1545 F11
C
C'
1545 F14
Figure 11. Typical V.10 Interface
Figure 14. Typical V.11 Interface
A'
A
LTC1543
LTC1545
I
Z
3.25mA
LTC1344A
R5
20k
R1
R8
6k
51.5Ω
R6
10k
RECEIVER
S1
S2
S3
R3
124Ω
–10V
–3V
R7
10k
R2
51.5Ω
R4
20k
V
Z
B
3V
10V
B
'
1545 F15
GND
C
'
Figure 15. V.11 Receiver Configuration
1545 F12
–3.25mA
In V.11 mode, all switches are off except S1 inside the
LTC1344A which connects a 103Ω differential termina-
tion impedance to the cable as shown in Figure 15.
Figure 12. V.10 Receiver Input Impedance
V.28 (RS232) Interface
A
'
A
LTC1545
A typical V.28 unbalanced interface is shown in Figure 16.
A V.28 single-ended generator output A with ground C is
R5
R8
6k
20k
R6
RECEIVER
connected to a single-ended receiver with input A
'
con-
10k
S3
nected to A, ground C' connected via the signal return
ground C.
R7
10k
R4
20k
In V.28 mode, all switches are off except S3 inside the
LTC1543/LTC1545 which connects a 6k (R8) impedance
to ground in parallel with 20k (R5) plus 10k (R6) for a
combined impedance of 5k as shown in Figure 17. The
noninverting input is disconnected inside the LTC1543/
LTC1545 receiver and connected to a TTL level reference
voltage for a 1.4V receiver trip point.
B'
B
C'
GND
1545 F13
Figure 13. V.10 Receiver Configuration
10
LTC1545
U
W U U
APPLICATIONS INFORMATION
BALANCED
V.35 interface requires a T or delta network termination at
the receiver end and the generator end. The receiver
differentialimpedancemeasuredattheconnectormustbe
100Ω ±10Ω, and the impedance between shorted termi-
INTERCONNECTING
CABLE
LOAD
GENERATOR
CABLE
TERMINATION
RECEIVER
A
A'
nals (A' and B') and ground C' must be 150Ω ±15Ω.
InV.35mode,bothswitchesS1andS2insidetheLTC1344A
are on, connecting the T network impedance as shown in
Figure 19. Both switches in the LTC1543 are off. The 30k
input impedance of the receiver is placed in parallel with
the T network termination, but does not affect the overall
input impedance significantly.
1545 F16
C
C'
Figure 16. Typical V.28 Interface
A'
The generator differential impedance must be 50Ω to
150Ω and the impedance between shorted terminals (A
and B) and ground C must be 150Ω ±15Ω. For the
generatortermination,switchesS1andS2arebothonand
the top side of the center resistor is brought out to a pin so
it can be bypassed with an external capacitor to reduce
common mode noise as shown in Figure 20.
A
LTC1543
LTC1545
LTC1344A
R5
R1
R8
6k
20k
51.5Ω
R6
RECEIVER
10k
S3
S1
S2
R3
124Ω
R7
10k
R2
51.5Ω
R4
20k
B
B'
A'
GND
A
C'
LTC1543
1545 F17
LTC1344A
R5
20k
R1
R8
6k
51.5Ω
R6
10k
Figure 17. V.28 Receiver Configuration
RECEIVER
S1
S2
S3
R3
124Ω
BALANCED
R7
10k
R2
51.5Ω
INTERCONNECTING
R4
20k
CABLE
GENERATOR
LOAD
B
CABLE
TERMINATION
B
'
RECEIVER
1545 F19
GND
C
'
A'
A
50Ω
50Ω
Figure 19. V.35 Receiver Configuration
125Ω
125Ω
50Ω
50Ω
A
B
'
B
C
LTC1344A
C'
51.5Ω
1545 F18
S1
ON
V.35 DRIVER
S2
ON
Figure 18. Typical V.35 Interface
124Ω
51.5Ω
V.35 Interface
B
C1
100pF
A typical V.35 balanced interface is shown in Figure 18. A
V.35 differential generator with outputs A and B with
ground C is connected to a differential receiver with
C
1545 F20
Figure 20. V.35 Driver Using the LTC1344A
groundC',inputsA'connectedtoA,B'connectedtoB.The
11
LTC1545
U
W U U
APPLICATIONS INFORMATION
Any mismatch in the driver rise and fall times or skew in
the driver propagation delays will force current through
the center termination resistor to ground, causing a high
frequency common mode spike on the A and B terminals.
ThecommonmodespikecancauseEMIproblemsthatare
reduced by capacitor C1 which shunts much of the com-
mon mode energy to ground rather than down the cable.
DTE vs DCE Operation
The DCE/DTE pin acts as an enable for Driver 3/Receiver
1 in the LTC1543, and Driver 3/Receiver 1 in the LTC1545.
The LTC1543/LTC1545 can be configured for either DTE
or DCE operation in one of two ways: a dedicated DTE or
DCE port with a connector of appropriate gender, or a port
with one connector that can be configured for DTE or DCE
operationbyreroutingthesignalstotheLTC1543/LTC1545
using a dedicated DTE cable or dedicated DCE cable.
No-Cable Mode
The no-cable mode (M0=M1=M2=D4ENB=1, R4EN = 0)
is intended for the case when the cable is disconnected
from the connector. The charge pump, bias circuitry,
drivers and receivers are turned off, the driver outputs are
forced into a high impedance state, and the supply current
drops to less than 200µA.
A dedicated DTE port using a DB-25 male connector is
showninFigure22.Theinterfacemodeisselectedbylogic
outputs from the controller or from jumpers to either VCC
or GND on the mode select pins. A dedicated DCE port
using a DB-25 female connector is shown in Figure 23.
A port with one DB-25 connector, can be configured for
either DTE or DCE operation is shown in Figure 24. The
configuration requires separate cables for proper signal
routing in DTE or DCE operation. For example, in DTE
mode, the TXD signal is routed to Pins 2 and 14 via Driver
1 in the LTC1543. In DCE mode, Driver 1 now routes the
RXD signal to Pins 2 and 14.
Charge Pump
The LTC1543 uses an internal capacitive charge pump to
generate VDD and VEE as shown in Figure 21. A voltage
doubler generates about 8V on VDD and a voltage inverter
generates about –7.5V for VEE. Four 1µF surface mounted
tantalum or ceramic capacitors are required for C1, C2, C3
and C4. The VEE capacitor C5 should be a minimum of
3.3µF.Allcapacitorsare16Vandshouldbeplacedasclose
as possible to the LTC1543 to reduce EMI. The turn-on
time for the charge pump is 60ms.
Compliance Testing
A European standard EN 45001 test report is available for
the LTC1343/LTC1545/LTC1344A chipset. A copy of the
test report is available from LTC or TUV Telecom Services
Inc. (formerly Detecon Inc.)
3
2
1
4
28
27
26
25
+
–
V
C2
C2
V
DD
+
C2
C3
1µF
1µF
C1
C1
V
The title of the report is:
C1
LTC1543
1µF
–
Test Report No. NET2/071601/98.
The address of TUV Telecom Services Inc. is:
EE
C5
3.3µF
+
GND
5V
CC
C4
1µF
TUV Telecom Services Inc.
Suite 107
1545 F21
1775 Old Highway 8
St. Paul, MN 55112 USA
Tel. +1 (612) 639-0775
Fax. +1 (612) 639-0873
Figure 21. Charge Pump
Receiver Fail-Safe
All LTC1543/LTC1545 receivers feature fail-safe opera-
tion in all modes. If the receiver inputs are left floating or
shorted together by a termination resistor, the receiver
output will always be forced to a logic high.
12
LTC1545
U
TYPICAL APPLICATIONS
C6
C7
C8
100pF 100pF 100pF
3
8
11 12 13
LTC1344A
V
CC
5V
14
21
V
CC
LATCH
C13
1µF
3
1
28
C2
C3
1µF
27
26
1µF
C1
1µF
2
CHARGE
PUMP
V
EE
2
4
C4
C12
+
3.3µF
1µF
25
5
4
6
7
9
10
16 15 18 17 19 20 22 23 24 1
C5
1µF
LTC1543
D1
2
24
TXD A (103)
5
6
7
TXD
23
22
14
24
TXD B
SCTE A (113)
SCTE B
SCTE
D2
D3
11
21
20
19
18
17
16
15
15
12
TXC A (114)
TXC B
8
9
R1
R2
R3
TXC
RXC
RXD
17
9
RXC A (115)
RXC B
3
16
7
RXD A (104)
RXD B
10
11
12
13
14
M0
M1
M2
SG
1
SHIELD
DCE/DTE
V
CC
5V
DB-25 MALE
CONNECTOR
C10
1µF
C9
1µF
36
35
1,19
2,20
V
V
EE
GND
CC
C11
1µF
V
DD
34
4
RTS A (105)
RTS B
3
4
5
RTS
D1
D2
D3
33
32
31
19
20
23
DTR A (108)
DTR B
DTR
LTC1545
30
29
28
27
8
10
6
6
7
8
DCD A (109)
DCD B
R1
R2
R3
DCD
DSR
CTS
DSR A (107)
22
DSR B
5
13
18
26
25
24
CTS A (106)
CTS B
9
LL (141)
D4
R4
LL
RI
23
*
10
RI (125)
22
21
17
18
25
21
TM (142)
RL (140)
R5
TM
RL
D5
11
12
13
14
15
16
M0
M1
M2
D4ENB
R4EN
NC
*OPTIONAL
DCE/DTE
M0
M1
M2
1544 F22
Figure 22. Controller-Selectable Multiprotocol DTE Port with DB-25 Connector
13
LTC1545
TYPICAL APPLICATIONS
U
C6
C7
C8
100pF 100pF 100pF
3
8
11 12 13
LTC1344A
V
CC
5V
21
14
LATCH
V
CC
C13
1µF
3
1
28
C2
C3
1µF
1µF
27
26
C1
1µF
2
CHARGE
PUMP
V
EE
2
4
C4
C12
+
3.3µF
1µF
25
5
4
6
7
9
10
16 15 18 17 19 20 22 23 24 1
C5
1µF
LTC1543
D1
V
CC
3
24
RXD A (104)
RXD B
5
6
7
RXD
RXC
23
22
16
17
9
RXC A (115)
RXC B
D2
D3
21
20
19
18
17
16
15
15
12
TXC A (114)
TXC B
8
9
R1
R2
R3
TXC
SCTE
TXD
24
11
SCTE A (113)
SCTE B
2
14
7
TXD A (103)
TXD B
10
11
12
13
14
M0
M1
M2
SGND (102)
1
SHIELD (101)
DCE/DTE
NC
V
CC
5V
DB-25 FEMALE
CONNECTOR
C9
1µF
C10
1µF
36
35
1,19
2,20
V
V
EE
GND
CC
C11
1µF
V
DD
5
34
CTS A (106)
CTS B
3
4
5
CTS
13
6
D1
D2
D3
33
32
31
DSR A (107)
DSR B
22
DSR
LTC1545
30
29
28
27
8
10
20
23
DCD A (109)
DCD B
6
7
8
R1
R2
R3
DCD
DTR
DTR A (108)
DTR B
4
19
*
26
25
24
RTS A (105)
RTS B
RTS
RI
9
D4
R4
RI (125)
18
23
10
LL
LL (141)
22
21
21
25
17
18
RL (140)
TM (142)
R5
RL
D5
TM
11
12
13
14
15
16
M0
M1
M2
D4ENB
R4EN
NC
NC
*OPTIONAL
DCE/DTE
M0
M1
M2
1544 F23
Figure 23. Controller-Selectable DCE Port with DB-25 Connector
14
LTC1545
U
TYPICAL APPLICATIONS
C6
C7
C8
100pF 100pF 100pF
3
8
11 12 13
LTC1344A
V
CC
5V
14
21
V
LATCH
CC
C13
1µF
3
1
28
C2
C3
1µF
1µF
27
26
C1
1µF
2
CHARGE
PUMP
V
EE
2
4
C4
C12
+
3.3µF
1µF
25
5
4
6
7
9
10
16 15 18 17 19 20 22 23 24 1
C5
1µF
LTC1543
D1
DTE
TXD A
DCE
RXD A
2
24
5
6
7
DTE_TXD/DCE_RXD
DTE_SCTE/DCE_RXC
23
22
14
24
TXD B
RXD B
RXC A
RXC B
SCTE A
SCTE B
D2
D3
11
21
20
19
18
17
16
15
15
12
TXC A
TXC B
RXC A
RXC B
RXD A
RXD B
TXC A
TXC B
SCTE A
SCTE B
TXD A
TXD B
8
9
R1
R2
R3
DTE_TXC/DCE_TXC
DTE_RXC/DCE_SCTE
DTE_RXD/DCE_TXD
17
9
3
16
7
10
11
M0
M1
M2
12
13
14
SG
1
SHIELD
DCE/DTE
V
CC
5V
DB-25
CONNECTOR
C10
1µF
C9
1µF
36
35
1,19
2,20
V
V
EE
GND
CC
C11
1µF
V
DD
34
4
RTS A
CTS A
CTS B
DSR A
DSR B
3
4
5
DTE_RTS/DCE_CTS
DTE_DTR/DCE_DSR
D1
D2
D3
33
32
31
19
20
23
RTS B
DTR A
DTR B
LTC1545
30
29
28
27
8
10
6
6
7
8
DCD A
DCD B
DSR A
DCD A
DCD B
DTR A
R1
R2
R3
DTE_DCD/DCE_DCD
DTE_DSR/DCE_DTR
DTE_CTS/DCE_RTS
22
DSR B
CTS A
CTS B
LL
DTR B
RTS A
RTS B
RI
5
13
18
26
25
24
9
D4
R4
DTE_LL/DCE_RI
DTE_RI/DCE_LL
23
*
10
RI
LL
25
21
22
21
17
18
R5
TM
RL
RL
DTE_TM/DCE_RL
DTE_RL/DCE_TM
D5
TM
15
16
11
12
13
14
M0
M1
M2
D4ENB
R4EN
NC
DCE/DTE
*OPTIONAL
DCE/DTE
M0
M1
M2
1544 F24
Figure 24. Controller-Selectable Multiprotocol DTE/DCE Port with DB-25 Connector
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tationthattheinterconnectionofitscircuitsasdescribedhereinwillnotinfringeonexistingpatentrights.
15
LTC1545
U
PACKAGE DESCRIPTION Dimensions in inches (millimeters) unless otherwise noted.
G Package
36-Lead Plastic SSOP (0.209)
(LTC DWG # 05-08-1640)
12.67 – 12.93*
(0.499 – 0.509)
36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19
7.65 – 7.90
(0.301 – 0.311)
5
7
8
1
2
3
4
6
9 10 11 12 13 14 15 16 17 18
5.20 – 5.38**
(0.205 – 0.212)
1.73 – 1.99
(0.068 – 0.078)
0° – 8°
0.65
(0.0256)
BSC
0.13 – 0.22
0.55 – 0.95
(0.005 – 0.009)
(0.022 – 0.037)
0.05 – 0.21
(0.002 – 0.008)
0.25 – 0.38
(0.010 – 0.015)
NOTE: DIMENSIONS ARE IN MILLIMETERS
*DIMENSIONS DO NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED 0.152mm (0.006") PER SIDE
**DIMENSIONS DO NOT INCLUDE INTERLEAD FLASH. INTERLEAD
FLASH SHALL NOT EXCEED 0.254mm (0.010") PER SIDE
G36 SSOP 1098
RELATED PARTS
PART NUMBER
DESCRIPTION
COMMENTS
LTC1321
Dual RS232/RS485 Transceiver
Dual RS232/RS485 Transceiver
Two RS232 Driver/Receiver Pairs or Two RS485 Driver/Receiver Pairs
Four RS232 Driver/Receiver Pairs or Two RS485 Driver/Receiver Pairs
Two RS232 Driver/Receiver Pairs or Four RS232 Driver/Receiver Pairs
Four RS232 Driver/Receiver Pairs or Two RS485 Driver/Receiver Pairs
4-Driver/4-Receiver for Data and Clock Signals
LTC1322
LTC1334
Single 5V RS232/RS485 Multiprotocol Transceiver
Dual RS232/RS485 Transceiver
LTC1335
LTC1343
Software-Selectable Multiprotocol Transceiver
Software-Selectable Cable Terminator
Single Supply V.35 Transceiver
LTC1344A
LTC1345
Perfect for Terminating the LTC1543
3-Driver/3-Receiver for Data and Clock Signals
LTC1346A
LTC1543
Dual Supply V.35 Transceiver
3-Driver/3-Receiver for Data and Clock Signals
Software-Selectable Multiprotocol Transceiver
Software-Selectable Multiprotocol Transceiver
Single 5V RS232/RS485 Multiprotocol Transceiver
Companion to LTC1544/LTC1545 for Data and Clock Signals
4-Driver/4-Receiver for Control Signals
LTC1544
LTC1387
Two RS232 Driver/Receiver Pairs or One RS485 Driver/Receiver Pair
sn1545 1545fas LT/TP 1199 2K REV A • PRINTED IN
USA
LinearTechnology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
16
●
●
LINEAR TECHNOLOGY CORPORATION 1998
(408)432-1900 FAX:(408)434-0507 www.linear-tech.com
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