LTC1546CG [Linear]
Software-Selectable Multiprotocol Transceiver with Termination; 软件可选的多协议收发器与终止
| 型号： | LTC1546CG |
| 厂家： | 
Linear |
| 描述： | Software-Selectable Multiprotocol Transceiver with Termination |
| 文件： | 总20页 (文件大小：268K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Final Electrical Specifications
LTC1546
Software-Selectable
Multiprotocol Transceiver
with Termination
December 1999
U
FEATURES
DESCRIPTIO
The LTC®1546 is a 3-driver/3-receiver multiprotocol trans-
ceiver with on-chip cable termination. When combined with
the LTC1544, this chip set forms a complete software-
selectable DTE or DCE interface port that supports the
RS232, RS449, EIA530, EIA530-A, V.35, V.36 and X.21
protocols. All necessary cable termination is provided inside
the LTC1546. In most applications, the LTC1546 replaces
both an LTC1543 and an LTC1344A without any changes to
the PC board.
■
Software-Selectable Transceiver Supports:
RS232, RS449, EIA530, EIA530-A, V.35, V.36, X.21
■
TUV Telecom Services Inc. Certified NET1,
NET2 and TBR2 Compliant
On-Chip Cable Termination
Pin Compatible with LTC1543
Complete DTE or DCE Port with LTC1544
Operates from Single 5V Supply
Small Footprint
■
■
■
■
■
The LTC1546 runs from a single 5V supply using an internal
charge pump that requires only five space-saving surface
mounted capacitors. The LTC1546 is available in a 28-lead
SSOP surface mount package.
U
APPLICATIO S
■
Data Networking
■
CSU and DSU
, LTC and LT are registered trademarks of Linear Technology Corporation.
■
Data Routers
U
TYPICAL APPLICATIO
Complete DTE or DCE Multiprotocol Serial Interface with DB-25 Connector
LL
CTS
DSR
DCD
DTR
RTS
TXC
SCTE
TXD
RXD
RXC
LTC1546
LTC1544
D3
D4
D2
D1
D3
D2
T
D1
T
R4
R3
R2
R1
R3
T
R2
T
R1
T
18
13
5
10
8
22
6
23 20 19
4
1
7
16
3
9
17
12 15 11 24 14
2
DB-25 CONNECTOR
1546 TA01
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tationthattheinterconnectionofitscircuitsasdescribedhereinwillnotinfringeonexistingpatentrights.
1
LTC1546
W W U W
U W
U
ABSOLUTE AXI U RATI GS
PACKAGE/ORDER I FOR ATIO
(Note 1)
Supply Voltage ....................................................... 6.5V
Input Voltage
Transmitters ........................... –0.3V to (VCC + 0.3V)
Receivers............................................... –18V to 18V
Logic Pins .............................. –0.3V to (VCC + 0.3V)
Output Voltage
Transmitters ................. (VEE – 0.3V) to (VDD + 0.3V)
Receivers................................ –0.3V to (VCC + 0.3V)
VEE........................................................ –10V to 0.3V
VDD ....................................................... –0.3V to 10V
Short-Circuit Duration
Transmitter Output ..................................... Indefinite
Receiver Output.......................................... Indefinite
VEE.................................................................. 30 sec
Operating Temperature Range
ORDER PART
NUMBER
TOP VIEW
–
+
+
–
C1
C1
1
2
3
4
5
6
7
8
9
28 C2
27 C2
CHARGE PUMP
V
26 V
EE
DD
LTC1546CG
LTC1546IG
V
25 GND
24 D1 A
23 D1 B
22 D2 A
21 D2 B
20 D3/R1 A
19 D3/R1 B
18 R2 A
17 R2 B
16 R3 A
15 R3 B
CC
D1
D2
D3
R1
R2
D1
D2
D3
T
T
T
T
T
R3 10
M0 11
R1
R2
M1 12
M2 13
R3
DCE/DTE 14
LTC1546C ............................................... 0°C to 70°C
LTC1546I........................................... –40°C to 85°C
Storage Temperature Range ................ –65°C to 150°C
Lead Temperature (Soldering, 10 sec)................. 300°C
G PACKAGE
28-LEAD PLASTIC SSOP
TJMAX = 150°C, θJA = 90°C/ W*
*θJA SOLDERED TO A TYPICAL CIRCUIT BOARD
IS TYPICALLY 60°C/W
Consult factory for Military grade parts.
ELECTRICAL CHARACTERISTICS
The ● denotes specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VCC = 5V (Notes 2, 3)
SYMBOL
Supplies
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
I
V
Supply Current (DCE Mode,
RS530, RS530-A, X.21 Modes, No Load
RS530, RS530-A, X.21 Modes, Full Load
V.35 Mode
V.28 Mode, No Load
V.28 Mode, Full Load
14
100
126
20
35
60
mA
mA
mA
mA
mA
µA
CC
CC
All Digital Pins = GND or V
)
●
●
130
170
CC
●
●
75
500
No-Cable Mode
P
V
Internal Power Dissipation (DCE Mode)
Positive Charge Pump Output Voltage
RS530, RS530-A, X.21 Modes, Full Load
V.35 Mode, Full Load
V.28 Mode, Full Load
410
625
150
mW
mW
mW
D
+
V.11 or V.28 Mode, No Load
V.35 Mode
V.28 Mode, with Load
●
●
●
8.0
7.0
8.0
9.3
8.0
8.7
6.5
V
V
V
V
V.28 Mode, with Load, I = 10mA
DD
–
V
Negative Charge Pump Output Voltage
V.28 Mode, No Load
V.28 Mode, Full Load
V.35 Mode
–9.6
–8.5
–6.5
–6.0
V
V
V
V
●
●
●
–7.5
–5.5
–4.5
RS530, RS530-A, X.21 Modes, Full Load
2
LTC1546
ELECTRICAL CHARACTERISTICS
The ● denotes specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VCC = 5V (Notes 2, 3)
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
500
2
MAX
UNITS
kHz
f
t
Charge Pump Oscillator Frequency
Charge Pump Rise Time
OSC
r
No-Cable Mode/Power-Off to Normal Operation
ms
Logic Inputs and Outputs
V
V
Logic Input High Voltage
Logic Input Low Voltage
Logic Input Current
●
●
2
V
V
IH
IL
0.8
I
D1, D2, D3
M0, M1, M2, DCE = GND
M0, M1, M2, DCE = V
●
●
●
±10
–30
±10
µA
µA
µA
IN
–120
3
–75
CC
V
V
Output High Voltage
I = –3mA
O
●
●
●
4.5
0.3
V
V
OH
OL
Output Low Voltage
I = 3mA
O
0.45
50
I
I
Output Short-Circuit Current
Three-State Output Current
0V ≤ V ≤ V
CC
–50
mA
µA
OSR
OZR
O
M0 = M1 = M2 = V , 0V ≤ V ≤ V
CC
±1
CC
O
V.11 Driver
V
V
Open Circuit Differential Output Voltage
Loaded Differential Output Voltage
R = 1.95k (Figure 1)
●
± 5
V
ODO
ODL
L
R = 50Ω (Figure 1)
0.5V
±2
0.67V
ODO
V
V
L
ODO
R = 50Ω (Figure 1)
L
●
●
∆V
Change in Magnitude of Differential
Output Voltage
R = 50Ω (Figure 1)
L
0.2
V
OD
V
Common Mode Output Voltage
R = 50Ω (Figure 1)
●
●
3
V
V
OC
L
∆V
Change in Magnitude of Common Mode
Output Voltage
R = 50Ω (Figure 1)
L
0.2
OC
I
I
Short-Circuit Current
V
= GND
±150
±100
mA
SS
OZ
OUT
Output Leakage Current
V
and V ≤ 0.25V, Power Off or
●
± 1
µA
A
B
No-Cable Mode or Driver Disabled
t , t
Rise or Fall Time
(Figures 2, 13)
●
●
●
●
2
15
15
0
15
40
40
3
25
65
65
12
ns
ns
ns
ns
ns
r
f
PLH
PHL
t
t
Input to Output Rising
Input to Output Falling
(Figures 2, 13)
(Figures 2, 13)
∆t
Input to Output Difference, t
Output to Output Skew
– t
(Figures 2, 13)
PLH
PHL
t
(Figures 2, 13)
3
SKEW
V.11 Receiver
V
Input Threshold Voltage
Input Hysteresis
–7V ≤ V ≤ 7V
●
●
●
–0.2
100
0.2
40
V
mV
Ω
TH
CM
∆V
–7V ≤ V ≤ 7V
15
103
15
50
50
4
TH
CM
R
Input Impedance
–7V ≤ V ≤ 7V (Figure 3)
CM
IN
t , t
Rise or Fall Time
C = 50pF (Figures 4, 14)
L
ns
ns
ns
ns
r
f
PLH
PHL
t
t
Input to Output Rising
Input to Output Falling
Input to Output Difference, t
C = 50pF (Figures 4, 14)
L
●
●
●
90
90
25
C = 50pF (Figures 4, 14)
L
∆t
– t
C = 50pF (Figures 4, 14)
L
0
PLH
PHL
V.35 Driver
V
Differential Output Voltage
Open Circuit, R = 1.95k (Figure 5)
●
±1.2
±0.66
V
V
OD
L
With Load, –4V ≤ V ≤ 4V (Figure 6)
±0.44
±0.55
CM
V
V
, V
Single-Ended Output Voltage
Transmitter Output Offset
Open Circuit, R = 1.95k (Figure 5)
●
●
±1.2
±0.6
V
V
OA OB
L
R = 50Ω (Figure 5)
L
OC
3
LTC1546
ELECTRICAL CHARACTERISTICS
The ● denotes specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VCC = 5V (Notes 2, 3)
SYMBOL
PARAMETER
CONDITIONS
V , V = 0V
MIN
–13
9.0
TYP
–11
11
±1
100
150
5
MAX
–9.0
13
UNITS
mA
mA
µA
Ω
I
I
I
Transmitter Output High Current
Transmitter Output Low Current
Transmitter Output Leakage Current
Transmitter Differential Mode Impedance
Transmitter Common Mode Impedance
Rise or Fall Time
●
●
●
●
OH
OL
OZ
A
B
V , V = 0V
A
B
V
and V ≤ 0.25V
±100
150
A
B
R
OD
R
OC
50
–2V ≤ V ≤ 2V (Figure 7)
135
165
Ω
CM
t , t
(Figures 8, 13)
(Figures 8, 13)
(Figures 8, 13)
(Figures 8, 13)
(Figures 8, 13)
ns
r
f
PLH
PHL
t
t
Input to Output
●
●
●
15
15
35
35
0
65
65
16
ns
Input to Output
ns
∆t
Input to Output Difference, t
Output to Output Skew
– t
ns
PLH
PHL
t
4
ns
SKEW
V.35 Receiver
V
Differential Receiver Input Threshold Voltage
Receiver Input Hysteresis
Receiver Differential Mode Impedance
Receiver Common Mode Impedance
Rise or Fall Time
–2V ≤ V ≤ 2V (Figure 9)
●
●
●
–0.2
0.2
40
V
mV
Ω
TH
CM
∆V
–2V ≤ V ≤ 2V (Figure 9)
15
103
150
15
TH
CM
R
R
–2V ≤ V ≤ 2V
90
110
165
ID
IC
CM
–2V ≤ V ≤ 2V (Figure 10)
135
Ω
CM
t , t
r
C = 50pF (Figures 4, 14)
L
ns
ns
ns
ns
f
t
t
Input to Output
C = 50pF (Figures 4, 14)
L
●
●
●
50
90
90
25
PLH
PHL
Input to Output
C = 50pF (Figures 4, 14)
L
50
∆t
Input to Output Difference, t
– t
C = 50pF (Figures 4, 14)
L
0
4
PLH
PHL
V.28 Driver
V
Output Voltage
Open Circuit
R = 3k (Figure 11)
L
●
●
±10
V
V
O
±5
±8.5
I
Short-Circuit Current
Power-Off Resistance
V
= GND
OUT
●
●
±150
mA
SS
R
–2V < V < 2V, Power Off
or No-Cable Mode
300
4
Ω
OZ
O
SR
Slew Rate
R = 7k, C = 0 (Figures 11, 15)
●
●
●
30
2.5
2.5
V/µs
µs
L
L
t
t
Input to Output
Input to Output
R = 3k, C = 2500pF (Figures 11, 15)
1.5
1.5
PLH
PHL
L
L
R = 3k, C = 2500pF (Figures 11, 15)
µs
L
L
V.28 Receiver
V
V
Input Low Threshold Voltage
Input High Threshold Voltage
Receiver Input Hysteresis
Receiver Input Impedance
Rise or Fall Time
(Figure 12)
(Figure 12)
(Figure 12)
●
●
●
●
1.2
1.2
0.05
5
0.8
V
V
THL
TLH
2
0
3
∆V
0.3
7
V
TH
R
–15V ≤ V ≤ 15V
kΩ
ns
ns
ns
IN
A
t , t
r
C = 50pF (Figures 12, 16)
L
15
f
t
t
Input to Output
C = 50pF (Figures 12, 16)
L
●
●
60
300
300
PLH
PHL
Input to Output
C = 50pF (Figures 12, 16)
L
160
Note 1: Absolute Maximum Ratings are those values beyond which the life
of the device may be impaired.
Note 3: All typicals are given for V = 5V, C1 = C2 = C
= C
= 1µF,
VDD
CC
VCC
C
= 3.3µF and T = 25°C.
VEE A
Note 2: All currents into device pins are positive; all currents out of device
are negative. All voltages are referenced to device ground unless otherwise
specified.
4
LTC1546
U
U
U
PI FU CTIO S
C1– (Pin 1): Capacitor C1 Negative Terminal. Connect a
R3 B (Pin 15): Receiver 3 Noninverting Input.
1µF capacitor between C1+ and C1–.
R3 A (Pin 16): Receiver 3 Inverting Input.
R2 B (Pin 17): Receiver 2 Noninverting Input.
R2 A (Pin 18): Receiver 2 Inverting Input.
C1+ (Pin 2): Capacitor C1 Positive Terminal. Connect a
1µF capacitor between C1+ and C1–.
VDD (Pin 3): Generated Positive Supply Voltage for
V.28. Connect a 1µF capacitor to ground.
D3/R1 B (Pin 19): Receiver 1 Noninverting Input and
Driver 3 Noninverting Output.
V
CC (Pin 4): Positive Supply Voltage Input. 4.75V ≤ VCC
≤ 5.25V. Bypass with a 1µF capacitor to ground.
D3/R1 A (Pin 20): Receiver 1 Inverting Input and Driver 3
Inverting Output.
D1 (Pin 5): TTL Level Driver 1 Input.
D2 B (Pin 21): Driver 2 Noninverting Output.
D2 A (Pin 22): Driver 2 Inverting Output.
D1 B (Pin 23): Driver 1 Noninverting Output.
D1 A (Pin 24): Driver 1 Inverting Output.
GND (Pin 25): Ground.
D2 (Pin 6): TTL Level Driver 2 Input.
D3 (Pin 7): TTL Level Driver 3 Input.
R1 (Pin 8): CMOS Level Receiver 1 Output.
R2 (Pin 9): CMOS Level Receiver 2 Output.
R3 (Pin 10): CMOS Level Receiver 3 Output.
V
EE (Pin 26): Negative Supply Voltage. Connect a 3.3µF
M0 (Pin 11): TTL Level Mode Select Input 0 with Pull-Up
to VCC. See Table 1.
capacitor to GND.
C2– (Pin 27): Capacitor C2 Negative Terminal. Connect a
M1 (Pin 12): TTL Level Mode Select Input 1 with Pull-Up
to VCC. See Table 1.
1µF capacitor between C2+ and C2–.
C2+ (Pin 28): Capacitor C2 Positive Terminal. Connect a
1µF capacitor between C2+ and C2–.
M2 (Pin 13): TTL Level Mode Select Input 2 with Pull-Up
to VCC. See Table 1.
DCE/DTE (Pin 14): TTL Level Mode Select Input with Pull-
Up to VCC. See Table 1.
5
LTC1546
W
BLOCK DIAGRA
CHARGE
PUMP
–
+
–
+
+
–
C1
C1
C1
V
C2
C2
V
C2
C2
V
1
2
3
4
28
27
26
25
+
–
C1
V
DD
DD
CC
EE
EE
V
V
GND
GND
CC
24 D1A
50Ω
S1
D1
5
D1
S2
125Ω
50Ω
D1B
23
22 D2A
50Ω
S1
D2
D3
6
7
D2
D3
S2
125Ω
50Ω
D2B
21
20 D3/R1 A
20k
10k
6k
51.5Ω
S3
S1
S2
125Ω
DCE/DTE 14
10k
20k
51.5Ω
20k
19 D3/R1 B
R1
R2
8
9
R1
R2A
18
6k
S3
10k
51.5Ω
S2
R2
125Ω
10k
51.5Ω
R2B
R3A
17
16
20k
20k
6k
S3
10k
51.5Ω
51.5Ω
S2
R3 10
R3
125Ω
10k
20k
R3B
15
1546 BD
6
LTC1546
TEST CIRCUITS
C
L
R
R
L
100pF
B
A
B
A
D
D
R
L
V
OD
100Ω
C
L
V
OC
100pF
L
1546 F02
1546 F01
Figure 1. V.11 Driver DC Test Circuit
Figure 2. V.11 Driver AC Test Circuit
I
B
B
R
B
I
A
R
C
A
L
A
+
= ±7V
V
CM
–
2(V – V )
B
A
R
=
IN
I
B
– I
1546 F04
A
1546 F03
Figure 3. Input Impedance Test Circuit
Figure 4. V.11, V.35 Receiver AC Test Circuit
V
V
OB
OB
50Ω
50Ω
R
R
50Ω
50Ω
50Ω
50Ω
L
L
125Ω
125Ω
125Ω
125Ω
V
OD
50Ω
50Ω
+
V
OC
V
CM
= ±2V
V
CM
–
1546 F05
1546 F07
1546 F06
V
V
OA
OA
Figure 5. V.35 Driver Open-Circuit Test
Figure 6. V.35 Driver Test Circuit
Figure 7. V.35 Driver Common Mode
Impedance Test Circuit
51.5Ω
125Ω
50Ω
50Ω
50Ω
125Ω
125Ω
+
+
V
V
CM
= ±2V
TH
–
50Ω
–
51.5Ω
+
V
1546 F08
CM
–
1546 F09
1546 F10
Figure 8. V.35 Driver AC Test Circuit
Figure 9. V.35 Receiver DC Test Circuit
Figure 10. Receiver Common Mode
Impedance Test Circuit
D
A
A
R
R
C
V
C
L
L
L
A
1546 F11
1546 F12
Figure 11. V.28 Driver Test Circuit
Figure 12. V.28 Receiver Test Circuit
7
LTC1546
W
U
ODE SELECTIO
Table 1
LTC1546 MODE NAME
Not Used (Default V.11)
RS530A
M2
M1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
M0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
DCE/DTE
D1
D2
D3
Z
R1
V.11
V.11
V.11
V.11
V.35
V.11
V.28
Z
R2
R3
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
V.11
V.11
V.11
V.11
V.35
V.11
V.28
Z
V.11
V.11
V.11
V.11
V.35
V.11
V.28
Z
V.11
V.11
V.11
V.11
V.35
V.11
V.28
Z
V.11
V.11
V.11
V.11
V.35
V.11
V.28
Z
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
Z
RS530
Z
X.21
Z
V.35
Z
RS449/V.36
V.28/RS232
No Cable
Z
Z
Z
Not Used (Default V.11)
RS530A
V.11
V.11
V.11
V.11
V.35
V.11
V.28
Z
V.11
V.11
V.11
V.11
V.35
V.11
V.28
Z
V.11
V.11
V.11
V.11
V.35
V.11
V.28
Z
Z
V.11
V.11
V.11
V.11
V.35
V.11
V.28
Z
V.11
V.11
V.11
V.11
V.35
V.11
V.28
Z
Z
RS530
Z
X.21
Z
V.35
Z
RS449/V.36
V.28/RS232
No Cable
Z
Z
Z
U
W
W
SWITCHI G TI E WAVEFOR S
5V
f = 1MHz : t ≤ 10ns : t ≤ 10ns
r
f
1.5V
1.5V
D
0V
t
t
PHL
PLH
V
O
90%
90%
10%
B – A
50%
50%
10%
–V
O
1/2 V
O
t
t
f
r
A
V
O
B
t
t
1546 F13
SKEW
SKEW
Figure 13. V.11, V.35 Driver Propagation Delays
V
B – A
OD2
f = 1MHz : t ≤ 10ns : t ≤ 10ns
INPUT
r
f
0V
t
0V
–V
OD2
t
PLH
PHL
V
R
OH
OUTPUT
1.5V
1.5V
V
OL
1546 F14
Figure 14. V.11, V.35 Receiver Propagation Delays
8
LTC1546
U
W
W
SWITCHI G TI E WAVEFOR S
3V
1.5V
t
1.5V
D
0V
PHL
3V
t
PLH
V
O
3V
SR =
1546 F15
6V
f
6V
r
0V
0V
SR =
–3V
A
t
t
–3V
–V
O
t
t
r
f
Figure 15. V.28 Driver Propagation Delays
V
IH
1.7V
A
1.3V
V
IL
t
PHL
t
PLH
V
OH
2.4V
R
1546 F16
0.8V
V
OL
Figure 16. V.28 Receiver Propagation Delays
W U U
U
APPLICATIO S I FOR ATIO
Overview
electrical mode. The DCE/DTE pin will configure the port
for DCE mode when high, and DTE when low.
The LTC1546 and LTC1544 form a complete software-
selectable DTE or DCE interface port that supports the
RS232, RS449, EIA530, EIA530-A, V.35, V.36 and X.21
protocols. Cable termination is provided on-chip, elimi-
nating the need for discrete termination designs.
Theinterfaceprotocolmaybeselectedsimplybyplugging
the appropriate interface cable into the connector. The
mode pins are routed to the connector and are left uncon-
nected (1) or wired to ground (0) in the cable as shown in
Figure 18. The internal pull-up current sources will ensure
a binary 1 when a pin is left unconnected.
A complete DCE-to-DTE interface operating in EIA530
modeisshowninFigure17. TheLTC1546halfofeachport
is used to generate and appropriately terminate the clock
and data signals. The LTC1544 is used to generate the
control signals along with LL (Local Loopback).
The mode selection may also be accomplished by using
jumpers to connect the mode pins to ground or VCC.
When the cable is removed, leaving all mode pins uncon-
nected, the LTC1546/LTC1544 will enter no-cable mode.
In this mode the LTC1546/LTC1544 supply current drops
to less than 500µA and the LTC1546/LTC1544 driver
outputs are forced into a high impedance state. At the
same time, the R2 and R3 receivers of the LTC1546 are
differentially terminated with 103Ω and the other receiv-
ers on the LTC1546 and LTC1544 are terminated with
30kΩ to ground.
Mode Selection
The interface protocol is selected using the mode select
pins M0, M1 and M2 (see Table 1).
For example, if the port is configured as a V.35 interface,
the mode selection pins should be M2 =1, M1=0, M0 = 0.
For the control signals, the drivers and receivers will
operateinV.28(RS232)electricalmode. Fortheclockand
data signals, the drivers and receivers will operate in V.35
9
LTC1546
W U U
U
APPLICATIO S I FOR ATIO
DTE
DCE
SERIAL
CONTROLLER
LTC1546
LTC1546
SERIAL
CONTROLLER
103Ω
103Ω
R3
D1
D2
D3
TXD
TXD
TXD
SCTE
R2
R1
SCTE
SCTE
D3
TXC
RXC
RXD
R1
103Ω
103Ω
103Ω
TXC
RXC
RXD
TXC
RXC
R2
R3
D2
D1
RXD
LTC1544
R3
LTC1544
D1
RTS
DTR
RTS
DTR
RTS
DTR
D2
D3
R2
R1
D3
DCD
DSR
R1
R2
R3
DCD
DSR
DCD
DSR
D2
D1
CTS
LL
CTS
LL
CTS
LL
D4
R4
R4
D4
1546 F17
Figure 17. Complete Multiprotocol Interface in EIA530 Mode
Cable Termination
may contain termination in the cable head or route signals
to various terminations on the board.
Traditional implementations used expensive relays to
switch resistors or required the user to change termina-
tion modules every time a new interface standard was
selected. Switching the terminations with FETs is difficult
because the FETs must remain off when the signal voltage
is beyond the supply voltage. Alternatively, custom cables
The LTC1546/LTC1544 chipset solves the cable termina-
tion switching problem by automatically providing the
appropriate termination and switching on-chip for the
V.10 (RS423), V.11 (RS422), V.28 (RS232) and V.35
electrical protocols.
10
LTC1546
W U U
APPLICATIO S I FOR ATIO
U
(DATA)
CONNECTOR
11
12
13
14
M0
LTC1546
M1
M2
NC
NC
DCE/DTE
CABLE
14
13
12
11
DCE/DTE
M2
LTC1544
M1
M0
1546 F18
(DATA)
Figure 18: Single Port DCE V.35 Mode Selection in the Cable
BALANCED
INTERCONNECTING
CABLE
V.10 (RS423) Interface
LOAD
GENERATOR
All V.10 drivers and receivers necessary for the RS449,
EIA530, EIA530-A, V.36 and X.21 protocols are imple-
mented on the LTC1544.
CABLE
TERMINATION
RECEIVER
A
A'
A typical V.10 unbalanced interface is shown in Figure 19.
A V.10 single-ended generator with output A and ground
C is connected to a differential receiver with input A
'
con-
1546 F19
C
C'
nected to A, and ground C connected via the signal return
'
Figure 19. Typical V.10 Interface
to ground C. Usually, no cable termination is required for
V.10 interfaces, but the receiver inputs must be compliant
with the impedance curve shown in Figure 20.
I
Z
3.25mA
The V.10 receiver configuration in the LTC1544 is shown
in Figure 21. In V.10 mode, switch S3 inside the LTC1544
is turned off. The noninverting input is disconnected
insidetheLTC1544receiverandconnectedtoground.The
cable termination is then the 30k input impedance to
ground of the LTC1544 V.10 receiver.
–10V
–3V
V
Z
3V
10V
V.11 (RS422) Interface
A typical V.11 balanced interface is shown in Figure 22. A
V.11 differential generator with outputs A and B and
ground C is connected to a differential receiver with input
1546 F20
–3.25mA
A
'
connected to A, input B
' connected to B, and ground C'
connected via the signal return to ground C. The V.11
Figure 20. V.10 Receiver Input Impedance
11
LTC1546
APPLICATIO S I FOR ATIO
W U U
U
A
A'
A'
LTC1546
LTC1544
R5
20k
R5
20k
R1
R8
6k
R8
6k
51.5Ω
R6
10k
R6
10k
RECEIVER
RECEIVER
S3
S1
S2
S3
R3
124Ω
R7
10k
R7
10k
R2
51.5Ω
R4
20k
R4
20k
B
B'
B'
C'
C'
1546 F23
1546 F21
GND
GND
Figure 21. V.10 Receiver Configuration
Figure 23. V.11 Receiver Configuration
connected to A and ground C
return to ground C.
'
connected via the signal
BALANCED
INTERCONNECTING
CABLE
LOAD
GENERATOR
In V.28 mode, S3 is closed inside the LTC1546/LTC1544
which connects a 6k (R8) impedance to ground in parallel
with 20k (R5) plus 10k (R6) for a combined impedance of
5k as shown in Figure 25. Proper termination is only pro-
videdwhentheBinputofthereceiversisfloating, sinceS1
of the LTC1546’s R2 and R3 receivers remains on in V.28
mode1. The noninverting input is disconnected inside the
LTC1546/LTC1544 receiver and connected to a TTL level
reference voltage to give a 1.4V receiver trip point.
CABLE
TERMINATION
RECEIVER
A
A'
100Ω
MIN
B
C
B'
C'
1546 F22
Figure 22. Typical V.11 Interface
BALANCED
interface has a differential termination at the receiver end
that has a minimum value of 100Ω. The termination
resistor is optional in the V.11 specification, but for the
high speed clock and data lines, the termination is essen-
tial to prevent reflections from corrupting the data. The
receiver inputs must also be compliant with the imped-
ance curve shown in Figure 20.
INTERCONNECTING
CABLE
LOAD
GENERATOR
CABLE
TERMINATION
RECEIVER
A
A'
1546 F24
C
C'
In V.11 mode, all switches are off except S1 of the
LTC1546’s receivers which connects a 103Ω differential
termination impedance to the cable as shown in Figure
231. The LTC1544 only handles control signals, so no
terminationotherthanitsV.11receivers’30kinputimped-
ance is necessary.
Figure 24. Typical V.28 Interface
A
'
LTC1546
R5
20k
R1
51.5Ω
R8
6k
R6
10k
RECEIVER
S3
S1
S2
R3
124Ω
V.28 (RS232) Interface
R7
10k
R2
51.5Ω
R4
20k
A typical V.28 unbalanced interface is shown in Figure 24.
A V.28 single-ended generator with output A and ground
B
'
C is connected to a single-ended receiver with input A
'
1546 F25
GND
C
'
1Actually, there is no switch S1 in receivers R2 and R3. However, for simplicity, all termination
networks on the LTC1546 can be treated identically if it is assumed that an S1 switch exists and is
always closed on the R2 and R3 receivers.
Figure 25. V.28 Receiver Configuration
12
LTC1546
W U U
APPLICATIO S I FOR ATIO
V.35 Interface
U
No-Cable Mode
The no-cable mode (M0 = M1 = M2 = 1) is intended for
the case when the cable is disconnected from the con-
nector. The charge pump, bias circuitry, drivers and
receiversareturnedoff, thedriveroutputsareforcedinto
a high impedance state, and the supply current drops to
less than 200µA. Note that the LTC1546’s R2 and R3
receivers continue to be terminated by a 103Ω differen-
tial impedance.
A typical V.35 balanced interface is shown in Figure 26. A
V.35 differential generator with outputs A and B and
ground C is connected to a differential receiver with input
A' connected to A, input B' connected to B, and ground C'
connected via the signal return to ground C. The V.35
interface requires a T or delta network termination at the
receiver end and the generator end. The receiver differen-
tial impedance measured at the connector must be
100Ω ±10Ω, and the impedance between shorted termi-
Charge Pump
nals (A' and B') and ground (C') must be 150Ω ±15Ω.
The LTC1546 uses an internal capacitive charge pump to
generate VDD and VEE as shown in Figure 28. A voltage
doubler generates about 8V on VDD and a voltage inverter
generates about –7.5V on VEE. Four 1µF surface mounted
tantalum or ceramic capacitors are required for C1, C2, C3
and C4. The VEE capacitor C5 should be a minimum of
3.3µF.Allcapacitorsare16Vandshouldbeplacedasclose
as possible to the LTC1546 to reduce EMI.
InV.35mode,bothswitchesS1andS2insidetheLTC1546
are on, connecting a T network impedance as shown in
Figure 27. The 30k input impedance of the receiver is
placed in parallel with the T network termination, but does
not affect the overall input impedance significantly.
The generator differential impedance must be 50Ω to
150Ω and the impedance between shorted terminals (A
and B) and ground (C) must be 150Ω ±15Ω.
BALANCED
3
2
1
4
28
27
26
25
INTERCONNECTING
+
–
V
C2
C2
DD
+
CABLE
GENERATOR
LOAD
C2
1µF
C3
1µF
CABLE
TERMINATION
C1
C1
V
RECEIVER
C1
1µF
LTC1546
A'
A
–
V
EE
C5
3.3µF
+
50Ω
50Ω
125Ω
125Ω
GND
5V
CC
C4
1µF
50Ω
50Ω
B
'
B
C
1546 F28
C'
1546 F26
Figure 28. Charge Pump
Figure 26. Typical V.35 Interface
Receiver Fail-Safe
A
'
LTC1546
All LTC1546/LTC1544 receivers feature fail-safe opera-
tion in all modes. If the receiver inputs are left floating or
areshortedtogetherbyaterminationresistor, thereceiver
output will always be forced to a logic high.
R5
20k
R1
R8
6k
51.5Ω
R6
10k
RECEIVER
S1
S2
S3
R3
124Ω
DTE vs DCE Operation
R7
10k
R2
51.5Ω
R4
20k
The DCE/DTE pin acts as an enable for Driver 3/Receiver
1 in the LTC1546, and Driver 3/Receiver 1 and Driver 4/
Receiver4intheLTC1544.TheINVERTpinintheLTC1544
allowstheDriver4/Receiver4enabletobehighorlowtrue
polarity.
B
'
1546 F27
GND
C
'
Figure 27. V.35 Receiver Configuration
13
LTC1546
W U U
U
APPLICATIO S I FOR ATIO
The LTC1546/LTC1544 can be configured for either DTE
or DCE operation in one of two ways: a dedicated DTE or
DCE port with a connector of appropriate gender or a port
with one connector that can be configured for DTE or DCE
operationbyreroutingthesignalstotheLTC1546/LTC1544
using a dedicated DTE cable or dedicated DCE cable.
Cable-Selectable Multiprotocol Interface
A cable-selectable multiprotocol DTE/DCE interface is
shown in Figure 33. The select lines M0, M1 and DCE/DTE
are brought out to the connector. The mode is selected by
the cable by wiring M0 (connector Pin 18) and M1 (con-
nector Pin 21) and DCE/DTE (connector Pin 25) to ground
(connector Pin 7) or letting them float. If M0, M1 or DCE/
DTE is floating, internal pull-up current sources will pull
the signals to VCC. The select bit M2 is hard wired to VCC.
When the cable is pulled out, the interface will go into the
no-cable mode.
A dedicated DTE port using a DB-25 male connector is
showninFigure29.Theinterfacemodeisselectedbylogic
outputs from the controller or from jumpers to either VCC
or GND on the mode select pins. A dedicated DCE port
using a DB-25 female connector is shown in Figure 30.
A port with one DB-25 connector, that can be configured
for either DTE or DCE operation is shown in Figure 31. The
configuration requires separate cables for proper signal
routing in DTE or DCE operation. For example, in DTE
mode, the TXD signal is routed to Pins 2 and 14 via the
LTC1546’s Driver 1. In DCE mode, Driver 1 now routes the
RXD signal to Pins 2 and 14.
Compliance Testing
The LTC1546/LTC1544 chipset has been tested by TUV
Telecom Services Inc. and passed the NET1, NET2 and
TBR2 requirements. Copies of the test reports are avail-
able from LTC or TUV Telecom Services.
The titles of the reports are:
NET1 and NET2: Test Report No. NET2/091301/99.
TBR2: Test Report No. CRT2/091301/99.
The address of TUV Telecom Services Inc. is:
Multiprotocol Interface with RL, LL, TM
and a DB-25 Connector
IftheRL,LLandTMsignalsareimplemented,therearenot
enough drivers and receivers available in the LTC1546/
LTC1544. In Figure 32, the required control signals are
handled by the LTC1545. The LTC1545 has an additional
single-endeddriver/receiverpairthatcanhandletwomore
optional control signals such as TM and RL.
TUV Telecom Services Inc.
Type Approval Division
1775 Old Highway 8, Ste 107
St. Paul, MN 55112 USA
TEL: +1 (612) 639-0775
FAX: +1 (612) 639-0873
14
LTC1546
U
TYPICAL APPLICATIO S
V
CC
5V
3
1
28
C2
C3
1µF
1µF
27
26
C1
CHARGE
PUMP
2
4
1µF
C4
+
3.3µF
25
24
C5
1µF
LTC1546
2
TXD A (103)
5
TXD
D1
T
T
T
14
24
23
22
TXD B
SCTE A (113)
6
7
SCTE
D2
D3
11
21
SCTE B
20
15
TXC A (114)
8
9
TXC
RXC
RXD
R1
R2
R3
19
18
12
17
TXC B
RXC A (115)
T
T
17
16
9
3
RXC B
RXD A (104)
10
16
7
15
11
12
13
14
RXD B
SG
M0
M1
M2
1
SHIELD
DCE/DTE
DB-25 MALE
CONNECTOR
V
CC
C10
1µF
C9
1µF
28
27
1
2
V
V
CC
EE
C11
1µF
V
GND
DD
26
4
RTS A (105)
RTS B
3
4
5
RTS
D1
D2
D3
25
24
23
19
20
23
DTR A (108)
DTR B
DTR
LTC1544
8
10
6
22
21
20
19
6
7
8
DCD A (109)
DCD B
R1
R2
R3
R4
DCD
DSR
CTS
LL
DSR A (107)
22
DSR B
5
18
17
CTS A (106)
CTS B
13
10
9
16
18
LL A (141)
D4
11
12
13
14
15
NC
M0
M1
M2
M0
M1
M2
INVERT
DCE/DTE
1546 F29
Figure 29. Controller-Selectable Multiprotocol DTE Port with DB-25 Connector
15
LTC1546
TYPICAL APPLICATIO S
U
V
CC
5V
3
1
28
C2
1µF
C3
1µF
27
26
C1
CHARGE
PUMP
2
4
1µF
C4
+
3.3µF
25
24
C5
1µF
LTC1546
3
RXD A (104)
5
RXD
RXC
D1
T
T
T
16
17
23
22
RXD B
RXC A (115)
6
7
D2
D3
9
21
RXC B
20
15
TXC A (114)
8
9
TXC
SCTE
TXD
R1
R2
R3
19
18
12
24
TXC B
SCTE A (113)
T
T
17
16
11
2
SCTE B
TXD A (103)
10
14
7
15
11
12
13
14
TXD B
M0
M1
M2
SGND (102)
1
SHIELD (101)
NC
DCE/DTE
DB-25 FEMALE
CONNECTOR
V
CC
C10
1µF
C9
1µF
28
27
1
2
V
V
CC
EE
C11
1µF
V
GND
DD
26
5
CTS A (106)
CTS B
3
4
5
CTS
D1
D2
D3
25
24
23
13
6
DSR A (107)
DSR B
22
DSR
LTC1544
8
10
20
23
22
21
20
19
6
7
8
DCD A (109)
DCD B
R1
R2
R3
R4
DCD
DTR
RTS
LL
DTR A (108)
DTR B
4
18
17
RTS A (105)
RTS B
19
10
9
16
18
LL A (141)
D4
11
12
13
14
15
M0
M1
M2
NC
M0
M1
M2
INVERT
NC
DCE/DTE
1546 F30
Figure 30. Controller-Selectable DCE Port with DB-25 Connector
16
LTC1546
U
TYPICAL APPLICATIO S
V
CC
5V
3
1
28
C2
C3
1µF
1µF
27
26
C1
CHARGE
PUMP
2
4
1µF
C4
+
3.3µF
25
24
C5
1µF
DTE
DCE
LTC1546
2
TXD A
RXD A
5
DTE_TXD/DCE_RXD
DTE_SCTE/DCE_RXC
D1
T
T
T
14
24
23
22
TXD B
RXD B
SCTE A RXC A
6
7
D2
D3
11
21
SCTE B RXC B
20
15
TXC A
TXC A
8
9
DTE_TXC/DCE_TXC
DTE_RXC/DCE_SCTE
DTE_RXD/DCE_TXD
R1
R2
R3
19
18
12
17
TXC B
RXC A
TXC B
SCTE A
T
T
17
16
9
3
RXC B
RXD A
SCTE B
TXD A
10
16
7
15
11
12
13
14
RXD B
SG
TXD B
M0
M1
M2
1
SHIELD
DCE/DTE
DB-25
CONNECTOR
V
CC
C10
1µF
C9
1µF
28
27
1
2
V
V
CC
EE
C11
1µF
V
DD
GND
26
4
RTS A
CTS A
3
4
5
DTE_RTS/DCE_CTS
DTE_DTR/DCE_DSR
D1
D2
D3
25
24
23
19
20
23
RTS B
DTR A
DTR B
CTS B
DSR A
DSR B
LTC1544
8
10
6
22
21
20
19
6
7
8
DCD A
DCD B
DSR A
DCD A
DCD B
DTR A
DTE_DCD/DCE_DCD
DTE_DSR/DCE_DTR
DTE_CTS/DCE_RTS
DTE_LL/DCE_LL
R1
R2
R3
R4
22
DSR B
CTS A
CTS B
DTR B
RTS A
RTS B
5
18
17
13
10
9
16
18
LL A
LL A
D4
11
12
13
14
15
NC
M0
M1
M0
M1
M2
INVERT
M2
DCE/DTE
DCE/DTE
1546 F31
Figure 31. Controller-Selectable Multiprotocol DTE/DCE Port with DB-25 Connector
17
LTC1546
U
TYPICAL APPLICATIO S
V
CC
5V
3
1
28
C2
C3
1µF
1µF
27
26
C1
CHARGE
PUMP
1µF
2
4
C4
+
3.3µF
25
24
C5
1µF
DTE
TXD A
DCE
RXD A
LTC1546
2
5
6
7
D1
D2
D3
DTE_TXD/DCE_RXD
DTE_SCTE/DCE_RXC
T
T
T
14
24
23
22
TXD B
RXD B
RXC A
SCTE A
11
21
SCTE B
RXC B
20
19
18
15
12
17
TXC A
TXC B
RXC A
TXC A
TXC B
SCTE A
8
9
R1
R2
R3
DTE_TXC/DCE_TXC
DTE_RXC/DCE_SCTE
T
T
17
16
9
3
RXC B
RXD A
SCTE B
TXD A
10
11
DTE_RXD/DCE_TXD
15
16
7
RXD B
SG
TXD B
M0
M1
M2
12
13
14
1
SHIELD
DCE/DTE
V
CC
5V
DB-25
CONNECTOR
C10
1µF
C9
1µF
36
35
1,19
2,20
V
V
EE
GND
CC
C11
1µF
V
DD
34
4
RTS A
CTS A
CTS B
DSR A
DSR B
3
4
5
DTE_RTS/DCE_CTS
DTE_DTR/DCE_DSR
D1
D2
D3
33
32
31
19
20
23
RTS B
DTR A
DTR B
LTC1545
8
10
6
30
29
28
27
6
7
8
DCD A
DCD B
DSR A
DCD A
DCD B
DTR A
R1
R2
R3
DTE_DCD/DCE_DCD
DTE_DSR/DCE_DTR
DTE_CTS/DCE_RTS
22
DSR B
CTS A
CTS B
LL
DTR B
RTS A
RTS B
RI
5
13
18
26
25
24
9
D4
R4
DTE_LL/DCE_RI
DTE_RI/DCE_LL
23
*
10
RI
LL
25
21
22
21
17
18
R5
TM
RL
RL
DTE_TM/DCE_RL
DTE_RL/DCE_TM
D5
TM
15
16
11
12
13
14
M0
M1
M0
M1
M2
D4ENB
R4EN
*OPTIONAL
NC
M2
DCE/DTE
DCE/DTE
1546 F32
Figure 32. Controller-Selectable Multiprotocol DTE/DCE Port with RL, LL, TM and DB-25 Connector
18
LTC1546
U
TYPICAL APPLICATIO S
V
CC
5V
3
1
28
C2
C3
1µF
1µF
27
26
C1
CHARGE
PUMP
2
4
1µF
C4
+
3.3µF
25
24
C5
1µF
DTE
DCE
LTC1546
D1
2
TXD A
RXD A
5
DTE_TXD/DCE_RXD
DTE_SCTE/DCE_RXC
T
T
T
14
24
23
22
TXD B
RXD B
RXC A
SCTE A
6
7
D2
11
21
SCTE B
RXC B
D3
R1
20
15
TXC A
TXC A
8
9
DTE_TXC/DCE_TXC
DTE_RXC/DCE_SCTE
DTE_RXD/DCE_TXD
12
17
19
18
TXC B
RXC A
TXC B
SCTE A
T
T
R2
R3
9
3
17
16
RXC B
RXD A
SCTE B
TXD A
10
16
7
15
RXD B
SG
TXD B
11
12
13
14
M0
M1
M2
NC
1
SHIELD
DCE/DTE
DB-25
CONNECTOR
V
CC
C10
1µF
25
21
18
C9
1µF
28
27
DCE/DTE
1
2
V
V
CC
EE
C11
1µF
M1
M0
V
DD
GND
26
4
RTS A
RTS B
DTR A
DTR B
CTS A
CTS B
DSR A
DSR B
3
4
5
D1
D2
D3
DTE_RTS/DCE_CTS
DTE_DTR/DCE_DSR
25
24
23
19
20
23
LTC1544
22
21
20
19
8
10
6
6
7
8
DCD A
DCD B
DSR A
DCD A
DCD B
DTR A
R1
R2
R3
R4
DTE_DCD/DCE_DCD
DTE_DSR/DCE_DTR
DTE_CTS/DCE_RTS
22
DSR B
CTS A
CTS B
DTR B
RTS A
RTS B
5
18
17
13
CABLE WIRING FOR MODE SELECTION
10
9
16
MODE
V.35
PIN 18
PIN 7
NC
PIN 21
PIN 7
PIN 7
NC
D4
RS449, V.36
RS232
11
12
13
14
PIN 7
M0
M1
M2
CABLE WIRING FOR
DTE/DCE SELECTION
NC
15
MODE
DTE
PIN 25
PIN 7
NC
NC
INVERT
DCE/DTE
1546 F33
DCE
Figure 33. Cable-Selectable Multiprotocol DTE/DCE Port with DB-25 Connector
19
LTC1546
U
PACKAGE DESCRIPTIO
Dimensions in inches (millimeters) unless otherwise noted.
G Package
28-Lead Plastic SSOP (0.209)
(LTC DWG # 05-08-1640)
10.07 – 10.33*
(0.397 – 0.407)
28 27 26 25 24 23 22 21 20 19 18
16 15
17
7.65 – 7.90
(0.301 – 0.311)
5
7
8
1
2
3
4
6
9 10 11 12 13 14
5.20 – 5.38**
(0.205 – 0.212)
1.73 – 1.99
(0.068 – 0.078)
0° – 8°
0.65
(0.0256)
BSC
0.13 – 0.22
0.55 – 0.95
(0.005 – 0.009)
(0.022 – 0.037)
0.05 – 0.21
(0.002 – 0.008)
0.25 – 0.38
(0.010 – 0.015)
NOTE: DIMENSIONS ARE IN MILLIMETERS
*DIMENSIONS DO NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED 0.152mm (0.006") PER SIDE
**DIMENSIONS DO NOT INCLUDE INTERLEAD FLASH. INTERLEAD
FLASH SHALL NOT EXCEED 0.254mm (0.010") PER SIDE
G28 SSOP 1098
RELATED PARTS
PART NUMBER
DESCRIPTION
COMMENTS
LTC1321
Dual RS232/RS485 Transceiver
Two RS232 Driver/Receiver Pairs or Two RS485 Driver/Receiver Pairs
Two RS232 Driver/Receiver or Four RS232 Driver/Receiver Pairs
4-Driver/4-Receiver for Data and Clock Signals
LTC1334
Single 5V RS232/RS485 Multiprotocol Transceiver
Software-Selectable Multiprotocol Transceiver
Software-Selectable Cable Terminator
Single Supply V.35 Transceiver
LTC1343
LTC1344A
LTC1345
Perfect for Terminating the LTC1543 (Not Needed with LTC1546)
3-Driver/3-Receiver for Data and Clock Signals
LTC1346A
LTC1543
Dual Supply V.35 Transceiver
3-Driver/3-Receiver for Data and Clock Signals
Software-Selectable Multiprotocol Transceiver
Terminated with LTC1344A for Data and Clock Signals, Companion to
LTC1544 or LTC1545 for Control Signals
LTC1544
LTC1545
Software-Selectable Multiprotocol Transceiver
Software-Selectable Multiprotocol Transceiver
Companion to LTC1546 or LTC1543 for Control Signals Including LL
5-Driver/5-Receiver Companion to LTC1546 or LTC1543
for Control Signals Including LL, TM and RL
1546i LT/TP 1299 4K • PRINTED IN USA
LINEAR TECHNOLOGY CORPORATION 1999
20 LinearTechnology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
●
●
(408)432-1900 FAX:(408)434-0507 www.linear-tech.com
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