LTC1544IG [Linear]
Software-Selectable Multiprotocol Transceiver; 软件可选的多协议收发器
| 型号： | LTC1544IG |
| 厂家： | 
Linear |
| 描述： | Software-Selectable Multiprotocol Transceiver |
| 文件： | 总20页 (文件大小：280K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
LTC1544
Software-Selectable
Multiprotocol Transceiver
U
FEATURES
DESCRIPTIO
The LTC®1544 is a 4-driver/4-receiver multiprotocol trans-
ceiver. The LTC1544 and LTC1543 form the core of a
complete software-selectable DTE or DCE interface port that
supports the RS232, RS449, EIA530, EIA530-A, V.35, V.36
orX.21protocols. CableterminationfortheLTC1543maybe
implemented using the LTC1344A software-selectable cable
termination chip or by using existing discrete designs. The
LTC1546 includes software-selectable cable termination on-
chip.
■
Software-Selectable Transceiver Supports:
RS232, RS449, EIA530, EIA530-A, V.35, V.36, X.21
■
TUV/Detecon Inc. Certified NET1 and NET2
Compliant (Test Report No. NET2/102201/97)
■
TBR2 Compliant (Test Report No. CTR2/022701/98)
■
Software-Selectable Cable Termination Using
the LTC1344A
■
Complete DTE or DCE Port with LTC1543, LTC1344A
or LTC1546 with Integrated Termination
Operates from Single 5V Supply with LTC1543
■
TheLTC1544runsfroma5Vsupplyandthechargepumpon
the LTC1543 or LTC1546. The part is available in a 28-lead
SSOP surface mount package.
U
APPLICATIO S
■
Data Networking
■
CSU and DSU
■
, LTC and LT are registered trademarks of Linear Technology Corporation.
Data Routers
U
TYPICAL APPLICATIO
DTE or DCE Multiprotocol Serial Interface with DB-25 Connector
LL
CTS
DSR
DCD
DTR
RTS
TXC
SCTE
TXD
RXD
RXC
LTC1543
LTC1544
D3
D2
D1
D3
D4
D2
D1
R3
R2
R1
R4
R3
R2
R1
LTC1344A
18
13
5
10
8
22
6
23 20 19
4
1
7
16
3
9
17
12 15 11 24 14
2
DB-25 CONNECTOR
1544 TA01
1
LTC1544
W W U W
U W
U
ABSOLUTE AXI U RATI GS
(Note 1)
Supply Voltage, VCC ................................................ 6.5V
Input Voltage
Transmitters ........................... –0.3V to (VCC + 0.3V)
Receivers............................................... –18V to 18V
Logic Pins .............................. –0.3V to (VCC + 0.3V)
Output Voltage
Transmitters .................. (VEE – 0.3V) to (VDD + 0.3V)
Receivers................................ –0.3V to (VCC + 0.3V)
VEE........................................................ –10V to 0.3V
VDD ....................................................... –0.3V to 10V
Short-Circuit Duration
PACKAGE/ORDER I FOR ATIO
TOP VIEW
ORDER PART
NUMBER
V
1
2
3
4
5
6
7
8
9
28 V
EE
CC
V
27 GND
DD
D1
D2
D3
R1
R2
R3
D4
26 D1 A
D1
D2
LTC1544CG
LTC1544IG
25 D1 B
24 D2 A
23 D2 B
D3
22 D3/R1 A
21 D3/R1 B
20 R2 A
R1
R2
R3
R4 10
M0 11
19 R2 B
18 R3 A
D4
R4
Transmitter Output ..................................... Indefinite
Receiver Output.......................................... Indefinite
VEE.................................................................. 30 sec
Operating Temperature Range
M1 12
17 R3 B
M2 13
16 D4/R4 A
15 INVERT
DCE/DTE 14
G PACKAGE
28-LEAD PLASTIC SSOP
LTC1544CG ............................................. 0°C to 70°C
LTC1544IG ........................................ –40°C to 85°C
Storage Temperature Range ................ –65°C to 150°C
Lead Temperature (Soldering, 10 sec)................. 300°C
TJMAX = 150°C, θJA = 65°C/ W
Consult factory for Military grade parts.
ELECTRICAL CHARACTERISTICS
The ● denotes specifications which apply over the full operating tempera-
ture range, otherwise specifications are at TA = 25°C. VCC = 5V, VDD = 8V, VEE = – 7V for V.28, – 5.5V for V.10, V.11 (Notes 2, 3)
SYMBOL PARAMETER
Supplies
CONDITIONS
MIN
TYP
MAX
UNITS
I
V
Supply Current (DCE Mode,
RS530, RS530-A, X.21 Modes, No Load
RS530, RS530-A, X.21 Modes, Full Load
V.28 Mode, No Load
V.28 Mode, Full Load
No-Cable Mode
2.7
95
1
1
10
mA
mA
mA
mA
µA
CC
CC
All Digital Pins = GND or V
)
●
●
●
●
120
2
2
CC
200
I
V
Supply Current (DCE Mode,
RS530, RS530-A, X.21 Modes, No Load
RS530, X.21 Modes, Full Load
2.1
14
25
1
12
10
mA
mA
mA
mA
mA
µA
EE
EE
All Digital Pins = GND or V
)
CC
V
V
= –5.6V (RS530, RS530-A Modes) RS530-A, Full Load
= –8.46V (V.28 Mode)
EE
EE
V.28 Mode, No Load
V.28 Mode, Full Load
No-Cable Mode
I
V
Supply Current (DCE Mode,
RS530, RS530-A, X.21 Modes, NoLoad
RS530, RS530-A, X.21 Modes, Full Load
V.28 Mode, No Load
V.28 Mode, Full Load
No-Cable Mode
0.2
0.2
1
12
10
mA
mA
mA
mA
µA
DD
DD
All Digital Pins = GND or V
)
CC
V
= 8.73V
DD
P
D
Internal Power Dissipation (DCE Mode,
(All Digital Pins = GND or V
RS530, RS530-A, X.21 Modes, Full Load
V.28 Mode, Full Load
300
54
mW
mW
)
CC
2
LTC1544
ELECTRICAL CHARACTERISTICS
The ● denotes specifications which apply over the full operating tempera-
ture range, otherwise specifications are at TA = 25°C. VCC = 5V, VDD = 8V, VEE = – 7V for V.28, – 5.5V for V.10, V.11 (Notes 2, 3)
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
Logic Inputs and Outputs
V
V
Logic Input High Voltage
Logic Input Low Voltage
Logic Input Current
●
●
2
V
V
IH
IL
0.8
I
D1, D2, D3, D4
M0, M1, M2, DCE, INVERT = GND (LTC1544C)
M0, M1, M2, DCE, INVERT = GND (LTC1544I)
M0, M1, M2, DCE, INVERT = V
●
●
●
●
±10
–30
–30
±10
µA
µA
µA
µA
IN
–100
–120
–50
–50
CC
V
V
Output High Voltage
I = –4mA
●
●
●
3
4.5
0.3
40
V
V
OH
OL
O
Output Low Voltage
I = 4mA
O
0.8
50
I
I
Output Short-Circuit Current
Three-State Output Current
0V ≤ V ≤ V
CC
–50
mA
µA
OSR
OZR
O
M0 = M1 = M2 = V , 0V ≤ V ≤ V
CC
±1
CC
O
V.11 Driver
V
V
Open Circuit Differential Output Voltage
Loaded Differential Output Voltage
R = 1.95k (Figure 1)
●
±5
V
ODO
ODL
L
R = 50Ω (Figure 1)
0.5V
±2
0.67V
ODO
V
V
L
ODO
R = 50Ω (Figure 1)
L
●
●
∆V
Change in Magnitude of Differential
Output Voltage
R = 50Ω (Figure 1)
L
0.2
V
OD
V
Common Mode Output Voltage
R = 50Ω (Figure 1)
●
●
3
V
V
OC
L
∆V
Change in Magnitude of Common Mode
Output Voltage
R = 50Ω (Figure 1)
L
0.2
OC
I
I
Short-Circuit Current
V
= GND
±150
±100
mA
SS
OZ
OUT
Output Leakage Current
–0.25V ≤ V ≤ 0.25V, Power Off or
No-Cable Mode or Driver Disabled
●
± 1
µA
O
t , t
Rise or Fall Time
Input to Output
Input to Output
LTC1544C (Figures 2, 5)
LTC1544I (Figures 2, 5)
●
●
2
2
15
15
25
35
ns
ns
r
f
PLH
PHL
t
t
LTC1544C (Figures 2, 5)
LTC1544I (Figures 2, 5)
●
●
20
20
40
40
65
75
ns
ns
LTC1544C (Figures 2, 5)
LTC1544I (Figures 2, 5)
●
●
20
20
40
40
65
75
ns
ns
∆t
Input to Output Difference,
Output to Output Skew
t
– t
PHL
LTC1544C (Figures 2, 5)
LTC1544I (Figures 2, 5)
●
●
0
0
3
3
12
17
ns
ns
PLH
t
(Figures 2, 5)
3
ns
SKEW
V.11 Receiver
V
Input Threshold Voltage
Input Hysteresis
–7V ≤ V ≤ 7V
●
●
●
●
–0.2
15
0.2
40
V
mV
mA
kΩ
ns
TH
CM
∆V
–7V ≤ V ≤ 7V
15
TH
CM
I
Input Current (A, B)
Input Impedance
Rise or Fall Time
Input to Output
–10V ≤ V ≤ 10V
±0.66
IN
A,B
R
–10V ≤ V ≤ 10V
30
15
IN
A,B
t , t
r
(Figures 2, 6)
f
t
LTC1544C (Figures 2, 6)
LTC1544I (Figures 2, 6)
●
●
50
50
80
90
ns
ns
PLH
t
Input to Output
LTC1544C (Figures 2, 6)
LTC1544I (Figures 2, 6)
●
●
50
50
80
90
ns
ns
PHL
∆t
Input to Output Difference,
t
– t
PHL
LTC1544C (Figures 2, 6)
LTC1544I (Figures 2, 6)
●
●
0
0
4
4
16
21
ns
ns
PLH
3
LTC1544
ELECTRICAL CHARACTERISTICS
The ● denotes specifications which apply over the full operating tempera-
ture range, otherwise specifications are at TA = 25°C. VCC = 5V, VDD = 8V, VEE = – 7V for V.28, – 5.5V for V.10, V.11 (Notes 2, 3)
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
V.10 Driver
V
V
Output Voltage
Output Voltage
Open Circuit, R = 3.9k
●
●
±4
±6
V
V
O
T
L
R = 450Ω (Figure 3)
±3.6
0.9V
L
R = 450Ω (Figure 3)
L
O
I
I
Short-Circuit Current
V = GND
±150
±100
mA
SS
OZ
O
Output Leakage Current
–0.25V ≤ V ≤ 0.25V, Power Off or
No-Cable Mode or Driver Disabled
●
±0.1
µA
O
t , t
Rise or Fall Time
Input to Output
Input to Output
R = 450Ω, C = 100pF (Figures 3, 7)
2
1
1
µs
µs
µs
r
f
PLH
PHL
L
L
t
t
R = 450Ω, C = 100pF (Figures 3, 7)
L L
R = 450Ω, C = 100pF (Figures 3, 7)
L
L
V.10 Receiver
V
Receiver Input Threshold Voltage
Receiver Input Hysteresis
Receiver Input Current
Receiver Input Impedance
Rise or Fall Time
●
●
●
●
–0.25
15
0.25
50
V
mV
mA
kΩ
ns
TH
∆V
25
TH
I
–10V ≤ V ≤ 10V
±0.66
IN
A
R
–10V ≤ V ≤ 10V
30
15
IN
A
t , t
r
(Figures 4, 8)
(Figures 4, 8)
(Figures 4, 8)
(Figures 4, 8)
f
t
t
Input to Output
55
ns
PLH
PHL
Input to Output
109
60
ns
∆t
Input to Output Difference,
Output Voltage
t
– t
PHL
ns
PLH
V.28 Driver
V
Open Circuit
R = 3k (Figure 3)
L
●
●
±10
V
V
O
±5
±8.5
±1
I
I
Short-Circuit Current
V = GND
O
●
●
±150
±100
mA
SS
OZ
Output Leakage Current
–0.25V ≤ V ≤ 0.25V, Power Off or
µA
O
No-Cable Mode or Driver Disabled
SR
Slew Rate
R = 3k, C = 2500pF (Figures 3, 7)
●
●
●
4
30
2.5
2.5
V/µs
µs
L
L
t
t
Input to Output
Input to Output
R = 3k, C = 2500pF (Figures 3, 7)
1.3
1.3
PLH
PHL
L
L
R = 3k, C = 2500pF (Figures 3, 7)
µs
L
L
V.28 Receiver
V
V
Input Low Threshold Voltage
Input High Threshold Voltage
Receiver Input Hysterisis
Receiver Input Impedance
Rise or Fall Time
●
●
●
●
1.5
1.6
0.1
5
0.8
V
V
THL
TLH
2
0
3
∆V
0.3
7
V
TH
R
–15V ≤ V ≤ 15V
kΩ
ns
ns
ns
IN
A
t , t
r
(Figures 4, 8)
(Figures 4, 8)
(Figures 4, 8)
15
f
t
t
Input to Output
●
●
60
100
450
PLH
PHL
Input to Output
150
Note 1: Absolute Maximum Ratings are those beyond which the safety of a
device may be impaired.
Note 3: All typicals are given for V = 5V, V = 8V, V = –7V for V.28,
CC DD EE
–5.5V for V.10, V.11 and T = 25°C.
A
Note 2: All currents into device pins are positive; all currents out of device
are negative. All voltages are referenced to device ground unless otherwise
specified.
4
LTC1544
U
U
U
PI FU CTIO S
VCC (Pin 1): Positive Supply for the Transceivers. 4.75V ≤
INVERT (Pin 15): TTL Level Mode Select Input with Pull-
Up to VCC.
V
CC ≤ 5.25V. Connect a 1µF capacitor to ground.
V
DD (Pin 2): Positive Supply Voltage for V.28. Connect to
D4/R4 A (Pin 16): Receiver 4 Inverting Input and Driver 4
VDD Pin 3 on LTC1543 or 8V supply. Connect a 1µF
Output.
capacitor to ground.
R3 B (Pin 17): Receiver 3 Noninverting Input.
R3 A (Pin 18): Receiver 3 Inverting Input.
R2 B (Pin 19): Receiver 2 Noninverting Input.
R2 A (Pin 20): Receiver 2 Inverting Input.
D1 (Pin 3): TTL Level Driver 1 Input.
D2 (Pin 4): TTL Level Driver 2 Input.
D3 (Pin 5): TTL Level Driver 3 Input.
R1 (Pin 6): CMOS Level Receiver 1 Output.
R2 (Pin 7): CMOS Level Receiver 2 Output.
R3 (Pin 8): CMOS Level Receiver 3 Output.
D4 (Pin 9): TTL Level Driver 4 Input.
R4 (Pin 10): CMOS Level Receiver 4 Output.
D3/R1 B (Pin 21): Receiver 1 Noninverting Input and
Driver 3 Noninverting Output.
D3/R1 A (Pin 22): Receiver 1 Inverting Input and Driver 3
Inverting Output.
D2 B (Pin 23): Driver 2 Noninverting Output.
D2 A (Pin 24): Driver 2 Inverting Output.
D1 B (Pin 25): Driver 1 Noninverting Output.
D1 A (Pin 26): Driver 1 Inverting Output.
GND (Pin 27): Ground.
M0 (Pin 11): TTL Level Mode Select Input 0 with Pull-Up
to VCC.
M1 (Pin 12): TTL Level Mode Select Input 1 with Pull-Up
to VCC.
M2 (Pin 13): TTL Level Mode Select Input 2 with Pull-Up
to VCC.
VEE (Pin 28): Negative Supply Voltage. Connect to VEE Pin
26 on LTC1543 or to –8V supply. Connect a 1µF capacitor
to ground.
DCE/DTE (Pin 14): TTL Level Mode Select Input with
Pull-Up to VCC.
TEST CIRCUITS
A
R
L
C
L
50Ω
B
A
100pF
B
A
R
R
L
100Ω
V
C
L
100pF
OD
15pF
R
L
V
OC
50Ω
1544 F01
B
1544 F02
Figure 1. V.11 Driver Test Circuit
Figure 2. V.11 Driver/Receiver AC Test Circuit
5
LTC1544
TEST CIRCUITS
D
A
A
R
D
A
15pF
R
C
L
L
1544 F04
1544 F03
Figure 4. V.10/V.28 Receiver Test Circuit
Figure 3. V.10/V.28 Driver Test Circuit
W
U
ODE SELECTIO
LTC1544 MODE NAME
Not Used (Default V.11)
RS530A
M2
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
M1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
M0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
DCE/DTE INVERT
D1
D2
D3
Z
R1
V.11
V.11
V.11
V.11
V.28
V.11
V.28
Z
R2
R3
D4
Z
R4
V.10
V.10
V.10
V.10
V.28
V.10
V.28
Z
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
V.11
V.11
V.11
V.11
V.28
V.11
V.28
Z
V.11
V.10
V.11
V.11
V.28
V.11
V.28
Z
V.11
V.10
V.11
V.11
V.28
V.11
V.28
Z
V.11
V.11
V.11
V.11
V.28
V.11
V.28
Z
Z
Z
RS530
Z
Z
X.21
Z
Z
V.35
Z
Z
RS449/V.36
V.28/RS232
No Cable
Z
Z
Z
Z
Z
Z
Not Used (Default V.11)
RS530A
V.11
V.11
V.11
V.11
V.28
V.11
V.28
Z
V.11
V.10
V.11
V.11
V.28
V.11
V.28
Z
Z
V.11
V.11
V.11
V.11
V.28
V.11
V.28
Z
V.11
V.10
V.11
V.11
V.28
V.11
V.28
Z
V.11
V.11
V.11
V.11
V.28
V.11
V.28
Z
V.10
V.10
V.10
V.10
V.28
V.10
V.28
Z
Z
Z
Z
RS530
Z
Z
X.21
Z
Z
V.35
Z
Z
RS449/V.36
V.28/RS232
No Cable
Z
Z
Z
Z
Z
Z
Not Used (Default V.11)
RS530A
V.11
V.11
V.11
V.11
V.28
V.11
V.28
Z
V.11
V.10
V.11
V.11
V.28
V.11
V.28
Z
V.11
V.11
V.11
V.11
V.28
V.11
V.28
Z
Z
V.11
V.10
V.11
V.11
V.28
V.11
V.28
Z
V.11
V.11
V.11
V.11
V.28
V.11
V.28
Z
V.10
V.10
V.10
V.10
V.28
V.10
V.28
Z
Z
Z
Z
RS530
Z
Z
X.21
Z
Z
V.35
Z
Z
RS449/V.36
V.28/RS232
No Cable
Z
Z
Z
Z
Z
Z
Not Used (Default V.11)
RS530A
V.11
V.11
V.11
V.11
V.28
V.11
V.28
Z
V.11
V.10
V.11
V.11
V.28
V.11
V.28
Z
V.11
V.11
V.11
V.11
V.28
V.11
V.28
Z
Z
V.11
V.10
V.11
V.11
V.28
V.11
V.28
Z
V.11
V.11
V.11
V.11
V.28
V.11
V.28
Z
Z
V.10
V.10
V.10
V.10
V.28
V.10
V.28
Z
Z
Z
RS530
Z
Z
X.21
Z
Z
V.35
Z
Z
RS449/V.36
V.28/RS232
No Cable
Z
Z
Z
Z
Z
Z
6
LTC1544
U W
W
SWITCHI G TI E WAVEFOR S
5V
f = 1MHz : t ≤ 10ns : t ≤ 10ns
r
f
1.5V
1.5V
D
0V
t
t
PHL
PLH
V
O
90%
90%
10%
V
= V(A) – V(B)
DIFF
B – A
50%
50%
10%
–V
O
1/2 V
O
t
t
f
r
A
V
O
B
t
t
1544 F05
SKEW
SKEW
Figure 5. V.11, V.35 Driver Propagation Delays
V
B – A
OD2
f = 1MHz : t ≤ 10ns : t ≤ 10ns
INPUT
r
f
0V
t
0V
–V
OD2
t
PLH
PHL
V
R
OH
OUTPUT
1.5V
1.5V
V
OL
1544 F06
Figure 6. V.11, V.35 Receiver Propagation Delays
3V
0V
D
A
1.5V
t
1.5V
PHL
3V
t
PLH
V
O
3V
1544 F07
0V
0V
–3V
–3V
–V
O
t
t
r
f
Figure 7. V.10, V.28 Driver Propagation Delays
V
IH
1.7V
A
1.3V
V
IL
t
PHL
t
PLH
V
OH
2.4V
R
1544 F08
0.8V
V
OL
Figure 8. V.10, V.28 Receiver Propagation Delays
7
LTC1544
U
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APPLICATIONS INFORMATION
Overview
A complete DCE-to-DTE interface operating in EIA530
mode is shown in Figure 9. The LTC1543 of each port is
used to generate the clock and data signals. The LTC1544
isusedtogeneratethecontrolsignalsalongwithLL(Local
Loop-back).The LTC1344A cable termination chip is used
only for the clock and data signals because they must
supportV.35cabletermination. Thecontrolsignalsdonot
need any external resistors.
The LTC1543/LTC1544 form the core of a complete soft-
ware-selectable DTE or DCE interface port that supports
the RS232, RS449, EIA530, EIA530-A, V.35, V.36 or X.21
protocols. Cable termination may be implemented using
the LTC1344A software-selectable cable termination chip
or by using existing discrete designs.
DTE
DCE
SERIAL
CONTROLLER
LTC1344A
LTC1543
LTC1344A
LTC1543
SERIAL
CONTROLLER
D1
TXD
103Ω
R3
TXD
TXD
SCTE
103Ω
R2
R1
D2
D3
SCTE
SCTE
D3
D2
D1
TXC
RXC
RXD
R1
R2
R3
103Ω
103Ω
103Ω
TXC
RXC
RXD
TXC
RXC
RXD
LTC1544
R3
LTC1544
D1
RTS
DTR
RTS
DTR
RTS
DTR
D2
D3
R2
R1
D3
DCD
DSR
R1
R2
R3
DCD
DSR
DCD
DSR
D2
D1
CTS
LL
CTS
LL
CTS
LL
D4
R4
R4
D4
1544 F09
Figure 9. Complete Multiprotocol Interface in EIA530 Mode
8
LTC1544
U
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APPLICATIONS INFORMATION
Mode Selection
unconnected (1) or wired to ground (0) in the cable as
shown in Figure 10.
The interface protocol is selected using the mode select
pins M0, M1 and M2 (see the Mode Selection table).
The internal pull-up current sources will ensure a binary 1
when a pin is left unconnected and that the LTC1543/
LTC1544 and the LTC1344A enter the no-cable mode
when the cable is removed. In the no-cable mode the
LTC1543/LTC1544 supply current drops to less than
200µA and all LTC1543/LTC1544 driver outputs and
LTC1344A resistive terminations are forced into a high
impedance state.
For example, if the port is configured as a V.35 interface,
the mode selection pins should be M2 =1, M1=0, M0 = 0.
For the control signals, the drivers and receivers will
operateinV.28(RS232)electricalmode. Fortheclockand
data signals, the drivers and receivers will operate in V.35
electrical mode. The DCE/DTE pin will configure the port
for DCE mode when high, and DTE when low.
The mode selection may also be accomplished by using
jumpers to connect the mode pins to ground or VCC.
The interface protocol may be selected simply by plug-
ging the appropriate interface cable into the connector.
The mode pins are routed to the connector and are left
21
LATCH
LTC1344A
DCE/
DTE M2 M1 M0 (DATA)
22 23 24
1
CONNECTOR
(DATA)
M0
11
12
13
14
LTC1543
M1
M2
NC
DCE/DTE
NC
CABLE
LTC1544
14
13
12
11
DCE/DTE
M2
M1
M0
1544 F10
(DATA)
Figure 10: Single Port DCE V.35 Mode Selection in the Cable
9
LTC1544
U
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APPLICATIONS INFORMATION
The V.10 receiver configuration in the LTC1544 is shown
in Figure 13. In V.10 mode switch S3 inside the LTC1544
isturnedoff.Thenoninvertinginputisdisconnectedinside
the LTC1544 receiver and connected to ground. The cable
termination is then the 30k input impedance to ground of
the LTC1544 V.10 receiver.
Cable Termination
Traditional implementations have included switching
resistors with expensive relays, or requiring the user to
change termination modules every time the interface
standard has changed. Custom cables have been used
withtheterminationinthecableheadorseparatetermina-
tions are built on the board and a custom cable routes the
signals to the appropriate termination. Switching the
terminations with FETs is difficult because the FETs must
remain off even though the signal voltage is beyond the
supply voltage for the FET drivers or the power is off.
I
Z
3.25mA
Using the LTC1344A along with the LTC1543/LTC1544
solves the cable termination switching problem. Via soft-
ware control, the LTC1344A provides termination for the
V.10 (RS423), V.11 (RS422), V.28 (RS232) and V.35
electrical protocols.
–10V
–3V
V
Z
3V
10V
V.10 (RS423) Interface
1544 F12
–3.25mA
A typical V.10 unbalanced interface is shown in Figure 11.
A V.10 single-ended generator output A with ground C is
connected to a differential receiver with inputs A
' con-
nected to A, and input C connected to the signal return
'
Figure 12. V.10 Receiver Input Impedance
ground C. Usually, no cable termination is required for
V.10 interfaces, but the receiver inputs must be compliant
with the impedance curve shown in Figure 12.
A
'
A
LTC1544
R5
20k
BALANCED
R8
6k
INTERCONNECTING
CABLE
LOAD
GENERATOR
R6
10k
RECEIVER
CABLE
TERMINATION
S3
RECEIVER
A
A'
R7
10k
R4
20k
B
'
B
1544 F11
1544 F13
C
'
C
C'
GND
Figure 13. V.10 Receiver Configuration
Figure 11. Typical V.10 Interface
10
LTC1544
U
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APPLICATIONS INFORMATION
V.11 (RS422) Interface
V.28 (RS232) Interface
A typical V.11 balanced interface is shown in Figure 14. A A typical V.28 unbalanced interface is shown in Figure 16.
V.11 differential generator with outputs A and B with A V.28 single-ended generator output A with ground C is
ground C is connected to a differential receiver with connected to a single-ended receiver with input A
'
con-
groundC',inputsA'connectedtoA,B'connectedtoB.The nected to A, ground C' connected via the signal return
V.11 interface has a differential termination at the receiver ground C.
end that has a minimum value of 100Ω. The termination
In V.28 mode all switches are off except S3 inside the
LTC1543/LTC1544 which connects a 6k (R8) impedance
to ground in parallel with 20k (R5) plus 10k (R6) for a
combined impedance of 5k as shown in Figure 17. The
noninverting input is disconnected inside the LTC1543/
LTC1544 receiver and connected to a TTL level reference
resistor is optional in the V.11 specification, but for the
highspeedclockanddatalines,theterminationisrequired
to prevent reflections from corrupting the data. The
receiver inputs must also be compliant with the imped-
ance curve shown in Figure 12.
In V.11 mode, all switches are off except S1 inside the voltage for a 1.4V receiver trip point.
LTC1344A which connects a 103Ω differential termina-
tion impedance to the cable as shown in Figure 15.
BALANCED
INTERCONNECTING
CABLE
BALANCED
INTERCONNECTING
CABLE
LOAD
GENERATOR
LOAD
GENERATOR
CABLE
TERMINATION
CABLE
TERMINATION
RECEIVER
RECEIVER
A
A'
A
A'
100Ω
MIN
B
C
B'
C'
1544 F16
C
C'
1544 F14
Figure 14. Typical V.11 Interface
Figure 16. Typical V.28 Interface
A'
A'
A
A
LTC1543
LTC1544
LTC1543
LTC1544
LTC1344A
R5
LTC1344A
R5
20k
R1
51.5Ω
R1
R8
R8
6k
20k
51.5Ω
6k
R6
10k
R6
10k
RECEIVER
RECEIVER
S3
S1
S2
S1
S2
S3
R3
124Ω
R3
124Ω
R7
10k
R7
10k
R2
51.5Ω
R2
51.5Ω
R4
20k
R4
20k
B
B
B
'
B'
GND
GND
C
'
C'
1544 F15
1544 F17
Figure 15. V.11 Receiver Configuration
Figure 17. V.28 Receiver Configuration
11
LTC1544
U
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APPLICATIONS INFORMATION
V.35 Interface
100Ω ±10Ω, and the impedance between shorted termi-
nals (A and B ) and ground C must be 150Ω ±15Ω.
'
'
'
A typical V.35 balanced interface is shown in Figure 18. A
V.35 differential generator with outputs A and B with
ground C is connected to a differential receiver with
InV.35mode,bothswitchesS1andS2insidetheLTC1344A
are on, connecting the T network impedance as shown in
Figure 19. The switch in the LTC1543 is off. The 30k input
impedance of the receiver is placed in parallel with the T
network termination, but does not affect the overall input
impedance significantly.
groundC',inputsA'connectedtoA,B'connectedtoB.The
V.35 interface requires a T or delta network termination at
the receiver end and the generator end. The receiver
differentialimpedancemeasuredattheconnectormustbe
BALANCED
INTERCONNECTING
CABLE
GENERATOR
LOAD
CABLE
TERMINATION
RECEIVER
A'
A
50Ω
50Ω
125Ω
125Ω
50Ω
50Ω
B
'
B
C
C'
1544 F18
Figure 18. Typical V.35 Interface
A
'
A
LTC1543
LTC1344A
R5
20k
R1
51.5Ω
R8
6k
R6
10k
RECEIVER
S1
S2
S3
R3
124Ω
R7
10k
R2
51.5Ω
R4
20k
B
B'
GND
1544 F19
C'
Figure 19. V.35 Receiver Configuration
12
LTC1544
U
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APPLICATIONS INFORMATION
The generator differential impedance must be 50Ω to
150Ω and the impedance between shorted terminals (A
and B) and ground C must be 150Ω ±15Ω. For the
generatortermination,switchesS1andS2arebothonand
the top side of the center resistor is brought out to a pin so
it can be bypassed with an external capacitor to reduce
common mode noise as shown in Figure 20.
Charge Pump
The LTC1543 uses an internal capacitive charge pump to
generate VDD and VEE as shown in Figure 21. A voltage
doubler generates about 8V on VDD and a voltage inverter
generates about –7.5V for VEE. Four 1µF surface mounted
tantalum or ceramic capacitors are required for C1, C2, C3
and C4. The VEE capacitor C5 should be a minimum of
3.3µF.Allcapacitorsare16Vandshouldbeplacedasclose
as possible to the LTC1543 to reduce EMI.
A
LTC1344A
51.5Ω
3
2
1
4
28
27
26
25
S1
+
–
V
C2
C2
DD
+
V.35 DRIVER
S2
ON
C2
C3
1µF
124Ω
ON
1µF
C1
C1
V
C1
LTC1543
51.5Ω
1µF
–
V
EE
B
C5
3.3µF
+
C1
100pF
GND
5V
CC
C
C4
1µF
1544 F20
1544 F21
Figure 20. V.35 Driver Using the LTC1344A
Figure 21. Charge Pump
Any mismatch in the driver rise and fall times or skew in
the driver propagation delays will force current through
the center termination resistor to ground, causing a high
frequency common mode spike on the A and B terminals.
ThecommonmodespikecancauseEMIproblemsthatare
reduced by capacitor C1 which shunts much of the com-
mon mode energy to ground rather than down the cable.
Receiver Fail-Safe
All LTC1543/LTC1544 receivers feature fail-safe opera-
tion in all modes. If the receiver inputs are left floating or
shorted together by a termination resistor, the receiver
output will always be forced to a logic high.
DTE vs DCE Operation
No-Cable Mode
The DCE/DTE pin acts as an enable for Driver 3/Receiver
1 in the LTC1543, and Driver 3/Receiver 1 and Driver 4/
Receiver4intheLTC1544.TheINVERTpinintheLTC1544
allowstheDriver4/Receiver4enabletobehighorlowtrue
polarity.
The no-cable mode (M0 = M1 = M2 = 1) is intended for the
case when the cable is disconnected from the connector.
The charge pump, bias circuitry, drivers and receivers are
turned off, the driver outputs are forced into a high
impedancestate, andthesupplycurrentdropstolessthan
200µA.
13
LTC1544
U
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APPLICATIONS INFORMATION
The LTC1543/LTC1544 can be configured for either DTE
or DCE operation in one of two ways: a dedicated DTE or
DCE port with a connector of appropriate gender or a port
with one connector that can be configured for DTE or DCE
operationbyreroutingthesignalstotheLTC1543/LTC1544
using a dedicated DTE cable or dedicated DCE cable.
Cable-Selectable Multiprotocol Interface
A cable-selectable multiprotocol DTE/DCE interface is
shown in Figure 26. The select lines M0, M1 and DCE/DTE
are brought out to the connector. The mode is selected by
the cable by wiring M0 (connector Pin 18) and M1 (con-
nector Pin 21) and DCE/DTE (connector Pin 25) to ground
(connector Pin 7) or letting them float. If M0, M1 or DCE/
DTE is floating, internal pull-up current sources will pull
the signals to VCC. The select bit M2 is hard wired to VCC.
When the cable is pulled out, the interface will go into the
no-cable mode.
A dedicated DTE port using a DB-25 male connector is
showninFigure22.Theinterfacemodeisselectedbylogic
outputs from the controller or from jumpers to either VCC
or GND on the mode select pins. A dedicated DCE port
using a DB-25 female connector is shown in Figure 23.
A port with one DB-25 connector, but can be configured
for either DTE or DCE operation is shown in Figure 24. The
configuration requires separate cables for proper signal
routing in DTE or DCE operation. For example, in DTE
mode, the TXD signal is routed to Pins 2 and 14 via Driver
1 in the LTC1543. In DCE mode, Driver 1 now routes the
RXD signal to Pins 2 and 14.
Compliance Testing
A European standard EN 45001 test report is available for
the LTC1543/LTC1544/LTC1344A chipset. A copy of the
test report is available from LTC or TUV Telecom Services
Inc. (formerly Detecon Inc.)
The title of the report is:
Test Report No. NET2/102201/97.
The address of TUV Telecom Services Inc. is:
Multiprotocol Interface with RL, LL, TM and a DB-25
Connector
IftheRL,LLandTMsignalsareimplemented,therearenot
enough drivers and receivers available in the LTC1543/
LTC1544. In Figure 25, the required control signals are
handled by the LTC1544 but the clock/data signals use the
LTC1343. The LTC1343 has an additional single-ended
driver/receiver pair that can handle two more optional
control signals such as TM and LL.
TUV Telecom Services Inc.
Type Approval Division
1775 Old Highway 8, Ste 107
St. Paul, MN 55112 USA
Tel. +1 (612) 639-0775
Fax. +1 (612) 639-0873
14
LTC1544
U
TYPICAL APPLICATIO S
C6
C7
C8
100pF 100pF 100pF
3
8
11 12 13
LTC1344A
V
CC
5V
14
21
V
LATCH
CC
C13
1µF
3
1
28
C2
C3
1µF
1µF
27
26
C1
1µF
2
CHARGE
PUMP
V
EE
2
4
C4
C12
+
3.3µF
1µF
25
5
4
6
7
9
10
16 15 18 17 19 20 22 23 24 1
C5
1µF
LTC1543
D1
2
24
TXD A (103)
TXD B
5
6
7
TXD
23
22
14
24
SCTE A (113)
SCTE B
SCTE
D2
D3
11
21
20
19
18
17
16
15
15
12
TXC A (114)
TXC B
8
9
R1
R2
R3
TXC
RXC
RXD
17
9
RXC A (115)
RXC B
3
16
7
RXD A (104)
RXD B
10
11
12
13
14
M0
M1
M2
SG
1
SHIELD
DCE/DTE
DB-25 MALE
CONNECTOR
V
CC
C10
1µF
C9
1µF
28
27
1
2
V
V
CC
EE
C11
1µF
V
GND
DD
26
4
RTS A (105)
RTS B
3
4
5
RTS
D1
D2
D3
25
24
23
19
20
23
DTR A (108)
DTR B
DTR
LTC1544
22
21
20
19
8
10
6
6
7
8
DCD A (109)
DCD B
R1
R2
R3
R4
DCD
DSR
CTS
LL
DSR A (107)
22
DSR B
5
18
17
CTS A (106)
CTS B
13
10
9
16
18
LL A (141)
D4
11
12
13
14
15
NC
M0
M1
M2
INVERT
DCE/DTE
M2
M1
M0
1544 F22
Figure 22. Controller-Selectable Multiprotocol DTE Port with DB-25 Connector
15
LTC1544
TYPICAL APPLICATIO S
U
C6
C7
C8
100pF 100pF 100pF
3
8
11 12 13
LTC1344A
V
CC
5V
21
14
LATCH
V
CC
C13
1µF
3
1
28
C2
C3
1µF
1µF
27
26
C1
1µF
2
CHARGE
PUMP
V
EE
2
4
C4
C12
+
3.3µF
1µF
25
5
4
6
7
9
10
16 15 18 17 19 20 22 23 24 1
C5
1µF
LTC1543
D1
V
CC
3
24
RXD A (104)
RXD B
5
6
7
RXD
RXC
23
22
16
17
RXC A (115)
RXC B
D2
D3
9
21
20
19
18
17
16
15
15
12
TXC A (114)
TXC B
8
9
R1
R2
R3
TXC
SCTE
TXD
24
11
SCTE A (113)
SCTE B
2
14
7
TXD A (103)
TXD B
10
11
12
13
14
M0
M1
M2
SGND (102)
1
SHIELD (101)
DCE/DTE
NC
DB-25 FEMALE
CONNECTOR
V
CC
C10
1µF
C9
1µF
28
27
1
2
V
V
CC
EE
C11
1µF
V
GND
DD
26
5
CTS A (106)
CTS B
3
4
5
CTS
D1
D2
D3
25
24
23
13
6
DSR A (107)
DSR B
22
DSR
LTC1544
22
21
20
19
8
10
20
23
6
7
8
DCD A (109)
DCD B
R1
R2
R3
R4
DCD
DTR
RTS
LL
DTR A (108)
DTR B
4
18
17
RTS A (105)
RTS B
19
10
9
16
18
LL A (141)
D4
11
12
13
14
15
NC
M0
M1
M2
INVERT
NC
DCE/DTE
M2
M1
M0
1544 F23
Figure 23. Controller-Selectable DCE Port with DB-25 Connector
16
LTC1544
U
C6
C7
C8
TYPICAL APPLICATIO S
100pF 100pF 100pF
3
8
11 12 13
LTC1344A
V
CC
5V
14
21
V
CC
LATCH
C13
1µF
3
1
28
C2
C3
1µF
1µF
27
26
C1
1µF
2
CHARGE
PUMP
V
EE
2
4
C4
C12
+
3.3µF
1µF
25
5
4
6
7
9
10
16 15 18 17 19 20 22 23 24 1
C5
1µF
DTE
DCE
LTC1543
D1
2
24
TXD A
RXD A
5
6
7
DTE_TXD/DCE_RXD
DTE_SCTE/DCE_RXC
23
22
14
24
TXD B
RXD B
RXC A
RXC B
SCTE A
SCTE B
D2
D3
11
21
20
19
18
17
16
15
15
12
TXC A
TXC B
RXC A
RXC B
RXD A
RXD B
TXC A
TXC B
SCTE A
SCTE B
TXD A
TXD B
8
9
R1
R2
R3
DTE_TXC/DCE_TXC
DTE_RXC/DCE_SCTE
DTE_RXD/DCE_TXD
17
9
3
16
7
10
11
M0
M1
M2
12
13
14
SG
1
SHIELD
DCE/DTE
DB-25
CONNECTOR
V
1
2
CC
C10
1µF
C9
1µF
28
27
V
V
CC
EE
C11
1µF
V
DD
GND
26
4
RTS A
CTS A
CTS B
DSR A
DSR B
3
4
5
D1
D2
D3
DTE_RTS/DCE_CTS
DTE_DTR/DCE_DSR
25
24
23
19
20
23
RTS B
DTR A
DTR B
LTC1544
22
21
20
19
8
10
6
6
7
8
DCD A
DCD B
DSR A
DCD A
DCD B
DTR A
R1
R2
R3
R4
DTE_DCD/DCE_DCD
DTE_DSR/DCE_DTR
DTE_CTS/DCE_RTS
DTE_LL/DCE_LL
22
DSR B
CTS A
CTS B
DTR B
RTS A
RTS B
5
18
17
13
10
9
16
18
LL A
LL A
D4
11
12
13
14
15
NC
M0
M1
M2
INVERT
DCE/DTE
DCE/DTE
M2
M1
M0
1544 F24
Figure 24. Controller-Selectable Multiprotocol DTE/DCE Port with DB-25 Connector
17
LTC1544
TYPICAL APPLICATIO S
U
C6
C7
C8
100pF 100pF 100pF
3
8
11 12 13
LTC1344A
V
CC
5V
21
14
LATCH
V
CC
C13
1µF
1
2
44
C2
C3
1µF
43
42
1µF
C1
1µF
2
CHARGE
PUMP
V
EE
4
3
C4
C12
+
3.3µF
1µF
41
5
4
6
7
9
10
16 15 18 17 19 20 22 23 24 1
C5
1µF
8
5
LTC1343
D1
DTE
DCE
18
2
39
DTE_LL/DCE_TM
DTE_TXD/DCE_RXD
DTE_SCTE/DCE_RXC
LL A
TM A
38
37
36
35
34
33
TXD A
TXD B
SCTE A
SCTE B
RXD A
RXD B
RXC A
RXC B
6
7
D2
D3
D4
14
24
11
9
10
12
13
15
12
32
31
TXC A
TXC B
SCTE A
SCTE B
TXD A
TXD B
TXC A
TXC B
RXC A
RXC B
RXD A
RXD B
R1
R2
R3
R4
DTE_TXC/DCE_TXC
DTE_RXC/DCE_SCTE
DTE_RXD/DCE_TXD
DTE_TM/DCE_LL
30
29
17
9
14
15
28
27
3
16
26
25
7
16
TM A
SG
LL A
20
22
11
25
21
19
18
17
CTRL
DCE
M2
M1
M0
LATCH
INVERT
423SET
1
SHIELD
R1
100k
V
CC
24
40
GND
EC
LB
23
DB-25
CONNECTOR
LB
V
CC
C9
1µF
C10
1µF
28
27
1
2
V
V
V
CC
EE
C11
1µF
GND
DD
26
4
RTS A
RTS B
DTR A
DTR B
CTS A
3
4
D1
D2
D3
DTE_RTS/DCE_CTS
DTE_DTR/DCE_DSR
25
24
23
19
20
23
CTS B
DSR A
DSR B
5
LTC1544
R1
22
21
20
19
8
10
6
6
7
8
DCD A
DCD B
DSR A
DCD A
DCD B
DTR A
DTE_DCD/DCE_DCD
DTE_DSR/DCE_DTR
DTE_CTS/DCE_RTS
DTE_RL/DCE_RL
R2
R3
22
DSR B
CTS A
CTS B
DTR B
RTS A
RTS B
5
18
17
13
10
9
16
21
R4
D4
RL A
RL A
15
11
12
13
14
INVERT
M0
NC
M1
M2
DCE/DTE
DCE/DTE
M2
1544 F25
M1
M0
Figure 25. Controller-Selectable Multiprotocol DTE/DCE Port with RL, LL, TM and DB-25 Connector
18
LTC1544
U
TYPICAL APPLICATIO S
C6
C7
C8
100pF 100pF 100pF
3
8
11 12 13
LTC1344A
V
CC
5V
14
21
V
CC
LATCH
C13
1µF
3
1
28
C2
C3
1µF
1µF
27
26
C1
1µF
2
CHARGE
PUMP
V
EE
2
4
C4
C12
+
3.3µF
1µF
25
5
4
6
7
9
10
16 15 18 17 19 20 22 23 24 1
C5
1µF
DTE
DCE
LTC1543
D1
V
CC
2
24
TXD A
TXD B
RXD A
RXD B
5
6
DTE_TXD/DCE_RXD
DTE_SCTE/DCE_RXC
23
22
14
24
SCTE A RXC A
SCTE B RXC B
D2
11
21
7
8
D3
R1
20
19
18
17
16
15
15
12
TXC A
TXC B
RXC A
RXC B
RXD A
RXD B
TXC A
TXC B
SCTE A
SCTE B
TXD A
TXD B
DTE_TXC/DCE_TXC
DTE_RXC/DCE_SCTE
DTE_RXD/DCE_TXD
17
9
9
R2
R3
3
10
11
12
13
14
16
7
M0
M1
M2
SG
NC
1
SHIELD
DCE/DTE
DB-25
CONNECTOR
V
CC
C9
1µF
25
21
18
C10
1µF
28
27
DCE/DTE
1
2
V
V
CC
EE
C11
1µF
M1
M0
V
DD
GND
26
4
RTS A
RTS B
DTR A
DTR B
CTS A
CTS B
DSR A
DSR B
3
4
5
D1
D2
D3
DTE_RTS/DCE_CTS
DTE_DTR/DCE_DSR
25
24
23
19
20
23
LTC1544
22
21
20
19
8
10
6
6
7
8
DCD A
DCD B
DSR A
DCD A
DCD B
DTR A
R1
R2
R3
R4
DTE_DCD/DCE_DCD
DTE_DSR/DCE_DTR
DTE_CTS/DCE_RTS
22
DSR B
CTS A
CTS B
DTR B
RTS A
RTS B
5
18
17
13
10
9
16
CABLE WIRING FOR MODE SELECTION
CABLE WIRING FOR
DTE/DCE SELECTION
D4
MODE
V.35
PIN 18
PIN 7
NC
PIN 21
PIN 7
PIN 7
NC
MODE
DTE
PIN 25
PIN 7
NC
11
12
13
14
M0
M1
M2
RS449, V.36
RS232
DCE
PIN 7
NC
15
NC
INVERT
DCE/DTE
1544 F26
Figure 26. Cable-Selectable Multiprotocol DTE/DCE Port with DB-25 Connector
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tationthattheinterconnectionofitscircuitsasdescribedhereinwillnotinfringeonexistingpatentrights.
19
LTC1544
U
PACKAGE DESCRIPTIO
Dimensions in inches (millimeters) unless otherwise noted.
G Package
28-Lead Plastic SSOP (0.209)
(LTC DWG # 05-08-1640)
10.07 – 10.33*
(0.397 – 0.407)
28 27 26 25 24 23 22 21 20 19 18
16 15
17
7.65 – 7.90
(0.301 – 0.311)
5
7
8
1
2
3
4
6
9 10 11 12 13 14
5.20 – 5.38**
(0.205 – 0.212)
1.73 – 1.99
(0.068 – 0.078)
0° – 8°
0.65
(0.0256)
BSC
0.13 – 0.22
0.55 – 0.95
(0.005 – 0.009)
(0.022 – 0.037)
0.05 – 0.21
(0.002 – 0.008)
0.25 – 0.38
(0.010 – 0.015)
NOTE: DIMENSIONS ARE IN MILLIMETERS
*DIMENSIONS DO NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED 0.152mm (0.006") PER SIDE
**DIMENSIONS DO NOT INCLUDE INTERLEAD FLASH. INTERLEAD
FLASH SHALL NOT EXCEED 0.254mm (0.010") PER SIDE
G28 SSOP 1098
RELATED PARTS
PART NUMBER
DESCRIPTION
COMMENTS
LTC1321
Dual RS232/RS485 Transceiver
Two RS232 Driver/Receiver Pairs or Two RS485 Driver/Receiver Pairs
Two RS232 Driver/Receiver or Four RS232 Driver/Receiver Pairs
4-Driver/4-Receiver for Data and Clock Signals
LTC1334
Single 5V RS232/RS485 Multiprotocol Transceiver
Software-Selectable Multiprotocol Transceiver
Software-Selectable Cable Terminator
Single Supply V.35 Transceiver
LTC1343
LTC1344A
LTC1345
Perfect for Terminating the LTC1543
3-Driver/3-Receiver for Data and Clock Signals
LTC1346A
LTC1543
Dual Supply V.35 Transceiver
3-Driver/3-Receiver for Data and Clock Signals
Software-Selectable Multiprotocol Transceiver
Multiprotocol Transceiver with Termination
Companion to LTC1544 for Data and Clock Signals
Companion to LTC1544 for Data and Clock Signals
LTC1546
1544fa LT/TP 0100 2K REV A • PRINTED IN USA
LINEAR TECHNOLOGY CORPORATION 1998
LinearTechnology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
20
●
●
(408)432-1900 FAX:(408)434-0507 www.linear-tech.com
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