LT8311EFE#TRPBF_技术文档

LT8311

Synchronous Rectifier

Controller with Opto-Coupler

Driver for Forward Converters

DESCRIPTION

FEATURES

The LT^®8311 is used on the secondary side of a forward

converter to provide synchronous MOSFET control and

output voltage feedback through an opto-coupler. The

LT8311’s unique preactive mode allows control of the

secondary-side MOSFETs without requiring a traditional

pulse transformer for primary- to secondary-side com-

munication.Inpreactivemode,theoutputinductorcurrent

operates in discontinuous conduction mode (DCM) at

light load. If forced continuous mode (FCM) operation is

desiredatlightload,theLT8311can,alternatively,beused

in SYNC mode, where a pulse transformer is required to

send synchronous control signals from the primary-side

IC to the LT8311.

n

Wide Input Supply Range: 3.7V to 30V

n

Preactive Mode:

n

No Pulse Transformer Required

n

DCM Operation at Light Load

n

SYNC Mode:

n

FCM or DCM Operation at Light Load

Achieves Highest Efficiency

n

1.5% Feedback Voltage Reference

10mA Opto-Coupler Driver

Output Power Good Indicator

n

Integrated Soft-Start Function

APPLICATIONS

n

Offline and HV Car Battery Isolated Power Supplies

The LT8311 offers a full featured opto-coupler controller,

incorporating a 1.5% reference, a transconductance error

amplifieranda10mAopto-driver. Powergoodmonitoring

and output soft-start/overshoot control are also included.

The LT8311 is available in a 16-lead FE package with pins

removed for high voltage spacing requirements.

n

48V Isolated Power Supplies

n

Industrial, Automotive and Military Systems

L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear

Technology Corporation. All other trademarks are the property of their respective owners.

TYPICAL APPLICATION

18V to 72V, 12V/8A Active Clamp Isolated Forward Converter

4:4

6.8µH

V

OUT

IN

18V to

72V

12V

+

4.7µF

× 3

68pF

22µF

× 2

20k

•

100k

470µF

V

IN

2.2µF

100V

UVLO_VSEC

OVLO

100nF

2.2nF

100k

2k

5.9k

100nF

FSW

FG

AOUT

OUT

FB

2k

11.3k

1.82k

CSW

LT3753

10k

LT8311

1.78k

CSP

CG

IVSEC

RT

SYNC

V

IN

V

OUT

240kHz

2k

71.5k

100k

1.78k

1.5k

ISENSEP

OC

31.6k

CSN

PGOOD

INTV

S

OUT

6mΩ

OPTO

COMP

SYNC

SS

CC

TAO

ISENSEN

4.7µF

TAS

TOS

TBLNK

GND SS1

PMODE

TIMER GND

15nF

49.9k

INTV

CC

COMP

SS2 FB

2.2µF

100Ω

4.7µF

100k

124k

1µF

2.94k

10pF

1µF

0.47µF

34k

1µF

8311 TA01

1k

2.2nF

8311f

1

For more information www.linear.com/LT8311

LT8311

TABLE OF CONTENTS

Features............................................................................................................................ 1

Applications ....................................................................................................................... 1

Typical Application ............................................................................................................... 1

Description......................................................................................................................... 1

Absolute Maximum Ratings..................................................................................................... 3

Order Information................................................................................................................. 3

Pin Configuration ................................................................................................................. 3

Electrical Characteristics........................................................................................................ 4

Typical Performance Characteristics .......................................................................................... 7

Pin Functions.....................................................................................................................11

Block Diagram....................................................................................................................12

Operation..........................................................................................................................13

FUNDAMENTALS OF FORWARD CONVERTER OPERATION IN CCM..................................................................... 13

LT8311 SYNCHRONOUS CONTROL SCHEMES..................................................................................................... 17

PREACTIVE MODE SYNCHRONOUS CONTROL.................................................................................................... 17

SYNC MODE SYNCHRONOUS CONTROL ............................................................................................................. 19

OPTO-COUPLER CONTROL .................................................................................................................................. 21

Applications Information .......................................................................................................25

V BIAS SUPPLY.................................................................................................................................................. 25

IN

INTV BIAS SUPPLY............................................................................................................................................ 26

CC

LT8311 OPTO CONTROL FUNDAMENTALS........................................................................................................... 27

LT8311 SYNCHRONOUS CONTROL FUNDAMENTALS.......................................................................................... 31

PREACTIVE MODE SYNCHRONOUS CONTROL ................................................................................................... 37

SYNC MODE SYNCHRONOUS CONTROL ............................................................................................................ 38

Typical Applications.............................................................................................................40

Package Description ............................................................................................................47

Typical Application ..............................................................................................................48

Related Parts.....................................................................................................................48

8311f

2

For more information www.linear.com/LT8311

LT8311

ABSOLUTE MAXIMUM RATINGS

PIN CONFIGURATION

(Note 1)

TOP VIEW

CSW, FSW, CSP ....................................... –0.3V to 150V

SYNC ...........................................................–12V to 12V

IN

CSW

FSW

FG

1

3

20

18

CSP

CSN

V , PGOOD................................................ –0.3V to 30V

INTV , PMODE......................................... –0.3V to 18V

CC

FB, SS, COMP ........................................... –0.3V to 2.5V

TIMER....................................................... –0.3V to 1.5V

CSN........................................................... –0.3V to 0.4V

OPTO, TIMER Short-Circuit

5

6

7

8

9

16

15

14

13

12

11

CG

21

GND

INTV

SYNC

SS

CC

V

IN

PMODE

PGOOD

TIMER

FB

Current Duration .................................... Infinite (Note 5)

Operating Junction Temperature Range

OPTO

COMP 10

LT8311E (Notes 2, 3) ......................... –40°C to 125°C

LT8311I (Notes 2, 3) .......................... –40°C to 125°C

LT8311H (Notes 2, 3)......................... –40°C to 150°C

LT8311MP (Notes 2, 3) ...................... –55°C to 150°C

Storage Temperature Range .................. –65°C to 150°C

Lead Temperature (Soldering, 10sec)....................300°C

FE PACKAGE

20-LEAD PLASTIC TSSOP

θ

= 38°C/W, θ = 10°C/W

JC

EXPOSED PAD (PIN 21) IS GND, MUST BE SOLDERED TO PCB

JA

ORDER INFORMATION

LEAD FREE FINISH

LT8311EFE#PBF

LT8311IFE#PBF

LT8311HFE#PBF

LT8311MPFE#PBF

TAPE AND REEL

PART MARKING*

LT8311FE

PACKAGE DESCRIPTION

TEMPERATURE RANGE

LT8311EFE#TRPBF

LT8311IFE#TRPBF

LT8311HFE#TRPBF

LT8311MPFE#TRPBF

20-Lead Plastic TSSOP

–40°C to 125°C

–40°C to 150°C

–55°C to 150°C

LT8311FE

Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.

For more information on lead free part marking, go to: http://www.linear.com/leadfree/

For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/

8311f

3

For more information www.linear.com/LT8311

LT8311

ELECTRICAL CHARACTERISTICS ^Thel denotes the specifications which apply over the full operating

temperature range, otherwise specifications are at T_A= 25°C, V_IN= 12V, V_INTVCC= 8V, PMODE = 5V, C_CG= C_FG= 100pF, unless

otherwise noted. (Note 2)

PARAMETER

Supply

CONDITIONS

MIN

TYP

MAX

UNITS

l

V

IN

V

IN

Operating Range

UVLO

3.7

50

30

V

Rising

3.6

100

3.7

150

V

mV

IN

Hysteresis

Quiescent Current

Not Switching

4.5

5.5

mA

Error Amplifier

l

Feedback Reference Voltage

Feedback Voltage Line Regulation

Feedback Voltage Load Regulation

Feedback Pin Bias Current

Error Amplifier Transconductance

Error Amplifier Voltage Gain

Error Amplifier Output Swing High

Error Amplifier Output Swing Low

Power Good

V

= 12V

1.209

1.227

0.015

0.05

120

370

65

1.245

0.1

V

IN

3.7V ≤ V ≤ 30V, % of FB Ref Voltage

%

IN

1.3V ≤ COMP ≤ 1.8V, % of FB Ref Voltage

Current Out of FB pin

1.3V ≤ COMP ≤ 1.8V

FB = 1V

0.1

%

nA

200

µmhos

dB

1.9

2.3

2.8

V

FB = 1.5V

0.75

1

1.25

V

Power NOT Good (Outside This Window) % Relative to FB Ref Voltage

4

10

7

16

%

µs

Power Good (Inside This Window)

Power Good Indicator Wait Time

% Relative to FB Ref Voltage

Minimum Time That FB Must Stay within Power Good Window

Before PGOOD Pin Goes Low

175

Power Good Leakage

PGOOD = 30V

1

µA

V

l

Power Good Output Low Voltage

Soft-Start (SS)

Current into PGOOD Pin = 1mA

0.2

0.3

SS Wake-Up Slew Current

Current Exists Upon Part Wake Up, Shuts Off After SS Wake Up

Offset Voltage Is Satisfied (Note 6)

1

mA

mV

SS Wake-Up Offset Voltage

V

FB

– V , Upon Part Wake Up SS Is Slewed Up to an Offset

16

SS

Voltage Below FB by SS Wake-Up Slew Current

l

SS Charge Current

SS = 0V, FB = 0.6V (Note 9)

9

10

11

µA

SS Pull-Down Amplifier Offset Voltage

V

– V , Pull-Down Amplifier Prevents SS from Rising Beyond

100

mV

SS

FB

This Offset Voltage Above FB When the FB Pin Voltage Is Below

50% of the FB Reference Voltage

SS Pull-Down Amplifier Maximum

Sink Current

SS = 1.5V, FB = 0.6V (Note 7)

13

2

mA

V

SS High Clamp Voltage

Opto Driver

1.8

COMP Buffer Input Offset Voltage

Opto-Driver Reference Voltage

Opto-Driver DC Gain

1.3V ≤ COMP (Note 5)

(Note 5)

0.9

1

V

(Note 5)

–7

V/V

8311f

4

For more information www.linear.com/LT8311

LT8311

ELECTRICAL CHARACTERISTICS ^Thel denotes the specifications which apply over the full operating

temperature range, otherwise specifications are at T_A= 25°C, V_IN= 12V, V_INTVCC= 8V, PMODE = 5V, C_CG= C_FG= 100pF, unless

otherwise noted. (Note 2)

PARAMETER

CONDITIONS

MIN

TYP

–5

MAX

UNITS

V/V

kHz

V

Inverting DC Gain From COMP Pin to

OPTO Pin

(∆V

/∆V

), 1.290V ≤ COMP ≤ 1.310V

), 1.490V ≤ COMP ≤ 1.510V

), 1.890V ≤ COMP ≤ 1.910V

OPTO

COMP

–5.9

–6.2

400

0.5

Opto-Driver –3dB Bandwidth

Opto-Driver Output Swing Low

Opto-Driver Output Swing High

No Load (Note 5)

FB = 1V, COMP = SS = OPTO = Open

l

0.85

V

IN

V

IN

V

IN

= 3.7V, FB = 1.5V, COMP = SS = Open, I

= 10mA

V

– 1.7 V – 1.4

V

OPTO

IN

= 30V, FB = 1.5V, COMP = SS = Open, I

5.2

10.5

6.5

15

V

OPTO

Opto-Driver Output Short-Circuit Current

Opto-Driver Output Sink Current

Internal Linear Regulator

= 30V, FB = 1.5V, COMP = SS = Open, OPTO = 0V (Note 6)

18

mA

µA

FB = 1V, OPTO = 1.2V (Note 7)

200

300

420

l

INTV Regulation Voltage

No Load

6.5

7

1.8

4.6

4.3

16.5

15

7.5

3

V

CC

INTV Load Regulation

(∆V

/∆I

), 0A ≤ I ≤ 20mA

INTVCC

mV/mA

CC

INTVCC

l

INTV UVLO Rising

4.8

V

CC

INTV UVLO Falling

4.1

CC

INTV OVLO Rising

17.5

58

V

CC

INTV OVLO Falling

14

38

V

CC

INTV Current Limit

INTV > I

(= 4.6V)

48

mA

mV

CC

INTVCC_UVLO_RISING

INTV < I

(= 4.3V)

20

CC

INTVCC_UVLO_FALLING

INTV Dropout Voltage

V

= 6V, I = 10mA, Not Switching

INTVCC

400

CC

IN

CG and FG Gate Drivers

Driver Output Rise Time

Driver Output Fall Time

Driver Output High Voltage

C

= C = 3.3nF, INTV = 8V (Note 4)

25

ns

V

CG

FG

CC

= C = 3.3nF, INTV = 8V (Note 4)

CG

FG

CC

l

V

INTVCC

– 0.2

Driver Output Low Voltage

PMODE Selection

0.7

V

l

PMODE Trip Voltage

PMODE Ramp Up

1

1.2

30

1.4

90

V

Hysteresis

mV

PMODE Input Current

PMODE = 18V

60

µA

Preactive Mode (Tie PMODE to 0V)

l

Preactive Mode Operating

Frequency Range

100

1

300

kHz

l

CSW High Trip Voltage

CSW High Input Current

CSW Low Trip Voltage

FSW Trip Voltage

CSW Ramp Up

1.2

250

–150

1.2

1.4

500

–50

1.4

V

µA

mV

V

CSW = 150V (Note 7)

CSW Ramp Down

–250

1

FSW High Input Current

FSW = 150V (Note 7)

250

100

500

300

µA

ns

CG Falling Edge to CSW Rising Edge

Prediction Delay

CSW = 150kHz (Note 10), FSW = 0V, CSP = –500mV

5

l

CG Falling Edge Delay to FG Rising Edge CSW = 150kHz (Note 10), FSW = 0V, CSP = –500mV

10

50

80

ns

8311f

5

For more information www.linear.com/LT8311

LT8311

ELECTRICAL CHARACTERISTICS ^Thel denotes the specifications which apply over the full operating

temperature range, otherwise specifications are at T_A= 25°C, V_IN= 12V, V_INTVCC= 8V, PMODE = 5V, C_CG= C_FG= 100pF, unless

otherwise noted. (Note 2)

PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

SYNC Mode (Tie PMODE to INTV

SYNC High Trip Voltage

)

CC

l

SYNC Ramp Up

Hysteresis

0.9

1.2

1.5

–0.9

100

V

–2.4

SYNC Low Trip Voltage

SYNC Minimum Pulse Width

SYNC Input Current

SYNC Ramp Down

Hysteresis

–1.5

–1.2

2.4

V

SYNC = 0V to 2V Pulse

SYNC = 0V to 6V Pulse (Note 5)

40

20

ns

–3.5V < SYNC < 3.5V

SYNC = 10V (Note 6, 7)

1

400

µA

l

300

SYNC Propagation Delay To CG/FG

Outputs

SYNC Rising Edge (0V to 2V) to CG Rising Edge (Note 8)

SYNC Rising Edge (0V to 6V) to CG Rising Edge (Notes 5, 8)

SYNC Falling Edge (0V to 2V) to FG Rising Edge (Note 8)

SYNC Falling Edge (0V to 6V) to FG Rising Edge (Notes 5, 8),

100

75

100

150

ns

l

150

C

CG

= C = 3.3nF

85

ns

FG

l

TIMER Timeout Frequency

R

TIMER

R

TIMER

R

TIMER

= 41.2k

= 71.5k

= 221k

425

255

80

505

300

100

585

345

120

kHz

l

TIMER Short-Circuit Current

Current Comparator

TIMER = 0V

40

60

µA

l

Current Comparator Trip Threshold

CSP Ramp Up, R

= R

= 0Ω

48

62

0

72

mV

ns

CSP

CSN

= 1.62kΩ (Note 5)

CSP

CSN

Current Comparator Blank Time in

Preactive Mode

From Rising CG Edge Until Blanking Ends (Note 5)

250

Current Comparator Blank Time in

SYNC Mode

From Rising CG Edge Until Blanking Ends

400

ns

l

CSP Current at Low CSP Voltage

CSP Current at High CSP Voltage

CSN Current

CSP = 0V (Note 6)

CSP = 150V (Note 7)

CSN = 0V (Note 6)

30

38

200

0.1

50

500

1

µA

Note 1: Stresses beyond those listed under Absolute Maximum Ratings

may cause permanent damage to the device. Exposure to any Absolute

Maximum Rating condition for extended periods may affect device

reliability and lifetime.

temperature will exceed the maximum operating junction temperature

when overtemperature is active. Continuous operating above the specified

maximum operating junction temperature may impair device reliability.

Note 4: Rise and fall times of are measured between 10% and 90% points

Note 2: The LT8311 is tested under pulsed load conditions such that

of a signal edge.

T ~ T . The LT8311E is guaranteed to meet specifications from 0°C to

J

A

Note 5: Guaranteed by design and/or correlation to static test.

Note 6: Current flows out of pin.

Note 7: Current flows into pin.

Note 8: Propagation delay is measured between 50% point of the two

signal edges of interest.

Note 9: SS charge current refers to current flowing out of SS pin after

certain conditions satisfied upon LT8311 wake-up (see the flowchart for

Opto-Control Operation at Start-Up in Figure 9).

125°C junction temperature. Specifications over the –40°C to 125°C

operating junction temperature are assured by design, characterization and

correlation with statistical process controls. The LT8311I is guaranteed

over the –40°C to 125°C operating junction temperature range. The

LT8311H is guaranteed over the –40°C to 150°C operating junction

temperature range, and the LT8311MP is guaranteed over the –55°C to

150°C operating junction temperature range. High junction temperatures

degrade operating lifetimes; operating lifetime is derated for junction

temperatures greater than 125°C.

Note 10: CSW is a square waveform (duty cycle = 50%) with V

= 7V

HIGH

and V

= –0.7V.

Note 3: The LT8311 includes overtemperature protection that is intended

LOW

to protect the device during momentary overload conditions. Junction

8311f

6

For more information www.linear.com/LT8311

LT8311

T_A= 25°C, unless otherwise noted.

TYPICAL PERFORMANCE CHARACTERISTICS

Delay from CG Turn-Off to CSW

Rising Edge vs CSW Switching

Frequency and Junction Temp

Jitter in CG Turn-Off Delay to CSW

Rising Edge vs CSW Switching

Frequency and Junction Temp

Delay from CG Turn-Off to

FG Turn-On

70

60

50

30

25

20

15

10

5

200

175

150

125

100

75

PMODE = 0V

INTV = 8V

CC

100kHz

150kHz

300kHz

150kHz

50

40

30

300kHz

25

0

–75 –50 –25

0

25 50 75 100 125 150

–75 –50 –25

0

25 50 75 100 125 150

–75 –50 –25

0

25 50 75 100 125 150

TEMPERATURE (°C)

8311 G01

8311 G03

8311 G02

Preactive Scheme Waveforms

(Active Clamp Reset, CCM)

Preactive Scheme Waveforms

(Active Clamp Reset, Light DCM)

Preactive Scheme Waveforms

(Active Clamp Reset, Deep DCM)

I

L

5A/DIV

I

L

5A/DIV

CSW

5A/DIV

CSW

5A/DIV

CSW

5A/DIV

CG

10V/DIV

CG

10V/DIV

CG

10V/DIV

FG

10V/DIV

FG

10V/DIV

FG

10V/DIV

8311 G04

8311 G05

8311 G06

2µs/DIV

Maximum CSW Duty Cycle Derating

Curve vs CSW Switching Frequency

and Junction Temperature

Feedback Reference Voltage

vs V_IN

Feedback Reference Voltage

90

85

80

75

70

65

60

55

50

PMODE = 0V

100kHz, 200kHz

300kHz

1.2360

1.2325

1.2290

1.2255

1.2220

1.2185

1.2150

1.2360

1.2325

1.2290

1.2255

1.2220

1.2185

1.2150

400kHz

3

6

9

12 15 18 21 24 27 30

–75 –50 –25

0

25 50 75 100 125 150

–75 –50 –25

0

25 50 75 100 125 150

V

(V)

TEMPERATURE (°C)

IN

8311 G09

8311 G07

8311 G08

8311f

7

For more information www.linear.com/LT8311

LT8311

T_A= 25°C, unless otherwise noted.

Power Good Window

TYPICAL PERFORMANCE CHARACTERISTICS

V_INQuiescent Current,

No Switching

Feedback Input Bias Current

150

133

115

16

5.5

5.0

4.5

PGOOD = 100kΩ to 12V

12

8

98

80

4

0

4.0

3.5

–75 –50 –25

0

25 50 75 100 125 150

1.00

1.10

1.20

1.30

1.40

–75 –50 –25

0

25 50 75 100 125 150

TEMPERATURE (°C)

FB VOLTAGE (V)

TEMPERATURE (°C)

8311 G10

8311 G12

8311 G11

SS Pull-Down Amplifier

Offset Voltage

SS Charge Current

Opto-Driver Output Swing Low

1000

750

11.0

10.5

10.0

150

125

100

500

250

0

9.5

9.0

75

50

–75 –50 –25

0

25 50 75 100 125 150

–75 –50 –25

0

25 50 75 100 125 150

–75 –50 –25

0

25 50 75 100 125 150

TEMPERATURE (°C)

8311 G15

8311 G13

8311 G14

Opto-Driver Output Swing High

vs Line Voltage

Opto-Driver Output Swing High

7.0

6.5

6.0

7

6

5

4

3

2

5.5

5.0

3

6

9

12 15 18 21 24 27 30

(V)

–75 –50 –25

0

25 50 75 100 125 150

V

TEMPERATURE (°C)

IN

8311 G17

8311 G16

8311f

8

For more information www.linear.com/LT8311

LT8311

T_A= 25°C, unless otherwise noted.

TYPICAL PERFORMANCE CHARACTERISTICS

Opto-Driver Short-Circuit Current

Opto-Driver Sink Current

INTV_CCRegulation Voltage

20

15

10

5

8

7

6

5

4

3

400

350

300

250

200

–75 –50 –25

0

25 50 75 100 125 150

–75 –50 –25

0

25 50 75 100 125 150

–75 –50 –25

0

25 50 75 100 125 150

TEMPERATURE (°C)

8311 G20

8311 G18

8311 G19

INTV_CCCurrent Limit and

Short-Circuit Current

INTV_CCOVLO

INTV_CCUVLO

4.8

4.6

4.4

4.2

4.0

16.5

16.0

15.5

15.0

14.5

60

50

40

30

20

10

+

–

UVLO

INTV CURRENT LIMIT

CC

+

OVLO

UVLO

–

OVLO

INTV SHORT-CIRCUIT CURRENT

CC

–75 –50 –25

0

25 50 75 100 125 150

–75 –50 –25

0

25 50 75 100 125 150

–75 –50 –25

0

25 50 75 100 125 150

TEMPERATURE (°C)

8311 G21

8311 G22

8311 G23

CG/FG Rise/Fall Time

vs INTV_CCVoltage

CSW/FSW Maximum Input

Current

CG/FG Rise/Fall Time

30

25

20

25.0

22.5

20.0

260

250

240

INTV ≈ 7V (NOT OVERDRIVEN)

CC

V

= V

= 150V

FSW

FG FALL TIME

FG RISE TIME

CG FALL TIME

CG RISE TIME

CSW

15

10

17.5

15.0

230

220

FG FALL TIME

FG RISE TIME

CG FALL TIME

CG RISE TIME

–75 –50 –25

0

25 50 75 100 125 150

6

8

10

12

14

16

–75 –50 –25

0

25 50 75 100 125 150

TEMPERATURE (°C)

INTV (V)

TEMPERATURE (°C)

CC

8311 G24

8311 G25

8311 G26

8311f

9

For more information www.linear.com/LT8311

LT8311

T_A= 25°C, unless otherwise noted.

TYPICAL PERFORMANCE CHARACTERISTICS

Prop Delay from SYNC Input to

CG/FG Outputs

SYNC High/Low Trip Voltage

CSP Maximum Input Current

200

190

180

2.0

1.5

180

170

160

150

140

130

120

110

100

90

CG Rise/FG Fall, SYNC = 2ꢀ

V

= 150V

CSP

CG Rise/FG Fall, SYNC = 6ꢀ

CG Rise/FG Fall, SYNC = 10ꢀ

FG Rise/CG Fall, SYNC = 2ꢀ

FG Rise/CG Fall, SYNC = 6ꢀ

FG Rise/CG Fall, SYNC = 10ꢀ

SYNC HIGH

1.0

0.5

0

–0.5

–1.0

–1.5

–2.0

170

160

SYNC LOW

80

70

60

–75 –50 –25

0

25 50 75 100 125 150

–75 –50 –25

0

25 50 75 100 125 150

–75 –50 –25

0

25 50 75 100 125 150

TEMPERATURE (°C)

8311 G28

8311 G27

8311 G29

CSP Trip Voltage vs Series CSP

Resistor (R_CSP

TIMER Frequency

)

600

500

400

300

200

100

0

80

60

40

20

R

TIMER

R

TIMER

R

TIMER

= 41.2kΩ

= 71.5kΩ

= 221kΩ

0

–20

–75 –50 –25

0

25 50 75 100 125 150

0.1

0.4

0.7

1.0

1.3

(kΩ)

1.6

1.9

TEMPERATURE (°C)

R

CSP

8311 G30

8311 G31

8311f

10

For more information www.linear.com/LT8311

LT8311

PIN FUNCTIONS

CSW (Pin 1): Catch MOSFET Drain Sense Pin. Connect

this pin to the external N-channel catch MOSFET’s drain

through a 2k resistor (typical) in preactive mode. Mini-

mize parasitic capacitance on the pin. Connect to GND in

SYNC mode.

cycle. If the sum of the on times of the catch and forward

MOSFET, per cycle (including the dead time), exceeds the

timeout period programmed by the TIMER resistor, then

all synchronous conduction will be shut down. Synchro-

nous conduction resumes when the timeout period is

reset again. See the Applications Information section for

more details on programming the TIMER resistor. Keep

the ground return trace of this pin short, and away from

paths with switching noise.

FSW (Pin 3): Forward MOSFET Drain Sense Pin. Con-

nect this pin to the external N-channel forward MOSFET’s

drain through 2k resistor (typical) in preactive mode.

Minimize parasitic capacitance on the pin. Connect to

GND in SYNC mode.

PGOOD (Pin 13): Output Power Good Pin. The open-drain

output will be pulled to ground when the FB pin voltage

stays within 7% of the internal 1.227V reference for a

period of 175µs. The internal PGOOD comparator has a

hysteresisof 3%.Therefore,whenFBexistsoutside 10%

of the 1.227V reference, the PGOOD pin will be pulled high

by an external pull-up resistor or current source.

FG (Pin 5): Forward MOSFET Gate Driver Pin. This pin

drivesthegateoftheexternalN-channelforwardMOSFET.

Minimize trace length between this pin and the forward

MOSFET gate.

INTV (Pin 6): Internal Linear Regulator’s Output Pin.

CC

INTV powers the gate drivers on the LT8311. The volt-

CC

SS (Pin 14): Soft-Start Pin. A capacitor from the SS pin to

GND will be charged up by SS’s internally trimmed 10µA

current source. Since FB tracks the lower of the SS pin

voltage and the internal reference of 1.227V, the charge

rate of the SS pin can be used to set the slew rate at which

the FB pin charges up to its regulation voltage of 1.227V.

The SS pin typically charges up to 2V. When using the

LT8311 as part of voltage feedback loop, place a ceramic

capacitor of at least 1nF on this pin to GND. For details on

SS start-up and overshoot control functions, please refer

to the Applications Information section.

age on this pin is internally regulated to 7V. Alternatively,

the pin can be overdriven externally. A minimum of 4.7µF

(ceramic capacitor) must be placed from this pin to GND.

V

(Pin 7): Input Supply Pin. This pin must be locally

IN

bypassed.

PMODE (Pin 8): Preactive Mode Select Pin. Tying PMODE

to GND enables preactive mode. Tying PMODE to INTV

CC

enables SYNC mode.

OPTO(Pin9):OptoDriverOutputPin. Tie thispin, through

a series resistor, to the input of the opto-coupler. This

pin can source up to 10mA, sink 300μA typically, and is

short-circuit protected.

SYNC (Pin 15): Synchronization Pin. The SYNC pin, used

only in SYNC mode, serves as an edge-sensitive input to

receive timing information for synchronous switching. It

is typically driven with PWM synchronization signals from

the primary-side IC through a pulse transformer. A nega-

tive voltage slew on the SYNC pin (–1.2V threshold) turns

on the forward MOSFET and turns off the catch MOSFET.

Equivalently,apositivevoltageslew(1.2Vthreshold)turns

on the catch MOSFET and turns off the forward MOSFET.

Tie the SYNC pin to GND in preactive mode.

COMP (Pin 10): Error Amplifier Output Pin. Tie an ex-

ternal compensation network to this pin when using the

LT8311’s transconductance error amplifier as part of a

voltage feedback loop.

FB (Pin 11): Feedback Pin. This is the inverting input of

the LT8311’s internal error amplifier. The FB pin voltage

tracks the lower of the internal 1.227V reference and the

SS pin voltage. 75nA (bias current) typically flows out of

the pin. Tie this pin to a resistor divider network from the

output to set the desired output voltage.

CG(Pin16):CatchMOSFETGateDriverPin.Thispindrives

thegateoftheexternalN-channelcatchMOSFET.Minimize

trace length between this pin and the catch MOSFET gate.

TIMER (Pin 12): Switching Period Timeout Pin. A resistor

from this pin to ground sets an upper limit on the sum

of the forward and catch MOSFET on times (including

dead time between the two MOSFETs on period), every

CSN, CSP (Pin 18, Pin 20): Current Sense Differential

Inputs. CSP and CSN are the positive and negative inputs,

respectively, of the LT8311’s internal current sense com-

parator. The pins are typically connected across the catch

8311f

11

For more information www.linear.com/LT8311

LT8311

PIN FUNCTIONS

MOSFET to perform V current sensing. Alternatively, if

voltage offsets created by the input bias current (100nA)

ofthecurrentcomparator. Inpreactivemode, theCSPand

CSN pins must be configured to trip at zero or positive

values of source to drain current in the catch MOSFET

(current in catch MOSFET cannot be allowed to flow from

drain to source in preactive mode).

DS

a more precise current sensing mechanism is desired, the

pinsmaybeconnectedacrossasenseresistoratthecatch

MOSFET’s source. The current comparator trips at 62mV

typical. The CSP pin sources 38µA current, allowing trip

voltages less than 62mV to be set by placing a resistor in

series with the CSP pin. It is recommended to place an

identical resistor in series with the CSN pin to match any

GND (Exposed Pad Pin 21): Ground. Exposed pad must

be soldered directly to local ground plane.

BLOCK DIAGRAM

PRIMARY

SIDE

IN(SYS)

SECONDARY

SIDE

L

OUT

V

C

OUT

•

OUT

R

CSW

C

VIN

N

S

P

C

RST

1

7

CSW

V

IN

PRIMARY

IC

M1

R

FSW

–

+

FSW

7V

3

INTV

CC

FG

M

FG

5

INTV

CC

6

SYNCHRONOUS

CONTROLLER

38µA

UVLO + 1.227

REFERENCE

UVLO/

OVLO

R

CSP

C

CSP

INTVCC

20

+

–

TIMER

62mV

SWITCHING TIMEOUT

OSCILLATOR

12

15

+

–

INTV

CC

R

TIMER

+

CG

M

CG

16

–

1.2V

20k

5.7V

SYNC

+

–

R

CSN

18

8

C

PL

+

–

1.2V

SYNCHRONOUS

MODE SELECT

PMODE

R

FB1

FB

300k

11

–

+

A1

1.227V

–

100mV

+

0.9V

V

IN

SS

DOWNAMP

+

–

+

–

+

–

600mV

+

–

R

PGOOD

10µA

PGOOD

S1

13

21

V

IN

2k

R

FB2

R

+

–

+

–

1.31V

1.14V

D

OPTO

1V

9

A2

20k

V

UVLO

IN

GND

1.227V

140k

+

–

TO PRIMARY-

SIDE CIRCUITS

COMP

10

SS

14

R

E

8311 BD

C

SS

R

C

F

C

8311f

12

For more information www.linear.com/LT8311

LT8311

OPERATION

TheLT8311controlsthesynchronousMOSFETsandopto-

Region 1 (Figure 2)

coupler on the secondary side of a forward converter.

When OUT goes high, M1 turns on. CG should already be

SynchronouscontroloflowR

MOSFETscantypically

DS(ON)

at 0V before OUT goes high, to ensure that M does not

CG

leadtolowerpowerdissipationinforwardconverters. The

lower power dissipation can improve converter efficiency,

resultinginlongtermcostsavingsbyloweringinputpower

requirements to support a certain level of output power.

Improved efficiency can also reduce the size of heat sinks

required to dissipate the heat generated in the rectifiers;

consequentlyincreasingtheoperatingambienttemperature

rangewhichmaybeusefulinmanyindustrialapplications.

cross conduct with M1. The LT8311’s preactive mode,

which will be explained later, is an innovative scheme to

turn off M before M1 turns on. FG must be high during

CG

this period to keep the forward MOSFET, M on, thereby

FG

conducting the output inductor current, I

, (via the

LOUT

transformer’s secondary winding) through a low imped-

ance path. During this phase, magnetizing current, I

,

LMAG

builds up in the transformer’s magnetic core, and flows

from V to GND through M1. Output inductor current,

The LT8311 also offers opto-coupler control for accurate

outputvoltageregulationoverlineandload. TheLT8311’s

opto-couplercontrolcircuitrycomeswithahostofstart-up

and steady-state functions to ensure robust transient re-

sponseduringpower-onandoutputshort-circuitrecovery.

IN

I

, ramps up at a rate of (V

– V )/ L

.

LOUT

CSW

OUT

Region 2 (Figure 2)

When OUT goes low, and turns off M1, the transformer

becomes high impedance, and stops conducting I

.

LOUT

FUNDAMENTALS OF FORWARD CONVERTER

OPERATION IN CCM

Since current in the output inductor cannot go to zero

instantaneously, it pulls the drain of the catch MOSFET,

CSW, towards ground. Ultimately CSW gets clamped at a

The timing diagram of a forward converter operating in

continuous conduction mode (CCM) is shown in Figure 2.

Thetimingdiagramisbrokenintosixregionsofoperation.

Please refer to Figures 1 and 2 for the following explana-

tion of each region of operation.

diode voltage below ground by M ’s body diode which

CG

nowsourcestheoutputinductorcurrent(similartoacatch

diode in a traditional buck converter). CSW collapsing

equivalently causes the transformer’s secondary winding

voltage to become smaller. Through transformer action,

ACTIVE CLAMP RESET (RED)

RESONANT RESET (BLUE)

L

OUT

CSW

V

IN

OUT

LOAD

I

LOUT

•

R

C

OUT

N

S

P

L

I

MAG

LMAG

M

CG

+

–

V

CL

C

CL

PRIMARY

IC

SECONDARY

IC

V

DRAIN_M2

C

AOUT

SWP

RST

FSW

C

M2

AOUT

D2

M1

M

FG

OUT

FG

8311 F01

Figure 1. Forward Converter with Active Clamp Reset (in Red) or Resonant Reset (in Blue)

8311f

13

For more information www.linear.com/LT8311

LT8311

OPERATION

AOUT

ACTIVE CLAMP

PMOS CONTROL

SIGNAL

0V

0.7 (CLAMPED BY D2)

M2 OFF

0.7 (CLAMPED BY D2)

M2 OFF

V

M2

M2 ON

ACTIVE CLAMP

PMOS GATE

GATE

(M2 SOURCE = 0V)

OUT

M1 ON

0.7V

M1 OFF

M1 ON

M1 OFF

PRIMARY NMOS

SWITCH GATE

(M1 SOURCE = 0V)

0V

(D• t_PER

L_MAG•C_RST

)

V

IN 1+

2

PRIMARY-SIDE

WAVEFORMS

V

1− D

IN

∼V

IN

PRIMARY NMOS

SWITCH DRAIN

t_{RES = π}

SWP

L_MAG•C_RST

0V

0A

di

V

IN

=

di

−1

V_IN•D

=

•

dt L_MAG

TRANSFORMER

MAGNETIZING

INDUCTANCE

CURRENT

dt L_MAG1− D

I

LMAG

CSW

V_IN•D• t_PER

N_S

N_P

L_MAG

∼ V

•

IN

CATCH FET DRAIN

0V

0.7V

CG

M

CG

OFF

M

ON

M

CG

OFF

M ON

CG

CATCH FET GATE

CG

V_OUT• t_PER

2 • L_MAG•C_RST

SECONDARY-SIDE

WAVEFORMS

V_OUT

1− D

FORWARD FET

FSW

FG

DRAIN

0V

0.7V

M

ON

M

OFF

M

FG

ON

M

FG

OFF

0V

FORWARD FET

GATE

FG

0V

di V_CSW−V_OUT

di –V_OUT

=

V_OUT

=

dt

L_OUT

dt L_OUT

R_LOAD

OUTPUT INDUCTOR

CURRENT

I

LOUT

V_OUT•(1− D)• t_PER

L_OUT

D • t

PER

REGIONS OF

OPERATION

t

PER

1

2

3

4

5

6

TIME

8311 F02

Figure 2. Active Clamp Forward Converter Timing Diagram in CCM. Resonant Reset Waveforms in Blue

8311f

14

For more information www.linear.com/LT8311

LT8311

OPERATION

the primary winding voltage gets smaller too, effectively

capacitor. Inresonantreset, I

flowsintoC assoon

LMAG RST

moving SWP towards V . Since M is still on, and M ’s

as M turns off, causing SWP’s voltage to rise up quasi-

IN

FG

CG

FG

body diode is on, the secondary winding voltage gets

sinusoidally, withatimeconstantsetbyL

andC . In

MAG

RST

clamped at about a diode voltage. Through transformer

activeclampreset,whenM turnsoff,I

intiallyslews

FG

LMAG

action, SWP gets clamped to approximately V . I

up SWP’s voltage quickly. As shown in Figure 2, I

does not flow into the active clamp capacitor as soon as

IN LMAG

LMAG

flows in the secondary windings, as shown in Figure 3,

flowing from the drain to source of M , to ground. M ’s

M

FG

turns off. The voltage across C (= V = V /(1-D))

FG

.

CG

CL

IN

body diode sources I

and I

initiallyreversebiasesM2’sbodydiode. OnlywhenSWP’s

LOUT

LMAG

voltagegetshighenoughtoforwardbiasM2’sbodydiode,

Region 3 (Figure 2)

does I

begin to flow into C . The voltage where this

CL

LMAG

happens is when SWP = V + 0.7V. At this point, SWP’s

voltage rises up at a rate determined by the time constant

When FG goes low, it allows transformer reset action to

begin. I no longer has a low impedance path through

FG

CL

LMAG

of L

and the active clamp capacitor, which is typically

M

on the secondary side. As a result, it “jumps back” to

MAG

the primary side, flowing into the primary-side resonant

much larger than the resonant reset capacitor.

I

LMAG

L

OUT

V

IN

I

LOUT

•

M

CG

I

N

LMAG

N

S

P

L

MAG

CG OFF

M

FG

FG ON

M1 OFF

8311 F03

Figure 3. With FG On, I_LMAGIs Conducted Through M_FGto Ground

on the Secondary Side When M1 Turns Off

t

PROPORTIONAL

V

1−D

RISE

IN

V_CL

=

TO L

AND C

MAG

CL

V

CL

V

CL

+ 0.7V

SWP

V

IN

0.7V

0V

V

DRAIN_M2

M

FG

TURNS OFF

V

– V

CL

IN

TIME

M2 BODY

DIODE OFF

M2 BODY

DIODE ON

M2 ON

8311 F04

Figure 4. Detail of Region 3 from the Timing Diagram in Figure 2. When M_FGTurns Off

in Active Clamp Reset, I_LMAGInitially Slews Up SWP’s Voltage from V_INto V_CL+ 0.7V,

at Which Point M2’s Body Diode Turns On and Allows I_LMAGto Flow into C_CL

8311f

15

For more information www.linear.com/LT8311

LT8311

OPERATION

The ultimate goal of both reset mechanisms is to raise

causes the primary winding to have a similar voltage

(scaled by turns ratio), resulting in SWP’s voltage

the SWP node to a voltage higher than V , imposing

IN

appropriate volt seconds on L

, and allowing the

getting clamped to V . M continues conducting

MAG

IN CG

magnetizing current to reset. Resetting the magnetic core

every cycle prevents magnetic flux buildup within the

core, and thereby prevents transformer saturation. FSW

tracks the SWP node during transformer reset. CG going

I

– I

.

LOUT

LMAG

Region 5 (Figure 2)

Active Clamp Reset Case: AOUT goes high, turning off

high, allows I

to switch over from being conducted

LOUT

M2. I

, being negative, causes the voltage on SWP

LMAG

by M ’s body diode to M itself.

CG

(M1’s drain) to get pulled towards V , resulting in the

IN

transformer’s primary windingvoltage becomingsmaller.

Region 4 (Figure 2)

Bytransformeraction, thesecondarywindingvoltagealso

1. ActiveClampResetCase(redwaveform):AOUTgoing

becomes smaller. With M on (holding CSW at 0V), and

CG

low causes the gate of M2 to be driven below ground

the transformer secondary winding voltage becoming

by the decoupling capacitor, C

. This causes M2,

smaller, FSW collapses towards 0V.

AOUT

the active clamp PMOS, to turn on. M2 must be turned

on before I becomes negative, to allow I to

Region 6 (Figure 2)

LMAG

sustain conduction through the active clamp capacitor

Eventually, in similar fashion to the resonant reset case,

and get fully reset. Active clamp reset completes by the

FSWisclampedtoadiodevoltagebelowGNDbyM ’sbody

FG

end of region 4, and I

is reset to a negative value.

LMAG

diode, which now conducts I

through the secondary

LMAG

windings, towards the output inductor. With M ’s body

2. ResonantResetCase(bluewaveform):Resonantreset

FG

diode on, and M on, the secondary winding voltage gets

ultimately completes when SWP’s quasi-sinusoidal

CG

clamped to about a diode voltage. Through transformer

action, SWP gets clamped to approximately V . CG goes

waveform returns to V , by which point I

is reset

IN

LMAG

toanegativevalue. FSWiseventuallyclampedbyM ’s

IN

FG

low, turning off M before M1 can turn on. I

– I

body diode, and conducts I , through the second-

LMAG

CG

LOUT LMAG

is conducted through M ’s body diode. FG goes high,

ary windings, towards the output inductor (similar to

Figure 3, but with I direction reversed on primary

CG

turningonM .Eventually,whenM1turnson,I

willbe

FG

LOUT

LMAG

conducted through the transformer’s secondary winding,

and will flow from the source to drain of M .

and secondary sides). With a diode voltage imposed

across the secondary windings, transformer action

FG

8311f

16

For more information www.linear.com/LT8311

LT8311

OPERATION

LT8311 SYNCHRONOUS CONTROL SCHEMES

zero current in M , which should correspond to nearly

zero current in the output inductor. Reactive turn-off

will typically be the dominant turn-off mechanism for

CG

The LT8311 offers two modes of synchronous control:

1. Preactive Mode: No pulse transformer needed; DCM

operation at light load. Enabled by tying the PMODE pin

M

in DCM.

CG

The LT8311’s seamless transition between predictive

and reactive portions of preactive mode allows the catch

MOSFET to be turned off at the correct time to avoid cross

conduction or avalanching.

to 0V. Use a Schottky diode across M (Figure 20).

CG

2. SYNC Mode: Pulse Transformer needed; FCM or DCM

operation at light load. Enabled by tying the PMODE

pin to INTV .

CC

M

FG

Turn-On/Off in Preactive Mode

PREACTIVE MODE SYNCHRONOUS CONTROL

In preactive mode, M is turned on after M ’s turn-off

FG

CG

edgeisdetected,andthevoltageonthedrainoftheforward

MOSFET, FSW, is detected to be below 1.2V. Waiting for

FSW to fall below 1.2V ensures that transformer reset is

M

Turn-On/Off Timings in Preactive Mode

CG

"Preactive"isshort for "predictive"+ "reactive". Inpreactive

mode, the LT8311 controls the secondary synchronous

MOSFETs without any communication from the primary-

close to completion. M is turned off when the voltage

FG

on CSW is detected to be below –150mV.

side IC. In preactive mode, the catch MOSFET, M , is

CG

Since preactive mode requires each MOSFET to be turned

ononlyaftertheotherMOSFET’sturn-offedgeisdetected,

the system requires a start point where one of the two

MOSFETs begins switching. Preactive mode’s start point

turned on (CG rising edge in Figure 5) when the voltage

on its drain, CSW, is detected to be below –150mV, and

the forward MOSFET, M , is detected to be off. M is

FG

CG

turned off when the first of two events after M ’s turn-

CG

happens by turning on M first to commence switching.

CG

on occurs:

• Predictive M Turn-Off (Figure 5): In predictive turn-

Preactive Mode Shutdown and Start-Up

CG

off, the LT8311 predicts when M1 will turn on in the

Preactivemodeisdesignedwithmanyfeaturestofacilitate

smooth start-up of synchronous control and shut down of

the scheme when necessary. Prior to starting switching

activity, the LT8311 evaluates conditions on the forward

converter’s secondary side to determine if switching can

commence. Theevaluationperiodendswhenfourspecific

conditions, are satisfied for a period of three continuous

CSW switching cycles (rising edge to rising edge). If

any of the conditions are violated, the evaluation period

is reset, and switching activity is kept shut off. During

this evaluation period, the secondary side current will

next cycle, and turns off M 100ns prior to this event.

CG

Predictive turn-off of M prevents cross conduction

CG

between M and M1. M1’s turn-on timings are pre-

CG

dicted by phase locking to the rising edge of present

and past CSW cycles. Predictive turn-off relies on the

periodicity of M1’s turn-on edge, an inherent aspect of

fixed-frequency operation. Furthermore, the predictive

turn-off is designed to be independent of the duty cycle

of the system, which allows M to be correctly turned

CG

off, even during load/line transients. Predictive turn-off

will typically be the dominant turn-off mechanism for

flow through the body diodes of M and M . The four

CG

FG

M

in CCM.

CG

conditions are:

• Reactive M Turn-Off (Figure 6): Reactive turn-off

CG

1. V must be greater than its UVLO voltage

forces the forward converter to operate in DCM at light

IN

load. In reactive turn-off, the LT8311 turns off M

CG

2. INTV must be within its UVLO/OVLO limits

CC

when the current in M (I

) trips the LT8311’s

CG MCG

3. The TIMER pin should not have timed out. This feature

exists to ensure that the LT8311 ceases switching in

the event that the primary side stops switching.

8311f

internal current comparator. The inputs to this current

comparator are the CSP and CSN pins. Typically, the

CSP and CSN pins will be configured to trip at almost

17

For more information www.linear.com/LT8311

LT8311

OPERATION

I

LOUT

CSW

FSW

V

IN

V

OUT

L

OUT

•

C

OUT

N

LT8311

CSW

P

S

RESET

FSW

CSP

MECHANISM

PRIMARY-SIDE IC

CONTROLS TIMING

OF OUT SIGNAL

LT8311 USES CSW/FSW INFORMATION

TO DETERMINE FG/CG CONTROL

TIMINGS DURING THE PREDICTIVE

PORTION OF PREACTIVE MODE

M

CG

M1

M

FG

PRIMARY IC

CG

OUT

I

MCG

CSN

FG

M1

TURN-ON

EDGE

M1

TURN-ON

EDGE

OUT

0V

CSW

CG

WAVEFORMS

IN CCM

M

CG

TURN-OFF

EDGE

CG

TURN-OFF

EDGE

75ns PREDICTIVE DELAY

TIME

8311 F05

Figure 5. During the Predictive Portion of Preactive Mode, the LT8311 Phase Locks

into the CSW Rising Edge and Turns Off M_CG75ns Prior to This Edge

M1

TURN-ON

EDGE

M1

TURN-ON

EDGE

OUT

0V

PRIMARY-SIDE IC

CONTROLS TIMING

OF OUT SIGNAL

LT8311 USES I

INFORMATION

MCG

TO DETERMINE FG/CG CONTROL

TIMINGS DURING THE REACTIVE

PORTION OF PREACTIVE MODE

CSW

WAVEFORMS

IN DCM

I

LOUT

0A

I

MCG

WHEN CSP-CSN

TRIPS INTERNAL

CURRENT COMPARATOR

TURNS OFF

M

CG

TIME

8311 F06

Figure 6. During the Reactive Portion of Preactive Mode, the LT8311 Turns Off M_CGWhen the Current in M_CG, I_MCG

,

Trips the LT8311’s Internal Current Comparator. The Inputs to the Comparator Are CSP and CSN and the Current Sense

Trip Voltage Is Programmed by Choosing Appropriate CSP/CSN Series Resistors

8311f

18

For more information www.linear.com/LT8311

LT8311

OPERATION

4. The CSP and CSN pins must not trip the internal

current comparator within a 150ns period of time

called "current sample window." This function helps

the LT8311 detect very light load conditions, dur-

ing which time it will keep synchronous conduc-

tion shut off, thereby improving system efficiency.

SYNC MODE SYNCHRONOUS CONTROL

SYNC mode allows the LT8311 to operate in forced con-

tinuous mode (FCM) at light loads. In SYNC mode, a pulse

transformer (see T2 in Figure 7) is required to allow the

LT8311 to receive synchronization control signals from

the primary-side IC. These control signals are interpreted

digitally (high or low) by the LT8311 to turn on/off the

catch and forward MOSFETs.

How the current sample window works:

Thecurrentsamplewindowexistsregardlessofwhether

M

is turned on or not, in any given cycle. When CSW

CG

FCM operation allows the forward converter to avoid

operation in discontinuous conduction mode (DCM) at

light loads, by letting the inductor current go negative.

Hence, even at zero load, the inductor current remains

continuous and the converter runs at a fixed frequency.

is detected to fall below –150mV, the LT8311 starts a

blanktimeof200ns.Uponcompletionofthisblanktime,

theLT8311startsa150nscurrentsamplewindow.Ifthe

CSP/CSNpininputscausetheinternalcurrentcompara-

tor to trip during this 150ns window, the LT8311 will

interpret this as a condition of very light load, at which

point it will stop synchronous conduction and start the

evaluation period again. Please see "Configuring CSP/

CSN Inputs of Current Sense Comparator in Preactive

Mode” in the Applications Information section.

M

CG

Turn-On/Off Timings in SYNC Mode

InSYNCmode, M turnsonwhenthesignalontheSYNC

CG

pin is higher than 1.2V. M turns off when the signal on

CG

the SYNC pin is lower than –1.2V.

When all four conditions are valid for three continuous

CSW cycles, the evaluation period ends and the LT8311

gets ready to start switching. Switching commences with

M

Turn-On/Off Timings in SYNC Mode

FG

In SYNC mode, M turns on when the signal on the SYNC

FG

pin is lower than –1.2V. M turns off when the signal on

FG

the LT8311 turning on M for its minimum on-time. If

CG

the SYNC pin is higher than 1.2V.

any of the four conditions listed are violated at any point

during switching activity, the LT8311 will shut down

all synchronous conduction and restart the evaluation

period.

TheR

andC

timeconstantmustbeappropriately

SYNC

chosen to generate a sufficient pulse width at a particular

overdrive voltage (see "Picking Pulse Transformer and

High Pass Filter" in the Applications Information section).

Duringpreactivemodestart-up,theLT8311internallysoft-

Typical values for C

respectively.

and R

are 220pF and 560Ω,

SYNC

starts the on-time of M , allowing the forward converter

CG

to gradually transition from full cycles of nonsynchronous

M

conduction (secondary-side current flowing through

CG

body diode of M ) to full cycles of synchronous M

CG

conduction.

8311f

19

For more information www.linear.com/LT8311

LT8311

OPERATION

SYNC Mode Shutdown

4. The CSP and CSN pins have tripped the LT8311’s in-

ternal current comparator during M ’s on-time. The

CG

In SYNC mode, the LT8311 will shut off both secondary-

current in M , I

, is sensed after a 400ns blank

CG MCG

side MOSFETs, M and M , if any of the following

CG

FG

time has expired. This blank time starts at the turn-on

conditions are true:

edge of M . See the Applications Information section

CG

1. V is less than its UVLO voltage

IN

for details on configuring the CSP and CSN pins in

SYNC mode.

2. INTV outside its UVLO/OVLO limits

CC

3. The TIMER pin has timed out (see the Applications

Information section for details on programming the

TIMER pin resistor).

L

OUT

T1

V

IN

V

OUT

C

OUT

•

M

CG

N

S

P

I

MCG

RESET

M

M1

FG

PRIMARY-SIDE IC

CONTROLS TIMING

OF OUT AND

LT8311 CONTROLS FG AND CG

TIMING BASED ON SYNC INPUT

SIGNAL IN SYNC MODE

FG CSN CG CSP

LT8311

S

SIGNALS

OUT

PRIMARY IC

S

T2

SYNC

OUT

•

C

SYNC

R

SYNC

M1

TURN-ON

EDGE

M1

TURN-ON

EDGE

OUT

0V

S

OUT

0V

1.2V

SYNC

–1.2V

M

CG

M

CG

TURN-ON

EDGE

TURN-ON

EDGE

CG

FG

0V

M

FG

0V

TURN-ON

EDGE

0V

TURN-ON

EDGE

0V

TIME

8311 F07

Figure 7. In SYNC Mode, the Primary Side IC Sends S_OUTSignals Through a Pulse Transformer to the LT8311’s SYNC Pin.

SYNC < 1.2V Turns on M_FGand Turns Off M_CG. SYNC > 1.2V Turns On M_CGand Turns Off M_FG

8311f

20

For more information www.linear.com/LT8311

LT8311

OPERATION

OPTO-COUPLER CONTROL

ence, the FB pin (and by extension the output voltage) is

forced to soft-start at the slew rate set by the capacitor,

SS

The LT8311 offers opto-coupler control to allow output

voltagefeedbackfromthesecondarytotheprimarysideina

forwardconverter.Usedinconjunctionwithaprimary-side

IC, the entire system offers fixed frequency peak current

mode control that has excellent line/load regulation and

quick transient response.

C , connected to the SS pin.

NOTE: To ensure that the soft-start time of the converter

is controlled by the LT8311’s SS capacitor, C , it is

SS

important to program the primary IC’s soft-start faster,

to get out of the way. If this is not done, the converter’s

soft-start time will be dominated by the primary IC’s soft

start, and the LT8311 will simply adjust its SS pin voltage

and slew rate to match the slower soft start time set by

the primary-side IC.

A basic understanding of the LT8311’s opto-coupler

control scheme can be obtained by referring to Figure 8.

The LT8311 senses the output voltage through a resistor

divider (R

and R ) connected to its FB pin. The FB

FB1

FB2

pin voltage is compared to the lower of two inputs:

• An internal voltage reference of 1.227V

• Soft-start (SS) pin

WhentheSSpinvoltagegetshigherthanthe1.227Vrefer-

ence, the FB pin starts to track the 1.227V reference. The

output, therefore, regulates at a voltage set by the R

/

FB1

R

divider network, and the FB pin’s regulation voltage

FB2

of 1.227V. The SS pin capacitor continues to get charged

up by the 10µA current source until it reaches its internal

clamp voltage of 2V.

At start-up, the SS pin capacitor, C , is charged up by the

SS

LT8311’s internally trimmed 10µA current source. Since

FB tracks the lower of the SS pin and the 1.227V refer-

L

OUT

V

IN

V

OUT

•

M

C

OUT

CG

R

LOAD

N

S

P

CG

M

FG

LT8311 OPTO CONTROL

FG

M1

10µA

+

–

SS

FB

14

11

A4

1.227V

C

SS

GAIN

C

PL

+

–

OPTO

1V

0.9V

–

R

20k

A2

9

SNS

R

FB1

+

–

V

C

IS ALSO

REFERRED TO

AS COMP IN SOME

PRIMARY-SIDE ICs

A1

1.227V

140k

R

D

2k

R

FB2

COMP

10

+

–

V

REF

C

A3

R1

8311 F08

R2

R

E

C

F

C

Figure 8. The LT8311 Provides Voltage Feedback, as Part of a Peak Current Mode Control System, in a Forward Converter

8311f

21

For more information www.linear.com/LT8311

LT8311

OPERATION

V

> 3.7V

IN

OPTO-DRIVER DEACTIVATION

1. ERROR AMP DISABLED: COMP PIN VOLTAGE CHARGED UP TO COMP HI CLAMP = 2.2V; t

2. SS PULL-DOWN AMPLIFIER DISABLED

∼ 1.1 • 10kΩ • C

C

RISE

3. SS PULL-UP AMPLIFIER ACTIVATED. THIS AMPLIFIER ONLY HAS SOURCING CAPABILITY (1mA SLEW CURRENT), AND

WILL DRIVE SS PIN VOLTAGE CLOSE TO FB PIN VOLTAGE (V – V ≅ 16mV)

FB

SS

4. SS 10µA CHARGE CURRENT ACTIVATED

5. OPTO-DRIVER DISABLED: OPTO PIN VOLTAGE HELD AT 0V

YES

COMP < 2.2V

NO

OPTO-DRIVER ACTIVATION

1. ERROR AMP ENABLED: ERROR AMP CAN NOW DRIVE COMP BASED ON COMPARING FB VOLTAGE WITH SS VOLTAGE

OR 1.227V REFERENCE

2. OPTO-DRIVER ENABLED: OPTO-DRIVER CAN NOW DRIVE OPTO PIN AS A FUNCTION OF COMP PIN VOLTAGE

NO

SS > FB – 16mV

YES

SS PULL-DOWN AMPLIFIER ENABLED

1. SS PULL-UP AMPLIFIER DISABLED

2. SS PULL-DOWN AMPLIFIER ENABLED: THIS AMPLIFIER ONLY ACTIVATED WHEN FB PIN VOLTAGE IS LESS THAN 50%

OF FB REFERENCE VOLTAGE. THIS AMPLIFIER ONLY HAS SINKING CAPABILITY (12mA SLEW CURRENT) AND WILL

DRIVE SS PIN VOLTAGE TO BE NO HIGHER THAN 90mV ABOVE FB

8311 F09

Figure 9. Flowchart for LT8311 Opto Control Operation at Start-Up

With SS charged up to 2V, the transconductance error

amplifier, A1, sinks or sources current from its output,

COMP,ifthereisanyvoltagedifferencebetweentheFBpin

voltage and the 1.227V reference. The COMP pin, offset

by 0.9V, serves as the input to the opto-driver, A2. If an

increase in output load current causes the FB pin voltage

to be lower than 1.227V, A1 drives the COMP pin high.

COMP going high forces A2 to drive OPTO low, sourcing

Since an opto-coupler’s output current is directly propor-

tional to its input current, this decreased input current for

theopto-couplerwillcauseitsoutputcurrent,andtherefore

its emitter voltage at R , to decrease as well. The drop

E

in R voltage causes A3, through its inverting action, to

E

drive its output, V , higher. An increase in the V voltage

C

causes the comparator, A4, to command a higher sense

voltage across the R

resistor, commanding M1 to run

SNS

less current through R into the opto-coupler.

at a higher peak current. Since the current through M1 is

D

8311f

22

For more information www.linear.com/LT8311

LT8311

OPERATION

directly proportional to the output inductor current (M1

its V UVLO voltage, so that upon getting power, it can

IN

Current • N /N = I

), an increase in M1’s peak current

tolerate up to a 100mV drop on its V pin before losing

P

S

LOUT

IN

translates into an increase in the output inductor’s peak

current. In essence, the feedback loop is commanding

the output inductor peak current to meet the demands

of the increased load current, with the ultimate goal of

helping the output voltage recover from a load step and

stay regulated.

power again. Even more importantly, the LT8311 has an

opto-control start-up system that keeps the LT8311’s

“opto-control brains” turned off until all relevant node

voltages within the voltage loop are prebiased to a state

where they will not cause switching activity to cease when

the loop is eventually enabled.

As shown in Figure 9 and the scope shot in Figure 10,

the LT8311’s opto-control operation at start-up involves

slewing the SS pin voltage close to the FB pin voltage,

slewing the COMP pin voltage to its high clamp voltage,

and keeping the OPTO pin voltage held low. During this

phase, the inductor current (and by extension, the output

voltage)iscontrolledbythesoft-startfunctionprovidedby

theprimary-sideIC.Uponcompletionofthestatemachine,

theLT8311allowsthefeedbacklooptobefunctionalagain,

and the FB pin voltage tracks the LT8311’s SS pin voltage

until FB finally gets to its regulation target of 1.227V.

Opto-Control Operation at Start-Up

For applications connecting the LT8311’s V pin directly

IN

to the converter output, the LT8311 includes intelligent

circuitry to ensure no interruption in the switching of

the primary-side MOSFET upon the LT8311’s turn-on.

The LT8311 turns on when its V pin (and therefore the

IN

converter output voltage when V is directly connected to

IN

theoutput)exceeds3.7V.Withoutintelligentcircuitry,this

V

level will cause the FB pin voltage of the LT8311 to

OUT

be greater than the voltage on the LT8311’s SS pin (which

is typically at 0V upon turn-on of the IC), causing ampli-

fier A1 to drive the COMP pin low. This drives the OPTO

pin high, which causes full current into the opto-coupler

and terminates switching of the primary-side MOSFET.

Termination of the primary-side MOSFET’s switching can

lead to the converter’s output voltage dropping, which

could cause the LT8311 to lose power and shut off. The

LT8311’s intelligent circuitry prevents this situation using

two unique features. It has a built-in 100mV hysteresis on

Power Good

The LT8311 offers output power good monitoring to

assist with system level design. The LT8311’s PGOOD

pin is pulled low internally when the FB pin voltage stays

within a 7% window of the 1.227V reference for a period

of175µs.Waitingfor175µstoelapsepreventsthePGOOD

pinfromindicatingfalsepositivesduringtransientevents.

COMP

1V/DIV

PGOOD

5V/DIV

FB

200mV/DIV

FB

500mV/DIV

SS

200mV/DIV

OPTO

500mV/DIV

8311 F10

8311 F11

5ms/DIV

2ms/DIV

Figure 10. Opto Control Operation at Start-Up

Figure 11. Power Good Activates (PGOOD = Low) When the

LT8311’s FB Pin Voltage Is Within 7% of Its Regulated Target

(1.227V). The PGOOD Pin Is Pulled Up Externally to a 12V

Housekeeping Supply Through a 100k External Resistor

8311f

23

For more information www.linear.com/LT8311

LT8311

OPERATION

The PGOOD comparator has 3% hysteresis. Therefore,

when the FB pin voltage is driven away from its regulated

value of 1.227V by 10%, the PGOOD pin’s internal pull-

down shuts off immediately. As a result, the pin is pulled

high by an external resistor or external current source

connected to a supply voltage. The PGOOD pin’s output

can be fed to a microcontroller that make decisions based

on the state of the output voltage.

necessary (up to its maximum sink capability of 13mA), to

ensure that the SS pin voltage gets no higher than 100mV

abovetheFBpinvoltage.Duringoutputshort-circuitevents,

when the FB pin voltage is pulled to ground, the SS pull-

down amplifier gets activated and pulls the SS pin voltage

to 100mV above the FB pin voltage. Eventually, when the

short-circuitconditionisover,theFBpinvoltagegradually

rises up with the SS pin at a slew rate set by C and the

SS

10µA charge current. This allows the output to recover

Output Overshoot Control Helps with Short-Circuit

Recovery

gradually from the short-circuit condition. Note that when

theLT8311hasitsV pinpowereddirectlyfromtheoutput

IN

of the forward converter, it will lose all its brains during a

short-circuit event. Under this scenario, output overshoot

control will not be in effect until the LT8311 gets brains

again, until which point, the output inductor current and

the output voltage will be controlled by the primary-side

IC’s soft-start function.

TheLT8311providesoutputovershootcontrolbyactivating

itssoft-startpull-downamplifier(SS

intheBlock

DOWNAMP

Diagram) any time the FB pin voltage is less than 50%

of the FB reference voltage (1.227V). This is particularly

helpful with output voltage recovery after the removal of

a short-circuit condition or after a heavy load transient.

The SS pull-down amplifier will sink whatever current is

PGOOD

10V/DIV

PGOOD

10V/DIV

SS

500mV/DIV

FB

500mV/DIV

8311 F12a

8311 F12b

1ms/DIV

2ms/DIV

(a) Output Overshoot Control with C_SS= 1nF. LT8311 V_IN

Powered from a 12V Housekeeping Supply, Which Also

Pulls Up on the PGOOD Pin Through a 100k External

Resistor

(b) Output Overshoot Control with C_SS= 33nF. LT8311 V_IN

Powered from a 12V Housekeeping Supply, Which Also Pulls

Up on the PGOOD Pin Through a 100k External Resistor

Figure 12. Output Overshoot Control at Start-Up

8311f

24

For more information www.linear.com/LT8311

LT8311

APPLICATIONS INFORMATION

V BIAS SUPPLY

IN

With the previous criteria in mind, there are three meth-

ods (1-3), listed below, for powering up the LT8311. For

preactive mode, use method 1, 2 or 3. For SYNC mode

FCM, use method 1 or 3; for DCM, use method 1, 2 or 3.

The LT8311’s V pin can be powered in various ways.

IN

Place at least a 2.2µF ceramic bypass capacitor close to

the pin.

1. Power from the LT3752’s housekeeping supply (see

Figure 21 in the Typical Application section). Being

a flyback converter rather than a LDO, the LT3752’s

housekeeping supply is an efficient supply source. It

can be connected through an external winding to the

PickinganappropriatebiassupplytopoweruptheLT8311

requires consideration of the following criteria:

1. The V pin, in certain configurations, may be the only

IN

supply to the LT8311’s INTV pin, which provides

CC

gate drive to the catch and forward MOSFETs. In such

LT8311’s V and INTV pins, and can be set high

IN

CC

situations, V ’s bias supply must be high enough to

IN

enough to provide adequate gate drive for the catch

and forward MOSFETs, but low enough to minimize

efficiencyandthermallosses.Thehousekeepingsupply

comes up as soon as the LT3752 receives input power,

so power is delivered to the LT8311 without delay.

provideadequategate-drivevoltage(typically5Vto7V)

for both synchronous MOSFETs.

2. V ’s bias supply must be able to source:

IN

a. LT8311’s V current (4.5mA typical)

IN

2. Power directly from V . At output voltages lower

OUT

b. INTV gate-drive current when using V to sup-

CC

IN

than 10V, careful consideration must be given to the

output voltage start-up time, ensuring that the LT8311

can turn on and provide synchronous/opto control well

before the output voltage approaches regulation. It is

alsoimportanttoensure,attheseloweroutputvoltages,

that sufficient gate drive voltage can be provided to the

ply the INTV pin (typically 10mA to 30mA)

CC

c. Opto-driver source current (typically 1mA to 5mA)

3. V start-up and short-circuit conditions:

IN

a. V must come up in reasonable time to allow the

IN

LT8311 to begin synchronous and opto-coupler

control. While synchronous control is shut off, the

secondary-side current will flow through the body

diodes of the secondary synchronous MOSFETs.

While opto-control is off, the forward converter

will operate open-loop, using a volt-second clamp

external MOSFETs. At higher V

voltages, efficiency

OUT

and thermal considerations related to the IC’s internal

power dissipation can become important criteria. In

addition, at higher V

voltages, it is important to

OUT

ensure that voltage transients on the V pin do not

IN

exceed the pin’s abs max rating of 30V.

to control V

if operating with LT3752, LT3752-1

OUT

3. Use a buck circuit from an auxiliary transformer wind-

ing, as shown in Figure 13. This circuit has the benefit

of being highly efficient, and is fairly simple to design.

It is particularly useful for low output voltage applica-

tions (3.3V or 5V) that do not have an external house-

keeping supply, and where powering directly from the

output voltage is inadequate. In this configuration, the

buck circuit’s output voltage derives its energy from

secondary-sideswitchingpulsesthatalsosourceenergy

or LT3753 on the primary side.

b. V may be shorted to GND during transient events.

IN

For instance, V powered from the output voltage,

IN

will be driven to 0V during an output short-circuit.

The forward converter must be able to ride through

the momentary loss of power to the LT8311, which

is often easily accomplished by appropriately

configuring soft-start control on the primary-side

ICs. Refer to the LT3752/LT8310 data sheets for

details on configuring soft-start control on the

primary-side IC.

to the forward converter’s main output voltage, V

.

OUT

Careful consideration must be given to ensure that the

buck output voltage comes up well in time, and turns

ontheLT8311toprovidesynchronousandoptocontrol

before the forward converter’s actual output voltage

gets close to regulation. If there is a need to speed up

8311f

25

For more information www.linear.com/LT8311

LT8311

APPLICATIONS INFORMATION

the time taken by the buck converter output voltage to

gettoitstarget, relativetotheforwardconverter’smain

outputvoltage,oftenasimpletechniqueistoslowdown

the main output voltage start-up time by increasing the

soft-start capacitor on the primary-side IC.

40mA. Ensure that the total gate charge (Q ) current

g

required by both secondary MOSFETs, M and M ,

CG

FG

is less than 40mA:

I

= f • (Q

+ Q ) < 40mA

g_MFG

MOSFET_TOTAL

SW

g_MCG

where f

g_MCG

is the converter’s switching frequency,

SW

Q

isthegatecharge(Q )ratingofM andQ

g CG g_MFG

INTV BIAS SUPPLY

CC

is the gate charge (Q ) rating of M .

g

FG

The INTV pin powers the catch and forward MOSFET

CC

This configuration, utilizing the LT8311’s internal LDO,

willsufficeformostapplications,limitedonlybythermal

considerations related to the LDO’s power dissipation.

Keeping the power dissipation to a minimum will help

lowertheoperatingjunctiontemperatureoftheLT8311,

potentially allowing the system to operate over a wider

ambient temperature range:

gate drivers of the LT8311. Two configurations exist for

biasing up the INTV pin, as shown in Figure 14:

CC

1. In the first configuration, the LT8311’s on-chip LDO

regulates the INTV pin voltage from the V supply.

CC

IN

When the V pin voltage is low, the internal LDO will

IN

operate in drop-out, driving the INTV pin to about

CC

400mV below the V pin voltage. When the V pin

IN

LDOPowerDissipation=(V –INTV )•I

IN

CC MOSFET_TOTAL

voltage is high, the internal LDO will regulate INTV ’s

CC

LT8311 Operating Junction Temperature ≈

voltage to 7V. Ensure that V ’s supply voltage does not

IN

θ

OPTO

• (V • 4.5mA + LDO Power Dissipation + V •

JA

IN

) + T

IN

exceed V ’s abs max voltage of 30V. If INTV drops

IN

CC

I

A

belowitsUVLOvoltage(4.6Vrisingand4.3Vfalling),all

synchronous switching will be stopped. The maximum

where θ is LT8311’s junction-to-ambient thermal

JA

guaranteed current that the INTV LDO can source is

resistance and is typically 38°C/W; I

is the current

CC

OPTO





N_AUX

N_S

LT8311

V_AUX= V_OUT

•









V

< 30V

V

IN

BUCK AUXILLIARY SUPPLY

LT8311

IN

V

AUX

V

LDO

INTV

•

INTV

CC

N

AUX

REGULATED to 7V

4.7µF

CC

V

IN

V

OUT

•

M

CG

N

P

S

LT8311

V

IN

< 16V

IN

M1

M

FG

LDO

INTV

8311 F13

CC

4.7µF

8311 F14

Figure 13. Buck Circuit Generates V_AUXSupply, Which

Powers LT8311’s V_INand INTV_CCPins

Figure 14. V_INand INTV_CCPin Configurations

8311f

26

For more information www.linear.com/LT8311

LT8311

APPLICATIONS INFORMATION

sourced into the opto-coupler by the LT8311’s OPTO

Place the capacitor close to the INTV pin, ensuring that

CC

pin; 4.5mA is the typical V current of the LT8311;

the ground terminal of the capacitor has the shortest pos-

IN

T is the ambient temperature.

A

sible return path to the LT8311’s ground (exposed pad).

2. In the second configuration, the V pin’s bias supply

IN

LT8311 OPTO CONTROL FUNDAMENTALS

Setting Output Voltage

drives the INTV pin through a direct connection,

CC

bypassing the internal LDO. This configuration re-

duces power dissipation inside the IC by not having to

incur any power loss within the INTV LDO. Use this

Figure 15 shows how to program the forward converter’s

output voltage with a resistor divider feedback network.

CC

optional configuration for V voltages that are below

IN

16V,allowingsufficientmarginforINTV tostaybelow

Connect the top of R

FB2

to V , the tap point of R

/

CC

FB1

OUT

FB1

its OVLO(+) voltage of 16.5V. Ensure that V , during

R

to the FB pin, and the bottom of R to ground. The

IN

FB2

transients, does not exceed INTV ’s abs max voltage

ground return of R must be kept as close as possible to

CC

FB2

of 18V.

thegroundoftheLT8311, andmustbekeptawayfromthe

forward converter’s power path. The power path contains

switching currents, and possibly large value currents (de-

pending upon the load) which may introduce unintended

noise, or I • R drops into the FB resistor divider path. The

FB pin regulates to 1.227V and has a typical input pin

bias current of 120nA ﬂowing out of the pin. The output

voltage is set by the formula:

Whenanexternalsupplyorauxiliarywindingisavailable,

use this configuration (tying V and INTV together)

IN

CC

to deliver power to the IC. This configuration is most

applicablewhenusingtheLT3752asaprimary-sideIC.

The LT3752’s housekeeping supply can be connected

to the LT8311’s V and INTV through an auxiliary

IN

CC

winding, as shown in Figure 21 in the Typical Applica-







R_FB1

tions section.

V_OUT= 1.227 • 1+

− 120nA •R_FB1





R

_FB2

INTV should be bypassed with a minimum of 4.7µF

CC

ceramic capacitor to ground for all three configurations.

V

OUT

LT8311

R

FB1

FB2

120nA

FB

R

GND

8311 F15

Figure 15. Setting Output Voltage of Forward Converter

8311f

27

For more information www.linear.com/LT8311

LT8311

APPLICATIONS INFORMATION

I

L

OUT

V

OUT

IN

•

M

CG

R

LOAD

N

C

OUT2

P

S

OUT1

CG

I

R

PRIMARY

M

ESR

FG

LT3752 OR LT8310

COMP_PRIMARY

FG

LT8311

V

M1

OUT

(GATE)

V

– 1.7V < V

< 6V

CC(OPTO)

IN(LT8311)

+

–

ISENSEP

(SENSE)

V

CC(OPTO)

CURR_GAIN =

7.5V/V, 5V/V

g

= 350umhos

= 4.5MΩ

mEA

M

F

C

PL

V

ISENSEP

+

R

OUTEA

+

–

OPTO

1V

0.9V

R

20k

SNS

R

–

FB1

+

–

1.227V

COMP/V VOLTAGE TO COMMAND 0

SNS

C

I

R

CURRENT ∼ 1.25V, 0.7V

F

FB

140k

2k

COMP/V VOLTAGE TO COMMAND MAX

C

R

FB2

R

CURRENT ∼ 2V, 1.2V

SNS

C

OPTO

R

D

MAX OPTO SOURCE

CURRENT = 10mA

MAX COMP SRC CURRENT = 20µA

MAX COMP SINK CURRENT = 30µA

COMP

8311 F16

TRUE VOLTAGE AMP

TRANSCONDUCTANCE AMP

I

OPTO_OUT

V

= 1.25V, 1.60V

REF

+

–

R

C

F

FB

(FBX)

V

REF

C

R

= 1/g

C

IN(OPTO)

m(OPTO)

R1

V

X

MAX COMP/V SRC CURRENT ~ 11mA, 13µA

C

R

E

MAX COMP/V SINK CURRENT∼ 11mA,12.5µA

C

COMP

(V )

C

R2

R1 = R2 / GAIN

1 < GAIN (TYPICAL) < 2

R2 (TYPICAL) ∼ 33k, 150k

Figure 16. Forward Converter Voltage Feedback Loop with LT8311 on Secondary Side and LT3752 (or) LT8310 on Primary Side

Picking Loop Compensation Components

the transient performance will suffer. The value choice

for C is somewhat the inverse of the R choice: if too

C

Figure 16 shows a typical loop associated with a forward

converter, using the LT8311 on the secondary side, and

theLT3752orLT8310astheprimary-sideICs. Parametric

valuesspecifictotheLT3752areshowninred,whilethose

specifictotheLT8310areshowninblue.Theforwardcon-

verter loop shown is a peak current mode control system.

small a C value is used, the loop may be unstable and

C

if too large a C value is used, the transient performance

C

may suffer. A small capacitor, C , is often connected in

F

parallel with the RC compensation network to attenuate

the COMP pin voltage ripple induced from the output

voltage ripple (through the internal error amplifier). The

The optimum values for loop compensation depend on

the IC used on the primary side and the LT8311, as well

as the operating conditions of the converter (input voltage

range, output voltage, load current, etc.). To compensate

the voltage feedback loop around the LT8311, a series

resistor/capacitor network is usually connected from the

LT8311's COMP pin to GND. For most applications, the

C capacitor usually ranges in value from 10pF to 100pF.

F

For certain applications, a phase-lead zero capacitor C

PL

(in parallel with R resistor), or a pole-zero pair (C

FB1

OPTO

and R ) on the OPTO pin may help improve the transient

D

performance of the loop. A practical approach to design

the compensation network is to start with one of the

circuits in this data sheet that is similar to your applica-

tion, and tune the compensation network to optimize the

performance. Stability should then be checked across all

operatingconditions,includingloadcurrent,inputvoltage

range and temperature.

capacitor C should be in the range of 4.7nF to 47nF, and

C

the resistor R should be in the range of 2k to 20k. If the

C

R value is too large, the part will be more susceptible to

C

high frequency noise and jitter. If the R value is too small,

C

8311f

28

For more information www.linear.com/LT8311

LT8311

APPLICATIONS INFORMATION

Picking the Opto-Coupler

where I

is the output current of the opto-coupler

OPTO_OUT

and I is the opto-coupler’s input LED current

F

The voltage feedback loop, explained earlier, uses an

opto-coupler to convey output voltage information from

the secondary side to the primary side (see Figure 17).

An opto-coupler is used because of its wide prevalence,

relatively low cost, and its ability to convey DC signal

information over an isolation boundary with potential

differences of up to 5000V.

Opto-couplers have historically been disliked, and jus-

tifiably so, for having CTRs that degrade with operating

lifetime, at higher operating temperatures, and at higher

input currents (I ). Much of this CTR degradation comes

F

from a reduction in the quantum efficiency of the input

LED, which is a function of the LED’s operating current

(I ), operating temperature and operating lifetime.

F

The input of an opto-coupler typically consists of an

infrared light-emitting diode (LED), while the output

is typically a phototransistor. Current flowing into the

Fortunately, LED technology has matured over the last

coupleofdecades,andhasallowedimprovementsinopto-

coupler performance, a discussion of which is beyond the

scopeofthisdatasheet.AvagoTechnologieshaspublished

documentation showing 3-sigma CTR degradation of no

more than 10% over 30 field years of operation for their

opto-couplers manufactured with AlGaAs type LEDs run-

opto-coupler’s input LED, called I , causes photons to

F

be emitted. These photons cross the opto-coupler’s

isolation barrier and get collected in the base of the output

phototransistor. This photo current, which essentially

forms the phototransistor’s base current, is gained up

by the phototransistor’s ß (current gain) before flowing

ning 5mA of input current (I ) at 100% duty cycle, and at

85°C ambient temperature.

F

out of the opto-coupler, and is called I . The key

OPTO_OUT

parameter of interest in an opto-coupler is the current

transfer ratio (CTR). CTR is typically expressed in units

of %, and is calculated as follows:

Please refer to the application/design notes from opto-

coupler vendors such as Avago Technologies, CEL and

Vishay, to procure further information on opto-couplers.

Atypicallyrecommendedopto-coupleristhePS2801from

California Eastern Laboratories (CEL).

I_{OPTO_OUT}

CTR(%) =

I_F

ISOLATION

BOUNDARY

PRIMARY

SIDE

SECONDARY

SIDE

V

CC

R

D

OPTO

OPTO-

COUPLER

I

F

LT8311

PRIMARY SIDE

OF VOLTAGE

FEEDBACK LOOP

8311 F17

I

OPTO_OUT

R

E

Figure 17. Typical Opto-Coupler Configuration in a Voltage Feedback Loop

8311f

29

For more information www.linear.com/LT8311

LT8311

APPLICATIONS INFORMATION

Opto-Coupler Design Guidance

The following guidelines help calculate initial values for

the input and output resistors of the opto-coupler (R and

D

An opto-coupler’s CTR degradation affects a forward

converter’s voltage feedback loop in two ways:

R , respectively) for a generic application. The final values

E

for R and R should be determined after bread-boarding

D

E

1. Large Signal Effect: A drop in CTR means that to sus-

tain the same output current from the opto-coupler,

theinputcurrentoftheopto-couplerwillhavetoincrease.

The input current of the opto-coupler is sourced by the

LT8311’s OPTO pin. The opto-feedback loop should

be designed such that, at the lowest CTR possible, the

LT8311’s OPTO pin is not current limited. The maxi-

mum current that the LT8311’s internal opto-driver can

source out of the OPTO pin is 10mA. Design the system

so that, nominally, the OPTO pin is sourcing 2mA to

3mA maximum current into the opto-coupler’s input.

a system. Use Figure 16 as a reference when reading the

following guidelines:

Step 1: Pick resistors, R1 and R2, that set the inverting

gain of the primary-side IC’s error amplifier. A typical

starting value for R1 would be 22k on the LT3752, and

100k on the LT8310. A typical starting value for R2 would

be 33k on the LT3752, and 150k on the LT8310.

Step 2: Calculate the maximum voltage required at the

emitteroftheopto-coupler'soutputtransistor(V

)to

X_MAX

drive the primary-side IC’s COMP or V pin to the voltage

C

2. Small Signal Effect: A reduction in CTR by 2x will

cause the DC gain and crossover frequency of the for-

ward converter’s voltage feedback loop to drop by 2x,

assuming all other parameters are constant. Likewise,

an increase in CTR by 2x, assuming no change in other

parameters, will cause the DC gain and the crossover

frequency of the voltage feedback loop to increase

by 2x. The voltage feedback loop must be designed

needed to command zero inductor current (referred to as

V

in the following equation):

C_LOW

R1

R2

R1

R2





V_{X _MAX}= V_REF1+

− V_{C_LOW}•









V

is approximately 0.7V for the LT8310, and 1.25V

C_LOW

for the LT3752. V

for the LT3752.

is 1.6V for the LT8310 and 1.25V

REF

ensuring that at CTR

(maximum CTR of the opto-

(MAX)

coupler), the crossover frequency of the feedback loop

stays well within the Nyquist frequency of the system

(= switching frequency/2). A good rule of thumb is to

design the voltage feedback loop’s crossover at about

1/10 of the switching frequency for an opto-coupler at

the nominal value of CTR.

Step 3: Pick a maximum opto-coupler output current

(I ) in the range of 1mA to 10mA. A typical

OPTO_OUT_HIGH

choice for I

might be 2.5mA. Now calculate

OPTO_OUT_HIGH

R to be:

E

V_X−MAX

R_E=

I_{OPTO_OUT _HIGH}

As explained earlier, improvements in opto-coupler

technology have allowed CTR changes over the operating

lifetimeofanopto-couplertobecomesignificantlysmaller

andwellcontrolled.However,themorechallengingdesign

aspect of an opto-coupler is the absolute variation in its

CTR over a large sample size and operating temperature

range. It is this spread in CTR that must be accounted for

when designing an opto-coupler based voltage feedback

loop. Picking an opto-coupler whose CTR variation is no

more than 2x its nominal value, is typically a good starting

point (see Table 1 for a list of opto-couplers with small

CTR spreads at room temperature).

Step 4: Estimate the maximum input current (I

)

F_HIGH

needed to be sourced into opto-coupler by the

LT8311’s OPTO pin, at the opto-coupler’s minimum CTR

(CTR ):

MIN

I_{OPTO_OUT _HIGH}

I_{F _HIGH}

=

CTR_MIN

Ensure that I

is well within the 10mA limit that the

F_HIGH

LT8311’s OPTO pin can source.

Step 5: Estimate the R value needed for the OPTO pin

D

to source the I

current at the maximum OPTO pin

F_HIGH

8311f

30

For more information www.linear.com/LT8311

LT8311

APPLICATIONS INFORMATION

voltage (V

). The opto-coupler’s input LED has

LT8311 SYNCHRONOUS CONTROL FUNDAMENTALS

Catch and Forward MOSFET Selection

OPTO(MAX)

a turn-on voltage of 1.2V:

V_OPTO(MAX)− 1.2V − 0.5V

R_D=

Whenselectingthesecondary-sidesynchronousMOSFETs,

it is important to choose the following parameters care-

fully to ensure robust operation of the system: maximum

drain-source voltage, maximum drain-source current and

maximum gate-source voltage. Furthermore, to maximize

systemefficiency,itisimportanttolowerpowerdissipation

I_{F _HIGH}

The extra 0.5V in the equation is margin to account for the

OPTO pin's linear range. The maximum OPTO pin voltage

is 6V (minimum guaranteed), when the LT8311’s V pin

IN

OPTO_MAX

is at 8V or higher. At lower V pin voltages, V

IN

is V – 1.7V.

intheMOSFETsbyminimizingtheiron-resistance(R

)

IN

DS(ON)

and gate charge (Q ). Please use the following guidelines

g

The previous equations show how R and R ought to

D

E

to choose appropriate catch and forward MOSFETs for a

specific application:

be calculated for large signal characteristics of an opto-

coupler-based voltage feedback loop. The final values

chosen for R and R may need to be tweaked from the

D

E

1. Maximum V Rating

DS

valuescalculatedheretoachieveasatisfactorycompromise

between the large and small signal characteristics of the

voltage feedback loop.

ThemaximumvoltageseenonthedrainofthecatchMOS-

FET is a function of the maximum input voltage (V

)

IN(MAX)

of the system, and the transformer turns ratio (N /N ).

S

P

Picking Soft-Start Capacitor (C ) for Output Soft-Start

SS

N_S

N_P

Catch MOSFET V_DS(MAX)= V_IN(MAX)

•

• Margin

The Operation section explained how the LT8311’s SS

pin helps with output soft-start at start-up, with output

overshoot control during short-circuit recovery, and to

prebias the voltage feedback loop during start-up of the

LT8311’s opto-control scheme. The soft-start capacitor,

where Margin is a number from 1 to 3 (typically 1.5 to 2),

allowing a certain safety margin in the catch MOSFET’s

V

equation. Thiswillaccountforvoltagespikesas-

DS(MAX)

sociated with the leakage inductance of the transformer’s

secondary winding. Using a snubber on the drain of the

catch MOSFET will minimize leakage inductance spikes

and allow Margin to approach the lower end of its range.

C , is charged by the LT8311’s internally trimmed 10µA

SS

current source at start-up. Since the FB pin voltage tracks

theSSpinvoltagewhenthevoltageonSSisbelow1.227V,

setting the SS pin’s slew rate will set the FB pin’s slew

rate, setting the time taken by the output to come up to

its regulation voltage. It is important to recognize that the

tracking between the SS pin’s slew rate and the FB’s pin

slew rate is only valid as long as the LT8311’s soft-start of

outputvoltageisslowerthantheprimary-sideIC’ssoft-start

of output voltage, as explained in the Operation section.

By observing this criteria, the following equation applies:

The maximum voltage seen on the drain of the forward

MOSFET is a function of the reset mechanism used on

the primary side of the forward converter to reset the

transformer’s magnetic flux.

When using active clamp reset:

V_OUT

Forward MOSFET V_DS(MAX)

≈

V_OUT

∂V_OUT∂V

10µA

C_SS

1−

FB

N_S

N_P

=

V_IN(MIN)

•

∂t

where C is the capacitor from the LT8311’s SS pin to

whereV

and V

istheminimuminputvoltageofthesystem,

SS

IN(MIN)

GND, V

is the output voltage of the forward converter,

is the forward converter’s output voltage. Note

OUT

and V is the LT8311’s FB pin voltage.

that this equation for the forward MOSFET’s V

FB

DS(MAX)

assumes that the primary side’s active clamp capacitor

In steady state, the SS pin voltage is clamped to a maxi-

mum of 2V by an internal clamp.

(C ) is large enough to be treated as a voltage source.

CL

8311f

31

For more information www.linear.com/LT8311

LT8311

APPLICATIONS INFORMATION

In reality, the drain voltage of the forward MOSFET will

where V

and V

are the maximum and mini-

IN(MAX)

IN(MIN)

havesome“bowing”overandabovethevoltagecalculated

mum input voltages of the forward converter.

here, associated with the energy shuttled between L

MAG

The catch MOSFET’s maximum continuous drain current,

and C during the reset process. For most applications,

CL

I

, can be calculated as:

CAT_RMS

this bowing can be accounted for by adding a 20% safety

margin on the forward MOSFET’s V

equation.

DS(MAX)



²





I_RIPP(P−P)

2

When using resonant reset:

I_{CAT _RMS}

=

1− D

• I

+

(

)



MIN

LOAD(MAX)

12



V_OUT

f_SW• 2 • L_MAG•C_RST

Forward MOSFET V_DS(MAX)

≈

where D

converter, I

of the forward converter, and I

peak ripple current in the output inductor. I

calculated as follows:

is the minimum duty cycle of the forward

LOAD(MAX)

MIN

is the maximum output load current

wheref istheforward converter’sswitchingfrequency,

is the peak-to-

SW

RIPP(P-P)

L

MAG

is the magnetizing inductance of the transformer’s

is

RIPP(P-P)

primary winding, and C

used on the primary side.

is the resonant reset capacitor

RST

1− D_AVG

f_SW•L_OUT

I_RIPP(P−P)= V_OUT

where D

•

Unlike the catch MOSFET, the V

equation of the

DS(MAX)

forward MOSFET typically does not need to account for

leakageinductancevoltagespikes.Thisisbecausetheturn-

on and turn-off events of the forward MOSFET, typically,

do not involve the forward MOSFET’s drain having to dis-

sipatelargeamountsofstoredleakageinductanceenergy.

is the average duty cycle of the forward con-

AVG

verter, f is the converter’s switching frequency, and

SW

L

is the output inductance value.

OUT

TheforwardMOSFET’smaximumcontinuous-draincurrent

(I ) is:

FWD_RMS

2. Maximum I Rating

DS

Most power MOSFET data sheets have a rating for

continuous-drain current, and pulse-drain current.

Continuous-drain current is the RMS drain current of the

catch and forward MOSFET, which is a function of the

inductor current, and the duty cycle at which the forward

converter is operating. Pulse-drain current is the

instantaneousmaximumdraincurrentseenbytheMOSFETs,

and is typically the peak of the inductor current waveform.



²

I_RIPP(P−P)

2

I_{FWD_RMS}

=

D_MAX• I

+







LOAD(MAX)

12



Both, the forward and catch MOSFET should have a peak

pulse current rating that is higher than the highest pos-

sible peak of the inductor current. This highest possible

peak occurs at the maximum load current, and is equal to:

Prior to calculating the maximum continuous-drain cur-

rent, it is useful to calculate the minimum, maximum and

average duty cycles of the forward converter:

I_RIPP(P−P)

I_LOAD(MAX)

+

2

V_OUT

3. Maximum V Rating

GS

D_MIN

=







N_S

N

_P

As explained earlier in the INTV Bias Supply section,

V_IN(MAX)

•

CC





INTV is regulated internally to 7V by the LT8311. By

CC

extension, the catch and forward MOSFET gates can be

V_OUT

D_MAX

=

drivenashighas7VwhenusingtheLT8311’sinternalLDO











N_S

N

V_IN(MIN)

•

to regulate INTV . For applications using the LT8311’s

CC

_P

internal LDO, picking a maximum V greater than 10V

GS

D_MAX+ D_MIN

should suffice.

D_AVG

=

2

8311f

32

For more information www.linear.com/LT8311

LT8311

APPLICATIONS INFORMATION

Alternatively, the INTV pin can be overdriven externally

The forward MOSFET’s turn-on and turn-off timings,

regardless of preactive or SYNC mode, are ZVS (zero

voltage switching) and ZCS (zero current switching)

events, respectively. The forward MOSFET turns on

after transformer reset is complete. Transformer reset

completionismarkedbythetransformer’smagnetizing

current flowing through the forward MOSFET’s body

diode,whichallowstheforwardMOSFETtoturnonwith

a small drain-to-source voltage across it. Similarly, the

forward MOSFET typically turns off after the primary-

side MOSFET has turned off. When the primary-side

MOSFET turns off, the only current flowing through

the forward MOSFET is the transformer magnetizing

current, which for all intents and purposes, can be as-

sumed to be zero. Consequently, the forward MOSFET

has insignificant switching losses.

CC

up to 16V. For such applications, picking MOSFETs with

a maximum V of 20V should suffice.

GS

4. Calculating MOSFET Losses Due to R

DS(ON)

The conduction/ohmic loss associated with the catch and

forward MOSFET is a function of the MOSFET’s RMS cur-

rent and its on-resistance. For the vast majority of forward

converterapplications,whichtypicallyhavehighmaximum

load currents on the output (5A or higher), minimizing

losses associated with the MOSFET’s R

will be far

DS(ON)

more critical than minimizing losses associated with the

MOSFET’s gate charge.

2

Catch MOSFET Ohmic Loss = (I

) • R

CAT_RMS

CAT

where R

is the on-resistance (R ) of the catch

DS(ON)

CAT

MOSFET.

B. Q Based Converter Power Loss:

g

2

Forward MOSFET Ohmic Loss = (I

) • R

FWD_RMS

FWD

As explained earlier in the INTV Bias Supply section,

CC

thereisapowerlossincurredinturningon/offthecatch

where R

is the on-resistance (R ) of the forward

DS(ON)

FWD

MOSFET.

and forward MOSFETs, associated with supplying gate

charge (Q ) to the gates of these MOSFETs. This charge

g

5. Calculating Q Based Loss

is supplied either by the supply voltage connected to

g

the LT8311’s V pin, when using the internal LDO to

IN

There are two aspects to the gate charge (Q ) based loss

g

regulate INTV , or by the supply voltage connected

CC

associated with the secondary synchronous MOSFETs:

to the LT8311’s INTV pin, when driving the INTV

CC

A. Q Based MOSFET Switching Loss:

pin externally. In either case, the total loss associated

g

with supplying the gate charge is:

The catch MOSFET’s turn-on and turn-off timings,

regardless of preactive or SYNC mode, are ZVS (zero

voltage switching) events. The catch MOSFET turns on

after the inductor current is already flowing through its

body diode. Similarly, when the catch MOSFET turns

off, theinductorcurrentsubsequentlyflowsthroughits

body diode. As a result, the voltage across the drain-

source terminals of the catch MOSFET is small during

switchingevents, resultinginthecatchMOSFEThaving

insignificant switching loss.

Power Loss = V

• (Q

+ Q ) • f

gFWD SW

SUPP

gCAT

where V

is the supply voltage connected to the

SUPP

LT8311’s V pin when INTV is internally regulated.

IN

CC

Alternatively V

is the supply voltage connected

SUPP

to the LT8311’s INTV pin when INTV is externally

CC

driven. Q

and Q

is the gate charge (Q ) of the

gCAT

gFWD g

catch and forward MOSFETs, respectively. f is the

SW

forward converter’s switching frequency.

8311f

33

For more information www.linear.com/LT8311

LT8311

APPLICATIONS INFORMATION

Setting R

in Preactive Mode

–150mV, the LT8311 resets its internal timeout signal.

The gate of the catch MOSFET, CG turns on (after some

propagation delay) when CSW is detected to fall below

–150mV. Upon CG going high, the catch MOSFET turns

on and pulls its drain voltage (CSW) close to its source

voltage, which is tied to GND. CG turns off predictively

in CCM before an anticipated CSW rising edge. If a CSW

rising edge (rising from below –150mV to above 1.2V)

does not come along in time to reset the timeout signal,

TIMER

In preactive mode, the TIMER pin resistor, R

, pro-

TIMER

grams the maximum period that can elapse between two

CSW rising edges before a timeout period is triggered.

Timeout allows the LT8311 to stop all synchronous activ-

ity in the event that the primary-side IC stops switching.

Since CSW rising edges represent primary-side switching

activity, timeout of CSW rising edges is interpreted as

stoppageofswitching—atwhichpointtheLT8311ceases

all secondary-side synchronous switching, and starts its

evaluation period. Refer to the Operation section for de-

tails on the evaluation period. Secondary-side switching

resumes when all conditions within the evaluation period

are satisfied. Timeout also ensures that switching activity

within preactive mode occurs at a frequency that is within

preactive mode’s operating frequency range.

the signal eventually charges up to voltage V

REF_TIMEOUT

and triggers an internal timeout condition. Consequently,

the LT8311 shuts down all synchronous conduction and

startstheevaluationperiod.Theevaluationperiodendsonly

when the four conditions listed in the Operation section,

including the timely reset of the internal timeout signal,

aresatisfiedforthreeconsecutiveCSWrisingedges.Upon

completion of the evaluation period, the LT8311 restarts

synchronous control.

As shown in Figure 18, every time the CSW pin voltage

is detected to rise past 1.2V from a voltage level below

V

REF_TIMEOUT

LT8311 INTERNAL

TIMEOUT SIGNAL

TIMEOUT

CSW

(PREACTIVE MODE)

1.2V

–150mV

TIMEOUT RESETS ONLY WHEN

CSW RISES PAST 1.2V, PRECEDED BY

FALLING BELOW –150mV

CG PREDICTIVE

TURN-OFF

CG

EVALUATION PERIOD

0V

TIME

CG TURNS ON WHEN CSW < –150mV

8311 F18

Figure 18. If Timeout Is Triggered in Preactive Mode, LT8311 Shuts Down All Synchronous Conduction and

Starts the Evaluation Period (Note: CSW's ringing waveform is caused by the inductor current getting to 0A.)

8311f

34

For more information www.linear.com/LT8311

LT8311

APPLICATIONS INFORMATION

The TIMER resistor is typically picked to set a timeout

period that is 20% higher than the forward converter’s

nominal switching period.

Setting R

in SYNC Mode

TIMER

In SYNC mode, the functionality of the timeout period is

similar to preactive mode, except that the resetting of the

LT8311’s internal timeout signal happens every time the

SYNC pin voltage falls below –1.2V. The goal of the time-

out function in SYNC mode is primarily to limit the catch

MOSFETon-timeintheeventthatthecatchMOSFETstays

ontoolongandconductsanunsafelevelofreverse-output

inductor current (current flows from the output capacitor

back towards the drain of the catch MOSFET). Refer to

the section, "Configuring CSP/CSN Inputs of the Current

Sense Comparators in SYNC Mode,” for further informa-

tion on what constitutes an unsafe level of reverse-output

inductor current.

1.20

Timeout =

f_SW

where f is converter switching frequency in Hz.

SW

Once a timeout period is calculated, the TIMER pin resis-

tor, R , can be calculated as follows:

TIMER

R

(kΩ) ~ 22.1E6 • Timeout

TIMER

where Timeout has units of seconds.

The relationship between R

and timeout is not per-

values(nearest1%)for

TIMER

fectlylinear. Table1showsR

TIMER

In SYNC mode, set the timeout period to be 20% longer

than the longest switching period of the primary-side IC.

Typically, the longest switching period of the primary-

side IC corresponds to the smallest frequency foldback

arangeoftypicalforwardconverterswitchingfrequencies:

Table 1. R_TIMER1% Resistor Values for Different Forward

Converter Switching Frequencies

SWITCHING

FREQUENCY (kHz)

TIMEOUT (µs) = 1.2/f

R

TIMER

(kΩ)

frequency (f

):

SW

SW_SMALLEST

100

150

200

250

300

400

500

12

8

267

1.2

Timeout =

178

133

107

88.7

66.5

53.6

f_{SW _SMALLEST}

6

Once a timeout period is calculated, the TIMER pin resis-

tor, R , can be calculated as follows:

4.8

4

TIMER

3

R

(kΩ) ~ 22.1E6 • Timeout

TIMER

2.4

where Timeout has units of seconds, and f

is in units of Hz.

SW_SMALLEST

Setting the timeout period at 1.2 • Switching Period will

keep synchronous conduction shut off through frequency

foldback in preactive mode, until the switching frequency

approaches 80% of its final value. For 100kHz switching

applications, this means that the LT8311 is ready for

synchronous conduction in preactive mode, at 80kHz.

Although80kHzisoutsidetheLT8311’sdatasheetspecifi-

cations for preactive mode operating frequency range, the

IC is designed to operate down to 80kHz to ride through

such a frequency foldback event. Timeout may also shut

off synchronous conduction during CSW pulse-skipping

events at light output load currents.

Configuring CSP/CSN Inputs of Current Sense

Comparator in Preactive Mode

The differential input current sense comparator in the

LT8311 is used to provide the IC with information about

the current in the catch MOSFET. Connect the CSP and

CSNpins, throughseriesresistors, tothedrainandsource

of the catch MOSFET (M ), to allow the LT8311 to sense

CG

the drain-source voltage of M , and make inferences

CG

about its current. Alternatively, CSP and CSN can be tied,

through series resistors, across a sense resistor which

is placed from the source of M to ground. As explained

CG

earlier in the Operation section, the CSP and CSN pins

should be configured, in preactive mode, to trip at zero

currentinthecatchMOSFET.Sincethecurrentcomparator

internally trips at 66mV, and the CSP pin sources 40µA,

8311f

35

For more information www.linear.com/LT8311

LT8311

APPLICATIONS INFORMATION

placing 1%, 1.65k resistors in series with CSP and CSN

should allow the LT8311 to trip with approximately zero

volts across the catch MOSFET. Note that the current

comparator has a propagation delay of 100ns nominally,

so the time taken from the current comparator getting

tripped to the catch MOSFET turning off is about 100ns.

During this 100ns, the current in the output inductor can

reverse and flow from the drain-to-source of the catch

Step 1: Determine the worst-case negative inductor

current value during regular FCM operation, which will

likelyhappenatthesmallestfrequencyfoldbackfrequency,

highest V , and at 0A load. An easy way to determine this

IN

is to run the forward converter with the LT8311 working

in SYNC mode and keeping the CSP/CSN pins shorted

to GND. Observing the inductor current waveform on an

oscilloscope at start-up, with V at its maximum value,

IN

MOSFET. IfnegativecurrentflowinM isnotdesired, the

and the load at 0A, can quickly give the user an idea of the

CG

CSP pin series resistor can be chosen to trip at a positive

worst-case negative inductor current value (I

)

CATCH_FET

value of source-to-drain catch MOSFET current. The fol-

during regular start-up operation. This will set a lower

bound on the CSP/CSN trip point (V minimum):

lowing equation allows calculation of the resistor (R

)

CSP

TRIP

to be placed in series with the CSP pin for a desired value

of catch MOSFET trip current (I ):

V

Minimum = |I

| • R

TRIP

CATCH_FET DS(ON)

TRIP

where R

and I

is the on-resistance of the catch MOSFET,

is the worst-case magnitude of negative

DS(ON)

CATCH_FET

66mV − I_TRIP• R_SNS

R_CSP

=

40µA

inductor current (current flowing from drain to source of

catch MOSFET) during FCM operation at startup.

where R

is the R

of the catch MOSFET when the

DS(ON)

SNS

CSPandCSNpinsareconnecteddirectlyacrossthedrain-

Step 2: Pick a trip point (V

from the value calculated in Step 1. Typical margin might

be 20%, thereby setting a trip point of:

) that allows some margin

TRIP

sourceterminalsofthecatchMOSFET. Alternatively, R

SNS

is the sense resistor in the source of the catch MOSFET

if the CSP/CSN pins are connected directly across the

sense resistor. Once the resistor in series with the CSP

V

= 1.2 • V

Minimum

TRIP

pin (R ) is decided, place an identical resistor in series

Step 3: Determine the selected catch MOSFET’s single

CSP

with the CSN pin.

pulse avalanche energy rating (E in mJ) from the MOS-

AS

FET’s data sheet and its drain-source break down voltage

Configuring CSP/CSN Inputs of the Current Sense

Comparator in SYNC Mode

(V

in V).

BR(DSS)

Step 4: Make sure that the chosen CSP/CSN trip voltage

does not allow so much negative current in the catch

MOSFET, such that when the catch MOSFET turns off, its

avalanche energy rating (based on the following equation)

is violated:

The LT8311 is typically operated in SYNC mode when the

forward converter needs to be operated in FCM (forced

continuous mode). In SYNC mode, the LT8311 receives

synchronous control signals on its SYNC pin, through a

pulse transformer, from the primary-side IC’s S

pin.

OUT

V_TRIP(in Volts) < R_DS(ON)

•

Connecting the LT8311’s CSP/CSN pins across the catch

MOSFET’s drain and source, in SYNC mode, is done to

protect the catch MOSFET from conducting too large a

reverse inductor current at light load.











(1.3 • V_BR(DSS)− V_OUT

)

2 •E

•

AS

(1.3 • V_BR(DSS)• L_{OUT }

)





The following guidelines offered (Steps 1 to 5) may be

used to determine an appropriate catch MOSFET reverse

where,

(Joules) = Catch MOSFET’s single-pulse avalanche

current trip point (V

):

TRIP

E

AS

energy rating.

V

(V) = Catch MOSFET’s drain-source break down

BR(DSS)

voltage rating.

8311f

36

For more information www.linear.com/LT8311

LT8311

APPLICATIONS INFORMATION

R

(Ω) = Catch MOSFET’s on-resistance rating from

4. Tie the PMODE and SYNC pins to 0V.

5. Configure R to set a timeout period that is 20%

DS(ON)

the MOSFET’s data sheet.

TIMER

V

(V) = Forward converter’s output voltage in steady-

higher than the steady-state switching period of the

OUT

state.

forward converter.

L

(H) = Output inductor.

6. Connect the CSW and FSW pins, through 2k ceramic

resistors, to the drains of the catch and forward MOS-

FET,respectively.Keeptheconnectionasshortinlength

as possible.

OUT

If the V

voltage is too large, causing the catch MOS-

TRIP

FET’s avalanche energy rating to be violated, then go

back to Steps 1 and 2, or pick a different MOSFET, until

the avalanche energy experienced by the MOSFET in the

application is within its data sheet specified SOA.

7. Connect the CSP and CSN pins, each through a 1.65k

resistor, directly across the drain-source terminals of

the catch MOSFET for V sensing. A small 10pF filter

DS

Step 5: Upon selecting the appropriate trip point, the

capacitor may be required across the CSP and CSN

seriesresistors,R andR ,maybedeterminedbased

CSP

CSN

pins to filter out external noise that couples in.

on the following equation:

8. Connect CG and FG to the gates of the catch and for-

ward MOSFET, respectively, with connections that are

as short as possible.

66mV − V_TRIP

R_CSP= R_CSN

Connect R

=

40µA

between the CSP pin and the catch MOS-

Once synchronous control is up and running:

CSP

FET’s drain, and R

between the CSN pin and the catch

CSN

9. Ensure that the voltage at the CSW and FSW pins does

not exceed the abs max rating of 150V. If the CSW

or FSW pin voltage exceeds 150V, you may need to

use a RC snubber on the drain of the catch and/or the

forward MOSFET.

MOSFET’s source.

PREACTIVE MODE SYNCHRONOUS CONTROL

Preactive Mode General Guidelines

10.If the catch MOSFET current trip point is causing the

inductor current to reverse (flowing from output back

to the drain of the catch MOSFET) at light loads, re-

configure the CSP/CSN trip point to trip at a slightly

positive value of source-to-drain current in the catch

MOSFET. This typically involves increasing the CSP

and CSN series resistors to a value greater than 1.65k.

The following guidelines are meant to summarize the

connections and operating conditions typically needed

to set up the LT8311’s synchronous control in preactive

mode. While these guidelines are meant to serve as a

starting point, they are not a substitute for bench evalua-

tion. Ultimately, each application that uses the LT8311’s

preactive mode scheme must be evaluated for its specific

requirements, and the IC must be configured accordingly.

11.If the catch MOSFET’s current trip point does not

seem consistent, and the catch MOSFET’s turn-off

edge seems to show jitter at the trip current, the filter

capacitor across the CSP and CSN pins may need to

be adjusted.

1. BiasupV andINTV asperdatasheetrecommenda-

IN

CC

tions.

2. Place a minimum of 2.2µF ceramic capacitor from the

V pin to GND.

IN

Note that typically, the FB pin will be connected through a

resistor divider network to the output voltage, when using

the LT8311 as part of a voltage feedback loop.

3. Place a minimum of 4.7µF ceramic capacitor from the

INTV pin to GND.

CC

8311f

37

For more information www.linear.com/LT8311

LT8311

APPLICATIONS INFORMATION

SYNC MODE SYNCHRONOUS CONTROL

constraint, the equation below sets a limit on the

minimum R

• C

product required:

50ns

SYNC

Picking the Pulse Transformer and High Pass Filter

R_SYNC• C_SYNC

≥



In SYNC Mode, the LT8311 determines the turn-on/off

timings of the catch and forward MOSFETs based on

voltage signals on its SYNC pin. Figure 7 in the Operation

section shows a typical circuit used to communicate syn-



















2V

−1• n





V

MAX



where V

is the maximum S

voltage, as shown

OUT

MAX

in Figure 19.

chronous control signals from the primary-side IC’s S

OUT

pin to the LT8311’s SYNC pin. This circuit utilizes a pulse

transformer (T2 in Figure 7) to provide isolation between

the primary and secondary sides, and a high pass filter

2. R

must be small enough to ensure that the

SYNC

SYNC signal is sufficiently damped. An underdamped

SYNC signal can cause ringing large enough to cause

false triggering of the SYNC detection comparators,

which may lead to improper secondary-synchronous

control. The equation used to calculate R

optimal damping is given by:

(R

and C

). C

blocks DC signals from being

SYNC

applieddirectlytoT2.EliminatingtheDCcomponentofthe

signal,throughthehighpassfilter(R andC ),

S

OUT

SYNC

for

SYNC

allows the SYNC pin signal to go positive or negative at

the rising and falling edges of S , as shown in Figure

OUT





1

2 •ζ

L_m

C_SYNC

19. Positive and negative signals of equal magnitudes and

duration allow equal positive and negative volt-seconds

to be maintained on transformer T2, preventing any net

magnetizing current build-up.

R_SYNC

≤

•









where ζ is the damping factor and should typically be

chosentobeabout1.L isthemagnetizinginductance

m

Appropriate values of R

and C

must be chosen

SYNC

of the pulse transformer’s primary winding.

SYNC

to satisfy all of the following criteria:

Choosing L to be larger allows the damping factor

m

1. The R • C time constant must be large

to increase, so it would be wise to choose a pulse

transformer with a larger primary winding inductance

to increase the damping of the SYNC signal.

SYNC

enough to allow a sufficiently long pulse width to be

generated on the SYNC pin with sufficient overdrive

voltage. This is shown in Figure 19 where t1 must be

at least 50ns at a SYNC voltage of 2V (or greater

over drive) to trip the SYNC comparators. Using this

Smaller R

values also reduce the sensitivity of

SYNC

the highpass filter to stray signals (parasitic magnetic

fields) that may couple in.

V

MAX

S

OUT

0V

V

MAX

2V

SYNC

t1

0V

–2V

t1

–V

MAX

TIME

8311 F19

Figure 19. Positive and Negative SYNC Edges Are Generated on the Rising and Falling Edges of S_OUT, Respectively.

The LT8311 Requires Pulse Width Time, t1, to Be at Least 50ns (Typical) with the SYNC Pin Voltage at 2V (or Greater

Overdrive) to Trigger the Internal SYNC Detect Comparators.

8311f

38

For more information www.linear.com/LT8311

LT8311

APPLICATIONS INFORMATION

3. R

must be large enough to limit the amount of

capabilityisabout100mAandLT8310’smaximumcurrent

capability is about 300mA). It is recommended to design

SYNC

source/sink current required each time a positive or

negative SYNC pin voltage signal is generated. The

for an I

that is lower than the maximum recommended

MAX

S

OUT

pin’s gate drivers offer limited source current

source current specified, to allow for design margin over

process and temperature.

capability; R

must be large enough to ensure

SYNC

that this constraint in current-drive is not violated.

For instance, the LT3752’s S drivers are rated for

If the R

calculation in Step 4 yields an unreasonable

SYNC

OUT

resistancevalue, gobacktosteps1to3, andchangeeither

a maximum current of about 100mA. This results in:

V_MAX

L , V

m

, or C

. Recalculate R

SYNC

in Step 4 until all

MAX

SYNC

criteria are satisfied.

R_SYNC

≥

100mA

gate driver high voltage, which is

OUT

Design Example

V

is the S

MAX

typically about 8V to 12V for the LT3752.

In a LT3752-LT8311 forward converter design, pulse

transformer PE-68386NL is chosen for communication

of LT3752 S signals, through a highpass filter, to the

LT8311’s SYNC pin.

The following steps can be used as guidelines to calculate

R

and C

values:

OUT

SYNC

Step 1: Choose Pulse Transformer. A typically recom-

mendedchoiceisthePE-68386NLfromPulseElectronics.

Step 1: This transformer has a magnetizing inductance

of L = 785µH.

m

Step 2: Determine the primary-side IC’s maximum S

OUT

Step 2: LT3752’s V = 12V.

MAX

signalmagnitude,V

(seeFigure19).Thissetsthemaxi-

MAX

mum magnitude of the signal on the LT8311’s SYNC pin.

Step 3: Choose C

= 220pF

SYNC

Step 3: Guess a capacitance value for C . A good

SYNC

Step 4: Designing for I

= 70mA, L = 785µH, C

m SYNC

MAX

starting value might be between 220pF and 1nF.

= 220pF, V

= 12V, results in the following calculation

MAX

for R :

Step 4: Pick R

based on constraint shown in the

SYNC

following equation:

944Ω ≥ R

≥ Max {127Ω, 171Ω}

SYNC

Conclusion







1

2

L_m

_SYNC

•

≥ R_SYNC≥ MAX



C



Inthisexample, R

=560ΩischosenalongwithC

SYNC

= 220pF as the highpass filter to be used along with pulse

















50ns

• −1 • IN(2V / V_MAX

V_MAX

,

transformer, PE-68386NL to communicate the LT3752’s









C

)

I







S

signals to the LT8311’s SYNC pin.









MAX

 ^SYNC

OUT

whereI

isthemaximumcurrentsource/sinkcapability

MAX

of the primary-side IC’s S

pin (LT3752’s maximum

OUT

8311f

39

For more information www.linear.com/LT8311

LT8311

TYPICAL APPLICATIONS

18V to 72V, 12V/8A Active Clamp Isolated Forward Converter

L1

6.8µH

4:4

T1

V

IN

OUT

18V to

72V

12V/8A

C1

4.7µF

× 3

C18

R24

20k

•

+

68pF

D2

R1

C20

470µF

V

C19

22µF

× 2

100k

IN

C17

2.2nF

C10

2.2µF

100V

C11

UVLO_VSEC

OVLO

100nF

C9

R16, 2k

R2

5.9k

R25

M2

100nF

FSW

FG

100k

M3

D3

AOUT

OUT

FB

R17, 2k

R3

1.82k

R26

11.3k

R14

10k

D1

CSW

LT3753

LT8311

R18, 1.78k

M1

CSP

CG

M4

IVSEC

RT

SYNC

V

IN

V

OUT

240kHz

R5

31.6k

R4

71.5k

R13, 2k

R23

100k

R19, 1.78k

R20, 1.5k

ISENSEP

OC

CSN

PGOOD

INTV

R12

6mΩ

S

OUT

OPTO

COMP

SYNC

SS

CC

TAO

ISENSEN

C15

4.7µF

TAS

TOS

TBLNK

GND SS1

PMODE

TIMER GND

INTV

CC

COMP

SS2 FB

C12

15nF

C6

4.7µF

R11

100Ω

C5

10pF

C16

2.2µF

R6

49.9k

R22

R8

100k

154k

R21

2.94k

C7

1µF

R7

34k

PS2801-1

C3

0.47µF

C14

1µF

R9

100k

C4

1µF

8311 TA02

1k

T1: CHAMPS B45R2-0404.04

T2: CEL PS2801

2.2nF

L1: CHAMPS PQR2050-08

M1: INFINEON BSC077N12NS3

M2: IR IRF6217PBF

M3: FAIRCHILD SEMI. FDMS86101DC

M4: INFINEON BSC077N12NS3

D2: CENTRAL SEMI. CMMR1U-02

D3: DIODES INC. SBRIU150

Efficiency and Power Loss at V_IN= 48V

96

14

V

IN

= 48V

94

12

EFFICIENCY

92

10

90

88

86

84

8

6

4

2

POWER LOSS

82

0

5

7

9

1

3

LOAD CURRENT (A)

8311 TA02b

8311f

40

For more information www.linear.com/LT8311

LT8311

TYPICAL APPLICATIONS

18V to 72V, 12V/12.5A, 150W Active Clamp Isolated Forward Converter

V

OUT

IN

18V TO

72V

12V

T1

L1

12.5A

T2

INTV

V

AUX

4:4

CC

6.8µH

+

C14

470µF

16V

•

R38

20k

D2

D3

•

C1

4.7µF

100V

×3

C9

2.2µF

C10

2.2µF

D4

•

C8

C13

15nF

ZVN4525E6

M5

C24

2.2nF

250V

BSC077N12NS3

C7

100nF

22µF

16V

×2

FDMS86101

Si2325DS

D1

M4

M2

M3

R17

R18

0.15Ω

R16

10k

499Ω

R21

100Ω

R22

100Ω

BSC077N12NS3

M1

HOUT HI

AOUT

V

SENSE

OUT

OC

IN

V

IN

AUX

C11

2.2µF

R1

C28

68pF

SYNC

R30

R27

100k

I

SENSEP

100k

GND

R14

2k

100k

R15

0.006Ω

UVLO_V

SEC

LT8311

FB

PGOOD

R2

5.9k

R31

T3

SYNC

I

SENSEN

SOUT

11.3k

LT3752

•

C6 220pF

OVLO

GND

R13

560Ω

R3

1.82k

INTV

CC

V

INTV

AUX

CC

R28

3.16k

C17

220nF

R20

499k

R11

10k

R25

100Ω

C5

4.7µF

C16

1µF

R29

13.7k

C12

4.7µF

C18

68pF

PS2801-1

2.2nF

C19

4.7nF

HFB

R12

1.1k

R5

22.6k

R4

R7

R9

31.6k

R8

C3

R10

2.8k

C4

8311 TA03a

34k

22nF

C2

0.33µF

R24

100k

R6

7.32k

R23

100k

R26

1k

22nF

49.9k

71.5k

T1: CHAMPS G45R2_0404.04D

T2: BH ELECTRONICS L00-3250

T3: PULSE PE-68386NL

L1: CHAMPS G45AH2-0404-D4

D1, D2, D3: BAS516

D4: CENTRAL SEMI CMMR1U-02

Efficiency vs Load Current

96

94

92

90

88

86

24V

48V

72V

IN

0

3

6

9

12

15

LOAD CURRENT (A)

8311 TA03b

8311f

41

For more information www.linear.com/LT8311

LT8311

TYPICAL APPLICATIONS

18V to 72V, 12V/12.5A, 150W No-Opto, Active Clamp Isolated Forward Converter

V

OUT

V

IN

18V TO 72V

12V

T1

L1

12.5A

T2

C1

INTV

V

AUX

4:4

CC

6.8µH

+

C14

470µF

16V

4.7µF

100V

×3

•

R38

20k

D2

D3

•

C9

2.2µF

C10

2.2µF

D4

•

C8

C13

22µF

16V

×2

15nF

C24

2.2nF

250V

BSC077N12NS3

C7

100nF

FDMS86101

Si2325DS

D1

M5 ZVN4525E6

M4

M2

M3

R17

R18

0.15Ω

R16

10k

499Ω

R21

100Ω

R22

100Ω

BSC077N12NS3

M1

HOUT HI

AOUT

V

SENSE

OUT

OC

IN

V

IN

AUX

C11

2.2µF

R1

SYNC

I

SENSEP

100k

GND

R14

2k

R15

UVLO_V

SEC

LT8311

FB

0.006Ω

PGOOD

R2

5.9k

T3

SYNC

I

SENSEN

SOUT

LT3752

•

C6 220pF

OVLO

GND

R13

560Ω

R3

1.82k

V

AUX

INTV

CC

INTV

CC

R11

10k

C12

4.7µF

R20

499k

C5

4.7µF

HFB

R12

1.1k

R5

22.6k

R4

R7

R9

31.6k

R8

C3

R10

2.8k

C4

2.2nF

34k

22nF

C2

0.33µF

8311 TA04a

R6

7.32k

22nF

49.9k

60.4k

T1: CHAMPS G45R2_0404.04D

T2: BH ELECTRONICS L00-3250

T3: PULSE PE-68386NL

L1: CHAMPS G45AH2-0404-D4

D1, D2, D3: BAS516

D4: CENTRAL SEMI CMMR1U-02

V_OUTvs Load Current (No-Opto)

Efficiency vs Load Current

14.0

96

94

92

90

88

13.5

13.0

12.5

12.0

11.5

11.0

10.5

10.0

V

= 70V

= 60V

= 48V

= 36V

= 20V

IN

24V

48V

72V

IN

86

0

2

4

6

8

10

12

3

6

9

12

15

LOAD CURRENT (A)

8311 TA04b

8311 TA04c

8311f

42

For more information www.linear.com/LT8311

LT8311

TYPICAL APPLICATIONS

150V to 400V, 12V/16.7A, 200W Active Clamp Isolated Forward Converter

T1

V

OUT

IN

31:5

150V TO

400V

12V

L1

16.7A

T2

R38

10k

R19

•

INTV

CC

V

AUX

INTV

C10

CC

R35

R16 4.2Ω

D4

15µH

+

C14

330µF

16V

C15

10nF

630V

402Ω

•

D3

FDMS86200

×3

C1

2.2µF

630V

374k

D2

C9

10µF

4.7µF

C8

47nF

630V

R36

374k

ACPL-W346

•

M4

D5

V

D1

C13

33µF

16V

×4

CC

RJK0653DPB

×2

C24

10nF

250V

M5

BSP300

V

OUT

M2

R38

ANODE

CATHODE

C21

0.22µF

C20

10µF

0.002Ω

M3

R17

R18

0.15Ω

V

EE

499Ω

IPD60R1K4C6

R21

100Ω

R22

100Ω

C27

120pF

R34

IPD65R25OC6

M1

499k

HOUT

HI

SENSE

AOUT

V

OUT

OC

IN

V

AUX

V

IN

C11

2.2µF

C28

68pF

R30

R1

499k

SYNC

R27

100k

I

SENSEP

100k

GND

R14

2k

R15

0.022Ω

FB

UVLO_V

SEC

LT8311

PGOOD

SYNC

R2

5.76k

R31

11.3k

T3

I

SENSEN

SOUT

LT3752-1

•

C6 220pF

OVLO

GND

R13

560Ω

R3

2.94k

INTV

CC

V

INTV

CC

AUX

C12

R28

3.16k

C17

1µF

R20

432k

C18

100pF

R29

R11

10k

R25

100Ω

5.11k

C5

4.7µF

PS2801-1

4.7µF

C19

22nF

HFB

R12

806Ω

C16

1µF

C3

R5

40.2k

R4

R7

100k

R6

R9

78.7k

R8

R10

22k

8311 TA05a

0.22µF

C2

R24

22k

R23

22k

R26

1.2k

95.3k

13k

124k

0.47µF

C4

3.3nF

2.2nF

T1: CHAMPS LT80R2-12AC-3124005

T2: WÜRTH 750817020

T3: PULSE PE-68386NL

L1: COILCRAFT AGP2923-153

D1: CENTRAL SEMI CMR1U-10

D2, D3, D5: BAS516

D4: CENTRAL SEMI CMMR1U-02

Efficiency vs Load Current

96

95

94

93

92

91

90

89

88

87

86

85

V

= 150V

= 250V

= 350V

= 400V

IN

0

2.5

5

7.5

10 12.5 15 17.5

LOAD CURRENT (A)

8311 TA05b

8311f

43

For more information www.linear.com/LT8311

LT8311

TYPICAL APPLICATIONS

150V to 400V, 12V/16.7A, 200W No-Opto, Active Clamp Isolated Forward Converter

T1

V

IN

OUT

31:5

150V TO

400V

12V

L1

16.7A

T2

R38

10k

R19

•

INTV

CC

V

AUX

R16 4.2Ω

CC

R35

15µH

D4

+

C14

330µF

16V

C15

10nF

630V

402Ω

FDMS86200

×3

C1

2.2µF

630V

•

D3

INTV

374k

D2

C10

4.7µF

C9

10µF

C8

47nF

630V

D5

ACPL-W346

R36

374k

•

M4

V

D1

C13

33µF

16V

×4

CC

RJK0653DPB

×2

M5

BSP300

C24

10nF

250V

V

M2

OUT

R38

0.002Ω

ANODE

CATHODE

C21

0.22µF

C20

10µF

M3

R17

R18

0.15Ω

V

EE

499Ω

IPD60R1K4C6

R21

100Ω

R22

100Ω

C27

120pF

R34

IPD65R25OC6

M1

499k

HOUT HI

AOUT

V

SENSE

OUT

IN

V

AUX

V

IN

C11

2.2µF

OC

SENSEP

R1

499k

SYNC

I

GND

R14

2k

R15

UVLO_V

OVLO

SEC

LT8311

FB

0.022Ω

PGOOD

SYNC

R2

5.76k

T3

I

SENSEN

SOUT

LT3752-1

•

C6 220pF

R13

560Ω

R3

2.94k

V

AUX

INTV

CC

INTV

CC

GND

R11

10k

C12

4.7µF

R20

432k

HFB

C5

4.7µF

R12

806Ω

C3

R5

40.2k

R4

R7

100k

R6

R9

78.7k

R8

R10

22k

C4

8311 TA06a

2.2nF

0.22µF

C2

0.47µF

95.3k

13k

107k

3.3nF

T1: CHAMPS LT80R2-12AC-3124005

T2: WÜRTH 750817020

T3: PULSE PE-68386NL

L1: COILCRAFT AGP2923-153

D1: CENTRAL SEMI CMR1U-10

D2, D3, D5: BAS516

D4: CENTRAL SEMI CMMR1U-02

V_OUTvs Load Current (No-Opto)

Efficiency vs Load Current

14.0

96

95

13.5

13.0

12.5

12.0

11.5

11.0

10.5

10.0

94

93

92

91

90

89

88

87

86

85

V

= 150V

= 250V

= 350V

= 400V

V

= 150V

IN

= 250V

= 350V

= 400V

0

2

4

6

8

10 12 14 16 18

0

2.5

5

7.5

10 12.5 15 17.5

LOAD CURRENT (A)

8311 TA06b

8311 TA06c

8311f

44

For more information www.linear.com/LT8311

LT8311

TYPICAL APPLICATIONS

150V to 400V, 12V/16.7A, 200W, Active Clamp Isolated Forward Converter

(Using Gate Drive Transformer for High Side Active Clamp)

T1

V

OUT

IN

31:5

150V TO

400V

12V

L1

D3

16.7A

R19

T2

C15

10nF

630V

•

INTV

D5

V

AUX

C10

4.7µF

R35

CC

R38

10k

15µH

+

C14

330µF

16V

402Ω

D4

•

FDMS86200

×3

374k

D2

C1

2.2µF

630V

C8

47nF

630V

C9

10µF

R36

374k

•

C22

220nF

M4

C23 3.3nF

T4

C13

33µF

16V

×4

M2

RJK0653DPB

×2

M5

BSP300

C24

10nF

250V

D1

•

R38

R16

10k

C20

0.002Ω

C21

470pF

M3

10µF

R17

R18

0.15Ω

R37

100Ω

499Ω

R21

100Ω

R22

100Ω

IPD60R1K4C6

C27

120pF

R34

IPD65R25OC6

M1

499k

HOUT HI

AOUT

V

SENSE

OUT

IN

V

AUX

V

IN

C11

2.2µF

OC

SENSEP

R1

499k

SYNC

R30

100k

R27

100k

C28

68pF

I

GND

R14

2k

R15

0.022Ω

UVLO_V

SEC

LT8311

FB

PGOOD

SYNC

R2

5.76k

T3

R31

I

SENSEN

SOUT

11.3k

LT3752-1

•

C6 220pF

OVLO

GND

R13

560Ω

R3

2.94k

INTV

CC

INTV

CC

V

AUX

R28

3.16k

C17

1µF

R20

432k

C18

100pF

R29

R25

100Ω

R11

10k

C12

5.11k

C5

4.7µF

PS2801-1

2.2nF

C19

22nF

HFB

R12

806k

C16

1µF

C3

R5

40.2k

R4

R7

100k

R6

R9

R10

8311 TA07

0.22µF

78.7k

R8

22k

R24

22k

C2

0.47µF

R23

22k

R26

1.2k

95.3k

13k

124k

C4

3.3nF

T1: CHAMPS LT80R2-12AC-3124005

T2: WÜRTH 750817020

T3: PULSE PE-68386NL

T4: ICE GT05-111-100

L1: COILCRAFT AGP2923-153

D1: CENTRAL SEMI CMR1U-10

D2, D3, D5: BAS516

D4: CENTRAL SEMI CMMR1U-02

Efficiency vs Load Current

96

95

94

93

92

91

90

89

88

87

86

85

V

= 150V

= 250V

= 350V

= 400V

IN

0

2.5

5

7.5

10 12.5 15 17.5

LOAD CURRENT (A)

8311 TA07b

8311f

45

For more information www.linear.com/LT8311

LT8311

TYPICAL APPLICATIONS

75V to 150V, 24V/14A 340W Active Clamp Isolated Forward Converter

(Using Gate Drive Transformer for High Side Active Clamp)

T1

V

24V

14A

IN

OUT

10:6

75V TO

150V

L1

D3

R19

T2

C15

4.7nF

250V

•

INTV

D5

V

AUX

C10

4.7µF

R35

CC

R38

10k

15µF

+

C14

470µF

25V

1k

D4

•

102k

D2

C1

2.2µF

250V

1PB072N15N3G

C8

15nF

250V

M2

IRFL214

C9

10µF

R36

102k

•

C22

220nF

M4

C23 3.3nF

T4

C13

BSC047N08NS3

×2

M5

BSP300

C24

10nF

250V

22µF

25V

×4

D1

•

R38

R16

10k

C20

0.003Ω

C21

470pF

M3

10µF

R17

R18

0.15Ω

R37

100Ω

499Ω

R21

100Ω

R22

100Ω

C27

120pF

R34

IPB200N25N3

M1

698k

HOUT HI

AOUT

V

SENSE

OUT

IN

V

AUX

V

IN

C11

2.2µF

OC

SENSEP

R1

6.98k

C28

68pF

SYNC

R30

100k

R27

100k

I

GND

R14

2k

R15

0.0075Ω

UVLO_V

LT8311

SEC

FB

PGOOD

SYNC

R2

6.04k

T3

R31

I

SENSEN

SOUT

5.36k

LT3752-1

•

C6 220pF

OVLO

GND

R13

560Ω

R3

5.76k

INTV

CC

V

INTV

CC

AUX

C17

R28

3.16k

C18

100pF

R29

0.33µF

R25

100Ω

C12

4.7µF

5.11k

R11

10k

C5

4.7µF

R20

365k

PS2801-1

2.2nF

C19

22nF

HFB

R12

806Ω

C16

1µF

C3

R5

53k

R4

93.1k

R7

80.1k

R6

R9

R10

8311 TA08a

0.22µF

C2

52.3k

R8

22k

R24

22k

R23

22k

R26

1.2k

10k

82.5k

0.47µF

C4

3.3nF

T1: CHAMPS LT80R2-12AC-1006

T2: WÜRTH 750817020

T3: PULSE PE-68386NL

T4: ICE GT05-111-100

L1: COILCRAFT AGP2923-153

D1: CENTRAL SEMI CMR1U-10

D2, D3, D5: BAS516

D4: CENTRAL SEMI CMMR1U-02

Efficiency vs Load Current

96

95

94

93

92

91

90

89

88

87

86

V

= 75V

IN

= 100V

= 125V

= 150V

0

2.5

5

7.5

10

12.5

15

LOAD CURRENT (A)

8311 TA08b

8311f

46

For more information www.linear.com/LT8311

LT8311

PACKAGE DESCRIPTION

Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.

FE Package

Variation: FE20(16)

20-Lead Plastic TSSOP (4.4mm)

(Reference LTC DWG # 05-08-1924 Rev Ø)

Exposed Pad Variation CB

6.40 – 6.60*

3.86

(.152)

(.252 – .260)

3.86

(.152)

20

18

16 15 14 1312 11

6.60 ±0.10

2.74

(.108)

4.50 ±0.10

6.40

(.252)

BSC

2.74

(.108)

SEE NOTE 4

0.45 ±0.05

1.05 ±0.10

0.65 BSC

5

7

8

1

3

6

9 10

RECOMMENDED SOLDER PAD LAYOUT

1.20

(.047)

MAX

4.30 – 4.50*

(.169 – .177)

0.25

REF

0° – 8°

0.65

(.0256)

BSC

0.09 – 0.20

(.0035 – .0079)

0.50 – 0.75

(.020 – .030)

0.05 – 0.15

(.002 – .006)

FE20(16) (CB) TSSOP REV 0 0512

0.195 – 0.30

(.0077 – .0118)

TYP

NOTE:

1. CONTROLLING DIMENSION: MILLIMETERS 4. RECOMMENDED MINIMUM PCB METAL SIZE

FOR EXPOSED PAD ATTACHMENT

*DIMENSIONS DO NOT INCLUDE MOLD FLASH. MOLD FLASH

SHALL NOT EXCEED 0.150mm (.006") PER SIDE

MILLIMETERS

(INCHES)

2. DIMENSIONS ARE IN

3. DRAWING NOT TO SCALE

8311f

47

For more information www.linear.com/LT8311

LT8311

TYPICAL APPLICATION

75V to 150V, 24V/14A 340W No-Opto, Active Clamp Isolated Forward Converter

T1

L1, 15µH

D4

V

24V

14A

IN

OUT

10:6

75V TO

150V

D3

C15

4.7nF

250V

R19

1k

C8

R38

10k

T2

•

INTV

D5

V

AUX

C10

4.7µF

CC

R35

R36

+

C14

470µF

25V

•

D2

1PB072N15N3G

C1

2.2µF

250V

C9

10µF

C24

10nF

250V

15nF

•

M4

C22

220nF

C23 3.3nF

T4

250V

M2

IRFL214

BSC047N08NS3

×2

C13

M5

BSP300

R38

0.003Ω

22µF

25V

×4

D1

•

R16

10k

C20

C21

470pF

M3

10µF

R17

R18

0.15Ω

R37

100Ω

499Ω

R21

R22

100Ω

C27

120pF

100Ω

R34

1PB200N25N3

M1

698k

HOUT HI

AOUT

V

SENSE

OUT

IN

V

AUX

IN

C11

OC

SENSEP

R1

6.98k

SYNC

I

2.2µF

GND

R14

2k

R15

UVLO_V

SEC

LT8311

FB

0.0075Ω

PGOOD

SYNC

R2

6.04k

T3

I

SENSEN

SOUT

LT3752-1

•

C6 220pF

OVLO

GND

R13

R3

5.76k

560Ω

8311 TA08a

INTV

C5

CC

C12

4.7µF

R11

10k

R20

432k

2.2nF

HFB

R12

806Ω

4.7µF

R5

53k

R4

93.1k

R7

80.1k

R6

R9

C3

0.1µF

C2

R10

22k

C4

3.3nF

52.3k

R8

75k

10k

0.47µF

V_OUTvs Load Current (No-Opto)

Efficiency vs Load Current

T1: CHAMPS LT80R2-12AC-1006

T2: WÜRTH 750817020

T3: PULSE PE-68386NL

28

27

26

25

24

23

22

96

95

94

93

92

91

90

89

88

87

86

T4: ICE GT05-111-100

L1: COILCRAFT AGP2923-153

D1: CENTRAL SEMI CMR1U-10

D2, D3, D5: BAS516

D4: CENTRAL SEMI CMMR1U-02

V

= 75V

V

= 75V

IN

= 100V

= 125V

= 150V

= 100V

= 125V

= 150V

21

20

0

2

4

6

8

10 12 14 16

0

2.5

5

7.5

10

12.5

15

LOAD CURRENT (A)

8311 TA08b

8311 TA08c

RELATED PARTS

PART NUMBER

DESCRIPTION

COMMENTS

LT3752/LT3752-1

Active Clamp Synchronous Forward Controllers with

Internal Housekeeping Controller

Ideal for Medium Power 24V, 48V and Up to 400V Input Applications

LT3753

100V Input, Active Clamp Synchronous Forward

Controller

Ideal for Medium Power 24V and 48V Input Applications

LTC3765/LTC3766

Isolated Synchronous No-Opto Forward Controller

Chip Set

Direct Flux Limit, Multiphase Capable Ideal for Medium Power 24V and

48V Input Applications

LTC3722-1/

LTC3722-2

Synchronous Phase Modulated Full Bridge Controllers Ideal for High Power 24V and 48V Input Applications

LT3748

Isolated Flyback Controller

5V ≤ V ≤ 100V, No-Opto Required MSOP-16 (12)

IN

LT8300

100V Micropower Isolated Flyback Converter

100V Isolated Flyback Converters

Monolithic No-Opto with Integrated 260mA Switch, TSOT-23

LT3511/LT3512

Monolithic No-Opto with Integrated 240mA/420mA Switch, MSOP-16(12)

8311f

LT 0314 • PRINTED IN USA

LinearTechnology Corporation

1630 McCarthy Blvd., Milpitas, CA 95035-7417

48

For more information www.linear.com/LT8311

(408)432-1900 FAX: (408) 434-0507 www.linear.com/LT8311

●

 LINEAR TECHNOLOGY CORPORATION 2014


型号：	LT8311EFE#TRPBF
厂家：	Linear
描述：	LT8311 - Synchronous Rectifier Controller with Opto-Coupler Driver for Forward Converters; Package: TSSOP; Pins: 20; Temperature Range: -40°C to 85°C 开关光电二极管
文件：	总48页 (文件大小：719K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

LT8311EFE#TRPBF [Linear]

相关型号：

LT8311HFE#PBF

LT8311HFE#TRPBF

LT8311IFE#PBF

LT8311IFE#TRPBF

LT8311MPFE#PBF

LT8311MPFE#TRPBF

LT8312

LT8312EMS#PBF

LT8312EMS#TRPBF

LT8312HMS#PBF

LT8312HMS#TRPBF

LT8312IMS#PBF