LT4356-2 [Linear]
Surge Stopper with Ideal Diode n Adjustable Output Clamp Voltage; 浪涌抑制器具有理想二极管ñ可调输出钳位电压
| 型号： | LT4356-2 |
| 厂家： | 
Linear |
| 描述： | Surge Stopper with Ideal Diode n Adjustable Output Clamp Voltage |
| 文件： | 总24页 (文件大小：311K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
LTC4364-1/LTC4364-2
Surge Stopper
with Ideal Diode
FEATURES
DESCRIPTION
The LTC®4364 surge stopper with ideal diode controller
protects loads from high voltage transients. It limits and
regulates the output during an overvoltage event, such
as load dump in automobiles, by controlling the voltage
drop across an external N-channel MOSFET pass device.
The LTC4364 also includes a timed, current limited circuit
breaker. In a fault condition, an adjustable fault timer must
expire before the pass device is turned off. The LTC4364-1
latches off the pass device while the LTC4364-2 automati-
callyrestartsafteradelay.TheLTC4364preciselymonitors
the input supply for overvoltage (OV) and undervoltage
(UV) conditions. The external MOSFET is held off in un-
dervoltage and auto-retry is disabled in overvoltage.
n
Wide Operating Voltage Range: 4V to 80V
n
Withstands Surges Over 80V with V Clamp
CC
n
Adjustable Output Clamp Voltage
n
Ideal Diode Controller Holds Up Output Voltage
During Input Brownouts
n
Reverse Input Protection to –40V
n
Reverse Output Protection to –20V
n
Overcurrent Protection
n
Low 10μA Shutdown Current at 12V
n
Adjustable Fault Timer
n
0.1% Retry Duty Cycle During Faults (LTC4364-2)
n
Available in 4mm × 3mm 14-Lead DFN, 16-Lead MSOP,
and 16-Lead SO Packages
An integrated ideal diode controller drives a second MOS-
FET to replace a Schottky diode for reverse input protec-
tion and output voltage holdup. The LTC4364 controls the
forward voltage drop across the MOSFET and minimizes
reverse current transients upon power source failure,
brownout or input short.
APPLICATIONS
n
Automotive/Avionic Surge Protection
n
Hot Swap/Live Insertion
n
Redundant Supply ORing
Output Port Protection
n
L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear
Technology Corporation. All other trademarks are the property of their respective owners.
TYPICAL APPLICATION
Overvoltage Protector Regulates
Output at 27V During Input Transient
4A, 12V Overvoltage Output Regulator with Ideal Diode
Withstands 200V 1ms Transient at VIN
C
LOAD
= 6.8µF
= 0.5A
TMR
92V INPUT SURGE
I
V
IN
V
OUT
CLAMPED
AT 27V
20V/DIV
10mΩ
FDB33N25
FDB3682
V
IN
12V
12V
12V
+
383k
CMZ5945B
68V
22µF
27V CLAMP (ADJUSTABLE)
50ms/DIV
6.8nF
2.2k
10Ω
V
OUT
20V/DIV
4364 TA01b
102k
V
HGATE SOURCE DGATE SENSE
LTC4364
OUT
FB
CC
SHDN
Ideal Diode Holds Up Output
During Input Short
UV
6V
4.99k
UV
90.9k
10k
12V
12V
C
I
= 6300µF
= 0.5A
LOAD
LOAD
OV
60V
ENOUT
ENABLE
INPUT SHORTED
TO GND
OV
V
IN
FAULT
10V/DIV
FLT
GND
TMR
436412 TA01a
0.22µF
OUTPUT HELD UP
V
OUT
10V/DIV
4364 TA01c
1ms/DIV
436412f
1
LTC4364-1/LTC4364-2
ABSOLUTE MAXIMUM RATINGS (Notes 1, 2)
FB, TMR Voltages ..................................... –0.3V to 5.5V
Supply Voltage: V ................................. –40V to 100V
SOURCE, OV, UV, SHDN Voltages............. –40V to 100V
DGATE, HGATE Voltages
CC
Operating Ambient Temperature Range
LTC4364C................................................ 0°C to 70°C
LTC4364I .............................................–40°C to 85°C
LTC4364H.......................................... –40°C to 125°C
Storage Temperature Range .................. –65°C to 150°C
Lead Temperature (Soldering, 10 sec)
(Note 3)..................... SOURCE – 0.3V to SOURCE + 10V
ENOUT, FLT Voltages................................ –0.3V to 100V
OUT, SENSE Voltages.................................–20V to 100V
Voltage Difference (SENSE to OUT)............ –30V to 30V
MS, SO Packages .............................................300°C
Voltage Difference (OUT to V ) ..............–100V to 100V
CC
Voltage Difference (SENSE to SOURCE) ..–100V to 100V
PIN CONFIGURATION
TOP VIEW
TOP VIEW
OUT
SENSE
NC
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
FB
OUT
SENSE
1
2
3
4
5
6
7
14 FB
TOP VIEW
TMR
ENOUT
FLT
13 TMR
12 ENOUT
11 FLT
1
2
3
4
5
6
7
8
OUT
SENSE
NC
16 FB
15 TMR
14 ENOUT
13 FLT
12 GND
11 OV
DGATE
SOURCE
HGATE
DGATE
SOURCE
HGATE
NC
15
DGATE
SOURCE
HGATE
NC
GND
OV
10 GND
V
9
8
OV
UV
10 UV
CC
V
9
SHDN
CC
SHDN
UV
MS PACKAGE
16-LEAD PLASTIC MSOP
= 150°C, θ = 120°C/W
JMAX JA
V
SHDN
CC
DE PACKAGE
14-LEAD (4mm × 3mm) PLASTIC DFN
T
S PACKAGE
16-LEAD PLASTIC SO
= 150°C, θ = 100°C/W
T
= 150°C, θ = 45°C/W
JA
JMAX
EXPOSED PAD (PIN 15) PCB GND CONNECTION OPTIONAL
T
JMAX
JA
ORDER INFORMATION
LEAD FREE FINISH
LTC4364CDE-1#PBF
LTC4364IDE-1#PBF
LTC4364HDE-1#PBF
LTC4364CDE-2#PBF
LTC4364IDE-2#PBF
LTC4364HDE-2#PBF
LTC4364CMS-1#PBF
LTC4364IMS-1#PBF
LTC4364HMS-1#PBF
LTC4364CMS-2#PBF
LTC4364IMS-2#PBF
LTC4364HMS-2#PBF
TAPE AND REEL
PART MARKING*
43641
PACKAGE DESCRIPTION
TEMPERATURE RANGE
LTC4364CDE-1#TRPBF
LTC4364IDE-1#TRPBF
LTC4364HDE-1#TRPBF
LTC4364CDE-2#TRPBF
LTC4364IDE-2#TRPBF
LTC4364HDE-2#TRPBF
LTC4364CMS-1#TRPBF
LTC4364IMS-1#TRPBF
LTC4364HMS-1#TRPBF
LTC4364CMS-2#TRPBF
LTC4364IMS-2#TRPBF
LTC4364HMS-2#TRPBF
0°C to 70°C
14-Lead (4mm × 3mm) Plastic DFN
14-Lead (4mm × 3mm) Plastic DFN
14-Lead (4mm × 3mm) Plastic DFN
14-Lead (4mm × 3mm) Plastic DFN
14-Lead (4mm × 3mm) Plastic DFN
14-Lead (4mm × 3mm) Plastic DFN
16-Lead Plastic MSOP
43641
–40°C to 85°C
–40°C to 125°C
0°C to 70°C
43641
43642
43642
–40°C to 85°C
–40°C to 125°C
0°C to 70°C
43642
43641
43641
16-Lead Plastic MSOP
–40°C to 85°C
–40°C to 125°C
0°C to 70°C
43641
16-Lead Plastic MSOP
43642
16-Lead Plastic MSOP
43642
16-Lead Plastic MSOP
–40°C to 85°C
–40°C to 125°C
43642
16-Lead Plastic MSOP
436412f
2
LTC4364-1/LTC4364-2
ORDER INFORMATION
LEAD FREE FINISH
LTC4364CS-1#PBF
LTC4364IS-1#PBF
LTC4364HS-1#PBF
LTC4364CS-2#PBF
LTC4364IS-2#PBF
LTC4364HS-2#PBF
TAPE AND REEL
PART MARKING*
LTC4364S-1
LTC4364S-1
LTC4364S-1
LTC4364S-2
LTC4364S-2
LTC4364S-2
PACKAGE DESCRIPTION
TEMPERATURE RANGE
0°C to 70°C
LTC4364CS-1#TRPBF
LTC4364IS-1#TRPBF
LTC4364HS-1#TRPBF
LTC4364CS-2#TRPBF
LTC4364IS-2#TRPBF
LTC4364HS-2#TRPBF
16-Lead Plastic SO
16-Lead Plastic SO
16-Lead Plastic SO
16-Lead Plastic SO
16-Lead Plastic SO
16-Lead Plastic SO
–40°C to 85°C
–40°C to 125°C
0°C to 70°C
–40°C to 85°C
–40°C to 125°C
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
Consult LTC Marketing for information on non-standard lead based finish parts.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VCC = 12V.
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
80
UNITS
V
l
l
l
l
V
CC
Operating Supply Range
Supply Current
4
I
I
I
V
CC
= SOURCE = SENSE = OUT = 12V, No Fault
370
10
0
750
50
µA
CC
Supply Current in Shutdown
Reverse Input Current
Shutdown
μA
CC(SHDN)
CC(REV)
V
CC
= −30V
–10
μA
Surge Stopper
l
l
HGATE Gate Drive, (V
− V
)
V
V
= 4V, DGATE Low, I = 0µA, −1µA
HGATE
5
10
7
12
9
16
V
V
∆V
HGATE
HGATE
SOURCE
CC
CC
= 8V to 80V, DGATE Low, I
= 0µA, −1µA
HGATE
l
l
l
l
I
I
HGATE Pull-Up Current
V
= HGATE = DGATE = SOURCE = 12V
–10
60
–20
130
130
1
–30
µA
mA
mA
mA
HGATE(UP)
CC
HGATE Pull-Down Current
Overvoltage: FB = 1.5V, ∆V
= 5V
HGATE(DN)
HGATE
60
Overcurrent: ∆V
= 100mV, ∆V
= 5V
SNS
HGATE
0.4
Shutdown/Fault Turn-Off: ∆V
= 5V
HGATE
l
l
l
I
SOURCE Input Current
V
V
V
= SOURCE = SENSE = OUT = 12V
18
32
–2.0
40
90
–3.5
µA
µA
mA
SRC
CC
CC
= SOURCE = 12V, Shutdown
= –30V
SOURCE
l
l
V
FB Servo Voltage
V
= 12V to 80V
1.22
1.25
0
1.28
1
V
FB
CC
I
FB
FB Input Current
FB = 1.25V
µA
l
l
l
Overcurrent Fault Threshold,
V
CC
V
CC
V
CC
= 4V to 80V, OUT = 2.5V to V , 0°C to 125°C
45
43
18
50
50
25
55
57
32
mV
mV
mV
∆V
SNS
CC
(V
– V
)
= 4V to 80V, OUT = 2.5V to V , –40°C to 125°C
SENSE
OUT
CC
= 4V to 80V, OUT = 0V to 1.5V
l
l
I
I
SENSE Input Current
SENSE = V = SOURCE = OUT = 12V
55
–2
110
–4
µA
SNS
CC
SENSE = –15V
mA
l
l
TMR Pull-Up Current, Overvoltage
TMR Pull-Up Current, Overcurrent
TMR = 1V, FB = 1.5V, V – OUT = 0.5V
–1.3
–40
–2.2
–50
–3
–60
µA
µA
TMR(UP)
CC
TMR = 1V, FB = 1.5V, V – OUT = 75V
CC
l
l
–6
–10
–14
µA
µA
TMR = 1V, ∆V
TMR = 1V, ∆V
= 60mV, V – OUT = 0.5V
CC
SNS
SNS
–210 –260 –310
= 60mV, V – OUT = 75V
CC
l
l
TMR Pull-Up Current, Warning
TMR Pull-Up Current, Retry
TMR Pull-Down Current
TMR = 1.3V, FB = 1.5V, V – OUT = 0.5V
–3
–5
–2
–7
–3
µA
µA
CC
TMR = 1V, FB = 1.5V
–1.3
l
l
I
TMR = 1V, FB = 1.5V, Retry
Shutdown
1.1
0.3
2
0.75
2.7
1.5
µA
mA
TMR(DN)
l
l
V
V
TMR Fault Threshold
FLT Falling, V = 4V to 80V
1.22
1.32
1.25
1.35
1.28
1.38
V
V
TMR(F)
CC
TMR Gate Off Threshold
HGATE Falling, V = 4V to 80V
CC
TMR(G)
436412f
3
LTC4364-1/LTC4364-2
ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VCC = 12V.
SYMBOL
PARAMETER
CONDITIONS
HGATE Rising (After 32 Cycles), V = 4V to 80V
MIN
TYP
MAX
UNITS
V
l
l
l
l
l
l
V
TMR Retry Threshold
Early Warning Timer Window
UV Input Threshold
UV Input Hysteresis
UV Reset Threshold
OV Input Threshold
OV Input Hysteresis
UV, OV Input Current
0.125 0.15 0.175
TMR(R)
CC
V
– V , V = 4V to 80V
TMR(F) CC
75
1.22
25
100
1.25
50
125
1.28
80
mV
V
∆V
TMR
TMR(G)
V
V
V
V
V
UV Falling, V = 4V to 80V
CC
UV
mV
V
UV(HYST)
UV(RST)
OV
UV Falling, V = 4V to 80V, LTC4364-1 Only
0.5
0.6
0.7
CC
OV Rising, V = 4V to 80V
1.22
1.25
12
1.28
V
CC
mV
OV(HYST)
l
l
I
UV, OV = 1.25V
UV, OV = –30V
0
–0.3
1
–0.6
µA
mA
IN
l
l
V
OL
ENOUT, FLT Output Low
I
I
= 0.25mA
= 2mA
0.1
0.5
0.3
1.3
V
V
SINK
SINK
l
l
l
I
ENOUT, FLT Leakage Current
ENOUT, FLT = 80V
0
2.5
1
µA
V
LEAK
Out High Threshold (V – V
)
ENOUT from Low to High
ENOUT from High to Low
0.4
1.4
0.7
2.2
∆V
CC
OUT
OUT(TH)
OUT(RST)
OUT
V
Out Reset Threshold
OUT Input Current
3
V
l
l
I
V
= OUT = 12V, SHDN Open
40
–4
80
–8
µA
mA
CC
OUT = –15V
l
l
l
l
Output Current in Shutdown, I
SHDN Input Threshold
SHDN Pin Float Voltage
SHDN Input Current
+ I
OUT
V
V
V
= SOURCE = SENSE = OUT = 12V, Shutdown
12
1.6
4
40
2.2
6.5
µA
V
SNS
CC
CC
CC
V
V
= 4V to 80V
0.5
2.3
–1
SHDN
= 12V to 80V
V
SHDN(FLT)
SHDN
I
SHDN = 0.5V
–3.3
–1.5
–120 –300
µA
µA
µA
Maximum Allowable Leakage, V = 4V
CC
l
SHDN = –30V
l
l
D
Retry Duty Cycle, Overvoltage
Retry Duty Cycle, Output Short
FB = 1.5V, V = 80V, OUT = 16V
0.125
0.2
%
%
CC
∆V
= 60mV, V – OUT = 12V
SNS CC
0.075 0.12
l
l
l
t
t
t
Undervoltage to HGATE Low Propagation
Delay
UV Steps from 1.5V to 1V
1.3
0.25
0.5
4
1
2
μs
μs
μs
OFF,HGATE(UV)
OFF,HGATE(OV)
OFF,HGATE(OC)
Overvoltage to HGATE Low Propagation
Delay
FB Steps from 1V to 1.5V
Overcurrent to HGATE Low Propagation
Delay
∆V
SNS
Steps from 0mV to 150mV, OUT = 0V
Ideal Diode
l
l
ΔV
DGATE
DGATE Gate Drive, (V
− V
)
V
V
= 4V, No Fault, I = 0µA, −1µA
DGATE
5
10
8.5
12
12
16
V
V
DGATE
SOURCE
CC
CC
= 8V to 80V, No Fault, I
= 0µA, −1µA
DGATE
l
I
DGATE Pin Pull-Up Current
–5
–10
–15
µA
DGATE = SOURCE = V = 12V, ∆V = 0.1V
DGATE(UP)
DGATE(DN)
CC
SD
l
l
I
DGATE Pin Pull-Down Current
60
0.4
130
1
mA
mA
∆V
DGATE
∆V
DGATE
= 5V, ∆V = –0.2V
SD
= 5V, Shutdown/Fault Turn-Off
l
l
Ideal Diode Regulation Voltage,
SOURCE
10
24
30
48
45
72
mV
mV
∆V
SD
∆V
DGATE
∆V
DGATE
= 2.5V, V = SOURCE = 12V
CC
(V
− V
)
SENSE
= 2.5V, V = SOURCE = 4V
CC
l
t
DGATE Turn-Off Propagation Delay
0.35
1.5
μs
∆V Steps from 0.1V to –1V
SD
OFF(DGATE)
Note 1: Stress beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 3: Internal clamps limit the HGATE and DGATE pins to minimum of
10V above the SOURCE pin. Driving these pins to voltages beyond the
clamp may damage the device.
Note 2: All Currents into device pins are positive and all currents out
of device pins are negative. All voltages are referenced to GND unless
otherwise specified.
436412f
4
LTC4364-1/LTC4364-2
TYPICAL PERFORMANCE CHARACTERISTICS
Supply Current vs VCC
ICC(SHDN) vs VCC
ICC(SHDN) vs Temperature
16
450
400
350
300
250
200
150
100
50
60
50
40
30
20
10
0
V
= SOURCE = SENSE = OUT
SHDN = 0
SHDN = 0
CC
V
= 12V
CC
14
12
I
CC
OUT = 0
10
8
OUT = 0
OUT = 12V
6
I
+ I
SNS OUT
OUT = V
CC
4
2
I
SRC
0
0
50 60
40 50
(V)
0
10 20 30 40
(V)
70 80
–50 –25
0
25
50
75 100 125
0
10 20 30
60 70 80
V
V
TEMPERATURE (°C)
CC
CC
436412 G02
436412 G03
436412 G01
ISNS + IOUT in Shutdown vs VCC
GATE Pull-Up Current vs VCC
∆VHGATE vs IHGATE
–24
–20
–16
–12
–8
100
80
60
40
20
0
14
13
12
11
10
9
HGATE = DGATE = SOURCE = V
CC
∆V = 100mV
SD
SOURCE = V
V
= 12V
CC
CC
HGATE
DGATE
SNS = OUT = 48V
8
SNS = OUT = 24V
SNS = OUT = 12V
–4
7
0
6
20 40
4
6
8
10 12
(V)
60 80
40
(V)
–10
(µA)
0
10 20 30
50 60 70 80
0
–20
–5
–15
V
CC
V
I
HGATE
CC
436412 G05
436412 G04
436412 G06
∆VHGATE vs VIN in Figure 1
∆VDGATE vs IDGATE
∆VDGATE vs VIN in Figure 1
14
12
14
12
14
13
12
11
10
9
V
= 12V
CC
10
8
10
8
6
4
2
6
4
2
R4 IN FIGURE 1
R4 IN FIGURE 1
8
0Ω
0Ω
2.2k
4.7k
10k
2.2k
4.7k
10k
7
6
–6
(µA)
4
8
12
16
(V)
20
24
0
–2
–4
I
–8
–10
4
8
12
16
(V)
20
24
V
V
IN
IN
DGATE
436412 G09
436412 G07
436412 G08
436412f
5
LTC4364-1/LTC4364-2
TYPICAL PERFORMANCE CHARACTERISTICS
HGATE Pull-Down Current
vs Temperature
DGATE Pull-Down Current
vs Temperature
Overcurrent Threshold
vs OUT Voltage
200
175
150
125
200
175
150
125
60
50
40
30
20
10
∆V
∆V
CC
= 100mV OR FB = 1.5V
HGATE
= 12V
V
V
– V = 200mV
SOURCE
SNS
SENSE
= 5V
= 12V
CC
V
∆V
= 5V
DGATE
100
75
100
75
50
50
50
TEMPERATURE (°C)
100 125
50
TEMPERATURE (°C)
100 125
–50 –25
0
25
75
–50 –25
0
25
75
2.0
0
0.5 1.0 1.5
2.5 3.0 3.5 4.0
V
(V)
OUT
436412 G10
436412 G11
436412 G12
Overvoltage TMR Current
vs VCC – VOUT
Overcurrent TMR Current
vs VCC – VOUT
Retry Duty Cycle vs VCC – VOUT
(LTC4364-2 Only)
–60
–50
–40
–30
–20
–10
0
–300
–250
–200
–150
–100
–50
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
OVERVOLTAGE CONDITION
OUT = 5V
TMR = 1V
OVERCURRENT CONDITION
OUT = 5V
TMR = 1V
OVERVOLTAGE CONDITION
OUT = 16V
OVERCURRENT CONDITION
OUT = 0V
0
50 60
(V)
50 60
10 20 30 40
– V (V)
OUT
0
10 20 30 40
– V
70 80
0
70 80
40 50
– V (V)
0
10 20 30
V
60 70 80
V
V
CC
CC
OUT
CC
OUT
436412 G13
436412 G14
436412 G15
Ideal Diode Regulation Voltage
vs VCC
Ideal Diode Regulation Voltage
vs Temperature
EN, FLT Output Low vs Current
60
50
40
30
20
10
1.50
1.25
50
45
40
35
30
25
20
15
10
V
= 12V
CC
V
= 4V
CC
1.00
0.75
V
= 12V
CC
0.50
0.25
0
50
75 100 125
0
1
2
3
4
5
–50 –25
0
25
12 20
(V)
4
6
8
10
40 60 80
CURRENT (mA)
TEMPERATURE (°C)
V
CC
436412 G16
436412 G18
436412 G17
436412f
6
LTC4364-1/LTC4364-2
PIN FUNCTIONS
DGATE:DiodeControllerGateDriveOutput.Whentheload
currentcreatesmorethan30mVofdropacrosstheMOSFET,
the DGATE pin is pulled high by an internal charge pump
currentsourceandclampedto12VabovetheSOURCEpin.
When the load current is small, the DGATE pin is actively
driven to maintain 30mV across the MOSFET. If reverse
current develops, a 130mA fast pull-down circuit quickly
connects the DGATE pin to the SOURCE pin, turning off
the MOSFET. Connect to SOURCE or leave open if unused.
OUT: Output Voltage Sense Input. This pin senses the
voltage at the drain of the external N-channel MOSFET
connected to the DGATE pin. The voltage difference
between V and OUT sets the fault timer current. When
CC
this difference drops below 0.7V, the ENOUT pin goes
high impedance.
OV: Overvoltage Comparator Input. When OV is above
its threshold of 1.25V, the fault retry function is inhibited.
When OV falls below its threshold, the HGATE pin is al-
lowedtoturnbackonwhenfaultconditionsarecleared. At
power-up, an OV voltage higher than its threshold blocks
turn-on of the external N-channel MOSFET controlled by
the HGATE pin (see Applications Information). Connect
to GND if unused.
ENOUT: Enable Output. An open-drain output that goes
high impedance when the voltage at the OUT pin is above
(V − 0.7V), indicating the external MOSFETs are fully
CC
on. The state of the pin is latched and resets when the
OUT pin drops below 2.2V. The internal FET is capable of
sinking up to 2mA and can withstand up to 80V. Connect
to GND if unused.
SENSE: Current Sense Input. Connect this pin to the input
side of the current sense resistor. The current limit circuit
controls the HGATE pin to limit the sense voltage between
the SENSE and OUT pins to 50mV if OUT is above 2.5V.
When OUT drops below 1.5V, the sense voltage is reduced
to 25mV for additional protection during an output short.
The sense amplifier also starts a current source to charge
up the TMR pin. The voltage difference between SENSE
and OUT must be limited to less than 30V. Connect to
OUT if unused.
Exposed Pad (DE Package Only): Exposed pad may be
left open or connected to device ground (GND).
FB: Voltage Regulator Feedback Input. Connect this pin to
the resistive divider connected between the OUT pin and
ground. During an overvoltage condition, the HGATE pin
is controlled to maintain 1.25V at the FB pin. Connect to
GND to disable the overvoltage clamp.
FLT: Fault Output. An open-drain output that pulls low
after the TMR pin reaches the warning threshold of 1.25V.
It indicates the pass device controlled by the HGATE pin
is about to turn off because either the supply voltage has
stayed at an elevated level for an extended period of time
(overvoltage fault) or the device is in an overcurrent con-
dition (overcurrent fault). The internal FET is capable of
sinking up to 2mA and can withstand up to 80V. Connect
to GND if unused.
SHDN: Shutdown Control Input. Pulling the SHDN pin
below 0.5V shuts off the LTC4364 and reduces the V pin
CC
current to 10μA. Pull this pin above 2.2V or disconnect it
to allow the internal current source to turn the part back
on.Whenleftopen,theSHDNvoltageisinternallyclamped
to 4V. The leakage current to ground at the pin should be
limited to no more than 1μA if no pull-up device is used to
turn the part on. The SHDN pin can be pulled up to 100V
or below GND by 40V without damage.
GND: Device Ground.
SOURCE: Common Source Input and Gate Drive Return.
Connect this pin directly to the sources of the external
back-to-back N-channel MOSFETs. SOURCE is the anode
of the ideal diode and the voltage sensed between this pin
and the SENSE pin is used to control the source-drain
voltage across the N-channel MOSFET (forward voltage
of the ideal diode).
HGATE: Surge Stopper Gate Drive Output. The HGATE pin
ispulledupbyaninternalchargepumpcurrentsourceand
clamped to 12V above the SOURCE pin. Both voltage and
current amplifiers control the HGATE pin to regulate the
output voltage and limit the current through the MOSFET.
436412f
7
LTC4364-1/LTC4364-2
PIN FUNCTIONS
TMR: Fault Timer Input. Connect a capacitor between this
pin and ground to set the times for fault warning, fault
turn-off, and cool down periods. Either voltage regulation
or current regulation starts pulling up the TMR pin. The
current charging up this pin during the fault conditions
UV: Undervoltage Comparator Input. When the UV pin
falls below its 1.25V threshold, the HGATE pin is pulled
down with a 1mA current. When the UV pin rises above
1.25V plus the hysteresis, the HGATE pin is pulled up by
the internal charge pump. For LTC4364-1, after HGATE
is latched off, pulling the UV pin below 0.6V resets the
latch and allows HGATE to retry. If unused, connect to
the SHDN pin.
increaseswiththevoltagedifferencebetweenV andOUT
CC
pins (see Applications Information). When TMR reaches
1.25V, the FLT pin pulls low to indicate the detection of a
fault condition. If the condition persists, the pass device
controlled by HGATE turns off when TMR reaches the
threshold of 1.35V. As soon as the fault condition disap-
pears, a cool down interval commences while the TMR
pin cycles 32 times between 0.15V and 1.35V with 2μA
charge and discharge currents. When TMR crosses 0.15V
the 32nd time, the HGATE pin is allowed to pull high turn-
ing the pass device back on if the OV pin voltage is below
its threshold for the LTC4364-2 version. The HGATE pin
latches low after fault time-out for the LTC4364-1.
V : Positive Supply Voltage Input. The positive supply
CC
input ranges from 4V to 80V for normal operation. It can
also be pulled below ground potential by up to 40V during
a reverse battery condition, without damaging the part.
Shutting down the LTC4364 by pulling the SHDN pin to
ground reduces the V current to 10μA.
CC
436412f
8
LTC4364-1/LTC4364-2
BLOCK DIAGRAM
V
CC
HGATE
SOURCE
DGATE
SENSE
12V
12V
HGATE OFF
DGATE OFF
10µA
20µA
CHARGE
PUMP
f = 620kHz
FD
DA
+
+
–
–
VA
IA
+
+
30mV
30mV
+
+
–
–
–
–
–
+
50mV/
25mV
1.25V
OUT
FB
SHDN
–
+
UV
–
V
– 0.7V
CC
OC
OV
ENOUT SET
1.25V
ENOUT RESET
+
SHDN
CONTROL
CIRCUITRY
UV
IN
+
–
–
+
RETRY
OV
2.2V
–
+
FLT
1.35V
V
CC
0.15V
+
32x
ENOUT
–
2µA
+
–
1.25V
TMR
GND
436412 BD
436412f
9
LTC4364-1/LTC4364-2
OPERATION
The LTC4364 is designed to suppress high voltage surges
and limit the output voltage to protect load circuitry and
ensurenormaloperationinhighavailabilitypowersystems.
It features an overvoltage protection regulator that drives
an external N-channel MOSFET (M1) as the pass device
and an ideal diode controller that drives a second external
N-channel MOSFET (M2) for reverse input protection and
output voltage holdup.
to help keep the MOSFET within its safe operating area
(SOA). The LTC4364-1 latches off M1 and keeps FLT low
after a fault timeout. The LTC4364-2 allows M1 to turn
back on and FLT to go high impedance after a cool down
timer cycle, provided the OV pin is below its threshold.
After the HGATE pin is latched low following fault, mo-
mentarily pulling the SHDN pin below 0.5V resets the fault
and allows HGATE to pull high for both LTC4364-1 and
LTC4364-2. In addition, momentarily pulling the UV pin
below 0.6V allows HGATE to pull high after the cool down
timerdelayforLTC4364-1,buthasnoeffectonLTC4364-2.
TheLTC4364operatesfromawiderangeofsupplyvoltage,
from 4V to 80V. With a clamp limiting the V supply, the
input voltage may be higher than 80V. The input supply
can also be pulled below ground potential by up to 40V
without damaging the LTC4364. The low power supply
requirement of 4V allows it to operate even during cold
cranking conditions in automotive applications.
CC
The source and drain of MOSFET M2 serve as the anode
and cathode of the ideal diode. The LTC4364 controls the
DGATE pin to maintain a 30mV forward voltage across the
drain and source terminals of M2. It reduces the power
dissipation and increases the available supply voltage to
the load, as compared to using a discrete blocking diode.
If M2 is driven fully on and the load current results in
more than 30mV of forward voltage, the forward voltage
Normally, thepassdeviceM1isfullyon, supplyingcurrent
to the load with very little power loss. If the input voltage
surgestoohigh,thevoltageamplifier(VA)controlsthegate
of M1 and regulates the voltage at the OUT pin to a level
that is set by an external resistive divider from the OUT pin
to ground and the internal 1.25V reference. The LTC4364
also detects an overcurrent condition by monitoring the
voltage across an external sense resistor placed between
the SENSE and OUT pins. An active current limit circuit
(IA) controls the gate of M1 to limit the sense voltage to
50mV if OUT is above 2.5V. In the case of a severe output
short that brings OUT below 1.5V, the sense voltage is
reduced to 25mV to reduce the stress on M1.
is equal to R
• I
.
DS(ON) LOAD
In the event of an input short or a power supply failure,
reverse current temporarily flows through the MOSFET
M2 that is on. If the reverse voltage exceeds –30mV, the
LTC4364 pulls the DGATE pin low strongly and turns off
M2, minimizing the disturbance at the output.
If the input supply drops below the GND pin voltage, the
DGATE pin is pulled to the SOURCE pin voltage, keeping
M2 off. When the HGATE pin pulls low in any fault condi-
tion, the DGATE pin also pulls low, so both pass devices
are turned off.
During an overvoltage or overcurrent event, a current
source starts charging up the capacitor connected at
the TMR pin to ground. The pull-up current source in
overcurrent condition is 5 times of that in overvoltage to
accelerate turn-off. When TMR reaches 1.25V, the FLT pin
pulls low to warn of impending turn-off. The pass device
M1 stays on and the TMR pin is further charged up until it
reaches 1.35V, at which point the HGATE pin pulls low and
turns off M1. The fault timer allows the load to continue
functioning during brief transient events while protecting
theMOSFETfrombeingdamagedbyalongperiodofinput
overvoltage,suchasloaddumpinvehicles.Thefaulttimer
period decreases with the voltage across the MOSFET,
If the output (and so the SOURCE pin, through the body
diode of M2) drops below GND, the HGATE pin is pulled
to the SOURCE pin voltage, turning M1 off and shutting
down the forward current path.
An input undervoltage condition is accurately detected
using the UV pin. The HGATE and DGATE pins remain low
if UV is below its 1.25V threshold. The SHDN pin not only
turns off the pass devices but also shuts down the internal
circuitry, reducing the supply current to 10µA.
436412f
10
LTC4364-1/LTC4364-2
APPLICATIONS INFORMATION
Some power systems must cope with high voltage surges
of short duration such as those in automobiles. Load
circuitry must be protected from these transients, yet
critical systems may need to continue operating during
these events.
If the voltage regulation loop is engaged for longer than
the timeout period, set by the timer capacitor, an overvolt-
age fault is detected. The HGATE pin is pulled down to the
SOURCE pin by a 130mA current, turning M1 off. This
prevents M1 from being damaged during a long period
of overvoltage, such as during load dump in automobiles.
After the fault condition has disappeared and a cool down
period has transpired, the HGATE pin starts to pull high
again (LTC4364-2). The LTC4364-1 latches the HGATE pin
low after an overvoltage fault timeout and can be reset
using the SHDN or UV pin (see Resetting Faults).
The LTC4364 drives an N-channel MOSFET (M1) at the
HGATE pin to limit the voltage and current to the load cir-
cuitry during supply transients or overcurrent events. The
selection of M1 is critical for this application. It must stay
on and provide a low impedance path from the input sup-
ply to the load during normal operation and then dissipate
power during overvoltage or overcurrent conditions. The
LTC4364 also drives a second N-channel MOSFET (M2) at
the DGATE pin as an ideal diode to protect the load from
damage during reverse polarity input conditions, and to
block reverse current flow in the event the input collapses.
A typical application circuit using the LTC4364 to regulate
the output at 27V during input surges with reverse input
protection is shown in Figure 1.
Overcurrent Fault
The LTC4364 features an adjustable current limit that
protects against short circuits and excessive load current.
During an overcurrent event, the HGATE pin is regulated
to limit the current sense voltage across the SENSE and
) to 50mV when OUT is above 2.5V. The
OUT pins (∆V
SNS
currentlimitsensevoltageisreducedto25mVwhenOUTis
below1.5Vforadditionalprotectionduringanoutputshort.
Overvoltage Fault
A current sense resistor is placed between SENSE and
The LTC4364 limits the voltage at the OUT pin during an
overvoltage situation. An internal voltage amplifier regu-
lates the HGATE pin voltage to maintain 1.25V at the FB
pin. During this period of time, the N-channel MOSFET
M1 remains on and supplies current to the load. This
allows uninterrupted operation during brief overvoltage
transient events.
OUT and its value (R ) is determined by:
SNS
∆VSNS
ILIM
RSNS
=
where I is the desired current limit.
LIM
R
M1
M2
SNS
10mΩ
MAX DC:
V
FDB33N25
FDB3682
OUT
V
IN
12V
100V/–24V
4A
+
MAX 1ms
TRANSIENT:
200V
D4
CLAMPED AT 27V
C
OUT
22µF
R4
2.2k
SMAJ24A
R5
10Ω
R6
D3
1.5KE200A
0.5W
100Ω
C1
0.1µF
C
HG
0.1µF
D5
1N4148W
D1
R7
102k
1%
R8
4.99k
1%
CMZ5945B
68V
V
HGATE
SOURCE DGATE SENSE
OUT
FB
R1
383k
1%
R2
90.9k
1%
R3
10k
1%
CC
SHDN
UV = 6V
UV
LTC4364
OV = 60V
ENOUT
ENABLE
FAULT
OV
FLT
GND
TMR
436412 F01
C
TMR
47nF
Figure 1. 4A, 12V Overvoltage Output Regulator with Reverse Current Protection
436412f
11
LTC4364-1/LTC4364-2
APPLICATIONS INFORMATION
Anovercurrentfaultoccurswhenthecurrentlimitcircuitry
has been engaged for longer than the timeout delay set
by the timer capacitor. The HGATE pin is then immediately
pulled low by 130mA to the SOURCE pin, turning off the
MOSFET M1. After the fault condition has disappeared
and a cool down period has transpired, the HGATE pin
is allowed to pull back up and turn on the pass device
(LTC4364-2). The LTC4364-1 latches the HGATE pin low
after the overcurrent fault timeout and can be reset using
the SHDN or UV pin (see Resetting Faults).
Input Undervoltage Comparator
The LTC4364 detects input undervoltage conditions such
as low battery using the UV pin. When the voltage at the
UV pin is below its 1.25V threshold, the HGATE pin pulls
low to keep the pass device off. Once the UV pin voltage
risesabovetheUVthresholdplustheUVhysteresis(50mV
typical), the HGATE pin is allowed to pull up without go-
ing through a timer cycle. In Figure 1 and Figure 2, the
input UV threshold is set by the resistive dividers to 6V.
An undervoltage condition does not produce an output
at the FLT pin.
Input Overvoltage Comparator
Input overvoltage is detected with the OV pin and an ex-
ternal resistive divider connected to the input (Figure 1).
At power-up, if the OV pin voltage is higher than its 1.25V
thresholdbeforethe100μsinternalpower-on-resetexpires,
or before the input undervoltage condition is cleared at
the UV pin, the HGATE pin will be held low until the OV
pin voltage drops below its threshold. To prevent start-up
in the event the board is hot swapped into an overvoltage
supply, separateresistivedividerswithfilteringcapacitors
can be used for the OV and UV pins (Figure 2). The RC
Fault Timer
The LTC4364 includes an adjustable fault timer. Con-
necting a capacitor from the TMR pin to ground sets the
delay period before the MOSFET M1 is turned off during
an overvoltage or overcurrent fault condition. The same
capacitor also sets the cool down period before M1 is
allowed to turn back on after the fault condition has
disappeared. Once a fault condition is detected, a current
source charges up the TMR pin. The current level varies
depending on the voltage drop across the V pin and the
OUT pin, corresponding to the MOSFET V . The on time
is inversely proportional to the voltage drop across the
MOSFET. This scheme therefore takes better advantage
of the available safe operating area (SOA) of the MOSFET
than would a fixed timer current.
CC
DS
constants should be skewed so that τ /τ > 50. In Fig-
UV OV
ure 2, If the board is plugged into a supply that is higher
than 60V, the LTC4364 will not turn on the pass devices
until the supply voltage drops below 60V.
OncetheHGATEpinbeginspullinghigh,aninputovervolt-
age condition detected by OV will not turn off the pass
device. Instead, OV prevents the LTC4364 from restarting
following a fault (see Cool Down Period and Restart). This
preventsthepassdevicefromcyclingbetweenONandOFF
states when the input voltage stays at an elevated level for
a long period of time, reducing the stress on the MOSFET.
The timer current starts at around 2μA with 0.5V or less
of V – V , increasing linearly to 50μA with 75V of
CC
– V
OUT
V
CC
during an overvoltage fault (Figure 3a):
OUT
I
= 2μA + 0.644[μA/V] • (V – V
– 0.5V)
OUT
TMR(UP)OV
CC
During an overcurrent fault, the timer current starts at
10μA with 0.5V or less of V – V and increases to
260μA with 75V of V – V
V
IN
CC
OUT
OUT
383k 475k
100k
(Figure 3b):
CC
UV = 6V
UV
LTC4364
I
= 10μA + 3.36[μA/V] • (V – V
– 0.5V)
OUT
TMR(UP)OC
CC
10nF
This arrangement allows the pass device to turn off faster
duringanovercurrentevent,sincemorepowerisdissipated
under this condition. Refer to the Typical Performance
Characteristics section for the timer current at different
0V = 60V
OV
436412 F02
10k
1nF
τ
τ
= (383k||100k) • 10nF
= (475k||10k) •1nF
UV
OV
V
– V
in both overvoltage and overcurrent events.
CC
OUT
Figure 2. External UV and OV Configuration Blocks Start-Up Into
an Overvoltage Condition
436412f
12
LTC4364-1/LTC4364-2
APPLICATIONS INFORMATION
V
(V)
TMR
since it would lengthen the overall fault timer period and
cause more stress on the power transistor during an
overcurrent event.
I
= 5µA
I
= 5µA
TMR
TMR
1.35
1.25
V
– V
TMR
= 75V
OUT
CC
Assuming V – V
remains constant, the on-time of
OUT
CC
(I
= 50µA)
V
– V
TMR
= 10V
OUT
HGATE during an overvoltage fault is:
CC
(I
= 8µA)
CTMR •1.25V CTMR •100mV
tOV
=
+
ITMR(UP)OV
5µV
0
TIME
V
– V
OUT
CC
t
= 75V
FLT
t
t
and that during an overcurrent fault is:
WARNING
20ms/µF
WARNING
25ms/µF
20ms/µF
t
=10V
FLT
CTMR •1.35V
ITRM(UP)OC
156ms/µF
tOC
=
(3a) Overvoltage Fault Timer Current
V
(V)
TMR
If the fault condition disappears after TMR reaches 1.25V
but is lower than 1.35V, the TMR pin is discharged by 2μA.
When TMR drops to 0.15V, the FLT pin resets to a high
impedance state.
1.35
1.25
V
– V
TMR
= 75V
V
– V
TMR
= 10V
OUT
CC
OUT
CC
(I
= 260µA)
(I
= 42µA)
Cool Down Period and Restart
As soon as TMR reaches 1.35V and HGATE pulls low in
a fault condition, the TMR pin starts discharging with a
2μA current. When the TMR pin voltage drops to 0.15V,
TMRchargeswith2μA. WhenTMRreaches1.35V, itstarts
discharging again with 2μA. This pattern repeats 32 times
to form a long cool down timer period before retry (Fig-
ure 4). At the end of the cool down period (when the TMR
pin voltage drops to 0.15V the 32nd time), the voltage at
the OV pin is checked. If the OV voltage is above its 1.25V
threshold, retry is inhibited and the HGATE pin remains
low. If the OV pin voltage is below 1.25V minus the OV
hysteresis, the LTC4364-2 retries, pulling the HGATE pin
up and turning on the pass device M1. The FLT pin will
then go to a high impedance state. The total cool down
timer period is given by:
0
TIME
t
V
– V
OUT
WARNING
CC
0.38ms/µF
= 75V
t
FLT
4.8ms/µF
436412 F03
t
=10V
FLT
t
29.8ms/µF
WARNING
2.38ms/µF
(3b) Overcurrent Fault Timer Current
Figure 3. Fault Timer Current of the LTC4364
When the voltage at the TMR pin, V
, reaches 1.25V,
TMR
the FLT pin pulls low to indicate the detection of a fault
condition and provide warning of the impending power
loss. In the case of an overvoltage fault, the timer current
then switches to a fixed 5μA. The interval between FLT
asserting low and the MOSFET M1 turning off is given by:
C
TMR •100mV
63•CTMR •1.2V
tWARNING
=
tCOOL
=
5µA
2µA
This constant early warning period allows the load to
perform necessary backup or housekeeping functions
The latch-off version, LTC4364-1, latches the HGATE and
FLT pins low after a fault timeout. It also generates the
cool down TMR pulses as shown in Figure 4, but does
not retry after the cool down period. There are two ways
to restart the part. The first method is to pull the UV pin
below0.6Vmomentarily(>10μs)afterthecooldowntimer
436412f
before the supply is cut off. After V
crosses the 1.35V
TMR
threshold, the pass device M1 turns off immediately. Note
that during an overcurrent event, the timer current is not
reduced to 5μA after V
has reached 1.25V threshold,
TMR
13
LTC4364-1/LTC4364-2
APPLICATIONS INFORMATION
period. If the UV reset pulse is asserted during the cool
down period, the TMR pulses are unaffected and the part
restarts after the cool down period ends. If OV is higher
than 1.25V while UV reset pulse is applied, the part will
not restart until OV drops below 1.25V even if the cool
down period ends.
reverse input protection with minimum voltage drop in
normal operation. In the event of an input short or a power
supply brownout, reverse current may temporarily flow
through M2. The LTC4364 detects this reverse current
and immediately pulls the DGATE pin to the SOURCE pin,
turning off M2. This minimizes discharge of the output
reservoir capacitor and holds up the output voltage. In
the case where the input supply drops below ground, the
SOURCE pin is pulled below ground through the body
diode of M1. The LTC4364 responds to this condition by
shortingtheDGATEpintotheSOURCEpin,keepingM2off.
The second method of restarting the LTC4364-1 is to
pulse the SHDN pin low for more than 200μs. If this is
applied during the cool down period, the cool down timer
is reset with 1mA quickly discharging the TMR pin, and
the part will restart when TMR drops below 0.15V. If the
SHDN reset pulse is applied after the cool down period,
the part restarts immediately. Sufficient cool down time
shouldbeallowedbeforetogglingtheSHDNpintoprevent
overstressing the pass device.
MOSFET Selection
TheLTC4364drivestwoN-channelMOSFETs, M1andM2,
as the pass devices to conduct the load current (Figure 1).
The important features are on-resistance, R
, the
DS(ON)
, the threshold
A UV reset pulse has no effect on the operation of the
LTC4364-2. However, if a SHDN reset pulse as described
aboveisassertedinthemiddleofthecooldownperiod,the
TMR pin quickly discharges with 1mA and the LTC4364-2
is allowed to restart once TMR drops below 0.15V. The OV
pin gates the restart of either LTC4364-1 or LTC4364-2
with a SHDN reset pulse. The part will not restart until OV
drops below 1.25V.
maximum drain-source voltage, V
(BR)DSS
voltage, and the safe operating area, SOA.
The maximum drain-source voltage rating must be higher
thanthemaximuminputvoltage.Iftheoutputisshortedto
ground or in an overvoltage event, the full supply voltage
will appear across M1. If the input is shorted to ground,
M2 will be stressed by the voltage held up at the output.
The gate drive for both MOSFETs is guaranteed to be more
Reverse Input Protection
than10Vandlessthan16VforthoseapplicationswithV
CC
The LTC4364 can withstand reverse voltage without dam-
higher than 8V. This allows the use of standard threshold
voltage N-channel MOSFETs. For systems with V less
age. The V , SHDN, UV, OV, HGATE, SOURCE and DGATE
CC
CC
pins can all withstand up to –40V with respect to GND.
than 8V, a logic-level MOSFET is required since the gate
drive can be as low as 5V. For supplies of 24V or higher, a
15V Zener diode is recommended to be placed between
The LTC4364 controls a second N-channel MOSFET (M2)
as an ideal diode to replace an in-line blocking diode for
1.25V
<1.25V
FB
OV < 1.25V CHECKED
0.15V
1.35V
1.25V
TMR
1st
2nd
31st
32nd
FLT
∆V
HGATE
436412 F04
COOL DOWN PERIOD
Figure 4. Auto-Retry Cool Down Timer Cycle Following an Overvoltage Fault (LTC4364-2 Only)
436412f
14
LTC4364-1/LTC4364-2
APPLICATIONS INFORMATION
gate and source of each MOSFET for extra protection
(Figures 8 to 10).
thermal mass. This is analyzed by simulation, using the
MOSFET’s thermal model.
For short duration transients of less than 100ms, MOS-
FET survival is increasingly a matter of SOA, an intrinsic
property of the MOSFET. SOA quantifies the time required
Transient Stress in the MOSFET
The SOA of the MOSFET must encompass all fault condi-
tions. In normal operation the pass devices are fully on,
dissipatingverylittlepower.Butduringeitherovervoltageor
overcurrent faults, the HGATE pin is controlled to regulate
either the output voltage or the current through MOSFET
M1. Large current and high voltage drop across M1 can
coexist in these cases. The SOA curves of the MOSFET
must be considered carefully along with the selection of
the fault timer capacitor.
at any given condition of V and I to raise the junction
DS
D
temperatureoftheMOSFETtoitsratedmaximum.MOSFET
2
SOA is expressed in units of watt-squared-seconds (P t),
2
which is an integral of P(t) dt over the duration of the
transient. This figure is essentially constant for intervals
of less than 100ms for any given device type, and rises
to infinity under DC operating conditions. Destruction
mechanisms other than bulk die temperature distort the
2
lines of an accurately drawn SOA graph so that P t is not
During an overvoltage event, the LTC4364 drives the pass
MOSFETM1toregulatetheoutputvoltageatanacceptable
level.Theloadcircuitrymaycontinueoperatingthroughout
this interval, but only at the expense of dissipation in the
MOSFET pass device. MOSFET dissipation or stress is a
function of the input voltage waveform, regulation voltage
and load current. The MOSFET must be sized to survive
this stress.
the same for all combinations of I and V . In particular
D
DS
2
P t tends to degrade as V approaches the maximum
rating, rendering some devices useless for absorbing
DS
energy above a certain voltage.
Calculating Transient Stress
To select a MOSFET suitable for any given application,
the SOA stress of M1 must be calculated for each input
transient which shall not interrupt operation. It is then
a simple matter to choose a device which has adequate
Most transient event specifications use the model shown
in Figure 5. The idealized waveform comprises a linear
ramp of rise time tr, reaching a peak voltage of VPK and
exponentially decaying back to VIN with a time constant
of τ. A typical automotive transient specification has
constants of tr = 10μs, VPK = 80V and τ = 1ms. A surge
condition known as “load dump” has constants of tr =
5ms, VPK = 60V and τ = 200ms.
2
SOA to survive the maximum calculated stress. P t for a
prototypical transient waveform is calculated as follows
(Figure 6).
Let:
a = V
– V
IN
REG
MOSFET stress is the result of power dissipated within
the device. For long duration surges of 100ms or more,
stress is increasingly dominated by heat transfer; this is
a matter of device packaging and mounting, and heat sink
b = V – V
PK
IN
where V = Nominal Input Voltage.
IN
V
PK
= 80V
V
PK
τ = 1ms
τ
V
= 16V
REG
= 12V
V
IN
V
IN
t = 10µs
r
436412 F06
t
r
436412 F05
Figure 5. Prototypical Transient Waveform
Figure 6. Safe Operating Area Required to Survive Prototypical
Transient Waveform
436412f
15
LTC4364-1/LTC4364-2
APPLICATIONS INFORMATION
Then:
where I
isthe HGATEpin pull-up current, I
HGATE(UP) INRUSH
is the desired inrush current, C is total load capacitance
L
3
b− a
1
3
(
)
1
2
b
a
P2t = ILOAD
tr
+ τ 2a2In + 3a2 + b2 – 4ab
at the output. In typical applications, a C
of 6.8nF is
2
HG
b
recommended for loop compensation during overvoltage
and overcurrent events. With input voltage steps faster
than 5V/μs, a larger gate capacitor helps prevent self
enhancement of the N-channel MOSFET.
Typically V
≈ V and τ >> t simplifying the above to:
REG
IN
r
1
P2t = I
V − V
2 τ
2
(
)
PK
REG
2 LOAD
The added gate capacitor slows down the turn-off time
during fault conditions and allows higher peak currents to
build up during an output short event. If this is a concern,
For the transient conditions of V = 80V, V = 12V, V
REG
PK
IN
= 16V, t = 10μs and τ = 1ms, and a load current of 3A,
r
an extra resistor, R6, in series with C can restore the
HG
2
2
P t is 18.4W s—easily handled by a MOSFET in a D-pak
package. The P t of other transient waveshapes is evalu-
turn-off time. A diode, D5, should be placed across R6
2
with the cathode connected to C as shown in Figure 1.
HG
ated by integrating the square of MOSFET power versus
time. LTSpice™ can be used to simulate timer behavior
for more complex transients and cases where overvoltage
and overcurrent faults coexist.
In a fast transient input step, D5 provides a bypass path to
C
for the benefit of holding HGATE low and preventing
HG
self enhancement.
Shutdown
Short-Circuit Stress
The LTC4364 can be shut down to a low current mode
SOAstressofM1mustalsobecalculatedforoutputshort-
circuit conditions. Short-circuit P t is given by:
by pulling SHDN below 0.5V. The quiescent V current
CC
2
drops to 10μA for both the LTC4364-1 and the LTC4364-2.
The SHDN pin can be pulled up to 100V or below GND by
up to 40V without damage. Leaving the pin open allows
an internal current source to pull it up to about 4V and
turn the part on. The leakage current at the pin should be
limited to no more than 1μA if no pull-up device is used
to help turn it on.
2
∆VSNS
RSNS
P2t = V •
•tOC
IN
where ∆V
is the overcurrent fault threshold and t is
OC
SNS
the overcurrent timer interval.
For V = 15V, OUT = 0V, ∆V
= 25mV, R
= 12mΩ
SNS
IN
and C
SNS
2
2
= 100nF, P t is 2.2W s—less than the transient
Supply Transient Protection
TMR
SOA calculated in the previous example. Nevertheless,
to account for circuit tolerances this figure should be
doubled to 4.4W s.
The LTC4364 is tested to operate to 80V and guaranteed
to be safe from damage between 100V and −40V. Voltage
transientsabove100Vorbelow−40Vmaycausepermanent
damage.Duringashort-circuitcondition,thelargechange
in current flowing through power supply traces coupled
with parasitic inductances from associated wiring can
cause destructive voltage transients in both positive and
2
Limiting Inrush Current and HGATE Pin Compensation
The LTC4364 limits the inrush current to any load capaci-
tance by controlling the HGATE pin voltage slew rate. An
external capacitor, C , can be connected from HGATE
HG
negative directions at the V , SOURCE, and OUT pins. To
CC
to ground to slow down the inrush current further at the
reduce the voltage transients, minimize the power trace
expenseofslowerturn-offtime.Thegatecapacitorissetat:
parasitic inductance by using short, wide traces. A small
RC filter (R4 and C1 in Figure 1) at the V pin filters high
CC
IHGATE(UP)
CHG
=
•CL
voltage spikes of short pulse width.
I
INRUSH
436412f
16
LTC4364-1/LTC4364-2
APPLICATIONS INFORMATION
Another way to limit supply transients above 100V at the
Output Port Protection
V
pin is to use a Zener diode and a resistor, D1 and R4,
CC
In applications where the output is on a connector, as
shown in Figure 14, if the output is plugged into a supply
that is higher than the input, the ideal diode MOSFET, M2,
turns off to open the backfeeding path. In the case where
the output port is plugged into a supply that is below GND,
the SOURCE pin is pulled below GND through the body
diode of M2. The LTC4364 responds to this condition by
shorting the HGATE pin to the SOURCE pin, turning M1
as shown in Figure 1. D1 clamps voltage spikes at the V
CC
pin while R4 limits the current through D1 to a safe level
during the surge. In the negative direction, D1 along with
R4 clamps the V pin near GND. The inclusion of R4 in
CC
CC
series with the V pin increases the minimum required
supply voltage due to the extra voltage drop across the
resistor, which is determined by the supply current of the
LTC4364 and the leakage current of D1. 2.2k adds about
1V to the minimum operating voltage.
off and shutting down the current path from V to V
.
IN
OUT
Design Example
Forsustained,elevatedsuppyvoltages,thepowerdissipa-
tion of R4 becomes unacceptable. This can be resolved
by using an external NPN transistor (Q1 in Figure 7) as
a buffer. To protect Q1 against supply reversal, block the
collector of Q1 with a series diode or tie it to the cathode
of D3 and D4 in Figure 1.
As a design example, consider an application with the
following specifications: V = 8V to 14V DC with a peak
transient of 200V and decay time constant τ of 1ms, V
≤ 27V, minimum current limit I
detection at 6V, input overvoltage level at 60V, and 1ms
of overvoltage early warning (Figure 1).
IN
OUT
at 4A, low-battery
LIM(MIN)
Transient suppressor D3 in Figure 1 clamps the input
voltage to 200V for voltage transients higher than 200V,
to prevent breakdown of M1. It also blocks forward con-
duction in D4. D4 limits the SOURCE pin voltage to 24V
Selection of CMZ5945B for D1 will limit the voltage at
the V pin to less than 71V during the 200V surge. The
CC
minimum required voltage at the V pin is 4V when V is
CC
IN
below GND when the input goes negative. C
helps
OUT
at 6V; the maximum supply current for LTC4364 is 750μA.
absorb the inductive energy at the output upon a sudden
input short, protecting the OUT and SENSE pins.
The maximum value for R4 to ensure proper operation is:
6V –4V
0.75mA
R4=
= 2.7k
V
IN
200V
R4
22k
1/4W
Q1
Select 2.2k for R4 to accommodate all conditions.
PZTA42
D1
CMZ5945B
68V
C1
100nF
With the minimum Zener voltage at 64V, the peak current
through R4 into D1 is then calculated as:
V
CC
LTC4364
GND
200V –64V
ID1(PK)
=
= 62mA
436412 F07
2.2k
Figure 7. Buffering VCC to Extend Input Supply Range
whichcanbehandledbytheCMZ5945Bwithapeakpower
rating of 200W at 10/1000μs.
Output Bypassing
With a bypass capacitance of 0.1μF (C1), along with R4
of 2.2k, high voltage transients up to 250V with a pulse
The OUT and SENSE pins can withstand up to 100V above
and 20V below GND. In all applications the output must
width less than 20μs are filtered out at the V pin.
be bypassed with at least 22μF low ESR electrolytic (C
CC
OUT
in Figure 1) to stabilize the voltage and current limiting
loops, and to minimize capacitive feedthrough of input
transients. Total ceramic bypassing of up to one-tenth
the total electrolytic capacitance is permissible without
compromising performance.
Next, calculate the resistive divider value to limit V
27V during an overvoltage event:
to
OUT
1.25V • R7+ R8
(
)
= 27V
VREG
=
R8
436412f
17
LTC4364-1/LTC4364-2
APPLICATIONS INFORMATION
Choosing 250μA for the resistive divider:
1.25V
The maximum power dissipation in M1 is:
∆VDS(M1) •∆VSNS(MAX)
14V •32mV
R8=
= 5k
P =
=
= 45W
250µA
Select 4.99k for R8.
27V –1.25V •R8
RSNS
10mΩ
2
2
The corresponding P t is 2.3W s.
(
)
During an output overload or soft short, the voltage at the
OUT pin could stay at 2V or higher. The total overcurrent
R7=
= 102.8k
1.25V
fault time when V
= 2V is:
OUT
The closest standard value for R7 is 102k.
47nF •1.35V
Now, calculate the sense resistor, R , value:
tOC
=
= 1.3ms
SNS
49µA
∆VSNS(MIN)
45mV
4A
RSNS
=
=
= 11mΩ
The maximum power dissipation in M1 is:
ILIM
14V –2V •55mV
(
)
Choose 10mΩ for R
.
SNS
P =
= 66W
10mΩ
C
TMR
is then chosen for 1ms of early warning time:
2
2
ThecorrespondingP tis5.7W s.Bothoftheabovecondi-
tions are well within the safe operating area of FDB33N25.
1ms•5µA
100mV
CTMR
=
= 50nF
To select the pass device, M2, first calculate R
to
DS(ON)
The closest standard value for C
is 47nF.
TMR
achieve the desired forward drop V at maximum load
FW
Finally, calculate R1, R2 and R3 for 6V low battery detec-
tion and 60V input overvoltage level:
current (5.5A). If V = 0.25V:
FW
V
0.25V
FW
RDS(ON)
≤
=
= 45.5mΩ
6V
1.25V
ILOAD(MAX) 5.5A
=
R1+ R2+ R3 R2+ R3
The FDB3682 offers a maximum R
of 36mΩ at
DS(ON)
60V
R1+ R2+ R3
1.25V
R3
=
V
= 10V so is a good fit. Its minimum BV
of 100V
GS
DSS
is also sufficient to handle V
during an input short-circuit event.
transients up to 100V
OUT
Simplify the equations and choose 10k for R3 to get:
60V
6V
Layout Considerations
R2=
R1=
–1 •R3= 9•R3= 90k
Toachieveaccuratecurrentsensing,useKelvinconnections
to the current sense resistor, R . Limit the resistance
6V
1.25V
SNS
–1 • R2+ R3 = 3.8• R1+ R2 = 380k
(
)
(
)
from the SOURCE pin to the sources of the MOSFETs to
below 10Ω. The minimum trace width for 1oz copper foil
is 0.02" per amp to ensure the trace stays at a reason-
able temperature. Note that 1oz copper exhibits a sheet
resistance of about 530μΩ/square. Small resistances can
cause large errors in high current applications. Noise im-
munity will be improved significantly by locating resistive
Select 90.9kΩ for R2 and 383kΩ for R1.
The pass device, M1, should be chosen to withstand an
output short condition with V = 14V. In the case of a
severe output short where V
the total overcurrent fault time is:
CC
= 0V, I
= 55μA and
OUT
TMR(UP)
dividers close to the pins with short V and GND traces.
CC
C
TMR • VTMR(G)
47nF •1.35V
tOC
=
=
= 1.15ms
ITRM(UP)
55µA
436412f
18
LTC4364-1/LTC4364-2
TYPICAL APPLICATIONS
R
M1
SNS
20mΩ
SUD50N03-9
V
V
IN
5V TO 28V
OUT
2A
+
C
LOAD
100µF
R5
10Ω
D6
C
HG
D1
SMAT70A
DDZ9702T
47nF
V
HGATE
SOURCE DGATE SENSE
OUT
FB
CC
R1
118k
SHDN
UV
UV
4.2V
LTC4364
R2
44.2k
OV
36V
ENOUT
OV
R3
5.9k
FLT
GND
TMR
436412 F08
C
TMR
0.22µF
Figure 8. 2A Wide Range Hot Swap Controller with Circuit Breaker
R
M1
FDB3632
M2
FDMS86101
SNS
15mΩ
V
OUT
2.5A
V
IN
CLAMPED
AT 36V
18V TO 33V
+
C
LOAD
100µF
R5
10Ω
C
HG
47nF
D6
DDZ9702T
D7
DDZ9702T
R7
110k
V
HGATE
SOURCE
DGATE SENSE
OUT
FB
CC
R1
SHDN
100k
R8
UV
UV
4.02k
15V
LTC4364
R2
6.04k
OV
45V
ENOUT
OV
R3
3.01k
FLT
GND
TMR
436412 F09
C
TMR
0.1µF
Figure 9. 28V Hot Swap with Overvoltage Output Regulation at 27V, Circuit Breaker, and Reverse Current Protection
R
M1
FDB33N25
M2
FDB3632
SNS
10mΩ
V
OUT
V
4A
IN
36V TO 72V
CLAMPED
AT 72V
+
C
LOAD
330µF
R5
R4
2.2k
10Ω
D1
CMZ5945B
68V
D6
D7
DDZ9702T
C
HG
DDZ9702T
47nF
R7
V
HGATE
SOURCE
DGATE SENSE
OUT
FB
226k
CC
R1
SHDN
205k
R8
4.02k
UV
UV
36V
R2
3.92k
LTC4364
OV
76V
ENOUT
OV
R3
3.48k
FLT
GND
TMR
436412 F10
C
TMR
0.1µF
Figure 10. 48V Hot Swap with Overvoltage Output Regulation at 72V, Circuit Breaker, and Reverse Current Protection
436412f
19
LTC4364-1/LTC4364-2
TYPICAL APPLICATIONS
R
M1A
M2A
SNSA
V
OUT
10mΩ
FDD16AN08A0 FDD16AN08A0
V
INA
CLAMPED
AT 16V
12V
+
C
OUTA
C
HGA
22µF
R5A
10Ω
6.8nF
R7A
HGATE SOURCE DGATE SENSE
LTC4364
OUT
FB
59k
V
CC
SHDN
R8A
4.99k
UV
OV
ENOUT
TMR
FLT
C
TMRA
GND
0.22µF
R
M1B
M2B
SNSB
10mΩ
FDD16AN08A0 FDD16AN08A0
V
INB
12V
+
C
OUTB
C
HGB
22µF
R5B
10Ω
6.8nF
R7B
HGATE SOURCE DGATE SENSE
LTC4364
OUT
FB
59k
V
CC
SHDN
R8B
4.99k
UV
OV
ENOUT
TMR
FLT
C
TMRB
GND
436412 F11
0.22µF
Figure 11. Redundant Supply Diode-OR with Overvoltage Surge Protection
M1
FDB3632
M2
FDMS86101
V
IN
V
OUT
12V
C
LOAD
100k
V
HGATE SOURCE DGATE SENSE OUT
LTC4364
CC
SHDN
FB
UV
M3
VN2222
SHDN
ENOUT
OV
FLT
TMR
GND
436412 F12
Figure 12. High Side Switch with Ideal Diode for Load Protection
436412f
20
LTC4364-1/LTC4364-2
TYPICAL APPLICATIONS
R9
1k, 1W
R
M1
M2
SNS
V
OUT
10mΩ
FDD16AN08A0
FDD16AN08A0
V
4A
IN
12V
CLAMPED
AT 16V
+
D8
1N4746A
18V, 1W
C
OUT
R4
2.2k
D1
CMZ5945B
68V
22µF
C
HG
R5
10Ω
6.8nF
R7
V
HGATE SOURCE DGATE SENSE
LTC4364
OUT
FB
287k
CC
R1
SHDN
191k
R8
24.9k
UV
6V
UV
R2
40.2k
OV
30V
ENOUT
OV
R3
10k
FLT
GND
TMR
436412 F13
C
TMR
0.1µF
Figure 13. Overvoltage Regulator with Output Keep Alive During Shutdown
PACKAGE DESCRIPTION
Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.
DE Package
14-Lead Plastic DFN (4mm × 3mm)
(Reference LTC DWG # 05-08-1708 Rev B)
R = 0.115
TYP
0.40 ± 0.10
4.00 ±0.10
(2 SIDES)
8
14
R = 0.05
0.70 ±0.05
TYP
3.30 ±0.05
1.70 ± 0.05
3.30 ±0.10
3.60 ±0.05
2.20 ±0.05
3.00 ±0.10
(2 SIDES)
PACKAGE
OUTLINE
1.70 ± 0.10
PIN 1 NOTCH
R = 0.20 OR
PIN 1
0.35 × 45°
TOP MARK
CHAMFER
(SEE NOTE 6)
(DE14) DFN 0806 REV B
7
1
0.25 ± 0.05
0.75 ±0.05
0.200 REF
0.25 ± 0.05
0.50 BSC
0.50 BSC
3.00 REF
3.00 REF
0.00 – 0.05
BOTTOM VIEW—EXPOSED PAD
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED
NOTE:
1. DRAWING PROPOSED TO BE MADE VARIATION OF VERSION (WGED-3) IN JEDEC
PACKAGE OUTLINE MO-229
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE
TOP AND BOTTOM OF PACKAGE
436412f
21
LTC4364-1/LTC4364-2
PACKAGE DESCRIPTION
Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.
MS Package
16-Lead Plastic MSOP
(Reference LTC DWG # 05-08-1669 Rev Ø)
0.889 ± 0.127
(.035 ± .005)
5.23
3.20 – 3.45
(.206)
(.126 – .136)
MIN
4.039 ± 0.102
(.159 ± .004)
(NOTE 3)
0.50
(.0197)
BSC
0.305 ± 0.038
(.0120 ± .0015)
TYP
0.280 ± 0.076
(.011 ± .003)
REF
16151413121110
9
RECOMMENDED SOLDER PAD LAYOUT
3.00 ± 0.102
(.118 ± .004)
(NOTE 4)
DETAIL “A”
0.254
4.90 ± 0.152
(.193 ± .006)
(.010)
0° – 6° TYP
GAUGE PLANE
0.53 ± 0.152
(.021 ± .006)
1 2 3 4 5 6 7 8
0.86
(.034)
REF
1.10
(.043)
MAX
DETAIL “A”
0.18
(.007)
SEATING
PLANE
0.17 – 0.27
(.007 – .011)
TYP
0.1016 ± 0.0508
(.004 ± .002)
MSOP (MS16) 1107 REV Ø
0.50
(.0197)
BSC
NOTE:
1. DIMENSIONS IN MILLIMETER/(INCH)
2. DRAWING NOT TO SCALE
3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.
INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX
436412f
22
LTC4364-1/LTC4364-2
PACKAGE DESCRIPTION
Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.
S Package
16-Lead Plastic Small Outline (Narrow .150 Inch)
(Reference LTC DWG # 05-08-1610 Rev G)
.386 – .394
(9.804 – 10.008)
.045 .005
NOTE 3
.050 BSC
16
N
15
14
13
12
11
10
9
N
1
.245
MIN
.160 .005
.150 – .157
(3.810 – 3.988)
NOTE 3
.228 – .244
(5.791 – 6.197)
2
3
N/2
N/2
8
.030 .005
TYP
RECOMMENDED SOLDER PAD LAYOUT
2
3
5
6
7
1
4
.010 – .020
(0.254 – 0.508)
× 45°
.053 – .069
(1.346 – 1.752)
.004 – .010
(0.101 – 0.254)
.008 – .010
(0.203 – 0.254)
0° – 8° TYP
.050
(1.270)
BSC
.014 – .019
(0.355 – 0.483)
TYP
.016 – .050
(0.406 – 1.270)
S16 REV G 0212
NOTE:
1. DIMENSIONS IN
INCHES
(MILLIMETERS)
2. DRAWING NOT TO SCALE
3. THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS.
MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .006" (0.15mm)
4. PIN 1 CAN BE BEVEL EDGE OR A DIMPLE
436412f
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-
tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.
23
LTC4364-1/LTC4364-2
TYPICAL APPLICATION
R
M1
M2
FDMS86101
SNS
0.2Ω
FDB3632
V
V
OUT
*
IN
12V
CLAMPED
AT 18V
C
10µF
50V
CER
10µF
50V
CER
R7
49.9k
1%
IN
10µF
C
HG
R5
10Ω
6.8nF
D2
DDZ9702T
15V
R
ESR
100mΩ
R9
16.9k
1%
V
HGATE SOURCE DGATE SENSE
LTC4364
OUT
FB
R1
383k
1%
CC
SHDN
R8
4.99k
1%
UV
6V
UV
R2
90.9k
1%
OV
ENOUT
OV
60V
R3
10k
1%
FLT
*PROTECTED AGAINST BACKFEEDING
OR FORWARD CONDUCTING
FROM –20V TO 50V
GND
TMR
436412 F14
0.1µF
Figure 14. 0.25A, 12V Surge Stopper with Output Port Protection
RELATED PARTS
PART NUMBER
DESCRIPTION
COMMENTS
LT®4356-1/LT4356-2 Surge Stopper
LT4356-3
LT4356-1: 7A Shutdown Mode
LT4356-2: Auxiliary Amplifier Alive in Shutdown Mode
LT4356-3: Fault Latchoff
LTC4363
High Voltage Surge Stopper
4V to 80V, V Clamp, Adjustable Output Voltage Clamp, 60V Reverse
CC
Input Protection, Overcurrent Protection
9V to >500V Operation, Adjustable Output Voltage Clamp
0.5µs Turn-Off Time, 9V to 80V
LTC4366
LTC4357
LTC4359
Floating Surge Stopper
Positive High Voltage Ideal Diode Controller
Ideal Diode Controller with Reverse Input Protection
4V to 80V Operation, –40V Reverse-Input Protection, Low 13µA
Shutdown Current
LTC4352
LTC4354
LTC4355
LTC4365
Ideal MOSFET ORing Diode
External N-Channel MOSFETs Replace ORing Diodes, 0V to 18V
Controls Two N-Channel MOSFETs, 1µs Turn-Off, 80V Operation
Controls Two N-Channel MOSFETs, 0.5µs Turn-Off, 80V Operation
2.5V to 34V Operation, Protects 60V to –40V
Negative Voltage Diode-OR Controller
Positive Voltage Diode-OR Controller
Window Passer - OV, UV and Reverse Supply Protection
Controller
436412f
LT 0712 • PRINTED IN USA
24 LinearTechnology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
●
●
LINEAR TECHNOLOGY CORPORATION 2012
(408) 432-1900 FAX: (408) 434-0507 www.linear.com
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