LT4321_15_技术文档

LT4321

PoE Ideal Diode Bridge

Controller

FeaTures

DescripTion

The LT^®4321 is a dual ideal diode bridge controller that

enables a Power over Ethernet (PoE) powered device

(PD) to receive power in either voltage polarity from

RJ-45 data pairs, spare pairs, or both. The LT4321 and

eight N-channel MOSFETs replace the eight diodes in a

passive PoE rectifier bridge. The LT4321 eases thermal

design and increases delivered power.

n

Reduces Heat, Eliminates Thermal Design Problems

n

Maximizes Power Efficiency

n

Less than 800µA Quiescent Operating Current

n

Fully Compatible with IEEE 802.3 Detection and

Classification

n

IEEE 802.3 Compliant When Paired with a Powered

Device (PD) Controller

n

Works with 2-Pair and 4-Pair PoE Applications

An internal charge pump allows an all-NMOS bridge

eliminating larger and more costly PMOS switches. The

LT4321 works with 2-pair and 4-pair applications. High

impedance input sense pins prevent reverse current on

unused pairs. If the power source fails or is shorted, a

fast turn-off minimizes reverse current transients. Unlike

discrete ideal bridge solutions, the LT4321 will operate

through transients without enabling the MOSFETs on

unpowered pairs.

n

+

++

™

Compatible with PoE, PoE , and LTPoE

n

100V Absolute Maximum Voltage

H-Grade Version Operates Up to 125°C

16-Lead 4mm × 4mm QFN Package

applicaTions

n

+

++

PoE/PoE / LTPoE Powered Devices

n

DC Polarity Correction and Ideal Diode-ORing of

Telecom Supplies

L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks and

++

PowerPath and LTPoE are trademarks of Linear Technology Corporation. All other trademarks

are the property of their respective owners.

Typical applicaTion

+

++

Powered Device for PoE (to 13W), PoE (to 25.5W), or Linear LTPoE (to 90W) Systems

1

+

0.1µF

SMAJ60A

10µF

2

3

TG12 BG12

BG36 TG36

OUTP

VPORT

HSGATE

LT4275

HSSRC

DATA

PAIRS

EN

IN12

V

IN

6

4

IN36

IN45

LT4321

+

ISOLATED

POWER

SUPPLY

EN

PWRGD

GND

V

OUT

–

IN78

OUTN

RUN

5

7

SPARE

PAIRS

GND

4321 TA01

BG45 TG45

TG78 BG78

8

4321f

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For more information www.linear.com/LT4321

LT4321

absoluTe MaxiMuM raTings

pin conFiguraTion

(Notes 1, 2)

OUTP-OUTN............................................. –0.3V to 100V

IN12, IN36, IN45, IN78....................... –2V to OUTP + 2V

BG12, BG36, BG45, BG78 Voltages.......... –0.3V to 100V

TG12, TG36, TG45, TG78

Voltages ....................................... –0.3V to OUTP + 12V

TG12-IN12 Voltage ......................................–0.3V to 12V

TG36-IN36 Voltage .....................................–0.3V to 12V

TG45-IN45 Voltage .....................................–0.3V to 12V

TG78-IN78 Voltage......................................–0.3V to 12V

EN, EN,..................................................... –0.3V to 100V

Operating Ambient Temperature Range

TOP VIEW

16 15 14 13

TG36

IN36

IN45

TG45

1

2

3

4

12 OUTP

11 EN

17

OUTN

EN

10

9

OUTN

5

6

7

8

UF PACKAGE

16-LEAD (4mm × 4mm) PLASTIC QFN

= 125°C, θ = 4.5°C/W

T

JMAX

JC

LT4321I................................................–40°C to 85°C

LT4321H............................................. –40°C to 125°C

Storage Temperature Range .................. –65°C to 150°C

EXPOSED PAD (PIN 17) IS OUTN, MUST BE SOLDERED TO PCB

orDer inForMaTion

LEAD FREE FINISH

LT4321IUF#PBF

LT4321HUF#PBF

TAPE AND REEL

PART MARKING*

4321

PACKAGE DESCRIPTION

16-Lead 4mm × 4mm Plastic QFN

TEMPERATURE RANGE

–40°C to 85°C

–40°C to 125°C

LT4321IUF#TRPBF

LT4321HUF#TRPBF

4321

Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.

Consult LTC Marketing for information on nonstandard lead based finish parts.

For more information on lead free part marking, go to: http://www.linear.com/leadfree/

For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/

4321f

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For more information www.linear.com/LT4321

LT4321

elecTrical characTerisTics ^Thel denotes the specifications which apply over the full operating

temperature range, otherwise specifications are at T_A= 25°C, OUTP = 20V to 80V unless otherwise noted.

SYMBOL

PARAMETER

CONDITIONS

MIN

20

TYP

MAX

80

18

5

UNITS

V

l

Operating Supply Range

Undervoltage Lockout

|IN12-IN36|, |IN45-IN78|, OUTP

OUTP-OUTN

V

15

17

0.8

32

V

UVLO

I (DET)

S

Total Supply Current in Detect Region

Total Supply Current in Shutdown

Total Operating Supply Current

Top Gate Drive

OUTP < 10V

µA

mA

V

I (OFF)

S

OUTP > 12V, EN < V and EN > V

IH

60

0.8

11

IL

I (ON)

S

EN > V or EN < V , OUTP > 20V

0.5

9.5

IH

IL

INn = OUTP + ∆V

TGn (Note 3)

+ 5mV, 10µA Out of

7.7

SD(MAX)

l

V

Bottom Gate Drive

10µA Out of BGn (Note 3)

TGn = INn (Note 3)

10

50

11.5

120

13

V

µA

mA

µA

mA

kΩ

V

BG

Top Gate Pull-Up Current

250

Top Gate Pull-Down Current

Bottom Gate Pull-Up Current

Bottom Gate Pull-Down Current

EN Pull-Up Resistance (Active Low)

INn = OUTP – 0.25V; TGn – INn = 5V

1.25

15

BGn < V (Note 3)

30

45

BG

BGn = 5V

3

OUTP = 55V

160

250

310

2.6

EN Pull-Down Resistance (Active High) OUTP = 55V

V

Digital Input High

EN, EN

IH

Digital Input Low

EN, EN

0.5

2

V

IL

EN Open Circuit Voltage

Topside Forward Regulation Voltage

OUTP = 55V

INn - OUTP

2.5

10

3

18

0

V

ENOC

∆V

2

mV

SD

Bottom Comparator Turn-On Threshold INn - OUTN

Bottom Comparator Turn-Off Threshold INn - OUTN

–30

2

–15

15

30

Note 1: Stresses beyond those listed under Absolute Maximum Ratings

may cause permanent damage to the device. Exposure to any Absolute

Maximum Rating condition for extended periods may affect device

reliability and lifetime.

Note 2: Referenced with respect to OUTN unless otherwise specified.

Note 3: All conditions for external MOSFET turn on must be met. See

Table 1 and Table 2.

4321f

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For more information www.linear.com/LT4321

LT4321

Typical perForMance characTerisTics

Total Supply Current in Ideal

Bridge Mode, 2-Pair

Total Supply Current in Ideal

Bridge Mode, 4-Pair

Total Supply Current in Shutdown

700

600

500

400

300

200

100

0

40

700

600

500

400

300

200

100

0

IN12 = V

IN

IN12 = IN45 = V

IN

IN12 = IN45 = V

IN

IN36 = 0

IN36 = IN78 = 0

IN36 = IN78 = 0V

35

30

25

20

15

10

5

FLOAT IN45, IN78

EN = EN = 0

–40°C

25°C

100°C

125°C

–40°C

25°C

100°C

125°C

–40°C

25°C

100°C

125°C

0

20 30 40 50 60 70 80

(V)

10

0

20 30 40 50 60 70 80

0

20 30 40 50 60 70 80

(V)

10

V

(V)

V

IN

4321 G02

4321 G01

4321 G03

Input Pin Current

EN Open Circuit Voltage

BGn Pull-Down Strength

3.0

2.5

2.0

1.5

1.0

18

16

14

12

10

8

1.0

0.5

OUTP = 80V

0.0

6

–40°C

–0.5

–1.0

–40°C

4

25°C

0.5

0

100°C

125°C

100°C

125°C

2

0

10 20 30 40 50 60 70 80

OUTP (V)

0

2

4

6

12

8

10

0

20

40

INn (V)

60

80

V

(V)

BGn

4321 G05

4321 G06

4321 G04

BGn Pull-Up Strength

TG Pull-Down Strength

TG Pull-Up Strength

180

160

140

120

100

80

3.5

3.0

2.5

2.0

1.5

1.0

0.5

0

35

30

25

20

15

10

5

IN12 – IN36 = 20V

IN12 – IN36 = 30V

IN12 – IN36 = 80V

OUTP = 20V

OUTP = 80V

60

IN45 = IN78 = FLOAT

EN = OUTP

IN12 = OUTP –250mV

IN36 = OUTN –50mV

40

IN45 = IN78 = FLOAT

EN = OUTP

20

0

2

4

6

8

10

0

2

4

6

8

10

12

0

2

4

6

8

10

∆V

TGATE

(V)

∆V

TGATE

(V)

V

(V)

BGn

4321 G09

4321 G08

4321 G07

4321f

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For more information www.linear.com/LT4321

LT4321

pin FuncTions

IN12: Data Pair Input 1. In a PoE system, IN12 connects

to the center tap of the transformer connected to pins 1

and 2 on an RJ45 connector.

BG36: Bottom-Side Gate Driver Output. BG36 pin pulls

highwithrespecttoOUTNwhenIN12isgreaterthanOUTP

and IN36 is less than OUTN.

IN36: Data Pair Input 2. In a PoE system, IN36 connects

to the center tap of the transformer connected to pins 3

and 6 on an RJ45 connector.

BG45: Bottom-Side Gate Driver Output. BG45 pin pulls

highwithrespecttoOUTNwhenIN78isgreaterthanOUTP

and IN45 is less than OUTN.

IN45: Spare Pair Input 1. In a PoE system, IN45 connects

to the center tap of the transformer connected to pins 4

and 5 on an RJ45 connector.

BG78: Bottom-Side Gate Driver Output. BG78 pin pulls

highwithrespecttoOUTNwhenIN45isgreaterthanOUTP

and IN78 is less than OUTN.

IN78: Spare Pair Input 2. In a PoE system, IN78 connects

to the center tap of the transformer connected to pins 7

and 8 on an RJ45 connector.

EN:Enable, ActiveLow. PulldowntoOUTNtoenableideal

diode bridge mode. EN is internally pulled up to V

.

ENOC

Tie to OUTP if the application circuit uses the EN pin to

enable ideal bridge mode.

TG12: Top-Side Gate Driver Output. TG12 pin pulls high

with respect to IN12 when IN12 is greater than OUTP and

IN36 is less than OUTN.

EN: Enable, Active High. Pull up to enable ideal diode

bridge mode. EN is internally pulled down to OUTN. Tie

to OUTN if the application circuit uses the EN pin to enable

ideal bridge mode.

TG36: Top-Side Gate Driver Output. TG36 pin pulls high

with respect to IN36 when IN36 is greater than OUTP and

IN12 is less than OUTN.

OUTP: Positive Output Voltage. OUTP is the rectified

voltage from which the LT4321 draws power.

TG45: Top-Side Gate Driver Output. TG45 pin pulls high

with respect to IN45 when IN45 is greater than OUTP and

IN78 is less than OUTN.

OUTN: Negative Output Voltage. OUTN is the negative

rectified voltage.

TG78: Top-Side Gate Driver Output. TG78 pin pulls high

with respect to IN78 when IN78 is greater than OUTP and

IN45 is less than OUTN.

EXPOSED PAD: The exposed pad must be electrically

connected to the OUTN pin.

BG12: Bottom-Side Gate Driver Output. BG12 pin pulls

highwithrespecttoOUTNwhenIN36isgreaterthanOUTP

and IN12 is less than OUTN.

4321f

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For more information www.linear.com/LT4321

LT4321

applicaTions inForMaTion

OVERVIEW

1.8

1.6

1.4

1.2

1.0

0.8

0.6

0.4

LT4321 (50mΩ FETs)

DIODES (S2B)

IN12 = 55V

IN36 = 0V

IN45 = FLOAT

IN78 = FLOAT

TheLT4321isadualidealdiodebridgecontrollerdesigned

to rectify two independent DC channels into a single

output. The LT4321 senses the greater of the two input

channels, |IN12-IN36| or |IN45-IN78|, and connects them

to the output with the correct polarity. Smooth crossover

between channels is guaranteed by the enforced dropout

POWER

SAVED

voltage, ∆V .

SD

0.2

0

AverycommonapplicationisanIEEE802.3powereddevice

which is required to accept voltage in either polarity at its

RJ-45 input. Polarity correction devices allow the PD to

work equally well with standard or cross-over cables and

endspan or midspan PSEs. They also prevent the PD from

back feeding current into the Ethernet cable.

0

400

600

800

1000

200

CURRENT (mA)

4321 F01

Figure 1. Power Dissipation vs Load Current

PDpolaritycorrectioniscommonlydonewithatraditional

diode bridge, but this results in an efficiency loss due to

theforwarddropgeneratedacrosstwoconductingdiodes.

Thisvoltagedropreducestheavailablesupplyvoltageand

dissipates significant power.

OPERATING MODES

Ideal Diode Bridge Mode

In ideal bridge mode the LT4321 saves power by activat-

ing MOSFETs in place of power path diodes. The LT4321

entersidealbridgemodewhenOUTPisgreaterthanV

and either EN or EN is asserted.

The LT4321 uses actively driven MOSFETs to nearly elimi-

nate the forward voltage drop. By maximizing available

voltage and reducing power dissipation (Figure 1), the

LT4321 simplifies PD design and reduces power supply

cost. Itcanalsoeliminatethermaldesignproblems, costly

heat sinks, and reduce PC board area.

UVLO

When the LT4321 is enabled, it senses the inputs with

respect to the output to decide which external MOSFETs

to turn on. Inputs are grouped into pairs, IN12/IN36 and

IN45/IN78. Within each pair, one input voltage must be

greaterthanOUTPandonemustbelessthanOUTNbefore

the external MOSFETs related to that pair are enabled. For

example,ifIN36isgreaterthanOUTPandIN12islessthan

OUTN, TG36 and BG12 will turn on. Table 1 and Table 2

outline the conditions that activate the ideal diode bridge.

Somedesignsuseidealdiodebridgecircuitsimplemented

withdiscretecomponents.Thesebridgesoftensufferfrom

a trade-off between quiescent current and tolerance to

transients and leakage. With quiescent current properly

tuned for PoE, stray PCB leakage between bridge compo-

nents can be enough to cause accidental turn-on, latchup,

and destruction of the circuit.

Shutdown Mode

TheLT4321offerssignificantimprovementsoverdiscrete

solutions. The integrated bridge controller allows for

sophisticated sensing and control of the PowerPath™

MOSFETs, ensuring that MOSFETs that are supposed to

be off, stay off. An ideal bridge controlled by the LT4321 is

tolerant to hot-plugs, input short-circuits, common mode

shift, and PCB leakage in the application circuit.

Shutdown mode is intended to keep the LT4321 quiescent

current from interfering with detection and classification

in a PoE system (Figure 2). The LT4321 is always in

shutdown mode when OUTP < V

. It can be held in

UVLO

shutdown mode over the full operating voltage range by

deasserting both the EN and EN pins.

4321f

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For more information www.linear.com/LT4321

LT4321

applicaTions inForMaTion

Table 1. Conditions for Ideal Bridge Mode on IN12/IN36

PoE MODE

Detect/Class

Class/Inrush

OUTP

EN | EN

IN12

IN36

IN45

IN78

TG12

TG36

BG12

BG36

< V

X

O

UVLO

X

OFF

> OUTP

< OUTN

> OUTP

ON

OFF

ON

Power ON

> V

OFF

ON

OFF

UVLO

1

X

|IN12 – IN36| <

OUTP – OUTN

> OUTN

< OUTP

Table 2. Conditions for Ideal Bridge Mode on IN45/IN78

PoE MODE

Detect/Class

Class/Inrush

OUTP

EN | EN

IN12

IN36

IN45

IN78

TG45

TG78

BG45

BG78

< V

X

O

UVLO

X

OFF

> OUTP

< OUTN

> OUTP

ON

OFF

ON

Power ON

> V

OFF

ON

OFF

UVLO

1

X

|IN45 – IN78| <

OUTP – OUTN

> OUTN

< OUTP

Shutting down the LT4321 does not disconnect the load.

The external MOSFETs are shorted gate to source and

bridge current is carried by the MOSFETs’ body diodes.

The eight body diodes will act like two traditional diode

bridges.

EXTERNAL INTERFACE AND COMPONENT SELECTION

Bypass Capacitance

A 0.1μF ceramic capacitor must be placed across the

OUTP and OUTN pins.

At light load, the power dissipated in the forward drop of

the body diodes will be less than the power dissipated by

the LT4321 quiescent current. In applications with a low

power sleep mode, the LT4321 can optionally be shut

down to save power if the load current is less than 20mA.

In PD applications, the IEEE 802.3 standard limits the

port capacitance at the PD interface (C ) to 0.12μF. The

PD

LT4321 and the PD interface controller both need local

bypass capacitance, but they can share the same 0.1μF

capacitor. If the LT4321 and the PD interface controller

cannot both be positioned next to a shared bypass capaci-

300

LT4321 SHUTDOWN MODE

tor, split the C capacitance between the two chips by

PD

B2100 SCHOTTKY BRIDGE

250

placinga0.047μFceramicclosetotheLT4321andanother

0.047μF ceramic close to the PD interface controller.

200

150

100

50

A 10μF or greater capacitance must be connected across

OUTP and OUTN pins when the LT4321 is enabled. In

PoE applications it is sufficient for the C

capacitor to

PORT

be connected by the PD interface controller’s hot swap

FET. In non PoE applications the C capacitor may be

PORT

permanently connected between OUTP and OUTN.

0

10

15

20

25

5

V

(V)

IN

4321 F02

Figure 2. Leakage Current at 125°C

4321f

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For more information www.linear.com/LT4321

LT4321

applicaTions inForMaTion

Transient Voltage Suppressor

+

For example, a PoE class 4 PD’s maximum average cur-

rent, I , is600mA. Choosing aMOSFETforwardvoltage

AVG

The LT4321 specifies an absolute maximum voltage of

100V and is designed to tolerate brief overvoltage events.

However, pins that interface to Ethernet cables or remote

telecomsuppliescanroutinelyseeexcessivepeakvoltages.

To protect the LT4321, install a unidirectional transient

voltage suppressor (TVS) such as an SMAJ60A between

OUTP and OUTN. This TVS must be mounted as close as

possible to the LT4321.

drop of 40mV reduces power consumption to 1/15th that

of a B2100 Schottky diode bridge.

R

= 40mV/600mA = 66mΩ

DS(ON)

Enable Pins

When OUTP is greater than V

, the enable pins EN

UVLO

and EN will control whether the LT4321 is in shutdown

mode or ideal bridge mode (Table 1 and Table 2). EN and

EN may be driven by a 3.3V or 5V logic signal, or with an

open drain or collector.

For extremely high cable discharge and surge protection

contact Linear Technology Applications.

MOSFET Selection

The EN pin is pulled up to the internally generated voltage

Select external MOSFETs that have a drain-source break-

down voltage higher than the maximum input voltage.

For PoE systems the drain-source breakdown should be

at least 100V. For all applications the gate threshold must

be a minimum of 2V.

V

by an internal 250kΩ resistor. The EN pin is pulled

ENOC

down to OUTN by an internal 250kΩ resistor. When OUTP

is less than 12V the enable pins are high impedance to

prevent these resistors from corrupting PoE detection.

The enable pins tolerate 100V (absolute maximum) and

may be tied directly to the OUTP or OUTN pins as needed.

TheamountofpowersavedbytheLT4321dependsonthe

channel resistance, R

, of the external MOSFETs. To

DS(ON)

Figure 3 and Figure 4 show how to interface the enable

pins to a PD interface controller. In these configurations,

the LT4321 PoE ideal bridge will be enabled after detec-

tion and classification are complete and before the PD is

consuming a significant amount of current.

maximize performance and power savings select R

DS(ON)

such that the forward voltage drop, V , is between 20mV

and 70mV. Given the average output load current, I

F

:

AVG

R

= V /I

F AVG

DS(ON)

4321f

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For more information www.linear.com/LT4321

LT4321

applicaTions inForMaTion

+

0.1µF

10µF

VPORT

HSGATE

LT4275

GND

HSSRC

100k

OUTP

EN

V

IN

LT4321

+

ISOLATED

POWER

SUPPLY

EN

PWRGD

V

OUT

OUTN

–

RUN

GND

4321 F03

Figure 3. PD Interface Using the EN Pin

V

OUTP

LT4321

IN

+

ISOLATED

POWER

SUPPLY

100k

GND

10µF

+

0.1µF

V

OUT

–

PWRGD

EN

RUN

LTC4265

EN

OUTN

V

IN

V

RTN

OUT

4321 F04

Figure 4. PD Interface Using the EN Pin

4321f

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For more information www.linear.com/LT4321

LT4321

Typical applicaTions

High Efficiency 25W PD Solution with 12VDC and 24VAC Auxiliary Input

BSZ110N06NS3 ×4

TG2

TG1

OUTP

LT4320

V

AUX

IN1

IN2

9V TO 57VDC

OR 24VAC

1µF

PSMN075-100MSE ×4

BG2

BG1

OUTN

MMSD4148

×3

PSMN075-100MSE

1

0.1µF

+

680µF

2

3

V

IN

TG12 BG12

BG36 TG36

OUTP

VPORT

HSGATE

LT4275B

HSSRC

DATA

PAIRS

3.3k

150nF

158k

931k

SMAJ60A

0.1µF

+

EN

ISOLATED

POWER

IN12

AUX

RCLASS

100k

V

OUT

SUPPLY

6

4

–

34.8Ω

IN36

IN45

LT4321

RUN

EN

PWRGD

IEEEUVLO

GND

4321 TA02

IN78

OUTN

5

7

SPARE

PAIRS

BG45 TG45

TG78 BG78

8

WÜRTH 749022017

PSMN075-100MSE ×4

4321f

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For more information www.linear.com/LT4321

LT4321

package DescripTion

Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.

UF Package

16-Lead Plastic QFN (4mm × 4mm)

(Reference LTC DWG # 05-08-1692 Rev Ø)

0.72 ±0.05

4.35 ±0.05

2.90 ±0.05

2.15 ±0.05

(4 SIDES)

PACKAGE OUTLINE

0.30 ±0.05

0.65 BSC

RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS

BOTTOM VIEW—EXPOSED PAD

PIN 1 NOTCH R = 0.20 TYP

OR 0.35 × 45° CHAMFER

0.75 ±0.05

R = 0.115

TYP

4.00 ±0.10

(4 SIDES)

15

16

0.55 ±0.20

PIN 1

TOP MARK

(NOTE 6)

1

2

2.15 ±0.10

(4-SIDES)

(UF16) QFN 10-04

0.200 REF

0.30 ±0.05

0.65 BSC

0.00 – 0.05

NOTE:

1. DRAWING CONFORMS TO JEDEC PACKAGE OUTLINE MO-220 VARIATION (WGGC)

2. DRAWING NOT TO SCALE

3. ALL DIMENSIONS ARE IN MILLIMETERS

4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE

MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE

5. EXPOSED PAD SHALL BE SOLDER PLATED

6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION

ON THE TOP AND BOTTOM OF PACKAGE

4321f

Information furnished by Linear Technology Corporation is believed to be accurate and reliable.

However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-

11

For more information www.linear.com/LT4321

tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.

LT4321

Typical applicaTion

PSMN075-100MSE ×4

++

LTPoE 70W Powered Device

PSMN040-100MSE

0.1µF

1

+

22µF

2

3

V

IN

TG12 BG12

BG36 TG36

OUTP

VPORT

HSGATE

HSSRC

DATA

PAIRS

RCLASS++

3.3k

SMAJ60A

+

EN

ISOLATED

POWER

IN12

LT4275

64.9Ω

RCLASS

100k

V

OUT

SUPPLY

6

4

–

76.8Ω

47nF

IN36

IN45

EN

PWRGD

AUX

LT4321

RUN

IEEEUVLO

GND

IN78

OUTN

5

7

4321 TA03

SPARE

PAIRS

BG45 TG45

TG78 BG78

8

WÜRTH 749022016

PSMN075-100MSE ×4

relaTeD parTs

PART NUMBER

DESCRIPTION

COMMENTS

LTC4265

IEEE 802.3at PD Interface Controller Internal 100V, 1A Switch, 2-Event Classification Recognition

++

LTC4266/LTC4266A/

LTC4266C

Quad PoE PSE Controller

IEEE 802.3at, LTPoE , IEEE 802.3af Power Levels

LTC4269-1/

LTC4269-2

IEEE 802.3af PD Interface with

Switching Regulator

LTC4269-1 for Flyback, LTC4269-2 for Forward Regulator

+

++

Transformer Isolation, Supports IEEE 802.3af, IEEE 802.3at and LTPoE PDs

LTC4270/LTC4271

12-Port PoE/PoE /LTPoE PSE

Controller

++

IEEE 802.3at, LTPoE 90W, IEEE 802.3af Power Levels

LTC4274/LTC4274A/

LTC4274C

Single PoE PSE Controller

++

+

++

External Switch, LTPoE Support

LT4275A/LT4275B/

LT4275C

LTPoE /PoE /PoE PD Controller

LTC4278

IEEE 802.3af PD Interface with

Integrated Flyback Switching

Regulator

2-Event Classification, Programmable Class, Synchronous No-Opto Flyback Controller,

50kHz to 250kHz, 12V Aux Support

+

++

LTC4290/LTC4271

8-Port PoE/PoE /LTPoE PSE

Controller

Transformer Isolation, Supports IEEE 802.3af, IEEE 802.3at and LTPoE PDs

LT4320

Ideal Diode Bridge Controller

9V to 72V, DC to 600Hz, N-Channel Ideal Diode Bridge

LTC4354

Negative Voltage Diode-OR Controller Controls Two N-Channel MOSFETs, 1.2µs Turn-Off, –80V Operation

and Monitor

LTC4355

LTC4359

Positive Voltage Diode-OR Controller Controls Two N-Channel MOSFETs, 0.4µs Turn-Off, 9V to 80V Operation

and Monitor

Ideal Diode Controller with Reverse

Input Protection

N-Channel, 4V to 80V, MSOP-8 and DFN-6 Packages

4321f

LT 0913 • PRINTED IN USA

LinearTechnology Corporation

1630 McCarthy Blvd., Milpitas, CA 95035-7417

12

For more information www.linear.com/LT4321

(408)432-1900 FAX: (408) 434-0507 www.linear.com/LT4321

●

 LINEAR TECHNOLOGY CORPORATION 2013


型号：	LT4321_15
厂家：	Linear
描述：	PoE Ideal Diode Bridge Controller
文件：	总12页 (文件大小：177K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

LT4321_15 [Linear]

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