LT3781EG [Linear]
Bootstrap Start Dual Transistor Synchronous Forward Controller; 自举启动双晶体管的同步正向控制器
| 型号： | LT3781EG |
| 厂家： | 
Linear |
| 描述： | Bootstrap Start Dual Transistor Synchronous Forward Controller |
| 文件： | 总20页 (文件大小：270K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Final Electrical Specifications
LT3781
“Bootstrap” Start Dual
Transistor Synchronous Forward Controller
U
May 2002
FEATURES
DESCRIPTIO
The LT®3781 controller simplifies the design of high
power synchronous dual transistor forward DC/DC con-
verters. The part employs fixed frequency current mode
control and supports both isolated and nonisolated to-
pologies.TheIC drivesexternalN-channelpowerMOSFETs
and operates with input voltages up to 72V.
■
High Voltage Operation up to 72V
■
Synchronizable Operating Frequency and Output
Switch Phase for Multiple Controller Systems
■
Synchronous Switch Output
■
Undervoltage Lockout Protection with 6V Hysteresis
for Self-Biased Power
■
Fixed Frequency Operation to 350kHz
The LT3781 is ideal for output derived power schemes,
through the use of a large undervoltage lockout hysteresis
range. The part is also equipped with an 18V power supply
pin regulator which prevents exceeding absolute maxi-
mum ratings while in trickle start applications.
■
Local 1% Voltage Reference
■
Input Overvoltage Protection
■
Low Start-Up Current
■
Programmable Start Inhibit for Power Supply
Sequencing and Protection
Optocoupler Support
Soft-Start Control
■
■
The LT3781’s operating frequency is programmable and
can be synchronized up to 350kHz. Switch phase is also
controlled during synchronized operation to accommo-
date multiple-converter systems. Internal logic guaran-
tees 50% maximum duty cycle operation to prevent trans-
former saturation.
U
APPLICATIO S
■
Isolated Telecommunication Systems
■
Personal Computers and Peripherals
■
Distributed Power Step-Down Converters
Lead Acid Battery Backup Systems
Automotive and Heavy Equipment
The LT3781 is available in a 20-lead SSOP package.
■
, LTC and LT are registered trademarks of Linear Technology Corporation.
■
U
TYPICAL APPLICATIO
36V-72V to 5V/7A DC/DC
Synchronous Forward Converter (Quarter-Brick Footprint)
V
I
= 5V
= 7A
L2
4.1µH
L1
OUT
OUT
T1
6
4.7µH
+
OUT
+
V
V
IN
Q1
MURS120T3
1
2
3
7
5
8
4
10Ω
0.25W
+
C5
MBR-
0540T1
+
C2
22µF
100V
C4
1.5µF
100V
330µF
1nF
100V
10Ω
0.25W
MURS120T3
Q3
10V
10
11
12
1nF
100V
Q6
R9
0.025Ω
1/2W
C3
1.5µF
100V
9
4.7Ω
Q5
–
–
OUT
V
V
IN
ZVN3310F
BAT54
1OV
10k
2k
0.22µF
100Ω
BIAS
1OV
0.1µF
FZT690
BIAS
50V
MMBD914LT1
330pF
100V
CMPZ5242B
12V
73.2k
1%
270k
0.25W
4.7µF
16V
5V
BAS21
20
OUT
20k
19
18
15 11
14
13
LTC1693-2
CC1
3.3Ω
V
CC
V
BST
TG BSTREF BG SENSE
LT3781
PGND
6
8
3
1
4
12
SG
V
V
CC2
2
1
0.047µF
OVLO
SHDN
5
7
2
9
IN2
IN1
OUT2
OUT1
V
THERM SYNC SGND SS V
C
5V
FSET
FB
REF
5
51Ω
3.01k
1%
6
3
7
4
8
10
100Ω
1nF
1.24k
1%
0.1µF
52.3k
GND2 GND1
C2:SANYO 100MV22AX
L2: PANASONIC ETQP6F4R1LF4
+
C3, C4: VITRAMON VJ1825Y155MXB Q1,Q3:100V SILICONIX SUD40N10-25
C5: 4X KEMET T510X337KO10AS
L1: COILCRAFT DO1608C-472
68µF
20V
10k
4.7nF
1k
1%
Q5,Q6: SILICONIX Si4450
T1:COILTRONICS VP5-1200
1µF
150pF
0.01µF
3781i
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tationthattheinterconnectionofitscircuitsasdescribedhereinwillnotinfringeonexistingpatentrights.
1
LT3781
W W
U W
U
W
U
ABSOLUTE AXI U RATI GS
(Note 1)
PACKAGE/ORDER I FOR ATIO
ORDER PART
TOP VIEW
Power Supply (VCC)
NUMBER
Low Impedance Source Voltage .............–0.3V to 20V
Shutdown Mode:
1
2
V
BST
20
19
18
17
16
15
14
13
12
11
SHDN
OVLO
TG
LT3781EG
LT3781IG
3
BSTREF
NC
THERM
SGND
(Supply Self-Regulates to 18V)
4
Maximum Input Current ............................... 20mA
Topside Supply (VBST) ....................................................
5
NC
5V
REF
6
BG
FSET
SYNC
SS
V
BSTREF – 0.3V to VBSTREF +20V (VBST(MAX) = 90V)
7
PWRGND
Topside Reference Pin (VBSTREF) ...............–0.6V to 75V
SHDN Pin Voltage........................... –0.3V to VCC + 0.3V
All Other Input Voltages.............. –0.3V to 5VREF + 0.3V
5VREF Pin SYNC Current ....................................... 10mA
FSET Pin Current ...................................... –2mA to 5mA
All Other Input Pin Currents...................... –2mA to 2mA
Operating Ambient Temperature Range...–40°C to 85°C
Operating Junction
8
V
CC
9
SG
V
FB
10
SENSE
V
C
G PACKAGE
20-LEAD PLASTIC SSOP
TJMAX = 125°C, θJA = 85°C/W
Consult LTC Marketing for parts specified with wider operating temperature ranges.
Temperature Range (Note 4) .................–40°C to 125°C
Storage Temperature Range ..................–65°C to 150°C
Lead Temperature (Soldering, 10 sec).................. 300°C
ELECTRICAL CHARACTERISTICS
The ● denotes specifications which apply over the full operating temperature range, otherwise specifications are TA = 25°C.
VCC = VBST = 12V, VBSTREF = 0V, VVC = 2V, VFB = VREF = 1.25V, CTG = CBG = CSG = 1000pF.
SYMBOL PARAMETER
Supply and Protection
CONDITIONS
MIN
TYP
MAX
UNITS
V
Undervoltage Lockout Threshold
Falling Edge
Rising Edge
●
●
8.0
13
8.4
14.5
8.6
16
V
V
CCUVLO
V
Shutdown Mode Shunt Regulator
DC Active Supply Current
100µA < I
≤ 10mA
●
16.5
18
17
19.9
V
CCSHDN
VCC
I
(Note 2)
22
25
mA
mA
CC
●
●
●
●
DC Active UVLO Supply Current
DC Standby Supply Current
DC Active Supply Current
V
V
= 1.35V, V = 8V
800
16
1200
30
µA
µA
mA
µA
V
SHDN
SHDN
CC
< 0.3V
V
V
TG Logic High (Note 2)
5.0
8.5
BST
DC Standby Supply Current
Shutdown Rising Threshold
Shutdown Threshold Hysteresis
Soft-Start Charge Current
Soft-Start Reset Threshold
Boost Undervoltage Lockout
V
< 0.3V
0.1
SHDN
●
●
1.15
100
–14
1.25
150
–10
225
1.35
200
–6
SHDN
mV
µA
mV
I
V
= 2V
SS
SS
V
V
SS
Falling Edge
Rising Edge
●
●
5.7
6.5
6.4
7.0
7.1
7.5
V
V
BSTUVLO
(V -BSTREF)
BST
Boost UVLO Hysteresis
●
0.3
0.6
V
5V External Reference
V
5V Reference Voltage
0 ≤ (I
– I ) < 20mA
4.85
4.80
5.0
5.10
5.15
V
V
5VREF
5VREF
VC
●
●
I
Short-Circuit Current
Output Impedance
Source, I = 0
20
45
1
mA
Ω
5VREFSC
VC
R
0 ≤ (I
– I ) < 20mA
5VREF
5VREF VC
3781i
2
LT3781
ELECTRICAL CHARACTERISTICS
The ● denotes specifications which apply over the full operating temperature range, otherwise specifications are TA = 25°C.
VCC = VBST = 12V, VBSTREF = 0V, VVC = 2V, VTS = 0V, VFB = VREF = 1.25V, CTG = CBG = CSG = 1000pF.
SYMBOL PARAMETER
Error Amp
CONDITIONS
MIN
TYP
MAX
UNITS
V
Error Amplifier Reference Voltage
Measured at Feedback Pin
1.242
1.225
1.250
1.258
1.265
V
V
FB
●
I
Feedback Input Current
V
= V
REF
–50
72
nA
dB
FB
FB
A
Error Amplifier Voltage Gain
Error Amplifier Current Limit
V
I
Source
Sink
●
●
10
0.5
25
1
mA
mA
VC
V
Zero Current Output Voltage
Maximum Output Voltage
Gain Bandwidth Product
1.4
3.2
1
V
V
VC
GBW
Current Sense
(Note 3)
MHz
A
Amplifier DC Gain
12
V/V
V
I
Input Bias Current
Current Limit Threshold
–275
150
µA
SENSE
V
Measured at SENSE Pin
Measured at BG Output
135
130
165
170
mV
mV
SENSE
●
t
t
Current Sense to Switch Delay
Switch Minimum On Time
175
250
ns
ns
D
MIN
THERM and OVLO Fault Detectors
V
V
/
Threshold (Rising Edge)
Threshold Hysteresis
●
●
1.2
20
1.25
40
1.3
60
V
mV
ns
THERM
OVLO
t
Fault Delay to Output Disable
>50mV Overdrive
650
D
Oscillator and Synchronization Decoder
f
Oscillator Frequency, Free Run
Frequency Programming Error
FSET Input Bias Current
Measured at F
Pin
SET
700
5
kHz
%
OSC
f
≤ 500kHz (Note 3)
●
–10
0.8
OSC
I
F
Charging, V = 2V
FSET
50
nA
FSET
SET
V
SYNC Logic High Input Threshold
SYNC Logic Low Input Threshold
Positive-Going Edge
Negative-Going Edge
●
●
1.4
1.4
2
V
V
SYNC
f
t
SYNC Frequency
●
f
/2
OSC
350
kHz
s
SYNC
H, L
Maximum SYNC Pulse Width
(Logic High or Logic Low)
f
= Oscillator Free-Run Frequency
1/f
OSC
OSC
Output Drivers
V
TG On Voltage
TG Off Voltage
●
●
11
11
11
80
11.5
0.1
V
V
TG
0.5
t
TG Rise/Fall Time
10% to 90%/90% to 10%
10% to 90%/90% to 10%
35
ns
TGr/f
V
BG On Voltage
BG Off Voltage
●
●
11.5
0.1
12
0.5
V
V
BG
t
BG Rise/Fall Time
35
ns
BGr/f
V
SG On Voltage
SG Off Voltage
●
●
11.5
0.1
12
0.5
V
V
SG
t
t
t
SG Rise/Fall Time
10% to 90%/90% to 10%
4V On/Off Thresholds
4V On/Off Thresholds
35
ns
ns
ns
SGr/f
SG to BG Enable Lag Time
TG to BG Enable Lag Time
●
150
100
300
SG-BG
TG-BG
3781i
3
LT3781
ELECTRICAL CHARACTERISTICS
Note 1: Absolute Maximum Ratings are those values beyond which the life
Note 3: Guaranteed but not tested.
of a device may be impaired.
Note 4: The LT3781E is guaranteed to meet performance specifications
from 0°C to 70°C. Specifications over the –40°C to 85°C operating
temperature range are assured by design, characterization and correlation
with statistical process controls. For guaranteed performance to
specifications over the –40°C to 85°C operating ambient temperature
range, the LT3781I is available.
Note 2: Supply current specification does not include external FET gate
charge currents. Actual supply currents will be higher and vary with
operating frequency, operating voltages, and the type of external switch
elements used. See Applications Information.
U W
TYPICAL PERFOR A CE CHARACTERISTICS
Shutdown Mode: VCC vs
Temperature (ICC = 1mA)
Shutdown Mode: VCC vs ICC
18.4
18.2
18.0
17.8
17.6
18.20
18.15
18.10
18.05
18.00
1m
(A)
3m
40
0
TEMPERATURE (°C)
80
125
100µ
10m
–55 –40
300µ
I
CC
3781 • G01a
3781 • G01b
ICC Supply Current
vs Temperature
ICC Supply Current
vs VCC Supply Voltage
20
19
18
17
16
15
18
17
16
15
T
= 25°C
V
= 12V
A
CC
0
40
12
14
–55
80
125
9
16
18
–40
10
TEMPERATURE (°C)
SUPPLY VOLTAGE (V)
3781 G01
3781 G03
3781i
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LT3781
U W
TYPICAL PERFOR A CE CHARACTERISTICS
IBST Boost Supply Current
vs Temperature
ICC Supply Current
vs SHDN Pin Voltage
UVLO ICC Supply Current
vs Temperature
5.2
5.1
5.0
4.9
4.8
60
40
20
0
1
T
= 25°C
A
0.8
0.6
0.5
0
40
–55
80
125
0
–40
–55
–40
40
80
125
0
0.2
0.4
0.6
0.8
1.0
1.2
SHDN PIN VOLTAGE (V)
TEMPERATURE (°C)
TEMPERATURE (°C)
3781 G04
3781 G06
3781 G05
Error Amp Reference
vs Temperature
5VREF Short-Circuit Current Limit
vs Temperature
5VREF Voltage vs Temperature
5.10
5.05
5.00
4.95
4.90
60
50
40
30
1.260
1.255
1.250
1.245
1.240
0
40
0
40
0
40
–55
80
125
–55
80
125
–55
–40
80
125
–40
–40
TEMPERATURE (°C)
TEMPERATURE (°C)
TEMPERATURE (°C)
3781 G07
3781 G08
3781 G09
Soft-Start Output Current
vs Temperature
Soft-Start Output Current
vs Soft-Start Pin Voltage
VC Pin Short-Circuit Current Limit
vs Temperature
25
20
15
10
60
40
20
0
12
11
10
9
T
= 25°C
V
SS
= 2V
A
8
0
40
0
100
200
300
400
500
–55
80
125
–40
0
40
–55
80
125
–40
SOFT-START PIN VOLTAGE (mV)
TEMPERATURE (°C)
TEMPERATURE (°C)
3781 G12
3781 G10
3781 G11
3781i
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LT3781
U W
TYPICAL PERFOR A CE CHARACTERISTICS
Soft-Start Output Current
vs Soft-Start Pin Voltage
Current Sense Amplifier
Bandwidth vs Temperature
60
40
20
0
8
7
T
= 25°C
A
6
5
4
3
2
0
1
2
3
4
5
–55 –35 –15
5
25 45 65 85 105 125
SOFT-START PIN VOLTAGE (V)
TEMPERATURE (°C)
3781 G13
3781 G14
U
U
U
PI FU CTIO S
SHDN (Pin 1): Shutdown Pin. Pin voltages exceeding
positive going threshold of 1.25V enables the LT3781.
150mV of input hysteresis resists mode switching insta-
bility.
THERM (Pin 3): System Thermal Shutdown. Auxiliary
shutdown pin that is typically used for system thermal
protection. If pin voltage exceeds 1.25V, LT3781
switching function is disabled. 40mV of input hysteresis
resists mode switching instability. Exceeding the THERM
threshold also triggers soft-start reset, resulting in a
graceful recovery.
TheSHDNpincanbecontrolledbyeitheralogiclevelinput
orwithananalogsignal. Thisshutdownfeatureistypically
used for input supply undervoltage protection. A resistor
divider from the converter input supply to the SHDN pin
monitors that supply for control of system power-up
sequencing, etc.
SGND (Pin 4): Signal Ground Reference. Careful board
layout techniques must be used to prevent corruption of
signal ground reference. High-current switching paths
must be oriented on the converter ground plane such that
currents to/from the switches do not affect the integrity of
the LT3781 signal ground reference.
An 18V clamp on the VCC pin is enabled during shutdown
mode,preventingatricklestartcircuitfrompullingthatpin
above maximum operational levels. All other internal
functions are disabled during shutdown.
5VREF (Pin 5): 5V Local Reference. Allows connection of
external loads up to 20mA DC. Typically bypassed with
1µF ceramic capacitor to SGND. Reference output is
current limit protected to a typical value of 45mA. If the
load on the 5V reference exceeds the current limit value,
LT3781 switching function is disabled and the soft-start
function is reset.
OVLO (Pin 2): Overvoltage Shutdown Sense. Typically
connected to input supply through a resistor divider. If pin
voltage exceeds 1.25V, LT3781 switching function is
disabled to protect boosted circuitry from exceeding ab-
solutemaximumvoltage. 40mVofinputhysteresisresists
modeswitchinginstability. ExceedingtheOVLOthreshold
also triggers soft-start reset, resulting in a graceful recov-
ery from an input transient event.
FSET (Pin 6): Oscillator Timing Pin. Connect a resistor
(RFSET) from the 5VREF pin to this pin and a capacitor
(CFSET) from this pin to ground.
3781i
6
LT3781
U
U
U
PI FU CTIO S
The LT3781 oscillator operates by monitoring the voltage
onCFSET asitischargedviaRFSET.Whenthevoltageonthe
FSET pin reaches 2.5V, the oscillator rapidly discharges
the capacitor with an average current of about 0.8mA.
Once the voltage on the pin is reduced to 1.5V, the pin
becomes high-impedance and the charging cycle repeats.
The oscillator operates at twice the switching frequency of
the controller.
SS (Pin 8): Soft-Start. Connect a capacitor (CSS) from this
pin to ground.
The output voltage of the LT3781 error amplifier corre-
sponds to the peak current sense amplifier output de-
tected before resetting the switch outputs. The soft-start
circuit forces the error amplifier output to a zero sense
current for start-up. A 10µA current is forced from this pin
ontoanexternalcapacitor.AstheSSpinvoltagerampsup,
so does the LT3781 internally sensed current limit. This
effectively forces the internal current limit to ramp from
zero, allowing overall converter current to slowly increase
until normal output regulation is achieved. This function
reduces output overshoot on converter start-up. The soft-
start functions incorporate a 1VBE “dead zone” such that
a zero-current condition is maintained on the VC pin until
the SS pin rises to 1VBE above ground.
Oscillator frequency fOSC can be approximated by the
relation:
–1
–1
RFSET
3
2
fOSC
0.5•10–6 + CFSET
+ 8•10–4
+
RFSET
SYNC (Pin 7): Oscillator Synchronization Input Pin with
TTL-LevelCompatibleInput. TheSYNCinputsignal(atthe
desired synchronized operating frequency) controls both
the internal oscillator (running at twice the SYNC fre-
quency) and the output switch phase. If synchronization
function is not desired, this pin may be floated or shorted
to ground.
The SS pin voltage is reset to start-up condition during
shutdown, undervoltage lockout, and overvoltage or
overcurrent events, yielding a graceful converter output
recovery from these events.
VFB (Pin 9): Error Amplifier Inverting Input. Typically
connected to a resistor divider from the output and com-
pensation components to the VC pin.
The LT3781 internal oscillator drives a toggle flip-flop that
assures a ≤50% duty-cycle condition during oscillator
free-run. The oscillator, therefore, runs at twice the oper-
ating frequency of the controller. The SYNC input decoder
incorporates a frequency doubling circuit for oscillator
synchronization, resetting the internal oscillator on both
the rising and falling edges of the input signal.
The VFB pin is the converter output voltage feedback node.
Input bias current of ~50nA forces pin high in the event of
an open feedback path condition. The error amplifier is
internally referenced to 1.25V.
Values for the VOUT to VFB feedback resistor (RFB1) and
the VFB to ground resistor (RFB2) can be calculated to
program converter output voltage (VOUT) via the following
relation:
The SYNC input decoder also differentiates transition
phaseandforcesthetoggleflip-floptophase-lockwiththe
SYNC input. A transition to logic high on the SYNC input
signal corresponds to the initiation of a new switching
cycle (primary switches turning on pending current con-
trol) and a transition to logic low forces a primary switch
off state. As such, the maximum operating duty cycle is
equal to the duty cycle of the SYNC signal. The SYNC input
can therefore be used to reduce the maximum duty cycle
of the controller by reducing the duty cycle of the SYNC
input.
VOUT = 1.25 • (RFB1 + RFB2)/RFB2
VC (Pin 10): Error Amplifier Output. The LT3781 error
amplifier is a low impedance output inverting gain stage.
The amplifier has ample current source capability to allow
easyintegrationofisolationoptocouplersthatrequirebias
currents up to 10mA. External DC loading of the VC pin
reduces the external current sourcing capacity of the
5VREF pin by the same amount as the load on the VC pin.
3781i
7
LT3781
U
U
U
PI FU CTIO S
Theerroramplifieristypicallyconfiguredusingafeedback
RC network to realize an integrator circuit. This circuit
creates the dominant pole for the converter regulation
feedback loop. Integrator characteristics are dominated
by the value of the capacitor connected from the VC pin to
the VFB pin and the feedback resistor connected to the VFB
pin. Specific integrator characteristics can be configured
to optimize transient response.
BG (Pin 15): Bottom Side Primary Switch/Forward Switch
Output Driver. This pin can be connected directly to
gate(s) of primary bottom side and forward switches if
small FETs are used (CGATE total < 5000pF), however, the
use of a gate drive buffer is recommended for peak
efficiencies.
The BG output is enabled at the start of each oscillator
cycle in phase with the TG pin but is timed to “lag” the TG
output during turn-on and “lead” the TG output during
turn-off. These delays force the concentration of transi-
tional losses onto the bottom side primary switch.
The error amplifier can also be configured as a
transimpedance amplifier for use in secondary-side con-
troller applications. (See the Applications Information
section for configuration and compensation details)
An adaptive blanking circuit disables the current sense
function (via the SENSE pin) while the BG pin is below 5V.
SENSE (Pin 11): Current Sense Amplifier (CSA)
Noninverting Input. Current is monitored via a ground
referenced current sense resistor, typically in series with
the source of the bottom side switch FET. Internal current
limit circuitry provides for a maximum peak value of
150mV across the sense resistor during normal opera-
tion.
BSTREF (Pin 18): VBST Supply Reference. Typically con-
nects to source of topside external power FET switch.
TG (Pin 19): Topside (Boosted) Primary Output Driver.
This pin can be connected directly to gate of primary
topside switch if small FETs are used (CGATE < 5000pF),
however,theuseofagatedrivebufferisrecommendedfor
peak efficiencies.
SG (Pin 12): Synchronous Switch Output Driver. This pin
can be connected directly to gate of synchronous switch
if small FETs are used (CGATE < 5000pF), however, the use
of a gate drive buffer is recommended for peak efficien-
cies.
VBST (Pin 20): Topside Primary Driver Bootstrapped Sup-
ply. This“boosted”supplyrailisreferencedtotheBSTREF
pin.
Supply voltage is maintained by a bootstrap capacitor tied
fromtheVBST pintotheboostedsupplyreference(BSTREF)
pin. The charge on the capacitor is refreshed each switch
cycle through a Schottky diode connected from the VCC
supply (cathode) to the VBST pin (anode). The bootstrap
capacitor (CBOOST) must be at least 100 times greater than
the total load capacitance on the TG pin. A capacitor in the
range of 0.1µF to 1.0µF is generally adequate for most
applications. The bootstrap diode must have a reverse
breakdown voltage greater than the converter VIN. The
LT3781 supports operational VBST supply voltages up to
90V (absolute maximum) referenced to ground.
Undervoltage Lockout disables the topside switch until
VBST – BSTREF > 7.0V for start-up protection of the
topside switch.
The SG pin output is synchronized and out-of-phase with
the BG output. The control timing of the SG output cause
it to “lead” the primary switch path during turn-on by
150nS.
VCC (Pin 13): ICLocal Power Supply Input. Bypass with at
a capacitor at least 10 times greater than C5VREF. LT3781
incorporatesundervoltagelockoutthatdisablesswitching
functions if VCC is below 8.4V. The LT3781 supports
operational VCC power supply voltages from 9V to 18V
(20V absolute maximum). An 18V clamp on the VCC pin is
enabled during shutdown mode, preventing a trickle start
circuit from pulling that pin above maximum operational
levels during IC shutdown.
PWRGND (Pin 14): Output Driver Ground Reference.
Connect through low impedance trace to VIN decoupling
capacitor.
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LT3781
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APPLICATIO S I FOR ATIO
During normal operation, the LT3781 internal oscillator
runs at twice the switching frequency. The oscillator
output toggles a T flip-flop, generating a 50% duty cycle
pulse that is used internally as the system clock for the IC.
When the output of this flip-flop transitions high, the
primary switches are enabled. The primary side switches
stayenableduntilthetransformerprimarycurrent,sensed
via the SENSE pin connected to a ground-referenced
resistor in series with the bottom side switch FET, is
sufficienttotripthecurrentsensecomparatorand,inturn,
reset the RS latch. When the RS latch resets, the primary
switches are disabled and the synchronous switch is
enabled. The adaptive blanking circuit senses the bottom
side gate voltage and prevents current sensing until the
FET is fully enabled, preventing false triggering due to a
turn-ontransitionglitch. Ifthecurrentcomparatorthresh-
old is not obtained when the flip-flop output transitions
low, theRSlatchisbypassedandtheprimaryswitchesare
disabled until the next flip-flop output transition, forcing a
maximum switch duty cycle less than 50%.
Overview
The LT3781 is a high voltage, high current synchronous
regulator controller, optimized for use with dual transistor
forward topologies. The IC uses a constant frequency,
current mode architecture, with internal logic that pre-
vents operation over 50% duty cycle. A unique synchroni-
zationschemeallowsthesystemclocktobesynchronized
up to an operational frequency of 350kHz, along with
phase control for easy integration of multicontroller sys-
tems. A local precision 5V supply rail is available for
external support circuitry and can be loaded up to 20mA.
Internal fault detection circuitry disables switching when
a variety of system faults are detected such as: input
supply overvoltage or undervoltage faults, excessive sys-
temtemperature,andlocalsupplyovercurrentconditions.
The LT3781 has a current-limit soft-start feature, which
gradually increases the current drive capability of a con-
verter system to yield a smooth start-up with minimal
overshoot. The soft-start circuitry is also used for smooth
recoveries from system fault conditions.
System Fault Detection-The General Fault Condition
(GFC)
External FET switches are employed for the switch ele-
ments, and hearty switch drivers allow implementation of
high current designs. An adaptive blanking scheme built
into the LT3781 allows for correct current-sense blanking
regardless of switch size. The LT3781 employs a voltage
output error amplifier, providing superior integrator lin-
earity and allowing easy high bandwidth integration of
optocoupler feedback for fully isolated solutions.
The LT3781 contains circuitry for detecting internal and
system faults. Detection of a fault triggers a “general fault
condition”, or GFC. When a GFC is detected, the LT3781
disables switching and discharges the soft-start capaci-
tor. When the GFC subsides, the LT3781 initiates a start-
up cycle via the soft-start circuitry to assure a graceful
recovery. Recovery from a GFC is gated by the soft-start
capacitor discharge. The capacitor must be discharged to
athresholdof225mVbeforetheGFCcanbeconcluded.As
the zero output current threshold of the SS pin is typically
a transistor VBE, or 0.7V, latching the GFC until a 225mV
threshold is achieved assures a zero output current state
in the event of a short-duration fault. A GFC is also
triggered during system state change event, such as
entering shutdown mode, to prevent any mode transition
abnormalities.
Theory of Operation (See Block Diagram)
The LT3781 senses the output voltage of its associated
converter via the VFB pin. The difference between the
voltage on this pin and an internal 1.25V reference is
amplified to generate an error voltage on the VC pin, which
is used as a threshold for the current sense comparator.
The current sense comparator gets its information from
the SENSE pin, which monitors the voltage drop across an
external current sense resistor. When the detected switch
current increases to the level corresponding to the error
voltage on the VC pin, the switches are disabled until the
next switch cycle.
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U
Events that trigger a GFC are:
the voltage across the bootstrap supply is greater than
7.4V. This helps prevent the possibility of forcing the high
side switch into a linear operational region, potentially
causing excessive power dissipation due to inadequate
gate drive during start-up.
a) Exceeding the current limit of the 5VREF pin
b) Detecting an undervoltage condition on VCC
c) Detecting an undervoltage condition on 5VREF
d) Pulling the SHDN pin below the shutdown threshold
Error Amplifer Configurations
e) Exceeding the 1.25V fault detector threshold on
either the OVLO or THERM pins
Theconverteroutputvoltageinformationisfedbacktothe
LT3781 onto the VFB pin where it is transformed into an
output current control voltage by the error amplifier. The
erroramplifierisgenerallyconfiguredasanintegratorand
is used to create the dominant pole for the main converter
feedback loop. The LT3781 error amplifier is a true high
gain voltage amplifier. The amplifier noninverting input is
internally referenced to 1.25V; the inverting input is the
VFB pin and the output is the VC pin. Because both low
frequency gain and integrator frequency characteristics
canbecontrolledwithexternalcomponents, thisamplifier
allows far greater flexibility and precision compared with
use of a transconductance error amplifier.
OVLO and THERM pins is used to directly trigger a GFC. If
either of these pins are not used, they can be disabled by
connecting the pin to ground. The intention of the OVLO
pin is to allow the monitoring of the input supply to protect
from an overvoltage condition though the use of a resistor
divider from the input supply. Monitoring of system tem-
perature (THERM) is possible through use of a resistor
divider using a thermistor as a divider component. The
5VREF pin can provide the precision supply required for
these applications. When these fault detection circuits are
disabled during shutdown or VCC pin UVLO conditions, a
reduction in OVLO and THERM pin input impedance to
groundwilloccur.Topreventexcessivepininputcurrents,
low impedance pull-up devices must not be used on these
pins.
In a nonisolated converter configuration where a resistor
divider is used to program the desired output voltage, the
error amplifier can be configured as a simple active
integrator, forming the system dominant pole ( Figure 1).
Placing a capacitor CERR from the VFB pin to the VC pin will
set the single-pole crossover frequency at (2πRFBCERR)-1.
Additional poles and zeros can be added by increasing the
complexity of the RC network.
Undervoltage Lockout
The LT3781 maintains a low current operational mode
when an undervoltage condition is detected on the VCC
supply pin, or when VCC is below the undervoltage lockout
(UVLO) threshold. During a UVLO condition on the VCC
pin, the LT3781 disables all internal functions with the
exception of the shutdown and UVLO circuitry. The exter-
nal 5VREF supply is also disabled during this condition.
Disabling of all switching control circuity reduces the
LT3781 supply current to <1mA, making for efficient
integration of trickle charging in systems that employ
output feedback supply generation.
V
OUT
R
FB
V
V
FB
C
9
C
–
+
ERR
10
1.25V
LT3781
The function of the high side switch output (TG) is also
gated by UVLO circuitry monitoring the bootstrap supply
(VBST – BSTREF). Switching of the TG pin is disabled until
3781 F01
Figure 1. Nonisolated Error Amp Configuration
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internally as the system clock for the IC. Free-run
frequency for the internal oscillator is programmed via an
RC timing network connected to the FSET pin. A pull-up
resistor RFSET, connected from the 5VREF pin to FSET,
provides current to charge a timing capacitor CFSET con-
nected from the FSETpin to ground. The oscillator oper-
ates by allowing RFSET to charge CFSET up to 2.5V at which
pointRFSET ispulledbacktowardgroundbya2.5Kresistor
internal to the LT3781. When the voltage across CFSET is
pulled down to 1.5V, the FSET pin becomes high imped-
Another common error amplifier configuration is for
optocoupler use in fully isolated converters with second-
ary side control (Figure 2). In such a system, the dominant
pole for the feedback loop is created at the secondary side
controller,sotheerroramplifierneedsonlytotranslatethe
optocoupler information. The bandwidths of the
optocouplerandamplifiershouldbeashighaspossibleto
simplify system compensation. This high bandwidth
operation is accomplished by using the error amplifier as
a transimpedance amplifier, with the optocoupler transis-
tor emitter providing feedback information directly into
the VFB pin. A resistor from VFB to ground provides the DC
bias condition for the optocoupler. Connecting the
optocoupler transistor collector to the local 5VREF supply
reduces Miller capacitance effects and maximizes the
bandwidth of the optocoupler. Also, higher optocoupler
current means higher bandwidth, and the 5VREF supply
can provide collector currents up to 10mA.
ance, once again allowing RFSET to charge CFSET
.
Figure3isaplotofoscillatorfrequencyvsCFSET andRFSET
is shown below. Typical values for 300kHz operation
(150kHz system frequency) are CFSET = 150pF and
RFSET = 51kΩ.
600
550
500
450
100pF
400
V
OUT
SENSE
150pF
350
5V
REF
5
9
5V
300
200pF
250
V
V
FB
330pF
200
150
100
–
+
C
20
60
80 90
30 40 50
70
100
10
TIMING RESISTOR (kΩ)
3781 F03
1.25V
LT3781
3781 F01
Figure 3. Oscillator Frequency vs. Timing Components
Due the relatively fast fall time of the oscillator waveform,
the FSET pin is held at its 1.5V threshold by an internal low
impedance clamp to reduce undershoot error. As a result,
if this pin is externally forced low for any reason, external
current limiting is required to prevent damage to the
LT3781. Continuous source current from the FSET pin
shouldnotexceed1mA.Puttinga2k resistorinserieswith
any low impedance pull-down device will assure proper
function and protect the IC from damage.
Figure 2. Optocoupler High-BW Configuration
Oscillator Frequency Programming and
Synchronization
The LT3781 internal oscillator runs at twice the system
switching frequency. The oscillator output toggles a T
flip-flop, generating a 50% duty cycle pulse that is used
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Oscillator Synchronization
Synchronization of the LT3781 system clock is accom-
plished by driving a TTL level logic pulse train at the
desired system switching frequency into the SYNC pin. In
order to assure proper synchronization, each phase of the
synchronization signal must be less than an oscillator
free-run cycle.
5V
5
6
REF
75k
51k
LT3781
FSET
100pF
3781 F05
The SYNC input pulse controls the phasing as well as the
frequency of controller switching. The SYNC circuit func-
tions by forcing the phase of the oscillator output flip-flop
to match the phase of the SYNC pulse and prematurely
ending the oscillator charge cycle on each transition edge.
At the SYNC logic low-to-high transition, the LT3781
starts a switch-on cycle and the minimum switch-off
period is forced during the SYNC logic low period. Be-
cause the SYNC logic low period corresponds directly to
the minimum off time, the converter maximum duty cycle
can be forced using the SYNC input. For example, a 30%
duty cycle SYNC pulse forces 30% maximum duty cycle
operation for the converter. Because the logic-low pulse
width exceeds the logic-high pulse width in < 50% duty
cycle operation, the oscillator free-run cycle time must be
programmed to exceed the logic-low duration.
Figure 5. Oscillator Connection for SYNC-Only Mode Operation
Bootstrap Start
It is inefficient as well as impractical to power a controller
IC from a high-voltage input supply. Using a linear
preregulation scheme to provide the required VCC voltage
for the LT3781 would waste significant power, reducing
converterefficienciesandcreatingadditionalthermalcon-
cerns. Self-biased power schemes take advantage of
inherentconverterefficienciestosignificantlyreducelosses
associated with powering the controller. Bootstrapped
power can be derived using auxiliary windings on the
powertransformerorinductor, rectifiedtapsonswitching
nodes, or the converter output directly.
2.5V
FSET
1.5V
Start-up circuitry built into the LT3781 allows VCC to
increase from 0V to 14.5V before the converter is enabled.
During this time, start-up current is less than 1mA. The
trickle current required for charging the VCC supply is
typically generated with a resistor from the converter high
voltage input. When combined with the VCC bypass ca-
pacitor, the current through the start-up resistor creates a
voltage ramp on VCC whose slope governs the turn-on
time of the converter. The low quiescent current of the
LT3781 allows the input voltage to be trickled up with
minimal power dissipation in the start-up resistor. At
VCC = 14.5V, the LT3781 internal circuitry is enabled and
switching begins. If enough bootstrap power is fed back
into VCC to keep that supply voltage above 8.4V, then
switching continues and a bootstrap start is accom-
plished. If the input voltage drops below 8.4V, the LT3781
is disabled and the switching regulator returns to the
start-up low current state.
SYNC
SYSTEM
CLOCK
(INTERNAL)
3781 F04
Figure 4. Oscillator/SYNC Waveforms
It is also possible to run the LT3781 in a SYNC-only mode
by disabling the oscillator completely. Connecting a resis-
tor divider from the 5VREF pin to the FSET pin forcing a
voltage within the charge range of 1.5V-2.5V will allow the
oscillator to follow the SYNC input exclusively with no
provision for free-run. Setting values to force a voltage as
close to 2V as possible is recommended.
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Shutdown
The SS pin sources a typical current of 10µA. Placing a
capacitor (CSS) from the SS pin to ground will cause the
voltage on the SS pin to ramp up at a controlled rate,
allowingagracefulincreaseofmaximumconverteroutput
current during a start-up condition. The start-up delay
time to full available current limit is:
The LT3781 SHDN pin will support TTL and CMOS logic
signals and also analog inputs. The SHDN pin turn-on
(rising) threshold is 1.25V with 150mV of hysteresis. A
common use of the SHDN pin is for under voltage detec-
tion on the input supply. Driving the SHDN pin with a
resistor-dividerconnectedfromtheinputsupplytoground
will prevent switching until the desired input supply volt-
age is achieved.
t
SS = 2.5 • 105 • CSS (sec)
The LT3781 internally pulls the SS pin below the zero
current threshold during any fault condition to assure
gracefulrecovery.TheSScircuitalsoactsasafaultcontrol
latch to assure a full-range recovery from a short duration
fault. Once a fault condition is detected, the LT3781 will
suspend switching until the SS pin has discharged to
approximately 225mV.
An 18V clamp on the VCC pin is enabled during shutdown
mode,preventingatricklestartcircuitfrompullingthatpin
above maximum operational levels.
The LT3781 enters an ultralow current shutdown mode
when the SHDN pin is below 350mV. During this mode,
totalsupplycurrentdropstoatypicalvalueof 16µA.When
SHDN rises above 350mV, the IC will draw increasing
amounts of supply current until just before the 1.25V
turn-on threshold is achieved, when the supply current
reaches 75µA.
Layout Considerations-Grounding
The LT3781 is typically used in high current converter
designs that involve substantial switching transients. The
switch drivers on the IC are designed to drive large
capacitances and, as such, generate significant transient
currents. Careful consideration must be made regarding
input and local power supply bypassing to avoid corrupt-
ing the ground references used by the error amplifier and
current sense circuitry.
The shutdown function can be disabled by connecting the
SHDN pin to VCC. This pin is internally clamped to 2.5V
through a 20k series input resistance and can therefore
drawalmost1mAwhentieddirectlytotheVCC supply.This
additional current can be minimized by making the con-
nection through an external series resistor (100k is typi-
cally used).
Effective grounding of the two-transistor synchronous
forward topology where the LT3781 is used is inherently
difficult. The situation is complicated further by the num-
ber of bypass elements that must be considered.
Soft-Start
The LT3781 current control pin (VC) limits sensed current
to zero at voltage less than 1.4V through full current limit
at VC = 3.2V, yielding 1.8V over the full regulation range.
ThevoltageontheVC pinisinternallyforcedtobelessthan
or equal to SS + 0.7V. As such, the SS pin has a “dead
zone” between 0V and 0.7V, where a zero sensed current
condition is maintained. At SS voltages above 0.7V, the
sensed current limit threshold on the VC pin may rise as
needed up to the SS maintained current limit value. Once
the SS pin rises to the VC pin maximum value less 0.7V, or
2.5V, the SS circuit has no effect.
Typically, high current paths and transients from the input
supply and any local drive supplies must be kept isolated
from SGND, to which sensitive circuits such as the error
ampreferenceandthecurrentsensecircuits,aswellasthe
local5VREF supply,arereferred.Byvirtueofthetopologies
used in LT3781 applications, the large currents from the
primary switches, as well as the switch drive transients,
pass through the sense resistor to ground. This defines
the ground connection of the sense resistor as the refer-
ence point for both SGND and PGND. In nonisolated
applications where SGND is the output reference, we now
have a condition where every bypass capacitor in the
converter is referenced to the same point.
3781i
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LT3781
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Effective grounding can be achieved by considering the
return current paths from the sense resistor to each
respective bypass capacitor. Don’t be tempted to run
small traces to separate the grounds. A power ground
plane is important as always in high power converters, but
bypass elements must be oriented such that transient
currentsinthereturnpathsofVIN andVCC donotmix. Care
must be taken to keep these transients away from the
SGND reference. An effective approach is to use a 2-layer
ground plane, reserving an entire layer for SGND. The
5VREF and nonisolated converter output bypasses can
then be directly connected to the SGND plane.
V
BST
V
IN
LT3781
V
BST
BSTREF
V
CC
V
CC
5V
REF
SGND
PGND
Figure 6. High-Current Transient Return Paths
3781i
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•
•
•
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LT3781
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TYPICAL APPLICATIO S
•
•
•
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LT3781
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TYPICAL APPLICATIO S
•
•
•
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LT3781
U
PACKAGE DESCRIPTION
G Package
20-Lead Plastic SSOP (5.3mm)
(Reference LTC DWG # 05-08-1640)
7.07 – 7.33*
(.278 – .289)
20 19 18 17 16 15 14 13 12 11
7.65 – 7.90
(.301 – .311)
5
7
8
1
2
3
4
6
9 10
5.20 – 5.38**
(.205 – .212)
1.73 – 1.99
(.068 – .078)
0° – 8°
.65
(.0256)
BSC
.13 – .22
.55 – .95
(.005 – .009)
(.022 – .037)
.05 – .21
.25 – .38
(.010 – .015)
(.002 – .008)
NOTE:
G20 SSOP 0501
1. CONTROLLING DIMENSION: MILLIMETERS
MILLIMETERS
2. DIMENSIONS ARE IN
(INCHES)
3. DRAWING NOT TO SCALE
*DIMENSIONS DO NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED .152mm (.006") PER SIDE
**DIMENSIONS DO NOT INCLUDE INTERLEAD FLASH. INTERLEAD
FLASH SHALL NOT EXCEED .254mm (.010") PER SIDE
3781i
19
LT3781
RELATED PARTS
PART NUMBER
LT1158
DESCRIPTION
COMMENTS
Half-Bridge N-Channel MOSFET Driver
Half-Bridge N-Channel MOSFET Driver
Dual Half-Bridge N-Channel MOSFET Driver
Half-Bridge N-Channel MOSFET Driver
High Power Synchronous DC/DC Controller
High Power Step-Down Switching Regulator Controller
Current Limit Protection, 100% of Duty Cycle
Up to 60V Input Supply, No Shoot-Through
LT1160
LT1162
V to 60V, Good for Full-Bridge Applications
IN
LT1336
Smooth Operation at High Duty Cycle (95% to 100%)
60V Dual N-Channel MOSFET Controller
Excellent for 5V to 3.x Up to 50A
LT1339
LTC®1530
LTC1625
LT1680
No R
TM Synchronous Controller
97% Efficient, 1.19V ≤ V ≤ 36V, 1.19V ≤ V
≤ V
OUT IN
SENSE
IN
High Power DC/DC Current Mode Step-Up Controller
Dual Transistor Synchronous Foward Controller
Secondary Synchronous Rectifier Controller
High Side Current Sense, Up to 60V Input
Operation up to 72V Maximum
LT1681
LTC1698
Use with the LT1681, Isolated Power Supplies, Contains Voltage Merging,
Optocoupler Driver, Synchronization Circuit with the Primary Side
LTC1735
LTC1922-1
LTC1929
LTC3728
Synchronous Step-Down Controller
Current Mode, 3.5V ≤ V ≤ 36V, 0.5V ≤ V
≤ 5V
OUT
IN
Synchronous Phase Modulated Full-Bridge Controller
2-Phase 42A Synchronous Controller
50W to 2kW Power Supply Design, Adaptive Direct Sense ZVS
Minimizes C and C , 4V ≤ V ≤ 36V, 300kHz
IN
OUT
IN
550kHz, Dual 2-Phase Synchronous Controller
High Frequency Reduces Size of Inductors, Minimum C , 4V ≤ V ≤ 36V,
IN IN
I
up to 20A
OUT1, 2
No R
is a trademark of Linear Technology Corporation.
SENSE
3781i
LT/TP 0502 1.5K • PRINTED IN USA
20 LinearTechnology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
●
●
(408) 432-1900 FAX: (408) 434-0507 www.linear.com
LINEAR TECHNOLOGY CORPORATION 2001
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