LT3757HMSE-PBF [Linear]
Boost, Flyback, SEPIC and Inverting Controller; 升压，反激式， SEPIC和负输出控制器
| 型号： | LT3757HMSE-PBF |
| 厂家： | 
Linear |
| 描述： | Boost, Flyback, SEPIC and Inverting Controller |
| 文件： | 总36页 (文件大小：490K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
LT3757
Boost, Flyback, SEPIC and
Inverting Controller
FeaTures
DescripTion
TheꢀLT®3757ꢀisꢀaꢀwideꢀinputꢀrange,ꢀcurrentꢀmode,ꢀDC/DCꢀ
controllerꢀwhichꢀisꢀcapableꢀofꢀgeneratingꢀeitherꢀpositiveꢀorꢀ
negativeꢀoutputꢀvoltages.ꢀItꢀcanꢀbeꢀconfiguredꢀasꢀeitherꢀaꢀ
boost,ꢀflyback,ꢀSEPICꢀorꢀinvertingꢀconverter.ꢀTheꢀLT3757ꢀ
drivesꢀaꢀlowꢀsideꢀexternalꢀN-channelꢀpowerꢀMOSFETꢀfromꢀ
anꢀinternalꢀregulatedꢀ7.2Vꢀsupply.ꢀTheꢀfixedꢀfrequency,ꢀ
current-modeꢀarchitectureꢀresultsꢀinꢀstableꢀoperationꢀoverꢀ
aꢀwideꢀrangeꢀofꢀsupplyꢀandꢀoutputꢀvoltages.ꢀ
n
ꢀ Wide Input Voltage Range: 2.9V to 40V
n
ꢀ Positive or Negative Output Voltage Programming
with a Single Feedback Pin
n
ꢀ CurrentꢀModeꢀControlꢀProvidesꢀExcellentꢀTransientꢀ
Response
n
ꢀ ProgrammableꢀOperatingꢀFrequencyꢀ(100kHzꢀtoꢀ
1MHz)ꢀwithꢀOneꢀExternalꢀResistor
n
ꢀ SynchronizableꢀtoꢀanꢀExternalꢀClock
n
ꢀ LowꢀShutdownꢀCurrentꢀ<ꢀ1µA
TheꢀoperatingꢀfrequencyꢀofꢀLT3757ꢀcanꢀbeꢀsetꢀwithꢀanꢀ
externalꢀresistorꢀoverꢀaꢀ100kHzꢀtoꢀ1MHzꢀrange,ꢀandꢀcanꢀ
beꢀsynchronizedꢀtoꢀanꢀexternalꢀclockꢀusingꢀtheꢀSYNCꢀpin.ꢀ
Aꢀlowꢀminimumꢀoperatingꢀsupplyꢀvoltageꢀofꢀ2.9V,ꢀandꢀaꢀ
lowꢀshutdownꢀquiescentꢀcurrentꢀofꢀlessꢀthanꢀ1µA,ꢀmakeꢀ
theꢀLT3757ꢀideallyꢀsuitedꢀforꢀbattery-operatedꢀsystems.
n
ꢀ Internalꢀ7.2VꢀLowꢀDropoutꢀVoltageꢀRegulator
n
ꢀ ProgrammableꢀInputꢀUndervoltageꢀLockoutꢀwithꢀ
Hysteresis
ꢀ ProgrammableꢀSoft-Start
n
n
ꢀ Smallꢀ10-LeadꢀDFNꢀ(3mmꢀ×ꢀ3mm)ꢀandꢀThermallyꢀ
Enhancedꢀ10-PinꢀMSOPꢀPackages
TheꢀLT3757ꢀfeaturesꢀsoft-startꢀandꢀfrequencyꢀfoldbackꢀ
functionsꢀtoꢀlimitꢀinductorꢀcurrentꢀduringꢀstart-upꢀandꢀ
outputꢀshort-circuit.
applicaTions
ꢀ AutomotiveꢀandꢀIndustrialꢀBoost,ꢀFlyback,ꢀSEPICꢀandꢀ
n
L,ꢀLT,ꢀLTC,ꢀLTM,ꢀLinearꢀTechnology,ꢀtheꢀLinearꢀlogoꢀandꢀBurstꢀModeꢀareꢀregisteredꢀtrademarksꢀ
andꢀNoꢀR
ꢀandꢀThinSOTꢀareꢀtrademarksꢀofꢀLinearꢀTechnologyꢀCorporation.ꢀAllꢀotherꢀ
SENSE
InvertingꢀConverters
trademarksꢀareꢀtheꢀpropertyꢀofꢀtheirꢀrespectiveꢀowners.
n
ꢀ TelecomꢀPowerꢀSupplies
n
ꢀ PortableꢀElectronicꢀEquipment
Typical applicaTion
High Efficiency Boost Converter
Efficiency
V
IN
8V TO 16V
100
90
10µF
25V
X5R
200k
V
IN
10µH
SHDN/UVLO
V
24V
2A
OUT
V
= 8V
IN
80
43.2k
LT3757
V
= 16V
IN
SYNC
GATE
226k
70
60
50
40
30
SENSE
RT
SS
+
47µF
35V
s2
FBX
GND INTV
VC
CC
41.2k
300kHz
16.2k
22k
6.8nF
10µF
25V
X5R
4.7µF
10V
X5R
0.1µF
0.01Ω
0.001
0.1
1
10
0.01
OUTPUT CURRENT (A)
3757 TA01b
3757 TA01a
3757fb
ꢀ
LT3757I
.............................................. –40°Cꢀtoꢀ125°Cꢀ
VC,ꢀSS.........................................................................3V
DFN.................................................... –65°Cꢀtoꢀ125°Cꢀ
SENSE.................................................................... 0.3V
LT3757E
............................................. –40°Cꢀtoꢀ125°Cꢀ
LT3757
absoluTe MaxiMuM raTings (Note 1)
IN
OperatingꢀTemperatureꢀRangeꢀ(Notesꢀ2,ꢀ8)ꢀ
V ,ꢀSHDN/UVLOꢀ(Noteꢀ6).........................................40Vꢀ
INTV ꢀ....................................................V ꢀ+ꢀ0.3V,ꢀ20V
CC
IN
GATEꢀ........................................................ INTV ꢀ+ꢀ0.3V
CC
LT3757Hꢀ............................................–40°Cꢀtoꢀ150°Cꢀ
LT3757MPꢀ......................................... –55°Cꢀtoꢀ125°C
StorageꢀTemperatureꢀRangeꢀ
SYNCꢀ..........................................................................8V
RTꢀ............................................................................1.5V
MSOPꢀ................................................ –65°Cꢀtoꢀ150°C
LeadꢀTemperatureꢀ(Soldering,ꢀ10ꢀsec)ꢀ
FBXꢀ................................................................. –6Vꢀtoꢀ6Vꢀ
MSOPꢀ...............................................................300°C
pin conFiguraTion
TOP VIEW
TOP VIEW
VC
FBX
SS
1
2
3
4
5
10
9
V
IN
VC
FBX
SS
1
2
3
4
5
10
9
V
IN
SHDN/UVLO
SHDN/UVLO
11
11
8
INTV
8
INTV
CC
CC
RT
7
6
GATE
RT
7
GATE
SYNC
SENSE
SYNC
6
SENSE
MSE PACKAGE
10-LEAD PLASTIC MSOP
ꢀ=ꢀ150°C,ꢀθ ꢀ=ꢀ40°C/Wꢀ
JA
EXPOSEDꢀPADꢀ(PINꢀ11)ꢀISꢀGND,ꢀMUSTꢀBEꢀSOLDEREDꢀTOꢀPCB
ꢀ
DD PACKAGE
T
JMAX
10-LEAD (3mm s 3mm) PLASTIC DFN
ꢀ=ꢀ125°C,ꢀθ ꢀ=ꢀ43°C/Wꢀ
JA
EXPOSEDꢀPADꢀ(PINꢀ11)ꢀISꢀGND,ꢀMUSTꢀBEꢀSOLDEREDꢀTOꢀPCB
ꢀ
T
JMAX
orDer inForMaTion
LEAD FREE FINISH
LT3757EDD#PBF
LT3757IDD#PBF
TAPE AND REEL
PART MARKING*
LDYW
PACKAGE DESCRIPTION
TEMPERATURE RANGE
LT3757EDD#TRPBF
LT3757IDD#TRPBF
LT3757EMSE#TRPBF
LT3757IMSE#TRPBF
LT3757HMSE#TRPBF
LT3757MPMSE#TRPBF
–40°Cꢀtoꢀ125°C
–40°Cꢀtoꢀ125°C
–40°Cꢀtoꢀ125°C
–40°Cꢀtoꢀ125°C
–40°Cꢀtoꢀ150°C
–55°Cꢀtoꢀ125°C
10-Leadꢀ(3mmꢀ×ꢀ3mm)ꢀPlasticꢀDFN
10-Leadꢀ(3mmꢀ×ꢀ3mm)ꢀPlasticꢀDFN
10-Leadꢀ(3mmꢀ×ꢀ3mm)ꢀPlasticꢀMSOP
10-Leadꢀ(3mmꢀ×ꢀ3mm)ꢀPlasticꢀMSOP
10-Leadꢀ(3mmꢀ×ꢀ3mm)ꢀPlasticꢀMSOP
10-Leadꢀ(3mmꢀ×ꢀ3mm)ꢀPlasticꢀMSOP
LDYW
LT3757EMSE#PBFꢀ
LT3757IMSE#PBF
LT3757HMSE#PBF
LT3757MPMSE#PBF
LTDYX
LTDYX
LTDYX
LTDYX
ConsultꢀLTCꢀMarketingꢀforꢀpartsꢀspecifiedꢀwithꢀwiderꢀoperatingꢀtemperatureꢀranges.ꢀꢀ*Theꢀtemperatureꢀgradeꢀisꢀidentifiedꢀbyꢀaꢀlabelꢀonꢀtheꢀshippingꢀcontainer.
Forꢀmoreꢀinformationꢀonꢀleadꢀfreeꢀpartꢀmarking,ꢀgoꢀto:ꢀhttp://www.linear.com/leadfree/ꢀꢀ
Forꢀmoreꢀinformationꢀonꢀtapeꢀandꢀreelꢀspecifications,ꢀgoꢀto:ꢀhttp://www.linear.com/tapeandreel/
3757fb
ꢁ
LT3757
elecTrical characTerisTics The l denotes the specifications which apply over the full operating temp-
erature range, otherwise specifications are at TA = 25°C. VIN = 24V, SHDN/UVLO = 24V, SENSE = 0V, unless otherwise noted.
PARAMETER
V ꢀOperatingꢀRangeꢀꢀ
CONDITIONS
MIN
TYP
MAX
UNITS
2.9
40
V
IN
V ꢀShutdownꢀI
SHDN/UVLOꢀ=ꢀ0Vꢀ
SHDN/UVLOꢀ=ꢀ1.15V
0.1
1ꢀ
6
µAꢀ
µA
IN
Q
V ꢀOperatingꢀI
V ꢀ=ꢀ0.3V,ꢀR ꢀ=ꢀ41.2k
1.6
280
110
–65
2.2
400
120
mA
µA
IN
Q
C
T
V ꢀOperatingꢀI ꢀwithꢀInternalꢀLDOꢀDisabled
V ꢀ=ꢀ0.3V,ꢀR ꢀ=ꢀ41.2k,ꢀINTV ꢀ=ꢀ7.5V
C T CC
IN
Q
l
SENSEꢀCurrentꢀLimitꢀThreshold
SENSEꢀInputꢀBiasꢀCurrent
Error Amplifier
100
mV
µA
CurrentꢀOutꢀofꢀPin
l
l
FBXꢀRegulationꢀVoltageꢀ(V
FBXꢀOvervoltageꢀLockout
FBXꢀPinꢀInputꢀCurrent
)
V
V
ꢀ>ꢀ0Vꢀ(Noteꢀ3)ꢀ
ꢀ<ꢀ0Vꢀ(Noteꢀ3)
1.569ꢀ
–0.816
1.6ꢀ
1.631ꢀ
Vꢀ
V
FBX(REG)
FBX
FBX
–0.80
–0.784
V
V
ꢀ>ꢀ0Vꢀ(Noteꢀ4)ꢀ
FBX
ꢀ<ꢀ0Vꢀ(Noteꢀ4)
FBX
6ꢀ
7
8ꢀ
11
10ꢀ
14
%ꢀ
%
V
V
ꢀ=ꢀ1.6Vꢀ(Noteꢀ3)ꢀ
FBX
ꢀ=ꢀ–0.8Vꢀ(Noteꢀ3)
FBX
ꢀ
70ꢀ
100ꢀ
10
nAꢀ
nA
–10
Transconductanceꢀg ꢀ(∆I /∆V
)
FBX
(Noteꢀ3)
(Noteꢀ3)
230
5
µS
m
VC
VCꢀOutputꢀImpedance
MΩ
V
ꢀLineꢀRegulationꢀ[∆V /(∆V ꢀ•ꢀV
)]
V
V
ꢀ>ꢀ0V,ꢀ2.9Vꢀ<ꢀV ꢀ<ꢀ40Vꢀ(Notesꢀ3,ꢀ7)ꢀ
0.002ꢀ
0.0025
0.056ꢀ
0.05
%/Vꢀ
%/V
FBX
FBX
IN
FBX(REG)
FBX
FBX
IN
ꢀ<ꢀ0V,ꢀ2.9Vꢀ<ꢀV ꢀ<ꢀ40Vꢀ(Notesꢀ3,ꢀ7)
IN
VCꢀCurrentꢀModeꢀGainꢀ(∆V /∆V
)
5.5
V/V
µA
VC
SENSE
VCꢀSourceꢀCurrent
VCꢀSinkꢀCurrent
V
ꢀ=ꢀ0V,ꢀV ꢀ=ꢀ1.5V
–15
FBX
C
V
V
ꢀ=ꢀ1.7Vꢀ
FBX
FBX
12ꢀ
11
µAꢀ
µA
ꢀ=ꢀ–0.85V
Oscillator
SwitchingꢀFrequency
R ꢀ=ꢀ41.2kꢀtoꢀGND,ꢀV ꢀ=ꢀ1.6Vꢀ
270
300ꢀ
100ꢀ
1000
330
0.4
kHzꢀ
kHzꢀ
kHz
T
FBX
R ꢀ=ꢀ140kꢀtoꢀGND,ꢀV ꢀ=ꢀ1.6Vꢀ
T
FBX
R ꢀ=ꢀ10.5kꢀtoꢀGND,ꢀV ꢀ=ꢀ1.6V
T
FBX
RTꢀVoltage
V
ꢀ=ꢀ1.6V
FBX
1.2
220
220
V
ns
ns
V
MinimumꢀOff-Time
MinimumꢀOn-Time
SYNCꢀInputꢀLow
SYNCꢀInputꢀHigh
SSꢀPull-UpꢀCurrent
Low Dropout Regulator
1.5
V
SSꢀ=ꢀ0V,ꢀCurrentꢀOutꢀofꢀPin
–10
7.2
µA
l
INTV ꢀRegulationꢀVoltage
7
7.4
2.8
V
CC
INTV ꢀUndervoltageꢀLockoutꢀThreshold
FallingꢀINTV
ꢀ
CC
2.6
2.7ꢀ
0.1
Vꢀ
V
CC
UVLOꢀHysteresis
INTV ꢀOvervoltageꢀLockoutꢀThreshold
16
30
17.5
V
CC
INTV ꢀCurrentꢀLimit
V =ꢀ40Vꢀ
INꢀ
V =ꢀ15V
INꢀ
40ꢀ
95
55
mAꢀ
mA
CC
INTV ꢀLoadꢀRegulationꢀ(∆V
/ V
)
0ꢀ<ꢀI
<ꢀ20mA,ꢀV =ꢀ8V
–0.9
–0.5
0.008
400
%
%/V
mV
CC
INTVCC INTVCC
INTVCCꢀ
INꢀ
INTV ꢀLineꢀRegulationꢀ∆V
/(V
ꢀ•ꢀ∆V )
8Vꢀ<ꢀV ꢀ<ꢀ40V
0.03
CC
INTVCC
INTVCC
IN
IN
DropoutꢀVoltageꢀ(V ꢀ–ꢀV
)
V =ꢀ6V,ꢀI
INꢀ
=ꢀ20mA
INTVCCꢀ
IN
INTVCC
3757fb
ꢂ
LT3757
elecTrical characTerisTics The l denotes the specifications which apply over the full operating temp-
erature range, otherwise specifications are at TA = 25°C. VIN = 24V, SHDN/UVLO = 24V, SENSE = 0V, unless otherwise noted.
PARAMETER
INTV ꢀCurrentꢀinꢀShutdown
CONDITIONS
SHDN/UVLOꢀ=ꢀ0V,ꢀINTV ꢀ=ꢀ8V
MIN
TYP
MAX
UNITS
µA
16
CC
CC
INTV ꢀVoltageꢀtoꢀBypassꢀInternalꢀLDO
7.5
V
CC
Logic Inputs
l
SHDN/UVLOꢀThresholdꢀVoltageꢀFalling
SHDN/UVLOꢀInputꢀLowꢀVoltage
SHDN/UVLOꢀPinꢀBiasꢀCurrentꢀLow
SHDN/UVLOꢀPinꢀBiasꢀCurrentꢀHigh
Gate Driver
V ꢀ=ꢀINTV ꢀ=ꢀ8V
1.17
1.7
1.22
1.27
0.4
V
V
IN
CC
I(V )ꢀDropsꢀBelowꢀ1µA
IN
SHDN/UVLOꢀ=ꢀ1.15V
SHDN/UVLOꢀ=ꢀ1.30V
2
2.5
µA
nA
10
100
t ꢀGateꢀDriverꢀOutputꢀRiseꢀTime
C ꢀ=ꢀ3300pFꢀ(Noteꢀ5),ꢀINTV ꢀ=ꢀ7.5V
22
20
ns
ns
V
r
L
CC
t ꢀGateꢀDriverꢀOutputꢀFallꢀTime
f
C ꢀ=ꢀ3300pFꢀ(Noteꢀ5),ꢀINTV ꢀ=ꢀ7.5V
L CC
GateꢀV
GateꢀV
0.05
OL
OH
INTV
ꢀ
V
CC
–0.05
Note 1:ꢀStressesꢀbeyondꢀthoseꢀlistedꢀunderꢀAbsoluteꢀMaximumꢀRatingsꢀ
mayꢀcauseꢀpermanentꢀdamageꢀtoꢀtheꢀdevice.ꢀExposureꢀtoꢀanyꢀAbsoluteꢀ
MaximumꢀRatingꢀconditionꢀforꢀextendedꢀperiodsꢀmayꢀaffectꢀdeviceꢀ
reliabilityꢀandꢀlifetime.
Note 3:ꢀTheꢀLT3757ꢀisꢀtestedꢀinꢀaꢀfeedbackꢀloopꢀwhichꢀservosꢀV ꢀtoꢀtheꢀ
referenceꢀvoltagesꢀ(1.6Vꢀandꢀ–0.8V)ꢀwithꢀtheꢀVCꢀpinꢀforcedꢀtoꢀ1.3V.
FBX
Note 4:ꢀFBXꢀovervoltageꢀlockoutꢀisꢀmeasuredꢀatꢀV ꢀrelativeꢀ
FBX(OVERVOLTAGE)
toꢀregulatedꢀV
.
FBX(REG)
Note 2: TheꢀLT3757Eꢀisꢀguaranteedꢀtoꢀmeetꢀperformanceꢀspecificationsꢀ
fromꢀtheꢀ0°Cꢀtoꢀ125°Cꢀjunctionꢀtemperature.ꢀSpecificationsꢀoverꢀtheꢀ–40°Cꢀ
toꢀ125°Cꢀoperatingꢀjunctionꢀtemperatureꢀrangeꢀareꢀassuredꢀbyꢀdesign,ꢀ
characterizationꢀandꢀcorrelationꢀwithꢀstatisticalꢀprocessꢀcontrols.ꢀTheꢀ
LT3757Iꢀisꢀguaranteedꢀoverꢀtheꢀfullꢀ–40°Cꢀtoꢀ125°Cꢀoperatingꢀjunctionꢀ
temperatureꢀrange.ꢀTheꢀLT3757Hꢀisꢀguaranteedꢀoverꢀtheꢀfullꢀ–40°Cꢀtoꢀ150°Cꢀ
operatingꢀjunctionꢀtemperatureꢀrange.ꢀHighꢀjunctionꢀtemperaturesꢀdegradeꢀ
operatingꢀlifetimes.ꢀOperatingꢀlifetimeꢀisꢀderatedꢀatꢀjunctionꢀtemperaturesꢀ
greaterꢀthanꢀ125°C.ꢀTheꢀLT3757MPꢀisꢀ100%ꢀtestedꢀandꢀguaranteedꢀoverꢀtheꢀ
fullꢀ–55°Cꢀtoꢀ125°Cꢀoperatingꢀjunctionꢀtemperatureꢀrange.
Note 5:ꢀRiseꢀandꢀfallꢀtimesꢀareꢀmeasuredꢀatꢀ10%ꢀandꢀ90%ꢀlevels.
Note 6:ꢀForꢀV ꢀbelowꢀ6V,ꢀtheꢀSHDN/UVLOꢀpinꢀmustꢀnotꢀexceedꢀV .
IN
IN
Note 7:ꢀSHDN/UVLOꢀ=ꢀ1.33VꢀwhenꢀV ꢀ=ꢀ2.9V.
IN
Note 8:ꢀTheꢀLT3757ꢀincludesꢀovertemperatureꢀprotectionꢀthatꢀisꢀintendedꢀ
toꢀprotectꢀtheꢀdeviceꢀduringꢀmomentaryꢀoverloadꢀconditions.ꢀJunctionꢀ
temperatureꢀwillꢀexceedꢀtheꢀmaximumꢀoperatingꢀjunctionꢀtemperatureꢀ
whenꢀovertemperatureꢀprotectionꢀisꢀactive.ꢀContinuousꢀoperationꢀaboveꢀ
theꢀspecifiedꢀmaximumꢀoperatingꢀjunctionꢀtemperatureꢀmayꢀimpairꢀdeviceꢀ
reliability.
Typical perForMance characTerisTics TA = 25°C, unless otherwise noted.
Positive Feedback Voltage
vs Temperature, VIN
Negative Feedback Voltage
vs Temperature, VIN
Quiescent Current
vs Temperature, VIN
1605
1600
1595
1590
1585
1580
–788
–790
–792
–794
–796
–798
–800
–802
–804
1.8
1.7
1.6
1.5
1.4
V
= 40V
V
= INTV = 2.9V
CC
IN
IN
SHDN/UVLO = 1.33V
V
= 24V
IN
V
= 40V
IN
V
= 24V
IN
V
= 8V
IN
V
= 8V
IN
V = 40V
IN
V
= INTV = 2.9V
IN
CC
SHDN/UVLO = 1.33V
V
IN
= 24V
V
= INTV = 2.9V
CC
IN
–75 –50 –25
0
25 50 75 100 125 150
–75 –50 –25
0
25 50 75 100 125 150
–75 –50 –25
0
25 50 75 100 125 150
TEMPERATURE (°C)
TEMPERATURE (°C)
TEMPERATURE (°C)
3757 G01
3757 G02
3757 G03
3757fb
ꢃ
LT3757
TA = 25°C, unless otherwise noted.
Typical perForMance characTerisTics
Dynamic Quiescent Current
Normalized Switching Frequency
vs FBX
vs Switching Frequency
RT vs Switching Frequency
35
30
25
20
15
10
5
1000
120
100
80
60
40
20
0
C
= 3300pF
L
100
0
10
–0.8
0
0.4
FBX VOLTAGE (V)
0.8
1.2
1.6
0
300
400 500 600 700 800 900 1000
0
300 400 500 600 700 800 900 1000
–0.4
100 200
100 200
SWITCHING FREQUENCY (KHz)
SWITCHING FREQUENCY (KHz)
3757 G04
3757 G05
3757 G06
Switching Frequency
vs Temperature
SENSE Current Limit Threshold
vs Temperature
SENSE Current Limit Threshold
vs Duty Cycle
330
320
310
300
290
280
270
120
115
110
105
100
115
110
105
100
95
R
= 41.2K
T
–75 –50 –25
0
25 50 75 100 125 150
–75 –50 –25
0
25 50 75 100 125 150
0
20
40
60
80
100
TEMPERATURE (°C)
TEMPERATURE (°C)
DUTY CYCLE (%)
3757 G07
3757 G08
3757 G09
SHDN/UVLO Threshold
vs Temperature
SHDN/UVLO Hysteresis Current
vs Temperature
SHDN/UVLO Current vs Voltage
1.28
1.26
1.24
1.22
1.20
1.18
2.4
2.2
2.0
1.8
1.6
40
30
20
10
0
SHDN/UVLO RISING
SHDN/UVLO FALLING
–75 –50 –25
0
25 50 75 100 125 150
0
10
20
30
40
–75 –50 –25
0
25 50 75 100 125 150
TEMPERATURE (°C)
SHDN/UVLO VOLTAGE (V)
TEMPERATURE (°C)
3757 G10
3757 G12
3757 G11
3757fb
ꢄ
LT3757
TA = 25°C, unless otherwise noted.
Typical perForMance characTerisTics
INTVCC Minimum Output Current
vs VIN
INTVCC vs Temperature
INTVCC Load Regulation
7.4
7.3
7.2
7.1
7.0
90
80
70
60
50
40
30
20
10
0
7.3
7.2
T = 150°C
J
V
= 8V
IN
7.1
7
INTV = 6V
CC
INTV = 4.5V
CC
6.9
6.8
0
5
10 15 20 25 30 35 40
–75 –50 –25
0
25 50 75 100 125 150
0
20
30
40
50
60
70
10
TEMPERATURE (°C)
V
(V)
INTV LOAD (mA)
IN
CC
3757 G13
3757 G14
3757 G15
INTVCC Dropout Voltage
vs Current, Temperature
Gate Drive Rise
INTVCC Line Regulation
and Fall Time vs CL
700
600
500
400
300
200
100
0
7.30
7.25
7.20
7.15
7.10
90
80
70
60
50
40
30
20
10
0
V
= 6V
IN
150°C
INTV = 7.2V
CC
125°C
75°C
25°C
RISE TIME
FALL TIME
0°C
–55°C
10
15
20
0
5
0
5
10
15
(nF)
20
25
30
25 30
40
0
5
10 15 20
(V)
35
INTV LOAD (mA)
CC
C
V
L
IN
3757 G16
3757 G17
3757 G18
Gate Drive Rise
and Fall Time vs INTVCC
FBX Frequency Foldback
Waveforms During Overcurrent
Typical Start-Up Waveforms
30
25
20
15
10
5
V
= 12V
C
= 3300pF
V = 12V
IN
V
IN
L
OUT
10V/DIV
RISE TIME
V
SW
V
20V/DIV
OUT
FALL TIME
5V/DIV
I
+ I
L1A L1B
I
+ I
5A/DIV
L1A L1B
5A/DIV
3757 G20
3757 G21
2ms/DIV
50µs/DIV
PAGE 31 CIRCUIT
PAGE 31 CIRCUIT
0
9
12
15
3
6
INTV (V)
CC
3757 G19
3757fb
ꢅ
LT3757
pin FuncTions
VC (Pin 1):ꢀErrorꢀAmplifierꢀCompensationꢀPin.ꢀUsedꢀtoꢀ GATE (Pin 7):ꢀN-ChannelꢀMOSFETꢀGateꢀDriverꢀOutput.ꢀ
stabilizeꢀtheꢀvoltageꢀloopꢀwithꢀanꢀexternalꢀRCꢀnetwork.
SwitchesꢀbetweenꢀINTV ꢀandꢀGND.ꢀDrivenꢀtoꢀGNDꢀwhenꢀ
CC
ICꢀisꢀshutꢀdown,ꢀduringꢀthermalꢀlockoutꢀorꢀwhenꢀINTV ꢀisꢀ
CC
FBX(Pin2):ꢀPositiveꢀandꢀNegativeꢀFeedbackꢀPin.ꢀReceivesꢀ
theꢀfeedbackꢀvoltageꢀfromꢀtheꢀexternalꢀresistorꢀdividerꢀ
acrossꢀtheꢀoutput.ꢀAlsoꢀmodulatesꢀtheꢀfrequencyꢀduringꢀ INTV (Pin 8):ꢀRegulatedꢀSupplyꢀforꢀInternalꢀLoadsꢀandꢀ
start-upꢀandꢀfaultꢀconditionsꢀwhenꢀFBXꢀisꢀcloseꢀtoꢀGND.
aboveꢀorꢀbelowꢀtheꢀOVꢀorꢀUVꢀthresholds,ꢀrespectively.
CC
GateꢀDriver.ꢀSuppliedꢀfromꢀV ꢀandꢀregulatedꢀtoꢀ7.2Vꢀ(typi-
IN
cal).ꢀINTV ꢀmustꢀbeꢀbypassedꢀwithꢀaꢀminimumꢀofꢀ4.7µFꢀ
CC
SS (Pin 3):ꢀSoft-StartꢀPin.ꢀThisꢀpinꢀmodulatesꢀcompensa-
tionꢀpinꢀvoltageꢀ(VC)ꢀclamp.ꢀꢀTheꢀsoft-startꢀintervalꢀisꢀsetꢀ
withꢀanꢀexternalꢀcapacitor.ꢀTheꢀpinꢀhasꢀaꢀ10µAꢀ(typical)ꢀ
pull-upꢀcurrentꢀsourceꢀtoꢀanꢀinternalꢀ2.5Vꢀrail.ꢀTheꢀsoft-
startꢀpinꢀisꢀresetꢀtoꢀGNDꢀbyꢀanꢀundervoltageꢀconditionꢀ
capacitorꢀplacedꢀcloseꢀtoꢀpin.ꢀINTV ꢀcanꢀbeꢀconnectedꢀ
CC
directlyꢀtoꢀV ,ꢀifꢀV ꢀisꢀlessꢀthanꢀ17.5V.ꢀINTV ꢀcanꢀalsoꢀ
IN
IN
CC
beꢀconnectedꢀtoꢀaꢀpowerꢀsupplyꢀwhoseꢀvoltageꢀisꢀhigherꢀ
thanꢀ7.5V,ꢀandꢀlowerꢀthanꢀV ,ꢀprovidedꢀthatꢀsupplyꢀdoesꢀ
IN
notꢀexceedꢀ17.5V.ꢀ
atꢀSHDN/UVLO,ꢀanꢀINTV ꢀundervoltageꢀorꢀovervoltageꢀ
CC
conditionꢀorꢀanꢀinternalꢀthermalꢀlockout.
SHDN/UVLO (Pin 9):ꢀShutdownꢀandꢀUndervoltageꢀDetectꢀ
Pin.ꢀAnꢀaccurateꢀ1.22Vꢀ(nominal)ꢀfallingꢀthresholdꢀwithꢀ
externallyꢀprogrammableꢀhysteresisꢀdetectsꢀwhenꢀpowerꢀ
isꢀokayꢀtoꢀenableꢀswitching.ꢀRisingꢀhysteresisꢀisꢀgeneratedꢀ
byꢀtheꢀexternalꢀresistorꢀdividerꢀandꢀanꢀaccurateꢀinternalꢀ
2µAꢀpull-downꢀcurrent.ꢀAnꢀundervoltageꢀconditionꢀresetsꢀ
sort-start.ꢀTieꢀtoꢀ0.4V,ꢀorꢀless,ꢀtoꢀdisableꢀtheꢀdeviceꢀandꢀ
RT (Pin 4):ꢀSwitchingꢀFrequencyꢀAdjustmentꢀPin.ꢀSetꢀtheꢀ
frequencyꢀusingꢀaꢀresistorꢀtoꢀGND.ꢀDoꢀnotꢀleaveꢀthisꢀpinꢀ
open.
SYNC (Pin 5):ꢀFrequencyꢀSynchronizationꢀPin.ꢀUsedꢀtoꢀ
synchronizeꢀtheꢀswitchingꢀfrequencyꢀtoꢀanꢀoutsideꢀclock.ꢀ
Ifꢀthisꢀfeatureꢀisꢀused,ꢀanꢀR ꢀresistorꢀshouldꢀbeꢀchosenꢀtoꢀ
reduceꢀV ꢀquiescentꢀcurrentꢀbelowꢀ1µA.
T
IN
programꢀaꢀswitchingꢀfrequencyꢀ20%ꢀslowerꢀthanꢀtheꢀSYNCꢀ
pulseꢀfrequency.ꢀTieꢀtheꢀSYNCꢀpinꢀtoꢀGNDꢀifꢀthisꢀfeatureꢀisꢀ
notꢀused.ꢀSYNCꢀisꢀignoredꢀwhenꢀFBXꢀisꢀcloseꢀtoꢀGND.
V (Pin 10): InputꢀSupplyꢀPin.ꢀMustꢀbeꢀlocallyꢀbypassedꢀ
IN
withꢀ aꢀ 0.22µF,ꢀ orꢀ larger,ꢀ capacitorꢀ placedꢀ closeꢀ toꢀ theꢀ
pin.
SENSE (Pin 6):ꢀTheꢀCurrentꢀSenseꢀInputꢀforꢀtheꢀControlꢀ
Loop.ꢀKelvinꢀconnectꢀthisꢀpinꢀtoꢀtheꢀpositiveꢀterminalꢀofꢀ
theꢀ switchꢀ currentꢀ senseꢀ resistorꢀ inꢀ theꢀ sourceꢀ ofꢀ theꢀ
N-channelꢀMOSFET.ꢀTheꢀnegativeꢀterminalꢀofꢀtheꢀcurrentꢀ
senseꢀresistorꢀshouldꢀbeꢀconnectedꢀtoꢀGNDꢀplaneꢀcloseꢀ
toꢀtheꢀIC.
ExposedPad(Pin11):ꢀGround.ꢀThisꢀpinꢀalsoꢀservesꢀasꢀtheꢀ
negativeꢀterminalꢀofꢀtheꢀcurrentꢀsenseꢀresistor.ꢀTheꢀExposedꢀ
Padꢀmustꢀbeꢀsolderedꢀdirectlyꢀtoꢀtheꢀlocalꢀgroundꢀplane.
3757fb
ꢆ
LT3757
block DiagraM
C
DC
L1
D1
V
IN
V
OUT
+
R4
R3
C
IN
C
L2
OUT2
R2
R1
+
•
FBX
C
OUT1
9
10
V
IN
SHDN/UVLO
A10
–
+
I
S1
2.5V
2µA
1.22V
2.5V
INTERNAL
REGULATOR
AND UVLO
I
S3
CURRENT
LIMIT
I
S2
17.5V
VC
10µA
+
–
UVLO
A9
1
7.2V LDO
INTV
Q3
CC
C
VCC
8
7
G4
G3
A8
C
R
C2
C
+
–
2.7V UP
C
A11
A12
C1
1.72V
2.6V DOWN
–
+
TSD
165˚C
DRIVER
G6
SR1
VC –
GATE
–
+
G5
G2
A7
R
O
M1
+
–0.88V
S
Q2
PWM
COMPARATOR
108mV
–
+
1.6V
+
–
A6
A5
A1
SLOPE
RAMP
V
ISENSE
FBX
SENSE
FBX
2
6
+
–
+
–
RAMP
A2
R
SENSE
GND
–0.8V
GENERATOR
1.25V
–
+
11
A3
100kHz-1MHz
OSCILLATOR
G1
1.25V
FREQ
FOLDBACK
+
FREQUENCY
FOLDBACK
+
A4
Q1
–
FREQ
PROG
SS
3
SYNC
RT
5
4
3757 F01
C
R
T
SS
Figure 1. LT3757 Block Diagram Working as a SEPIC Converter
3757fb
ꢇ
LT3757
applicaTions inForMaTion
Main Control Loop
isꢀpulledꢀdownꢀtoꢀ–0.8Vꢀbyꢀaꢀvoltageꢀdividerꢀconnectedꢀ
fromꢀV ꢀtoꢀGND.ꢀComparatorꢀA1ꢀbecomesꢀinactiveꢀandꢀ
OUT
TheꢀLT3757ꢀusesꢀaꢀfixedꢀfrequency,ꢀcurrentꢀmodeꢀcontrolꢀ
schemeꢀtoꢀprovideꢀexcellentꢀlineꢀandꢀloadꢀregulation.ꢀOp-
erationꢀcanꢀbeꢀbestꢀunderstoodꢀbyꢀreferringꢀtoꢀtheꢀBlockꢀ
DiagramꢀinꢀFigureꢀ1.ꢀ
comparatorꢀA2ꢀperformsꢀtheꢀnoninvertingꢀamplificationꢀ
fromꢀFBXꢀtoꢀVC.
Theꢀ LT3757ꢀ hasꢀ overvoltageꢀ protectionꢀ functionsꢀ toꢀ
protectꢀ theꢀ converterꢀ fromꢀ excessiveꢀ outputꢀ voltageꢀ
overshootꢀduringꢀstart-upꢀorꢀrecoveryꢀfromꢀaꢀshort-circuitꢀ
condition.ꢀAnꢀovervoltageꢀcomparatorꢀA11ꢀ(withꢀ20mVꢀ
hysteresis)ꢀsensesꢀwhenꢀtheꢀFBXꢀpinꢀvoltageꢀexceedsꢀtheꢀ
positiveꢀregulatedꢀvoltageꢀ(1.6V)ꢀbyꢀ8%ꢀandꢀprovidesꢀaꢀ
resetꢀ pulse.ꢀ Similarly,ꢀ anꢀ overvoltageꢀ comparatorꢀ A12ꢀ
(withꢀ10mVꢀhysteresis)ꢀsensesꢀwhenꢀtheꢀFBXꢀpinꢀvoltageꢀ
exceedsꢀtheꢀnegativeꢀregulatedꢀvoltageꢀ(–0.8V)ꢀbyꢀ11%ꢀ
andꢀprovidesꢀaꢀresetꢀpulse.ꢀBothꢀresetꢀpulsesꢀareꢀsentꢀtoꢀ
theꢀmainꢀRSꢀlatchꢀ(SR1)ꢀthroughꢀG6ꢀandꢀG5.ꢀTheꢀpowerꢀ
MOSFETꢀswitchꢀM1ꢀisꢀactivelyꢀheldꢀoffꢀforꢀtheꢀdurationꢀofꢀ
anꢀoutputꢀovervoltageꢀcondition.
TheꢀstartꢀofꢀeachꢀoscillatorꢀcycleꢀsetsꢀtheꢀSRꢀlatchꢀ(SR1)ꢀandꢀ
turnsꢀonꢀtheꢀexternalꢀpowerꢀMOSFETꢀswitchꢀM1ꢀthroughꢀ
driverꢀG2.ꢀTheꢀswitchꢀcurrentꢀflowsꢀthroughꢀtheꢀexternalꢀ
currentꢀsensingꢀresistorꢀR ꢀandꢀgeneratesꢀaꢀvoltageꢀ
SENSE
proportionalꢀ toꢀ theꢀ switchꢀ current.ꢀ Thisꢀ currentꢀ senseꢀ
voltageꢀV ꢀ(amplifiedꢀbyꢀA5)ꢀisꢀaddedꢀtoꢀaꢀstabilizingꢀ
ISENSE
slopeꢀcompensationꢀrampꢀandꢀtheꢀresultingꢀsumꢀ(SLOPE)ꢀ
isꢀfedꢀintoꢀtheꢀpositiveꢀterminalꢀofꢀtheꢀPWMꢀcomparatorꢀA7.ꢀ
WhenꢀSLOPEꢀexceedsꢀtheꢀlevelꢀatꢀtheꢀnegativeꢀinputꢀofꢀA7ꢀ
(VCꢀpin),ꢀSR1ꢀisꢀreset,ꢀturningꢀoffꢀtheꢀpowerꢀswitch.ꢀTheꢀ
levelꢀatꢀtheꢀnegativeꢀinputꢀofꢀA7ꢀisꢀsetꢀbyꢀtheꢀerrorꢀamplifierꢀ
A1ꢀ(orꢀA2)ꢀandꢀisꢀanꢀamplifiedꢀversionꢀofꢀtheꢀdifferenceꢀ
betweenꢀtheꢀfeedbackꢀvoltageꢀ(FBXꢀpin)ꢀandꢀtheꢀreferenceꢀ
voltageꢀ(1.6Vꢀorꢀ–0.8V,ꢀdependingꢀonꢀtheꢀconfiguration).ꢀ
Inꢀthisꢀmanner,ꢀtheꢀerrorꢀamplifierꢀsetsꢀtheꢀcorrectꢀpeakꢀ
switchꢀcurrentꢀlevelꢀtoꢀkeepꢀtheꢀoutputꢀinꢀregulation.ꢀ
Programming Turn-On and Turn-Off Thresholds with
the SHDN/UVLO Pin
Theꢀ SHDN/UVLOꢀ pinꢀ controlsꢀ whetherꢀ theꢀ LT3757ꢀ isꢀ
enabledꢀ orꢀ isꢀ inꢀ shutdownꢀ state.ꢀ Aꢀ micropowerꢀ 1.22Vꢀ
reference,ꢀaꢀcomparatorꢀA10ꢀandꢀaꢀcontrollableꢀcurrentꢀ
TheꢀLT3757ꢀhasꢀaꢀswitchꢀcurrentꢀlimitꢀfunction.ꢀTheꢀcurrentꢀ
senseꢀvoltageꢀisꢀinputꢀtoꢀtheꢀcurrentꢀlimitꢀcomparatorꢀA6.ꢀ
IfꢀtheꢀSENSEꢀpinꢀvoltageꢀisꢀhigherꢀthanꢀtheꢀsenseꢀcurrentꢀ
sourceꢀI ꢀallowꢀtheꢀuserꢀtoꢀaccuratelyꢀprogramꢀtheꢀsup-
S1
plyꢀvoltageꢀatꢀwhichꢀtheꢀICꢀturnsꢀonꢀandꢀoff.ꢀTheꢀfallingꢀ
valueꢀcanꢀbeꢀaccuratelyꢀsetꢀbyꢀtheꢀresistorꢀdividersꢀR3ꢀ
andꢀR4.ꢀWhenꢀSHDN/UVLOꢀisꢀaboveꢀ0.7V,ꢀandꢀbelowꢀtheꢀ
limitꢀthresholdꢀV
ꢀ(110mV,ꢀtypical),ꢀA6ꢀwillꢀresetꢀ
SENSE(MAX)
SR1ꢀandꢀturnꢀoffꢀM1ꢀimmediately.
TheꢀLT3757ꢀisꢀcapableꢀofꢀgeneratingꢀeitherꢀpositiveꢀorꢀ 1.22Vꢀthreshold,ꢀtheꢀsmallꢀpull-downꢀcurrentꢀsourceꢀI ꢀ
negativeꢀoutputꢀvoltageꢀwithꢀaꢀsingleꢀFBXꢀpin.ꢀItꢀcanꢀbeꢀ (typicalꢀ2µA)ꢀisꢀactive.ꢀ
configuredꢀasꢀaꢀboost,ꢀflybackꢀorꢀSEPICꢀconverterꢀtoꢀgen-
S1
Theꢀpurposeꢀofꢀthisꢀcurrentꢀisꢀtoꢀallowꢀtheꢀuserꢀtoꢀprogramꢀ
erateꢀpositiveꢀoutputꢀvoltage,ꢀorꢀasꢀanꢀinvertingꢀconverterꢀ
theꢀrisingꢀhysteresis.ꢀTheꢀBlockꢀDiagramꢀofꢀtheꢀcomparatorꢀ
toꢀgenerateꢀnegativeꢀoutputꢀvoltage.ꢀWhenꢀconfiguredꢀasꢀ
andꢀtheꢀexternalꢀresistorsꢀisꢀshownꢀinꢀFigureꢀ1.ꢀTheꢀtypicalꢀ
aꢀSEPICꢀconverter,ꢀasꢀshownꢀinꢀFigureꢀ1,ꢀtheꢀFBXꢀpinꢀisꢀ
fallingꢀthresholdꢀvoltageꢀandꢀrisingꢀthresholdꢀvoltageꢀcanꢀ
pulledꢀupꢀtoꢀtheꢀinternalꢀbiasꢀvoltageꢀofꢀ1.6Vꢀbyꢀaꢀvolt-
beꢀcalculatedꢀbyꢀtheꢀfollowingꢀequations:
ageꢀdividerꢀ(R1ꢀandꢀR2)ꢀconnectedꢀfromꢀV ꢀtoꢀGND.ꢀ
OUT
(R3+R4)
Comparatorꢀ A2ꢀ becomesꢀ inactiveꢀ andꢀ comparatorꢀ A1ꢀ
performsꢀtheꢀinvertingꢀamplificationꢀfromꢀFBXꢀtoꢀVC.ꢀWhenꢀ
theꢀLT3757ꢀisꢀinꢀanꢀinvertingꢀconfiguration,ꢀtheꢀFBXꢀpinꢀ
VVIN,FALLING =1.22•
R4
VVIN,RISING = 2µA •R3+ VIN,FALLING
ꢀ
3757fb
ꢈ
LT3757
applicaTions inForMaTion
ForꢀapplicationsꢀwhereꢀtheꢀSHDN/UVLOꢀpinꢀisꢀonlyꢀꢀusedꢀ P ꢀ=ꢀICꢀpowerꢀconsumption
IC
asꢀaꢀlogicꢀinput,ꢀtheꢀSHDN/UVLOꢀpinꢀcanꢀbeꢀconnectedꢀ
ꢀ
=ꢀV ꢀ•ꢀ(I ꢀ+ꢀI
)
IN
Q
DRIVE
directlyꢀtoꢀtheꢀinputꢀvoltageꢀV ꢀforꢀalways-onꢀoperation.
IN
I ꢀ=ꢀV ꢀoperationꢀI =ꢀ1.6mA
Q
IN
Qꢀ
INTV Regulator Bypassing and Operation
CC
I
ꢀ=ꢀaverageꢀgateꢀdriveꢀcurrentꢀ=ꢀfꢀ•ꢀQ
DRIVE G
Anꢀinternal,ꢀlowꢀdropoutꢀ(LDO)ꢀvoltageꢀregulatorꢀproducesꢀ
fꢀ=ꢀswitchingꢀfrequency
Q ꢀ=ꢀpowerꢀMOSFETꢀtotalꢀgateꢀcharge
theꢀ7.2VꢀINTV ꢀsupplyꢀwhichꢀpowersꢀtheꢀgateꢀdriver,ꢀasꢀ
CC
G
shownꢀinꢀFigureꢀ1.ꢀIfꢀaꢀlowꢀinputꢀvoltageꢀoperationꢀisꢀex-
pectedꢀ(e.g.,ꢀsupplyingꢀpowerꢀfromꢀaꢀlithium-ionꢀbatteryꢀ TheꢀLT3757ꢀusesꢀpackagesꢀwithꢀanꢀExposedꢀPadꢀforꢀen-
orꢀaꢀ3.3Vꢀlogicꢀsupply),ꢀlowꢀthresholdꢀMOSFETsꢀshouldꢀ hancedꢀthermalꢀconduction.ꢀWithꢀproperꢀsolderingꢀtoꢀtheꢀ
beꢀused.ꢀTheꢀLT3757ꢀcontainsꢀanꢀundervoltageꢀlockoutꢀ ExposedꢀPadꢀonꢀtheꢀundersideꢀofꢀtheꢀpackageꢀandꢀaꢀfullꢀ
comparatorꢀA8ꢀandꢀanꢀovervoltageꢀlockoutꢀcomparatorꢀ copperꢀplaneꢀunderneathꢀtheꢀdevice,ꢀthermalꢀresistanceꢀ
A9ꢀforꢀtheꢀINTV ꢀsupply.ꢀTheꢀINTV ꢀundervoltageꢀ(UV)ꢀ (θ )ꢀwillꢀbeꢀaboutꢀ43°C/WꢀforꢀtheꢀDDꢀpackageꢀandꢀ40°C/Wꢀ
CC
CC
JA
thresholdꢀ isꢀ 2.7Vꢀ (typical),ꢀ withꢀ 100mVꢀ hysteresis,ꢀ toꢀ forꢀtheꢀMSEꢀpackage.ꢀForꢀanꢀambientꢀboardꢀtemperatureꢀofꢀ
ensureꢀthatꢀtheꢀMOSFETsꢀhaveꢀsufficientꢀgateꢀdriveꢀvoltageꢀ T ꢀ=ꢀ70°Cꢀandꢀmaximumꢀjunctionꢀtemperatureꢀofꢀ125°C,ꢀ
A
beforeꢀturningꢀon.ꢀTheꢀlogicꢀcircuitryꢀwithinꢀtheꢀLT3757ꢀisꢀ theꢀmaximumꢀI
ꢀ(I
)ꢀofꢀtheꢀDDꢀpackageꢀcanꢀ
DRIVE DRIVE(MAX)
alsoꢀpoweredꢀfromꢀtheꢀinternalꢀINTV ꢀsupply.
beꢀcalculatedꢀas:
CC
TheꢀINTV ꢀovervoltageꢀ(OV)ꢀthresholdꢀisꢀsetꢀtoꢀbeꢀ17.5Vꢀ
(TJ − TA)
(θJA • VIN)
CC
1.28W
VIN
IDRIVE(MAX)
=
−IQ =
−1.6mA
(typical)ꢀtoꢀprotectꢀtheꢀgateꢀofꢀtheꢀpowerꢀMOSFET.ꢀWhenꢀ
ꢀ
INTV ꢀisꢀbelowꢀtheꢀUVꢀthreshold,ꢀorꢀaboveꢀtheꢀOVꢀthresh-
CC
TheꢀLT3757ꢀhasꢀanꢀinternalꢀINTV ꢀI
ꢀcurrentꢀlimitꢀ
old,ꢀtheꢀGATEꢀpinꢀwillꢀbeꢀforcedꢀtoꢀGNDꢀandꢀtheꢀsoft-startꢀ
operationꢀwillꢀbeꢀtriggered.ꢀ
CC DRIVE
functionꢀtoꢀprotectꢀtheꢀICꢀfromꢀexcessiveꢀon-chipꢀpowerꢀ
dissipation.ꢀTheꢀI
ꢀcurrentꢀlimitꢀdecreasesꢀasꢀtheꢀV ꢀ
DRIVE
IN
IN
TheꢀINTV ꢀregulatorꢀmustꢀbeꢀbypassedꢀtoꢀgroundꢀim-
CC
increasesꢀ(seeꢀtheꢀINTV ꢀMinimumꢀOutputꢀCurrentꢀvsꢀV ꢀ
CC
mediatelyꢀadjacentꢀtoꢀtheꢀICꢀpinsꢀwithꢀaꢀminimumꢀofꢀ4.7µFꢀ
ceramicꢀcapacitor.ꢀGoodꢀbypassingꢀisꢀnecessaryꢀtoꢀsupplyꢀ
theꢀhighꢀtransientꢀcurrentsꢀrequiredꢀbyꢀtheꢀMOSFETꢀgateꢀ
driver.ꢀ
graphꢀinꢀtheꢀTypicalꢀPerformanceꢀCharacteristicsꢀsection).ꢀ
IfꢀI ꢀreachesꢀtheꢀcurrentꢀlimit,ꢀINTV ꢀvoltageꢀwillꢀfallꢀ
DRIVE
CC
andꢀmayꢀtriggerꢀtheꢀsoft-start.
BasedꢀonꢀtheꢀprecedingꢀequationꢀandꢀtheꢀINTV ꢀMinimumꢀ
CC
Inꢀanꢀactualꢀapplication,ꢀmostꢀofꢀtheꢀICꢀsupplyꢀcurrentꢀisꢀ
usedꢀtoꢀdriveꢀtheꢀgateꢀcapacitanceꢀofꢀtheꢀpowerꢀMOSFET.ꢀ
Theꢀon-chipꢀpowerꢀdissipationꢀcanꢀbeꢀaꢀsignificantꢀconcernꢀ
whenꢀaꢀlargeꢀpowerꢀMOSFETꢀisꢀbeingꢀdrivenꢀatꢀaꢀhighꢀ
OutputꢀCurrentꢀvsꢀV ꢀgraph,ꢀtheꢀuserꢀcanꢀcalculateꢀtheꢀ
IN
maximumꢀMOSFETꢀgateꢀchargeꢀtheꢀLT3757ꢀcanꢀdriveꢀatꢀ
aꢀgivenꢀV ꢀandꢀswitchꢀfrequency.ꢀAꢀplotꢀofꢀtheꢀmaximumꢀ
IN
IN
Q ꢀvsꢀV ꢀatꢀdifferentꢀfrequenciesꢀtoꢀguaranteeꢀaꢀminimumꢀ
G
frequencyꢀandꢀtheꢀV ꢀvoltageꢀisꢀhigh.ꢀItꢀisꢀimportantꢀtoꢀ
IN
4.5VꢀINTV ꢀisꢀshownꢀinꢀFigureꢀ2.
CC
limitꢀtheꢀpowerꢀdissipationꢀthroughꢀselectionꢀofꢀMOSFETꢀ
and/orꢀoperatingꢀfrequencyꢀsoꢀtheꢀLT3757ꢀdoesꢀnotꢀexceedꢀ
itsꢀmaximumꢀjunctionꢀtemperatureꢀrating.ꢀTheꢀjunctionꢀ
AsꢀillustratedꢀinꢀFigureꢀ2,ꢀaꢀtrade-offꢀbetweenꢀtheꢀoperatingꢀ
frequencyꢀandꢀtheꢀsizeꢀofꢀtheꢀpowerꢀMOSFETꢀmayꢀbeꢀneededꢀ
inꢀorderꢀtoꢀmaintainꢀaꢀreliableꢀICꢀjunctionꢀtemperature.ꢀ
Priorꢀtoꢀloweringꢀtheꢀoperatingꢀfrequency,ꢀhowever,ꢀbeꢀ
sureꢀtoꢀcheckꢀwithꢀpowerꢀMOSFETꢀmanufacturersꢀforꢀtheirꢀ
temperatureꢀ T ꢀ canꢀ beꢀ estimatedꢀ usingꢀ theꢀ followingꢀ
J
equations:
ꢀ T ꢀ=ꢀT ꢀ+ꢀP ꢀ•ꢀθ
JA
J
A
IC
mostꢀrecentꢀlowꢀQ ,ꢀlowꢀR
ꢀdevices.ꢀPowerꢀMOSFETꢀ
G
DS(ON)
T ꢀ=ꢀambientꢀtemperature
A
manufacturingꢀtechnologiesꢀareꢀcontinuallyꢀimproving,ꢀwithꢀ
newerꢀandꢀbetterꢀperformanceꢀdevicesꢀbeingꢀintroducedꢀ
almostꢀyearly.ꢀ
θ ꢀ=ꢀjunction-to-ambientꢀthermalꢀresistance
JA
3757fb
ꢀ0
LT3757
applicaTions inForMaTion
300
LT3757
INTV
D
VCC
R
VCC
V
OUT
CC
250
300kHz
C
VCC
4.7µF
200
GND
3757 F03
150
Figure 3. Connecting INTVCC to VOUT
100
1MHz
50
0
orꢀnotꢀtheꢀINTV ꢀpinꢀisꢀconnectedꢀtoꢀanꢀexternalꢀvoltageꢀ
CC
source,ꢀitꢀisꢀalwaysꢀnecessaryꢀtoꢀhaveꢀtheꢀdriverꢀcircuitryꢀ
10 15 20 25 30 35 40
(V)
0
5
bypassedꢀwithꢀaꢀ4.7µFꢀlowꢀESRꢀceramicꢀcapacitorꢀtoꢀgroundꢀ
V
IN
3757 F02
immediatelyꢀadjacentꢀtoꢀtheꢀINTV ꢀandꢀGNDꢀpins.ꢀ
CC
Figure 2. Recommended Maximum QG vs VIN at Different
Frequencies to Ensure INTVCC Higher Than 4.5V
Operating Frequency and Synchronization
Theꢀchoiceꢀofꢀoperatingꢀfrequencyꢀmayꢀbeꢀdeterminedꢀ
Anꢀeffectiveꢀapproachꢀtoꢀreduceꢀtheꢀpowerꢀconsumptionꢀ byꢀon-chipꢀpowerꢀdissipation,ꢀotherwiseꢀitꢀisꢀaꢀtrade-offꢀ
ofꢀtheꢀinternalꢀLDOꢀforꢀgateꢀdriveꢀisꢀtoꢀtieꢀtheꢀINTV ꢀpinꢀ betweenꢀefficiencyꢀandꢀcomponentꢀsize.ꢀLowꢀfrequencyꢀ
CC
toꢀanꢀexternalꢀvoltageꢀsourceꢀhighꢀenoughꢀtoꢀturnꢀoffꢀtheꢀ operationꢀimprovesꢀefficiencyꢀbyꢀreducingꢀgateꢀdriveꢀcur-
internalꢀLDOꢀregulator.
rentꢀandꢀMOSFETꢀandꢀdiodeꢀswitchingꢀlosses.ꢀHowever,ꢀ
lowerꢀ frequencyꢀ operationꢀ requiresꢀ aꢀ physicallyꢀ largerꢀ
inductor.ꢀSwitchingꢀfrequencyꢀalsoꢀhasꢀimplicationsꢀforꢀ
loopꢀcompensation.ꢀTheꢀLT3757ꢀusesꢀaꢀconstant-frequencyꢀ
architectureꢀthatꢀcanꢀbeꢀprogrammedꢀoverꢀaꢀ100kHzꢀtoꢀ
1000kHzꢀrangeꢀwithꢀaꢀsingleꢀexternalꢀresistorꢀfromꢀtheꢀ
RTꢀpinꢀtoꢀground,ꢀasꢀshownꢀinꢀFigureꢀ1.ꢀTheꢀRTꢀpinꢀmustꢀ
haveꢀanꢀexternalꢀresistorꢀtoꢀGNDꢀforꢀproperꢀoperationꢀofꢀ
Ifꢀ theꢀ inputꢀ voltageꢀ V ꢀ doesꢀ notꢀ exceedꢀ theꢀ absoluteꢀ
IN
maximumꢀratingꢀofꢀbothꢀtheꢀpowerꢀMOSFETꢀgate-sourceꢀ
voltageꢀ(V )ꢀandꢀtheꢀINTV ꢀovervoltageꢀlockoutꢀthresholdꢀ
GS
CC
CC
voltageꢀ(17.5V),ꢀtheꢀINTV ꢀpinꢀcanꢀbeꢀshortedꢀdirectlyꢀ
toꢀtheꢀV ꢀpin.ꢀInꢀthisꢀcondition,ꢀtheꢀinternalꢀLDOꢀwillꢀbeꢀ
IN
turnedꢀoffꢀandꢀtheꢀgateꢀdriverꢀwillꢀbeꢀpoweredꢀdirectlyꢀ
fromꢀtheꢀinputꢀvoltage,ꢀV .ꢀWithꢀtheꢀINTV ꢀpinꢀshortedꢀtoꢀ
IN
CC
theꢀLT3757.ꢀAꢀtableꢀforꢀselectingꢀtheꢀvalueꢀofꢀR ꢀforꢀaꢀgivenꢀ
T
V ,ꢀhowever,ꢀaꢀsmallꢀcurrentꢀ(aroundꢀ16µA)ꢀwillꢀloadꢀtheꢀ
IN
operatingꢀfrequencyꢀisꢀshownꢀinꢀTableꢀ1.
INTV ꢀinꢀshutdownꢀmode.ꢀForꢀapplicationsꢀthatꢀrequireꢀ
CC
theꢀlowestꢀshutdownꢀmodeꢀinputꢀsupplyꢀcurrent,ꢀdoꢀnotꢀ
connectꢀtheꢀINTV ꢀpinꢀtoꢀV .
Table 1. Timing Resistor (RT) Value
OSCILLATOR FREQUENCY (kHz)
R (kΩ)
T
CC
IN
100
200
300
400
500
600
700
800
900
1000
140
63.4
41.2
30.9
24.3
19.6
16.5
14
InꢀSEPICꢀorꢀflybackꢀapplications,ꢀtheꢀINTV ꢀpinꢀcanꢀbeꢀ
CC
connectedꢀtoꢀtheꢀoutputꢀvoltageꢀV ꢀthroughꢀaꢀblockingꢀ
OUT
diode,ꢀasꢀshownꢀinꢀFigureꢀ3,ꢀifꢀV ꢀmeetsꢀtheꢀfollowingꢀ
OUT
conditions:
ꢀ 1.ꢀV ꢀ<ꢀV ꢀ(pinꢀvoltage)
OUT
IN
ꢀ 2.ꢀ7.2ꢀ<ꢀV ꢀ<ꢀ17.5V
OUT
ꢀ 3.ꢀV ꢀ<ꢀmaximumꢀV ꢀratingꢀofꢀpowerꢀMOSFET
OUT
GS
12.1
10.5
AꢀresistorꢀR ꢀcanꢀbeꢀconnected,ꢀasꢀshownꢀinꢀFigureꢀ3,ꢀtoꢀ
VCC
limitꢀtheꢀinrushꢀcurrentꢀfromꢀV .ꢀRegardlessꢀofꢀwhetherꢀ
OUT
3757fb
ꢀꢀ
LT3757
applicaTions inForMaTion
TheꢀoperatingꢀfrequencyꢀofꢀtheꢀLT3757ꢀcanꢀbeꢀsynchronizedꢀ Soft-Start
toꢀanꢀexternalꢀclockꢀsource.ꢀByꢀprovidingꢀaꢀdigitalꢀclockꢀ
TheꢀLT3757ꢀcontainsꢀseveralꢀfeaturesꢀtoꢀlimitꢀpeakꢀswitchꢀ
signalꢀintoꢀtheꢀSYNCꢀpin,ꢀtheꢀLT3757ꢀwillꢀoperateꢀatꢀtheꢀ
currentsꢀ andꢀ outputꢀ voltageꢀ (V )ꢀ overshootꢀ duringꢀ
OUT
SYNCꢀclockꢀfrequency.ꢀIfꢀthisꢀfeatureꢀisꢀused,ꢀanꢀR ꢀresistorꢀ
T
start-upꢀorꢀrecoveryꢀfromꢀaꢀfaultꢀcondition.ꢀTheꢀprimaryꢀ
purposeꢀofꢀtheseꢀfeaturesꢀisꢀtoꢀpreventꢀdamageꢀtoꢀexternalꢀ
componentsꢀorꢀtheꢀload.
shouldꢀbeꢀchosenꢀtoꢀprogramꢀaꢀswitchingꢀfrequencyꢀ20%ꢀ
slowerꢀthanꢀSYNCꢀpulseꢀfrequency.ꢀTheꢀSYNCꢀpulseꢀshouldꢀ
haveꢀaꢀminimumꢀpulseꢀwidthꢀofꢀ200ns.ꢀTieꢀtheꢀSYNCꢀpinꢀ
toꢀGNDꢀifꢀthisꢀfeatureꢀisꢀnotꢀused.
Highꢀpeakꢀswitchꢀcurrentsꢀduringꢀstart-upꢀmayꢀoccurꢀinꢀ
switchingꢀregulators.ꢀSinceꢀV ꢀisꢀfarꢀfromꢀitsꢀfinalꢀvalue,ꢀ
OUT
theꢀfeedbackꢀloopꢀisꢀsaturatedꢀandꢀtheꢀregulatorꢀtriesꢀtoꢀ
chargeꢀtheꢀoutputꢀcapacitorꢀasꢀquicklyꢀasꢀpossible,ꢀresultingꢀ
inꢀlargeꢀpeakꢀcurrents.ꢀAꢀlargeꢀsurgeꢀcurrentꢀmayꢀcauseꢀ
inductorꢀsaturationꢀorꢀpowerꢀswitchꢀfailure.ꢀ
Duty Cycle Consideration
Switchingꢀdutyꢀcycleꢀisꢀaꢀkeyꢀvariableꢀdefiningꢀconverterꢀ
operation.ꢀAsꢀsuch,ꢀitsꢀlimitsꢀmustꢀbeꢀconsidered.ꢀMinimumꢀ
on-timeꢀisꢀtheꢀsmallestꢀtimeꢀdurationꢀthatꢀtheꢀLT3757ꢀisꢀ
capableꢀofꢀturningꢀonꢀtheꢀpowerꢀMOSFET.ꢀThisꢀtimeꢀisꢀ
generallyꢀaboutꢀ220nsꢀ(typical)ꢀ(seeꢀMinimumꢀOn-Timeꢀ
inꢀtheꢀElectricalꢀCharacteristicsꢀtable).ꢀInꢀeachꢀswitchingꢀ
cycle,ꢀtheꢀLT3757ꢀkeepsꢀtheꢀpowerꢀswitchꢀoffꢀforꢀatꢀleastꢀ
220nsꢀ(typical)ꢀ(seeꢀMinimumꢀOff-TimeꢀinꢀtheꢀElectricalꢀ
Characteristicsꢀtable).ꢀ
TheꢀLT3757ꢀaddressesꢀthisꢀmechanismꢀwithꢀtheꢀSSꢀpin.ꢀAsꢀ
shownꢀinꢀFigureꢀ1,ꢀtheꢀSSꢀpinꢀreducesꢀtheꢀpowerꢀMOSFETꢀ
currentꢀbyꢀpullingꢀdownꢀtheꢀVCꢀpinꢀthroughꢀQ2.ꢀInꢀthisꢀwayꢀ
theꢀSSꢀallowsꢀtheꢀoutputꢀcapacitorꢀtoꢀchargeꢀgraduallyꢀto-
wardꢀitsꢀfinalꢀvalueꢀwhileꢀlimitingꢀtheꢀstart-upꢀpeakꢀcurrents.ꢀ
Theꢀtypicalꢀstart-upꢀwaveformsꢀareꢀshownꢀinꢀtheꢀTypicalꢀ
PerformanceꢀCharacteristicsꢀsection.ꢀTheꢀinductorꢀcurrentꢀ
Theꢀ minimumꢀ on-timeꢀ andꢀ minimumꢀ off-timeꢀ andꢀ theꢀ
switchingꢀfrequencyꢀdefineꢀtheꢀminimumꢀandꢀmaximumꢀ
switchingꢀdutyꢀcyclesꢀaꢀconverterꢀisꢀableꢀtoꢀgenerate:
I ꢀslewingꢀrateꢀisꢀlimitedꢀbyꢀtheꢀsoft-startꢀfunction.ꢀ
L
Besidesꢀstart-up,ꢀsoft-startꢀcanꢀalsoꢀbeꢀtriggeredꢀbyꢀtheꢀ
followingꢀfaults:
Minimumꢀdutyꢀcycleꢀ=ꢀminimumꢀon-timeꢀ•ꢀfrequency
Maximumꢀdutyꢀcycleꢀ=ꢀ1ꢀ–ꢀ(minimumꢀoff-timeꢀ•ꢀfrequency)
ꢀ 1.ꢀINTV >ꢀ17.5V
CCꢀ
ꢀ 2.ꢀINTV <ꢀ2.6V
CCꢀ
Programming the Output Voltage
ꢀ 3.ꢀThermalꢀlockout
Theꢀoutputꢀvoltageꢀ(V )ꢀisꢀsetꢀbyꢀaꢀresistorꢀdivider,ꢀasꢀ
OUT
AnyꢀofꢀtheseꢀthreeꢀfaultsꢀwillꢀcauseꢀtheꢀLT3757ꢀtoꢀstopꢀ
switchingꢀimmediately.ꢀTheꢀSSꢀpinꢀwillꢀbeꢀdischargedꢀbyꢀ
Q3.ꢀWhenꢀallꢀfaultsꢀareꢀclearedꢀandꢀtheꢀSSꢀpinꢀhasꢀbeenꢀ
shownꢀinꢀFigureꢀ1.ꢀTheꢀpositiveꢀandꢀnegativeꢀV ꢀareꢀsetꢀ
OUT
byꢀtheꢀfollowingꢀequations:
dischargedꢀbelowꢀ0.2V,ꢀaꢀ10µAꢀcurrentꢀsourceꢀI ꢀstartsꢀ
R2
R1
S2
VOUT,POSITIVE =1.6V • 1+
chargingꢀtheꢀSSꢀpin,ꢀinitiatingꢀaꢀsoft-startꢀoperation.ꢀ
Theꢀsoft-startꢀintervalꢀisꢀsetꢀbyꢀtheꢀsoft-startꢀcapacitorꢀ
selectionꢀaccordingꢀtoꢀtheꢀequation:
R2
R1
VOUT,NEGATIVE = –0.8V • 1+
ꢀ
1.25V
10µA
Theꢀ resistorsꢀ R1ꢀ andꢀ R2ꢀ areꢀ typicallyꢀ chosenꢀ soꢀ thatꢀ
theꢀerrorꢀcausedꢀbyꢀtheꢀcurrentꢀflowingꢀintoꢀtheꢀFBXꢀpinꢀ
duringꢀnormalꢀoperationꢀisꢀlessꢀthanꢀ1%ꢀ(thisꢀtranslatesꢀ
toꢀaꢀmaximumꢀvalueꢀofꢀR1ꢀatꢀaboutꢀ158k).
TSS =CSS
•
ꢀ
3757fb
ꢀꢁ
LT3757
applicaTions inForMaTion
FBX Frequency Foldback
componentꢀvaluesꢀandꢀtheꢀoperatingꢀconditionsꢀ(includingꢀ
theꢀinputꢀvoltage,ꢀloadꢀcurrent,ꢀetc.).ꢀToꢀcompensateꢀtheꢀ
feedbackꢀloopꢀofꢀtheꢀLT3757,ꢀaꢀseriesꢀresistor-capacitorꢀ
networkꢀisꢀusuallyꢀconnectedꢀfromꢀtheꢀVCꢀpinꢀtoꢀGND.ꢀ
Figureꢀ1ꢀshowsꢀtheꢀtypicalꢀVCꢀcompensationꢀnetwork.ꢀForꢀ
mostꢀapplications,ꢀtheꢀcapacitorꢀshouldꢀbeꢀinꢀtheꢀrangeꢀofꢀ
470pFꢀtoꢀ22nF,ꢀandꢀtheꢀresistorꢀshouldꢀbeꢀinꢀtheꢀrangeꢀofꢀ
5kꢀtoꢀ50k.ꢀAꢀsmallꢀcapacitorꢀisꢀoftenꢀconnectedꢀinꢀparal-
lelꢀwithꢀtheꢀRCꢀcompensationꢀnetworkꢀtoꢀattenuateꢀtheꢀ
WhenꢀV ꢀisꢀveryꢀlowꢀduringꢀstart-upꢀorꢀaꢀshort-circuitꢀ
OUT
faultꢀonꢀtheꢀoutput,ꢀtheꢀswitchingꢀregulatorꢀmustꢀoperateꢀ
atꢀlowꢀdutyꢀcyclesꢀtoꢀmaintainꢀtheꢀpowerꢀswitchꢀcurrentꢀ
withinꢀtheꢀcurrentꢀlimitꢀrange,ꢀsinceꢀtheꢀinductorꢀcurrentꢀ
decayꢀrateꢀisꢀveryꢀlowꢀduringꢀswitchꢀoffꢀtime.ꢀTheꢀminimumꢀ
on-timeꢀlimitationꢀmayꢀpreventꢀtheꢀswitcherꢀfromꢀattainingꢀ
aꢀsufficientlyꢀlowꢀdutyꢀcycleꢀatꢀtheꢀprogrammedꢀswitch-
ingꢀfrequency.ꢀSo,ꢀtheꢀswitchꢀcurrentꢀwillꢀkeepꢀincreasingꢀ
throughꢀeachꢀswitchꢀcycle,ꢀexceedingꢀtheꢀprogrammedꢀ
currentꢀlimit.ꢀToꢀpreventꢀtheꢀswitchꢀpeakꢀcurrentsꢀfromꢀ
exceedingꢀtheꢀprogrammedꢀvalue,ꢀtheꢀLT3757ꢀcontainsꢀ
aꢀfrequencyꢀfoldbackꢀfunctionꢀtoꢀreduceꢀtheꢀswitchingꢀ
frequencyꢀwhenꢀtheꢀFBXꢀvoltageꢀisꢀlowꢀ(seeꢀtheꢀNormal-
izedꢀ Switchingꢀ Frequencyꢀ vsꢀ FBXꢀ graphꢀ inꢀ theꢀ Typicalꢀ
PerformanceꢀCharacteristicsꢀsection).ꢀ
V ꢀvoltageꢀrippleꢀinducedꢀfromꢀtheꢀoutputꢀvoltageꢀrippleꢀ
C
throughꢀtheꢀinternalꢀerrorꢀamplifier.ꢀTheꢀparallelꢀcapacitorꢀ
usuallyꢀrangesꢀinꢀvalueꢀfromꢀ10pFꢀtoꢀ100pF.ꢀAꢀpracticalꢀ
approachꢀtoꢀdesignꢀtheꢀcompensationꢀnetworkꢀisꢀtoꢀstartꢀ
withꢀoneꢀofꢀtheꢀcircuitsꢀinꢀthisꢀdataꢀsheetꢀthatꢀisꢀsimilarꢀ
toꢀyourꢀapplication,ꢀandꢀtuneꢀtheꢀcompensationꢀnetworkꢀ
toꢀ optimizeꢀ theꢀ performance.ꢀ Stabilityꢀ shouldꢀ thenꢀ beꢀ
checkedꢀacrossꢀallꢀoperatingꢀconditions,ꢀincludingꢀloadꢀ
current,ꢀinputꢀvoltageꢀandꢀtemperature.ꢀ
Theꢀtypicalꢀfrequencyꢀfoldbackꢀwaveformsꢀareꢀshownꢀinꢀ
theꢀTypicalꢀPerformanceꢀCharacteristicsꢀsection.ꢀTheꢀfre-
SENSE Pin Programming
quencyꢀfoldbackꢀfunctionꢀpreventsꢀI ꢀfromꢀexceedingꢀtheꢀ
L
programmedꢀlimitsꢀbecauseꢀofꢀtheꢀminimumꢀon-time.
Forꢀ controlꢀ andꢀ protection,ꢀ theꢀ LT3757ꢀ measuresꢀ theꢀ
powerꢀMOSFETꢀcurrentꢀbyꢀusingꢀaꢀsenseꢀresistorꢀ(R
)ꢀ
Duringꢀfrequencyꢀfoldback,ꢀexternalꢀclockꢀsynchroniza-
tionꢀisꢀdisabledꢀtoꢀpreventꢀinterferenceꢀwithꢀfrequencyꢀ
reducingꢀoperation.
SENSE
betweenꢀGNDꢀandꢀtheꢀMOSFETꢀsource.ꢀFigureꢀ4ꢀshowsꢀaꢀ
typicalꢀwaveformꢀofꢀtheꢀsenseꢀvoltageꢀ(V )ꢀacrossꢀtheꢀ
SENSE
senseꢀresistor.ꢀItꢀisꢀimportantꢀtoꢀuseꢀKelvinꢀtracesꢀbetweenꢀ
theꢀSENSEꢀpinꢀandꢀR ,ꢀandꢀtoꢀplaceꢀtheꢀICꢀGNDꢀasꢀ
Thermal Lockout
SENSE
closeꢀasꢀpossibleꢀtoꢀtheꢀGNDꢀterminalꢀofꢀtheꢀR
properꢀoperation.
ꢀforꢀ
SENSE
IfꢀLT3757ꢀdieꢀtemperatureꢀreachesꢀ165°Cꢀ(typical),ꢀtheꢀ
partꢀwillꢀgoꢀintoꢀthermalꢀlockout.ꢀTheꢀpowerꢀswitchꢀwillꢀ
beꢀturnedꢀoff.ꢀAꢀsoft-startꢀoperationꢀwillꢀbeꢀtriggered.ꢀTheꢀ
partꢀwillꢀbeꢀenabledꢀagainꢀwhenꢀtheꢀdieꢀtemperatureꢀhasꢀ
droppedꢀbyꢀ5°Cꢀ(nominal).
V
SENSE
$V
V
SENSE = C v SENSE(MAX)
V
V
SENSE(PEAK)
SENSE(MAX)
Loop Compensation
t
Loopꢀcompensationꢀdeterminesꢀtheꢀstabilityꢀandꢀtransientꢀ
performance.ꢀTheꢀLT3757ꢀusesꢀcurrentꢀmodeꢀcontrolꢀtoꢀ
regulateꢀtheꢀoutputꢀwhichꢀsimplifiesꢀloopꢀcompensation.ꢀ
Theꢀoptimumꢀvaluesꢀdependꢀonꢀtheꢀconverterꢀtopology,ꢀtheꢀ
DT
S
T
S
3757 F04
Figure 4. The Sense Voltage During a Switching Cycle
3757fb
ꢀꢂ
LT3757
applicaTions inForMaTion
DueꢀtoꢀtheꢀcurrentꢀlimitꢀfunctionꢀofꢀtheꢀSENSEꢀpin,ꢀR
APPLICATION CIRCUITS
SENSEꢀ
shouldꢀbeꢀselectedꢀtoꢀguaranteeꢀthatꢀtheꢀpeakꢀcurrentꢀsenseꢀ
voltageꢀV ꢀduringꢀsteadyꢀstateꢀnormalꢀoperationꢀ
isꢀlowerꢀthanꢀtheꢀSENSEꢀcurrentꢀlimitꢀthresholdꢀ(seeꢀtheꢀ
TheꢀLT3757ꢀcanꢀbeꢀconfiguredꢀasꢀdifferentꢀtopologies.ꢀTheꢀ
firstꢀtopologyꢀtoꢀbeꢀanalyzedꢀwillꢀbeꢀtheꢀboostꢀconverter,ꢀ
followedꢀbyꢀtheꢀflyback,ꢀSEPICꢀandꢀinvertingꢀconverters.
SENSE(PEAK)
Electricalꢀ Characteristicsꢀ table).ꢀ Givenꢀ aꢀ 20%ꢀ margin,ꢀ
V
ꢀ isꢀ setꢀ toꢀ beꢀ 80mV.ꢀ Then,ꢀ theꢀ maximumꢀ
SENSE(PEAK)
Boost Converter: Switch Duty Cycle and Frequency
switchꢀrippleꢀcurrentꢀpercentageꢀcanꢀbeꢀcalculatedꢀusingꢀ
TheꢀLT3757ꢀcanꢀbeꢀconfiguredꢀasꢀaꢀboostꢀconverterꢀforꢀ
theꢀapplicationsꢀwhereꢀtheꢀconverterꢀoutputꢀvoltageꢀisꢀ
higherꢀthanꢀtheꢀinputꢀvoltage.ꢀRememberꢀthatꢀboostꢀcon-
vertersꢀareꢀnotꢀshort-circuitꢀprotected.ꢀUnderꢀaꢀshortedꢀ
outputꢀcondition,ꢀtheꢀinductorꢀcurrentꢀisꢀlimitedꢀonlyꢀbyꢀ
theꢀinputꢀsupplyꢀcapability.ꢀForꢀapplicationsꢀrequiringꢀaꢀ
step-upꢀconverterꢀthatꢀisꢀshort-circuitꢀprotected,ꢀpleaseꢀ
referꢀ toꢀ theꢀ Applicationsꢀ Informationꢀ sectionꢀ coveringꢀ
SEPICꢀconverters.
theꢀfollowingꢀequation:
∆VSENSE
80mV −0.5• ∆VSENSE
c =
ꢀ
c
ꢀisꢀusedꢀinꢀsubsequentꢀdesignꢀexamplesꢀtoꢀcalculateꢀinduc-
torꢀvalue.ꢀ∆V
ꢀisꢀtheꢀrippleꢀvoltageꢀacrossꢀR
.
SENSE
SENSE
TheꢀLT3757ꢀswitchingꢀcontrollerꢀincorporatesꢀ100nsꢀtimingꢀ
intervalꢀtoꢀblankꢀtheꢀringingꢀonꢀtheꢀcurrentꢀsenseꢀsignalꢀ
immediatelyꢀafterꢀM1ꢀisꢀturnedꢀon.ꢀThisꢀringingꢀisꢀcausedꢀ
byꢀtheꢀparasiticꢀinductanceꢀandꢀcapacitanceꢀofꢀtheꢀPCBꢀ
trace,ꢀtheꢀsenseꢀresistor,ꢀtheꢀdiode,ꢀandꢀtheꢀMOSFET.ꢀTheꢀ
100nsꢀtimingꢀintervalꢀisꢀadequateꢀforꢀmostꢀofꢀtheꢀLT3757ꢀ
applications.ꢀInꢀtheꢀapplicationsꢀthatꢀhaveꢀveryꢀlargeꢀandꢀ
longꢀringingꢀonꢀtheꢀcurrentꢀsenseꢀsignal,ꢀaꢀsmallꢀRCꢀfilterꢀ
canꢀbeꢀaddedꢀtoꢀfilterꢀoutꢀtheꢀexcessꢀringing.ꢀFigureꢀ5ꢀ
showsꢀtheꢀRCꢀfilterꢀonꢀSENSEꢀpin.ꢀItꢀisꢀusuallyꢀsufficientꢀ
Theꢀconversionꢀratioꢀasꢀaꢀfunctionꢀofꢀdutyꢀcycleꢀis
VOUT
VIN 1−D
1
=
ꢀ
inꢀcontinuousꢀconductionꢀmodeꢀ(CCM).
ForꢀaꢀboostꢀconverterꢀoperatingꢀinꢀCCM,ꢀtheꢀdutyꢀcycleꢀ
ofꢀtheꢀmainꢀswitchꢀcanꢀbeꢀcalculatedꢀbasedꢀonꢀtheꢀoutputꢀ
toꢀ chooseꢀ 22Ωꢀ forꢀ R ꢀ andꢀ 2.2nFꢀ toꢀ 10nFꢀ forꢀ C .ꢀ
FLT
FLT
voltageꢀ(V )ꢀandꢀtheꢀinputꢀvoltageꢀ(V ).ꢀTheꢀmaximumꢀ
OUT
dutyꢀ cycleꢀ (D
minimumꢀinputꢀvoltage:
IN
KeepꢀR ’sꢀresistanceꢀlow.ꢀRememberꢀthatꢀthereꢀisꢀ65µAꢀ
FLT
)ꢀ occursꢀ whenꢀ theꢀ converterꢀ hasꢀ theꢀ
MAX
(typical)ꢀflowingꢀoutꢀofꢀtheꢀSENSEꢀpin.ꢀAddingꢀR ꢀwillꢀ
FLT
affectꢀtheꢀSENSEꢀcurrentꢀlimitꢀthreshold:
VOUT − VIN(MIN)
ꢀ V ꢀ=ꢀ108mVꢀ–ꢀ65µAꢀ•ꢀR
SENSE_ILIM
DMAX
=
FLT
VOUT
ꢀ
M1
GATE
Discontinuousꢀconductionꢀmodeꢀ(DCM)ꢀprovidesꢀhigherꢀ
conversionꢀratiosꢀatꢀaꢀgivenꢀfrequencyꢀatꢀtheꢀcostꢀofꢀreducedꢀ
efficienciesꢀandꢀhigherꢀswitchingꢀcurrents.
LT3757
R
FLT
SENSE
GND
C
FLT
R
SENSE
3757 F05
Figure 5. The RC Filter on SENSE Pin
3757fb
ꢀꢃ
ꢀ •ꢀC ꢀ•ꢀf/1A
LT3757
applicaTions inForMaTion
Boost Converter: Inductor and Sense Resistor Selection
Basedꢀonꢀtheseꢀequations,ꢀtheꢀuserꢀshouldꢀchooseꢀtheꢀ
inductorsꢀhavingꢀsufficientꢀsaturationꢀandꢀRMSꢀcurrentꢀ
ratings.
Forꢀtheꢀboostꢀtopology,ꢀtheꢀmaximumꢀaverageꢀinductorꢀ
currentꢀis:
SetꢀtheꢀsenseꢀvoltageꢀatꢀI
ꢀtoꢀbeꢀtheꢀminimumꢀofꢀtheꢀ
L(PEAK)
1
SENSEꢀcurrentꢀlimitꢀthresholdꢀwithꢀaꢀ20%ꢀmargin.ꢀTheꢀ
IL(MAX) =IO(MAX)
•
1−DMAX
senseꢀresistorꢀvalueꢀcanꢀthenꢀbeꢀcalculatedꢀtoꢀbe:
ꢀ
Then,ꢀtheꢀrippleꢀcurrentꢀcanꢀbeꢀcalculatedꢀby:
80mV
IL(PEAK)
RSENSE
=
ꢀ
1
∆IL = c •IL(MAX) = c •IO(MAX)
•
1−DMAX
ꢀ
Boost Converter: Power MOSFET Selection
c
Theꢀconstantꢀ ꢀinꢀtheꢀprecedingꢀequationꢀrepresentsꢀtheꢀ
percentageꢀpeak-to-peakꢀrippleꢀcurrentꢀinꢀtheꢀinductor,ꢀ
ImportantꢀparametersꢀforꢀtheꢀpowerꢀMOSFETꢀincludeꢀtheꢀ
drain-sourceꢀvoltageꢀratingꢀ(V ),ꢀtheꢀthresholdꢀvoltageꢀ
DS
DS(ON)
GS
relativeꢀtoꢀI
.
L(MAX)
(V
),ꢀtheꢀon-resistanceꢀ(R
),ꢀtheꢀgateꢀtoꢀsourceꢀ
GD
GS(TH)
andꢀgateꢀtoꢀdrainꢀchargesꢀ(Q ꢀandꢀQ ),ꢀtheꢀmaximumꢀ
Theꢀinductorꢀrippleꢀcurrentꢀhasꢀaꢀdirectꢀeffectꢀonꢀtheꢀchoiceꢀ
drainꢀ currentꢀ (I
)ꢀ andꢀ theꢀ MOSFET’sꢀ thermalꢀ
ofꢀ theꢀ inductorꢀ value.ꢀ Choosingꢀ smallerꢀ valuesꢀ ofꢀ ∆I
D(MAX)
Lꢀ
resistancesꢀ(R ꢀandꢀR ).
requiresꢀlargeꢀinductancesꢀandꢀreducesꢀtheꢀcurrentꢀloopꢀ
θJC
θJA
gainꢀ(theꢀconverterꢀwillꢀapproachꢀvoltageꢀmode).ꢀAcceptingꢀ
TheꢀpowerꢀMOSFETꢀwillꢀseeꢀfullꢀoutputꢀvoltage,ꢀplusꢀaꢀ
diodeꢀforwardꢀvoltage,ꢀandꢀanyꢀadditionalꢀringingꢀacrossꢀ
itsꢀdrain-to-sourceꢀduringꢀitsꢀoff-time.ꢀItꢀisꢀrecommendedꢀ
toꢀchooseꢀaꢀMOSFETꢀwhoseꢀB
aꢀsafetyꢀmarginꢀ(aꢀ10Vꢀsafetyꢀmarginꢀisꢀusuallyꢀsufficient).
largerꢀvaluesꢀofꢀ∆I ꢀprovidesꢀfastꢀtransientꢀresponseꢀandꢀ
L
allowsꢀtheꢀuseꢀofꢀlowꢀinductances,ꢀbutꢀresultsꢀinꢀhigherꢀinputꢀ
currentꢀrippleꢀandꢀgreaterꢀcoreꢀlosses.ꢀItꢀisꢀrecommendedꢀ
ꢀisꢀhigherꢀthanꢀV ꢀbyꢀ
VDSS
OUT
c
thatꢀ ꢀfallꢀwithinꢀtheꢀrangeꢀofꢀ0.2ꢀtoꢀ0.6.ꢀ
Givenꢀanꢀoperatingꢀinputꢀvoltageꢀrange,ꢀandꢀhavingꢀchosenꢀ
theꢀoperatingꢀfrequencyꢀandꢀrippleꢀcurrentꢀinꢀtheꢀinductor,ꢀ
theꢀinductorꢀvalueꢀofꢀtheꢀboostꢀconverterꢀcanꢀbeꢀdeterminedꢀ
usingꢀtheꢀfollowingꢀequation:
TheꢀpowerꢀdissipatedꢀbyꢀtheꢀMOSFETꢀinꢀaꢀboostꢀconverterꢀis:
2
2
ꢀ P ꢀ=ꢀI
ꢀ•ꢀR
ꢀ•ꢀD
ꢀ+ꢀ2ꢀ•ꢀV
ꢀ•ꢀI
ꢀꢀ
FET
L(MAX)
DS(ON)
MAX
OUT L(MAX)
RSS
Theꢀfirstꢀtermꢀinꢀtheꢀprecedingꢀequationꢀrepresentsꢀtheꢀ
conductionꢀlossesꢀinꢀtheꢀdevice,ꢀandꢀtheꢀsecondꢀterm,ꢀtheꢀ
V
L = IN(MIN) •DMAX
∆IL • f
switchingꢀloss.ꢀC ꢀisꢀtheꢀreverseꢀtransferꢀcapacitance,ꢀ
ꢀ
RSS
whichꢀisꢀusuallyꢀspecifiedꢀinꢀtheꢀMOSFETꢀcharacteristics.ꢀ
TheꢀpeakꢀandꢀRMSꢀinductorꢀcurrentꢀare:
Forꢀ maximumꢀ efficiency,ꢀ R ꢀ andꢀ C ꢀ shouldꢀ beꢀ
DS(ON) RSS
c
2
minimized.ꢀFromꢀaꢀknownꢀpowerꢀdissipatedꢀinꢀtheꢀpowerꢀ
MOSFET,ꢀitsꢀjunctionꢀtemperatureꢀcanꢀbeꢀobtainedꢀusingꢀ
theꢀfollowingꢀequation:
IL(PEAK) =IL(MAX) •1+
c2
12
IL(RMS) =IL(MAX) • 1+
ꢀ T ꢀ=ꢀT ꢀ+ꢀP ꢀ•ꢀθ ꢀ=ꢀT ꢀ+ꢀP ꢀ•ꢀ(θ ꢀ+ꢀθ )
J
A
FET
JA
A
FET
JC
CA
ꢀ
3757fb
ꢀꢄ
LT3757
applicaTions inForMaTion
T ꢀ mustꢀ notꢀ exceedꢀ theꢀ MOSFETꢀ maximumꢀ junctionꢀ
J
Boost Converter: Output Capacitor Selection
temperatureꢀrating.ꢀItꢀisꢀrecommendedꢀtoꢀmeasureꢀtheꢀ
MOSFETꢀtemperatureꢀinꢀsteadyꢀstateꢀtoꢀensureꢀthatꢀabsoluteꢀ
maximumꢀratingsꢀareꢀnotꢀexceeded.
ContributionsꢀofꢀESRꢀ(equivalentꢀseriesꢀresistance),ꢀESLꢀ
(equivalentꢀseriesꢀinductance)ꢀandꢀtheꢀbulkꢀcapacitanceꢀ
mustꢀbeꢀconsideredꢀwhenꢀchoosingꢀtheꢀcorrectꢀoutputꢀ
capacitorsꢀforꢀaꢀgivenꢀoutputꢀrippleꢀvoltage.ꢀTheꢀeffectꢀofꢀ
theseꢀthreeꢀparametersꢀ(ESR,ꢀESLꢀandꢀbulkꢀC)ꢀonꢀtheꢀoutputꢀ
voltageꢀrippleꢀwaveformꢀforꢀaꢀtypicalꢀboostꢀconverterꢀisꢀ
illustratedꢀinꢀFigureꢀ6.
Boost Converter: Output Diode Selection
Toꢀmaximizeꢀefficiency,ꢀaꢀfastꢀswitchingꢀdiodeꢀwithꢀlowꢀ
forwardꢀdropꢀandꢀlowꢀreverseꢀleakageꢀisꢀdesirable.ꢀTheꢀ
peakꢀreverseꢀvoltageꢀthatꢀtheꢀdiodeꢀmustꢀwithstandꢀisꢀ
equalꢀtoꢀtheꢀregulatorꢀoutputꢀvoltageꢀplusꢀanyꢀadditionalꢀ
ringingꢀacrossꢀitsꢀanode-to-cathodeꢀduringꢀtheꢀon-time.ꢀ
Theꢀaverageꢀforwardꢀcurrentꢀinꢀnormalꢀoperationꢀisꢀequalꢀ
toꢀtheꢀoutputꢀcurrent,ꢀandꢀtheꢀpeakꢀcurrentꢀisꢀequalꢀto:
t
t
OFF
ON
$V
COUT
V
OUT
(AC)
RINGING DUE TO
TOTAL INDUCTANCE
(BOARD + CAP)
$V
ESR
c
2
3757 F05
ID(PEAK) =IL(PEAK) = 1+
•IL(MAX)
ꢀ
Figure 6. The Output Ripple Waveform of a Boost Converter
Itꢀisꢀrecommendedꢀthatꢀtheꢀpeakꢀrepetitiveꢀreverseꢀvoltageꢀ
ratingꢀV ꢀisꢀhigherꢀthanꢀV ꢀbyꢀaꢀsafetyꢀmarginꢀ(aꢀ10Vꢀ
RRM
OUT
Theꢀchoiceꢀofꢀcomponent(s)ꢀbeginsꢀwithꢀtheꢀmaximumꢀ
acceptableꢀrippleꢀvoltageꢀ(expressedꢀasꢀaꢀpercentageꢀofꢀ
theꢀoutputꢀvoltage),ꢀandꢀhowꢀthisꢀrippleꢀshouldꢀbeꢀdividedꢀ
safetyꢀmarginꢀisꢀusuallyꢀsufficient).
Theꢀpowerꢀdissipatedꢀbyꢀtheꢀdiodeꢀis:
betweenꢀtheꢀESRꢀstepꢀ∆V ꢀandꢀtheꢀcharging/discharg-
ESR
ꢀ P ꢀ=ꢀI
ꢀ•ꢀV
O(MAX) D
D
ingꢀ∆V
.ꢀForꢀtheꢀpurposeꢀofꢀsimplicity,ꢀweꢀwillꢀchooseꢀ
COUT
2%ꢀforꢀtheꢀmaximumꢀoutputꢀripple,ꢀtoꢀbeꢀdividedꢀequallyꢀ
betweenꢀ∆V ꢀandꢀ∆V .ꢀThisꢀpercentageꢀrippleꢀwillꢀ
change,ꢀdependingꢀonꢀtheꢀrequirementsꢀofꢀtheꢀapplica-
tion,ꢀandꢀtheꢀfollowingꢀequationsꢀcanꢀeasilyꢀbeꢀmodified.ꢀ
Forꢀaꢀ1%ꢀcontributionꢀtoꢀtheꢀtotalꢀrippleꢀvoltage,ꢀtheꢀESRꢀ
ofꢀtheꢀoutputꢀcapacitorꢀcanꢀbeꢀdeterminedꢀusingꢀtheꢀfol-
lowingꢀequation:
andꢀtheꢀdiodeꢀjunctionꢀtemperatureꢀis:
ꢀ T ꢀ=ꢀT ꢀ+ꢀP ꢀ•ꢀR
ESR
COUT
J
A
D
θJA
TheꢀR ꢀtoꢀbeꢀusedꢀinꢀthisꢀequationꢀnormallyꢀincludesꢀ
θJA
theꢀR forꢀtheꢀdeviceꢀplusꢀtheꢀthermalꢀresistanceꢀfromꢀ
θJCꢀ
theꢀboardꢀtoꢀtheꢀambientꢀtemperatureꢀinꢀtheꢀenclosure.ꢀT ꢀ
J
mustꢀnotꢀexceedꢀtheꢀdiodeꢀmaximumꢀjunctionꢀtemperatureꢀ
rating.ꢀ
0.01• VOUT
ID(PEAK)
ESRCOUT
≤
ꢀ
3757fb
ꢀꢅ
LT3757
applicaTions inForMaTion
ForꢀtheꢀbulkꢀCꢀcomponent,ꢀwhichꢀalsoꢀcontributesꢀ1%ꢀtoꢀ FLYBACK CONVERTER APPLICATIONS
theꢀtotalꢀripple:
TheꢀLT3757ꢀcanꢀbeꢀconfiguredꢀasꢀaꢀflybackꢀconverterꢀforꢀtheꢀ
applicationsꢀwhereꢀtheꢀconvertersꢀhaveꢀmultipleꢀoutputs,ꢀ
highꢀoutputꢀvoltagesꢀorꢀisolatedꢀoutputs.ꢀFigureꢀ7ꢀshowsꢀ
aꢀsimplifiedꢀflybackꢀconverter.
IO(MAX)
COUT
≥
0.01• VOUT • f
ꢀ
Theꢀoutputꢀcapacitorꢀinꢀaꢀboostꢀregulatorꢀexperiencesꢀhighꢀ
RMSꢀrippleꢀcurrents,ꢀasꢀshownꢀinꢀFigureꢀ6.ꢀTheꢀRMSꢀrippleꢀ
currentꢀratingꢀofꢀtheꢀoutputꢀcapacitorꢀcanꢀbeꢀdeterminedꢀ
usingꢀtheꢀfollowingꢀequation:
Theꢀflybackꢀconverterꢀhasꢀaꢀveryꢀlowꢀpartsꢀcountꢀforꢀmul-
tipleꢀoutputs,ꢀandꢀwithꢀprudentꢀselectionꢀofꢀturnsꢀratio,ꢀcanꢀ
haveꢀhighꢀoutput/inputꢀvoltageꢀconversionꢀratiosꢀwithꢀaꢀ
desirableꢀdutyꢀcycle.ꢀHowever,ꢀitꢀhasꢀlowꢀefficiencyꢀdueꢀtoꢀ
theꢀhighꢀpeakꢀcurrents,ꢀhighꢀpeakꢀvoltagesꢀandꢀconsequentꢀ
powerꢀloss.ꢀTheꢀflybackꢀconverterꢀisꢀcommonlyꢀusedꢀforꢀ
anꢀoutputꢀpowerꢀofꢀlessꢀthanꢀ50W.ꢀ
DMAX
1−DMAX
IRMS(COUT) ≥IO(MAX)
•
ꢀ
Theꢀflybackꢀconverterꢀcanꢀbeꢀdesignedꢀtoꢀoperateꢀeitherꢀ
inꢀcontinuousꢀorꢀdiscontinuousꢀmode.ꢀComparedꢀtoꢀcon-
tinuousꢀmode,ꢀdiscontinuousꢀmodeꢀhasꢀtheꢀadvantageꢀofꢀ
smallerꢀtransformerꢀinductancesꢀandꢀeasyꢀloopꢀcompen-
sation,ꢀandꢀtheꢀdisadvantageꢀofꢀhigherꢀpeak-to-averageꢀ
currentꢀandꢀlowerꢀefficiency.ꢀInꢀtheꢀhighꢀoutputꢀvoltageꢀ
applications,ꢀ theꢀ flybackꢀ convertersꢀ canꢀ beꢀ designedꢀ
toꢀoperateꢀinꢀdiscontinuousꢀmodeꢀtoꢀavoidꢀusingꢀlargeꢀ
transformers.ꢀꢀ
MultipleꢀcapacitorsꢀareꢀoftenꢀparalleledꢀtoꢀmeetꢀESRꢀrequire-
ments.ꢀTypically,ꢀonceꢀtheꢀESRꢀrequirementꢀisꢀsatisfied,ꢀtheꢀ
capacitanceꢀisꢀadequateꢀforꢀfilteringꢀandꢀhasꢀtheꢀrequiredꢀ
RMSꢀcurrentꢀrating.ꢀAdditionalꢀceramicꢀcapacitorsꢀinꢀpar-
allelꢀareꢀcommonlyꢀusedꢀtoꢀreduceꢀtheꢀeffectꢀofꢀparasiticꢀ
inductanceꢀinꢀtheꢀoutputꢀcapacitor,ꢀwhichꢀreducesꢀhighꢀ
frequencyꢀswitchingꢀnoiseꢀonꢀtheꢀconverterꢀoutput.
Boost Converter: Input Capacitor Selection
Theꢀinputꢀcapacitorꢀofꢀaꢀboostꢀconverterꢀisꢀlessꢀcriticalꢀ
thanꢀtheꢀoutputꢀcapacitor,ꢀdueꢀtoꢀtheꢀfactꢀthatꢀtheꢀinductorꢀ
isꢀinꢀseriesꢀwithꢀtheꢀinput,ꢀandꢀtheꢀinputꢀcurrentꢀwave-
formꢀisꢀcontinuous.ꢀTheꢀinputꢀvoltageꢀsourceꢀimpedanceꢀ
determinesꢀtheꢀsizeꢀofꢀtheꢀinputꢀcapacitor,ꢀwhichꢀisꢀtypi-
callyꢀinꢀtheꢀrangeꢀofꢀ10µFꢀtoꢀ100µF.ꢀAꢀlowꢀESRꢀcapacitorꢀ
isꢀrecommended,ꢀalthoughꢀitꢀisꢀnotꢀasꢀcriticalꢀasꢀforꢀtheꢀ
outputꢀcapacitor.
SUGGESTED
D
RCD SNUBBER
N :N
P
S
V
IN
–
SN
+
+
+
+
V
C
I
D
C
R
IN
SN
SN
C
L
L
OUT
P
S
–
D
SN
I
SW
LT3757
GATE
+
V
–
M
R
DS
TheꢀRMSꢀinputꢀcapacitorꢀrippleꢀcurrentꢀforꢀaꢀboostꢀcon-
verterꢀis:
SENSE
SENSE
GND
ꢀ I ꢀ=ꢀ0.3ꢀ•ꢀ∆I
RMS(CIN) L
3757 F06
Figure 7. A Simplified Flyback Converter
3757fb
ꢀꢆ
LT3757
applicaTions inForMaTion
Flyback Converter: Switch Duty Cycle and Turns Ratio
Accordingꢀtoꢀtheꢀprecedingꢀequations,ꢀtheꢀuserꢀhasꢀrelativeꢀ
freedomꢀinꢀselectingꢀtheꢀswitchꢀdutyꢀcycleꢀorꢀturnsꢀratioꢀtoꢀ
suitꢀaꢀgivenꢀapplication.ꢀTheꢀselectionsꢀofꢀtheꢀdutyꢀcycleꢀ
andꢀtheꢀturnsꢀratioꢀareꢀsomewhatꢀiterativeꢀprocesses,ꢀdueꢀ
toꢀtheꢀnumberꢀofꢀvariablesꢀinvolved.ꢀTheꢀuserꢀcanꢀchooseꢀ
eitherꢀaꢀdutyꢀcycleꢀorꢀaꢀturnsꢀratioꢀasꢀtheꢀstartꢀpoint.ꢀTheꢀ
followingꢀtrade-offsꢀshouldꢀbeꢀconsideredꢀwhenꢀselect-
ingꢀtheꢀswitchꢀdutyꢀcycleꢀorꢀturnsꢀratio,ꢀtoꢀoptimizeꢀtheꢀ
converterꢀperformance.ꢀAꢀhigherꢀdutyꢀcycleꢀaffectsꢀtheꢀ
flybackꢀconverterꢀinꢀtheꢀfollowingꢀaspects:
Theꢀflybackꢀconverterꢀconversionꢀratioꢀinꢀtheꢀcontinuousꢀ
modeꢀoperationꢀis:
VOUT NS
VIN NP 1−D
D
=
•
ꢀ
whereꢀN /N ꢀisꢀtheꢀsecondꢀtoꢀprimaryꢀturnsꢀratio.
S
P
Figureꢀ8ꢀshowsꢀtheꢀwaveformsꢀofꢀtheꢀflybackꢀconverterꢀ
inꢀdiscontinuousꢀmodeꢀoperation.ꢀDuringꢀeachꢀswitchingꢀ
•ꢀ Lowerꢀ MOSFETꢀ RMSꢀ currentꢀ I
,ꢀ butꢀ higherꢀ
SW(RMS)
periodꢀT ,ꢀthreeꢀsubintervalsꢀoccur:ꢀDT ,ꢀD2T ,ꢀD3T .ꢀ
S
S
S
S
MOSFETꢀV ꢀpeakꢀvoltage
DS
DuringꢀDT ,ꢀMꢀisꢀon,ꢀandꢀDꢀisꢀreverse-biased.ꢀDuringꢀ
S
D2T ,ꢀMꢀisꢀoff,ꢀandꢀL ꢀisꢀconductingꢀcurrent.ꢀBothꢀL ꢀandꢀ
•ꢀ Lowerꢀdiodeꢀpeakꢀreverseꢀvoltage,ꢀbutꢀhigherꢀdiodeꢀ
RMSꢀcurrentꢀI
S
S
P
L ꢀcurrentsꢀareꢀzeroꢀduringꢀD3T .
ꢀ
S
S
D(RMS)
Theꢀflybackꢀconverterꢀconversionꢀratioꢀinꢀtheꢀdiscontinu-
ousꢀmodeꢀoperationꢀis:
•ꢀ Higherꢀtransformerꢀturnsꢀratioꢀ(N /N )
P
S
Theꢀchoice,
VOUT NS
VIN NP D2
D
D
1
=
•
=
D+D2 3
ꢀ
ꢀ
(forꢀdiscontinuousꢀmodeꢀoperationꢀwithꢀaꢀgivenꢀD3)ꢀgivesꢀ
theꢀpowerꢀMOSFETꢀtheꢀlowestꢀpowerꢀstressꢀ(theꢀproductꢀ
ofꢀRMSꢀcurrentꢀandꢀpeakꢀvoltage).ꢀHowever,ꢀinꢀtheꢀhighꢀ
outputꢀvoltageꢀapplications,ꢀaꢀhigherꢀdutyꢀcycleꢀmayꢀbeꢀ
adoptedꢀ toꢀ limitꢀ theꢀ largeꢀ peakꢀ reverseꢀ voltageꢀ ofꢀ theꢀ
diode.ꢀTheꢀchoice,
V
DS
I
SW
D
2
=
I
SW(MAX)
D+D2 3
ꢀ
(forꢀdiscontinuousꢀmodeꢀoperationꢀwithꢀaꢀgivenꢀD3)ꢀgivesꢀ
theꢀdiodeꢀtheꢀlowestꢀpowerꢀstressꢀ(theꢀproductꢀofꢀRMSꢀ
currentꢀandꢀpeakꢀvoltage).ꢀAnꢀextremeꢀhighꢀorꢀlowꢀdutyꢀ
cycleꢀresultsꢀinꢀhighꢀpowerꢀstressꢀonꢀtheꢀMOSFETꢀorꢀdiode,ꢀ
andꢀreducesꢀefficiency.ꢀItꢀisꢀrecommendedꢀtoꢀchooseꢀaꢀ
dutyꢀcycle,ꢀD,ꢀbetweenꢀ20%ꢀandꢀ80%.
I
D
I
D(MAX)
DT
S
D2T
D3T
S
t
S
T
S
3757 F07
Figure 8. Waveforms of the Flyback Converter
in Discontinuous Mode Operation
3757fb
ꢀꢇ
LT3757
applicaTions inForMaTion
Flyback Converter: Transformer Design for
Discontinuous Mode Operation
AccordingꢀtoꢀFigureꢀ8,ꢀtheꢀprimaryꢀandꢀsecondaryꢀpeakꢀ
currentsꢀare:
Theꢀtransformerꢀdesignꢀforꢀdiscontinuousꢀmodeꢀofꢀopera-
tionꢀisꢀchosenꢀasꢀpresentedꢀhere.ꢀAccordingꢀtoꢀFigureꢀ8,ꢀ
ꢀ I
ꢀ I
ꢀ=ꢀI
ꢀ=ꢀ2ꢀ•ꢀI
SW(PEAK)
LP(PEAK)
LS(PEAK)
LP(MAX)
LS(MAX)
ꢀ=ꢀI
ꢀ=ꢀ2ꢀ•ꢀI
D(PEAK)
theꢀminimumꢀD3ꢀ(D3 )ꢀoccursꢀwhenꢀtheꢀconverterꢀ
MIN
Theꢀprimaryꢀandꢀsecondꢀinductorꢀvaluesꢀofꢀtheꢀflybackꢀ
converterꢀtransformerꢀcanꢀbeꢀdeterminedꢀusingꢀtheꢀfol-
lowingꢀequations:
hasꢀtheꢀminimumꢀV ꢀandꢀtheꢀmaximumꢀoutputꢀpowerꢀ
IN
(P ).ꢀChooseꢀD3 ꢀtoꢀbeꢀequalꢀtoꢀorꢀhigherꢀthanꢀ10%ꢀ
OUT
MIN
toꢀguaranteeꢀtheꢀconverterꢀisꢀalwaysꢀinꢀdiscontinuousꢀ
modeꢀ operationꢀ (choosingꢀ higherꢀ D3ꢀ allowsꢀ theꢀ useꢀ
ofꢀlowꢀinductances,ꢀbutꢀresultsꢀinꢀaꢀhigherꢀswitchꢀpeakꢀ
current).
D2MAX • V2IN(MAX) • h
LP =
2•POUT(MAX) • f
TheꢀuserꢀcanꢀchooseꢀaꢀD
maximumꢀaverageꢀprimaryꢀcurrentsꢀcanꢀbeꢀcalculatedꢀbyꢀ
theꢀfollowingꢀequation:
ꢀasꢀtheꢀstartꢀpoint.ꢀThen,ꢀtheꢀ
D22 •(VOUT + VD)
2•IOUT(MAX) • f
MAX
LS =
ꢀ
Theꢀprimaryꢀtoꢀsecondꢀturnsꢀratioꢀis:
POUT(MAX)
ILP(MAX) =ISW(MAX)
=
NP
NS
LP
LS
DMAX • VIN(MIN) • h
ꢀ
=
ꢀ
whereꢀhꢀisꢀtheꢀconverterꢀefficiency.ꢀ
Ifꢀtheꢀflybackꢀconverterꢀhasꢀmultipleꢀoutputs,ꢀP
isꢀtheꢀsumꢀofꢀallꢀtheꢀoutputꢀpower.
ꢀ
OUT(MAX)
Flyback Converter: Snubber Design
Transformerꢀleakageꢀinductanceꢀ(onꢀeitherꢀtheꢀprimaryꢀ
orꢀsecondary)ꢀcausesꢀaꢀvoltageꢀspikeꢀtoꢀoccurꢀafterꢀtheꢀ
MOSFETꢀturn-off.ꢀThisꢀisꢀincreasinglyꢀprominentꢀatꢀhigherꢀ
loadꢀcurrents,ꢀwhereꢀmoreꢀstoredꢀenergyꢀmustꢀbeꢀdis-
sipated.ꢀInꢀsomeꢀcasesꢀaꢀsnubberꢀcircuitꢀwillꢀbeꢀrequiredꢀ
toꢀavoidꢀovervoltageꢀbreakdownꢀatꢀtheꢀMOSFET’sꢀdrainꢀ
node.ꢀThereꢀareꢀdifferentꢀsnubberꢀcircuits,ꢀandꢀApplicationꢀ
Noteꢀ19ꢀisꢀaꢀgoodꢀreferenceꢀonꢀsnubberꢀdesign.ꢀAnꢀRCDꢀ
snubberꢀisꢀshownꢀinꢀFigureꢀ7.
Theꢀmaximumꢀaverageꢀsecondaryꢀcurrentꢀis:
IOUT(MAX)
ILS(MAX) =ID(MAX)
=
ꢀ
D2
where:
ꢀ D2ꢀ=ꢀ1ꢀ–ꢀD ꢀ–ꢀD3
MAX
theꢀprimaryꢀandꢀsecondaryꢀRMSꢀcurrentsꢀare:
DMAX
Theꢀsnubberꢀresistorꢀvalueꢀ(R )ꢀcanꢀbeꢀcalculatedꢀbyꢀtheꢀ
ILP(RMS) = 2•ILP(MAX)
•
•
SN
ꢀ
ꢀ
3
followingꢀequation:
D2
3
NP
V2SN − VSN • VOUT
•
ILS(RMS) = 2•ILS(MAX)
NS
I2SW(PEAK) •LLK • f
RSN = 2 •
ꢀ
3757fb
ꢀꢈ
C
ꢀ•ꢀf/1A
LT3757
applicaTions inForMaTion
whereꢀV ꢀisꢀtheꢀsnubberꢀcapacitorꢀvoltage.ꢀAꢀsmallerꢀ Flyback Converter: Power MOSFET Selection
SN
V ꢀresultsꢀinꢀaꢀlargerꢀsnubberꢀloss.ꢀAꢀreasonableꢀV ꢀisꢀ
SN
SN
Forꢀtheꢀflybackꢀconfiguration,ꢀtheꢀMOSFETꢀisꢀselectedꢀwithꢀ
aꢀV ꢀratingꢀhighꢀenoughꢀtoꢀhandleꢀtheꢀmaximumꢀV ,ꢀtheꢀ
2ꢀtoꢀ2.5ꢀtimesꢀof:
DC
IN
reflectedꢀsecondaryꢀvoltageꢀandꢀtheꢀvoltageꢀspikeꢀdueꢀtoꢀ
VOUT •NP
theꢀleakageꢀinductance.ꢀApproximateꢀtheꢀrequiredꢀMOSFETꢀ
V ꢀratingꢀusing:
DC
NS
ꢀ
L ꢀ isꢀ theꢀ leakageꢀ inductanceꢀ ofꢀ theꢀ primaryꢀ winding,ꢀ
LK
ꢀ BV ꢀ>ꢀV
DSS
DS(PEAK)
whichꢀisꢀusuallyꢀspecifiedꢀinꢀtheꢀtransformerꢀcharacter-
where:
istics.ꢀ L ꢀ canꢀ beꢀ obtainedꢀ byꢀ measuringꢀ theꢀ primaryꢀ
LK
inductanceꢀ withꢀ theꢀ secondaryꢀ windingsꢀ shorted.ꢀ Theꢀ
VDS(PEAK) = VIN(MAX)+ VSN
ꢀ
snubberꢀcapacitorꢀvalueꢀ(C )ꢀcanꢀbeꢀdeterminedꢀusingꢀ
CN
theꢀfollowingꢀequation:
TheꢀpowerꢀdissipatedꢀbyꢀtheꢀMOSFETꢀinꢀaꢀflybackꢀcon-
verterꢀis:
VSN
∆VSN •RCN • f
CCN
=
2
2
ꢀ P ꢀ=ꢀI
RSS
ꢀ•ꢀR ꢀ+ꢀ2ꢀ•ꢀV
M(RMS) DS(ON)
ꢀ•ꢀI
ꢀ•ꢀꢀꢀ
FET
DS(PEAK) L(MAX)
ꢀ
whereꢀ∆V ꢀisꢀtheꢀvoltageꢀrippleꢀacrossꢀC .ꢀAꢀreasonableꢀ
SN
CN
Theꢀfirstꢀtermꢀinꢀthisꢀequationꢀrepresentsꢀtheꢀconductionꢀ
lossesꢀinꢀtheꢀdevice,ꢀandꢀtheꢀsecondꢀterm,ꢀtheꢀswitchingꢀ
∆V ꢀisꢀ5%ꢀtoꢀ10%ꢀofꢀV .ꢀTheꢀreverseꢀvoltageꢀratingꢀofꢀ
SN
SN
D ꢀshouldꢀbeꢀhigherꢀthanꢀtheꢀsumꢀofꢀV ꢀandꢀV .
SN
SN
IN(MAX)
loss.ꢀC ꢀisꢀtheꢀreverseꢀtransferꢀcapacitance,ꢀwhichꢀisꢀ
RSS
usuallyꢀspecifiedꢀinꢀtheꢀMOSFETꢀcharacteristics.ꢀ
Flyback Converter: Sense Resistor Selection
FromꢀaꢀknownꢀpowerꢀdissipatedꢀinꢀtheꢀpowerꢀMOSFET,ꢀitsꢀ
junctionꢀtemperatureꢀcanꢀbeꢀobtainedꢀusingꢀtheꢀfollowingꢀ
equation:
Inꢀaꢀflybackꢀconverter,ꢀwhenꢀtheꢀpowerꢀswitchꢀisꢀturnedꢀ
on,ꢀ theꢀ currentꢀ flowingꢀ throughꢀ theꢀ senseꢀ resistorꢀ
SENSE
(I
)ꢀis:ꢀ
ꢀ T ꢀ=ꢀT ꢀ+ꢀP ꢀ•ꢀθ ꢀ=ꢀT ꢀ+ꢀP ꢀ•ꢀ(θ ꢀ+ꢀθ )
J
A
FET
JA
A
FET
JC
CA
ꢀ I ꢀ=ꢀI
SENSE LP
T ꢀ mustꢀ notꢀ exceedꢀ theꢀ MOSFETꢀ maximumꢀ junctionꢀ
J
SetꢀtheꢀsenseꢀvoltageꢀatꢀI
ꢀtoꢀbeꢀtheꢀminimumꢀofꢀ
LP(PEAK)
temperatureꢀrating.ꢀItꢀisꢀrecommendedꢀtoꢀmeasureꢀtheꢀ
MOSFETꢀtemperatureꢀinꢀsteadyꢀstateꢀtoꢀensureꢀthatꢀabsoluteꢀ
maximumꢀratingsꢀareꢀnotꢀexceeded.
theꢀSENSEꢀcurrentꢀlimitꢀthresholdꢀwithꢀaꢀ20%ꢀmargin.ꢀTheꢀ
senseꢀresistorꢀvalueꢀcanꢀthenꢀbeꢀcalculatedꢀtoꢀbe:
80mV
ILP(PEAK)
RSENSE
=
ꢀ
3757fb
ꢁ0
LT3757
applicaTions inForMaTion
Flyback Converter: Output Diode Selection
Flyback Converter: Input Capacitor Selection
Theꢀoutputꢀdiodeꢀinꢀaꢀflybackꢀconverterꢀisꢀsubjectꢀtoꢀlargeꢀ Theꢀinputꢀcapacitorꢀinꢀaꢀflybackꢀconverterꢀisꢀsubjectꢀtoꢀ
RMSꢀcurrentꢀandꢀpeakꢀreverseꢀvoltageꢀstresses.ꢀAꢀfastꢀ aꢀlargeꢀRMSꢀcurrentꢀdueꢀtoꢀtheꢀdiscontinuousꢀprimaryꢀ
switchingꢀdiodeꢀwithꢀaꢀlowꢀforwardꢀdropꢀandꢀaꢀlowꢀreverseꢀ current.ꢀToꢀpreventꢀlargeꢀvoltageꢀtransients,ꢀuseꢀaꢀlowꢀ
leakageꢀisꢀdesired.ꢀSchottkyꢀdiodesꢀareꢀrecommendedꢀifꢀ ESRꢀinputꢀcapacitorꢀsizedꢀforꢀtheꢀmaximumꢀRMSꢀcurrent.ꢀ
theꢀoutputꢀvoltageꢀisꢀbelowꢀ100V.ꢀ
TheꢀRMSꢀrippleꢀcurrentꢀratingꢀofꢀtheꢀinputꢀcapacitorsꢀinꢀ
discontinuousꢀ operationꢀ canꢀ beꢀ determinedꢀ usingꢀ theꢀ
followingꢀequation:
Approximateꢀtheꢀrequiredꢀpeakꢀrepetitiveꢀreverseꢀvoltageꢀ
ratingꢀV
ꢀusing:
RRM
POUT(MAX)
4−(3•DMAX
)
NS
IRMS(CIN),DISCONTINUOUS
≥
•
VRRM
>
• VIN(MAX) + VOUT
VIN(MIN) • h
3•DMAX
ꢀ
NP
Theꢀpowerꢀdissipatedꢀbyꢀtheꢀdiodeꢀis:
ꢀ P ꢀ=ꢀI ꢀ•ꢀV
ꢀ
SEPIC CONVERTER APPLICATIONS
D
O(MAX)
D
TheꢀLT3757ꢀcanꢀbeꢀconfiguredꢀasꢀaꢀSEPICꢀ(single-endedꢀ
primaryꢀinductanceꢀconverter),ꢀasꢀshownꢀinꢀFigureꢀ1.ꢀThisꢀ
topologyꢀallowsꢀforꢀtheꢀinputꢀtoꢀbeꢀhigher,ꢀequal,ꢀorꢀlowerꢀ
thanꢀtheꢀdesiredꢀoutputꢀvoltage.ꢀTheꢀconversionꢀratioꢀasꢀ
aꢀfunctionꢀofꢀdutyꢀcycleꢀis:
andꢀtheꢀdiodeꢀjunctionꢀtemperatureꢀis:
ꢀ T ꢀ=ꢀT ꢀ+ꢀP ꢀ•ꢀR
J
A
D
θJA
TheꢀR ꢀtoꢀbeꢀusedꢀinꢀthisꢀequationꢀnormallyꢀincludesꢀ
θJA
θJC
theꢀR ꢀforꢀtheꢀdevice,ꢀplusꢀtheꢀthermalꢀresistanceꢀfromꢀ
VOUT + VD
D
theꢀboardꢀtoꢀtheꢀambientꢀtemperatureꢀinꢀtheꢀenclosure.ꢀT ꢀ
=
J
VIN
1−D
ꢀ
mustꢀnotꢀexceedꢀtheꢀdiodeꢀmaximumꢀjunctionꢀtemperatureꢀ
rating.ꢀ
inꢀcontinuousꢀconductionꢀmodeꢀ(CCM).
InꢀaꢀSEPICꢀconverter,ꢀnoꢀDCꢀpathꢀexistsꢀbetweenꢀtheꢀinputꢀ
andꢀoutput.ꢀThisꢀisꢀanꢀadvantageꢀoverꢀtheꢀboostꢀconverterꢀ
forꢀapplicationsꢀrequiringꢀtheꢀoutputꢀtoꢀbeꢀdisconnectedꢀ
fromꢀtheꢀinputꢀsourceꢀwhenꢀtheꢀcircuitꢀisꢀinꢀshutdown.ꢀ
Flyback Converter: Output Capacitor Selection
Theꢀoutputꢀcapacitorꢀofꢀtheꢀflybackꢀconverterꢀhasꢀaꢀsimilarꢀ
operationꢀconditionꢀasꢀthatꢀofꢀtheꢀboostꢀconverter.ꢀReferꢀtoꢀ
theꢀBoostꢀConverter:ꢀOutputꢀCapacitorꢀSelectionꢀsectionꢀ
Comparedꢀtoꢀtheꢀflybackꢀconverter,ꢀtheꢀSEPICꢀconverterꢀ
hasꢀtheꢀadvantageꢀthatꢀbothꢀtheꢀpowerꢀMOSFETꢀandꢀtheꢀ
forꢀtheꢀcalculationꢀofꢀC ꢀandꢀESR
.ꢀ
COUT
OUT
TheꢀRMSꢀrippleꢀcurrentꢀratingꢀofꢀtheꢀoutputꢀcapacitorsꢀ
inꢀdiscontinuousꢀoperationꢀcanꢀbeꢀdeterminedꢀusingꢀtheꢀ
followingꢀequation:
outputꢀdiodeꢀvoltagesꢀareꢀclampedꢀbyꢀtheꢀcapacitorsꢀ(C ,ꢀ
IN
C ꢀandꢀC ),ꢀtherefore,ꢀthereꢀisꢀlessꢀvoltageꢀringingꢀ
DC
OUT
acrossꢀtheꢀpowerꢀMOSFETꢀandꢀtheꢀoutputꢀdiodes.ꢀTheꢀ
SEPICꢀconverterꢀrequiresꢀmuchꢀsmallerꢀinputꢀcapacitorsꢀ
thanꢀthoseꢀofꢀtheꢀflybackꢀconverter.ꢀThisꢀisꢀdueꢀtoꢀtheꢀfactꢀ
4−(3•D2)
IRMS(COUT),DISCONTINUOUS ≥ IO(MAX)
•
3•D2
ꢀ
3757fb
ꢁꢀ
LT3757
applicaTions inForMaTion
that,ꢀinꢀtheꢀSEPICꢀconverter,ꢀtheꢀinductorꢀL1ꢀisꢀinꢀseriesꢀ
withꢀtheꢀinput,ꢀandꢀtheꢀrippleꢀcurrentꢀflowingꢀthroughꢀtheꢀ
inputꢀcapacitorꢀisꢀcontinuous.
InꢀaꢀSEPICꢀconverter,ꢀtheꢀswitchꢀcurrentꢀisꢀequalꢀtoꢀI ꢀ+ꢀ
L2
averageꢀswitchꢀcurrentꢀisꢀdefinedꢀas:
L1
I ꢀwhenꢀtheꢀpowerꢀswitchꢀisꢀon,ꢀtherefore,ꢀtheꢀmaximumꢀ
1
SEPIC Converter: Switch Duty Cycle and Frequency
ISW(MAX) =IL1(MAX) +IL2(MAX) =IO(MAX)
•
1−DMAX
ꢀ
ForꢀaꢀSEPICꢀconverterꢀoperatingꢀinꢀCCM,ꢀtheꢀdutyꢀcycleꢀ
ofꢀtheꢀmainꢀswitchꢀcanꢀbeꢀcalculatedꢀbasedꢀonꢀtheꢀoutputꢀ
andꢀtheꢀpeakꢀswitchꢀcurrentꢀis:
voltageꢀ (V ),ꢀ theꢀ inputꢀ voltageꢀ (V )ꢀ andꢀ theꢀ diodeꢀ
OUT
IN
ISW(PEAK) = 1+
c
2
1
forwardꢀvoltageꢀ(V ).
D
•IO(MAX)
•
1−DMAX
Theꢀmaximumꢀdutyꢀcycleꢀ(D )ꢀoccursꢀwhenꢀtheꢀconverterꢀ
ꢀ
MAX
hasꢀtheꢀminimumꢀinputꢀvoltage:
c
Theꢀconstantꢀ ꢀinꢀtheꢀprecedingꢀequationsꢀrepresentsꢀtheꢀ
percentageꢀpeak-to-peakꢀrippleꢀcurrentꢀinꢀtheꢀswitch,ꢀrela-
VOUT + VD
VIN(MIN) + VOUT + VD
DMAX
=
tiveꢀtoꢀI
,ꢀasꢀshownꢀinꢀFigureꢀ9.ꢀThen,ꢀtheꢀswitchꢀ
SW(MAX)
ꢀ
rippleꢀcurrentꢀ∆I ꢀcanꢀbeꢀcalculatedꢀby:
SW
c
ꢀ ∆I ꢀ=ꢀ ꢀ•ꢀI
SEPIC Converter: Inductor and Sense Resistor Selection
SW
SW(MAX)
Theꢀinductorꢀrippleꢀcurrentsꢀ∆I ꢀandꢀꢀ∆I ꢀareꢀidentical:
AsꢀshownꢀinꢀFigureꢀ1,ꢀtheꢀSEPICꢀconverterꢀcontainsꢀtwoꢀ
inductors:ꢀL1ꢀandꢀL2.ꢀL1ꢀandꢀL2ꢀcanꢀbeꢀindependent,ꢀbutꢀ
canꢀalsoꢀbeꢀwoundꢀonꢀtheꢀsameꢀcore,ꢀsinceꢀidenticalꢀvolt-
agesꢀareꢀappliedꢀtoꢀL1ꢀandꢀL2ꢀthroughoutꢀtheꢀswitchingꢀ
cycle.ꢀ
L1
L2
ꢀ ∆I ꢀ=ꢀꢀ∆I ꢀ=ꢀ0.5ꢀ•ꢀ∆I
SW
L1
L2
Theꢀ inductorꢀ rippleꢀ currentꢀ hasꢀ aꢀ directꢀ effectꢀ onꢀ theꢀ
choiceꢀofꢀtheꢀinductorꢀvalue.ꢀChoosingꢀsmallerꢀvaluesꢀofꢀ
∆I ꢀrequiresꢀlargeꢀinductancesꢀandꢀreducesꢀtheꢀcurrentꢀ
L
ForꢀtheꢀSEPICꢀtopology,ꢀtheꢀcurrentꢀthroughꢀL1ꢀisꢀtheꢀ
converterꢀinputꢀcurrent.ꢀBasedꢀonꢀtheꢀfactꢀthat,ꢀideally,ꢀtheꢀ
outputꢀpowerꢀisꢀequalꢀtoꢀtheꢀinputꢀpower,ꢀtheꢀmaximumꢀ
averageꢀinductorꢀcurrentsꢀofꢀL1ꢀandꢀL2ꢀare:
loopꢀ gainꢀ (theꢀ converterꢀ willꢀ approachꢀ voltageꢀ mode).ꢀ
Acceptingꢀlargerꢀvaluesꢀofꢀ∆I ꢀallowsꢀtheꢀuseꢀofꢀlowꢀin-
L
ductances,ꢀbutꢀresultsꢀinꢀhigherꢀinputꢀcurrentꢀrippleꢀandꢀ
c
greaterꢀcoreꢀlosses.ꢀItꢀisꢀrecommendedꢀthatꢀ ꢀfallsꢀinꢀtheꢀ
rangeꢀofꢀ0.2ꢀtoꢀ0.4.
DMAX
1−DMAX
IL1(MAX) =IIN(MAX) =IO(MAX)
•
IL2(MAX) =IO(MAX)
ꢀ
I
SW
$I
I
SW = C v SW(MAX)
I
SW(MAX)
t
DT
S
T
S
3757 F08
Figure 9. The Switch Current Waveform of the SEPIC Converter
3757fb
ꢁꢁ
ꢀ +ꢀ2ꢀ•ꢀ(V
ꢀ+ꢀV ) ꢀ•ꢀI
ꢀ•ꢀC ꢀ•ꢀf/1A
L(MAX)
LT3757
applicaTions inForMaTion
Givenꢀanꢀoperatingꢀinputꢀvoltageꢀrange,ꢀandꢀhavingꢀchosenꢀ Basedꢀonꢀtheꢀprecedingꢀequations,ꢀtheꢀuserꢀshouldꢀchooseꢀ
theꢀoperatingꢀfrequencyꢀandꢀrippleꢀcurrentꢀinꢀtheꢀinduc- theꢀinductorsꢀhavingꢀsufficientꢀsaturationꢀandꢀRMSꢀcur-
tor,ꢀtheꢀinductorꢀvalueꢀ(L1ꢀandꢀL2ꢀareꢀindependent)ꢀofꢀtheꢀ rentꢀratings.
SEPICꢀconverterꢀcanꢀbeꢀdeterminedꢀusingꢀtheꢀfollowingꢀ
InꢀaꢀSEPICꢀconverter,ꢀwhenꢀtheꢀpowerꢀswitchꢀisꢀturnedꢀon,ꢀ
equation:
theꢀcurrentꢀflowingꢀthroughꢀtheꢀsenseꢀresistorꢀ(I
theꢀswitchꢀcurrent.ꢀ
)ꢀisꢀ
SENSE
VIN(MIN)
L1=L2=
•DMAX
SetꢀtheꢀsenseꢀvoltageꢀatꢀI
toꢀbeꢀtheꢀminimumꢀ
0.5• ∆ISW • f
SENSE(PEAK)ꢀ
ꢀ
ofꢀtheꢀSENSEꢀcurrentꢀlimitꢀthresholdꢀwithꢀaꢀ20%ꢀmargin.ꢀ
Theꢀsenseꢀresistorꢀvalueꢀcanꢀthenꢀbeꢀcalculatedꢀtoꢀbe:
ForꢀmostꢀSEPICꢀapplications,ꢀtheꢀequalꢀinductorꢀvaluesꢀ
willꢀfallꢀinꢀtheꢀrangeꢀofꢀ1µHꢀtoꢀ100µH.ꢀ
80mV
ISW(PEAK)
RSENSE
=
ByꢀmakingꢀL1ꢀ=ꢀL2,ꢀandꢀwindingꢀthemꢀonꢀtheꢀsameꢀcore,ꢀtheꢀ
valueꢀofꢀinductanceꢀinꢀtheꢀprecedingꢀequationꢀisꢀreplacedꢀ
byꢀ2L,ꢀdueꢀtoꢀmutualꢀinductance:ꢀ
ꢀ
SEPIC Converter: Power MOSFET Selection
V
L = IN(MIN) •DMAX
ForꢀtheꢀSEPICꢀconfiguration,ꢀchooseꢀaꢀMOSFETꢀwithꢀaꢀ
∆ISW • f
V ꢀratingꢀhigherꢀthanꢀtheꢀsumꢀofꢀtheꢀoutputꢀvoltageꢀandꢀ
DC
ꢀ
inputꢀvoltageꢀbyꢀaꢀsafetyꢀmarginꢀ(aꢀ10Vꢀsafetyꢀmarginꢀisꢀ
usuallyꢀsufficient).
Thisꢀmaintainsꢀtheꢀsameꢀrippleꢀcurrentꢀandꢀenergyꢀstorageꢀ
inꢀtheꢀinductors.ꢀTheꢀpeakꢀinductorꢀcurrentsꢀare:
TheꢀpowerꢀdissipatedꢀbyꢀtheꢀMOSFETꢀinꢀaꢀSEPICꢀcon-
verterꢀis:
ꢀ I
ꢀ I
ꢀ=ꢀI
ꢀ=ꢀI
ꢀ+ꢀ0.5ꢀ•ꢀ∆I
ꢀ+ꢀ0.5ꢀ•ꢀ∆I
L1(PEAK)
L1(MAX)
L1
L2
2
L2(PEAK)
L2(MAX)
ꢀ P ꢀ=ꢀI
ꢀ•ꢀR
ꢀ•ꢀD
MAX
FET
SW(MAX)
DS(ON)
2
TheꢀRMSꢀinductorꢀcurrentsꢀare:
IN(MIN)
OUT
RSS
Theꢀfirstꢀtermꢀinꢀthisꢀequationꢀrepresentsꢀtheꢀconductionꢀ
lossesꢀinꢀtheꢀdevice,ꢀandꢀtheꢀsecondꢀterm,ꢀtheꢀswitchingꢀ
c2
12
L1
IL1(RMS) =IL1(MAX) • 1+
ꢀ
loss.ꢀC ꢀisꢀtheꢀreverseꢀtransferꢀcapacitance,ꢀwhichꢀisꢀ
RSS
usuallyꢀspecifiedꢀinꢀtheꢀMOSFETꢀcharacteristics.ꢀ
where:
Forꢀ maximumꢀ efficiency,ꢀ R
ꢀ andꢀ C ꢀ shouldꢀ beꢀ
RSS
∆IL1
IL1(MAX)
DS(ON)
cL1=
minimized.ꢀFromꢀaꢀknownꢀpowerꢀdissipatedꢀinꢀtheꢀpowerꢀ
MOSFET,ꢀitsꢀjunctionꢀtemperatureꢀcanꢀbeꢀobtainedꢀusingꢀ
theꢀfollowingꢀequation:
ꢀ
ꢀ
c2
12
L2
IL2(RMS) =IL2(MAX) • 1+
ꢀ T ꢀ=ꢀT ꢀ+ꢀP ꢀ•ꢀθ ꢀ=ꢀT ꢀ+ꢀP ꢀ•ꢀ(θ ꢀ+ꢀθ )
J
A
FET
JA
A
FET
JC
CA
T ꢀ mustꢀ notꢀ exceedꢀ theꢀ MOSFETꢀ maximumꢀ junctionꢀ
J
where:
temperatureꢀrating.ꢀItꢀisꢀrecommendedꢀtoꢀmeasureꢀtheꢀ
MOSFETꢀtemperatureꢀinꢀsteadyꢀstateꢀtoꢀensureꢀthatꢀabsoluteꢀ
maximumꢀratingsꢀareꢀnotꢀexceeded.
∆IL2
IL2(MAX)
cL2 =
ꢀ
3757fb
ꢁꢂ
LT3757
applicaTions inForMaTion
SEPIC Converter: Output Diode Selection
C ꢀhasꢀnearlyꢀaꢀrectangularꢀcurrentꢀwaveform.ꢀDuringꢀ
DC
theꢀswitchꢀoff-time,ꢀtheꢀcurrentꢀthroughꢀC ꢀisꢀI ,ꢀwhileꢀ
DC
IN
Toꢀmaximizeꢀefficiency,ꢀaꢀfastꢀswitchingꢀdiodeꢀwithꢀaꢀlowꢀ
forwardꢀdropꢀandꢀlowꢀreverseꢀleakageꢀisꢀdesirable.ꢀTheꢀ
averageꢀforwardꢀcurrentꢀinꢀnormalꢀoperationꢀisꢀequalꢀtoꢀ
theꢀoutputꢀcurrent,ꢀandꢀtheꢀpeakꢀcurrentꢀisꢀequalꢀto:
approximatelyꢀ–I ꢀflowsꢀduringꢀtheꢀon-time.ꢀTheꢀRMSꢀ
O
ratingꢀofꢀtheꢀcouplingꢀcapacitorꢀisꢀdeterminedꢀbyꢀtheꢀfol-
lowingꢀequation:
VOUT + VD
VIN(MIN)
ID(PEAK) = 1+
c
2
1
IRMS(CDC) >IO(MAX)
•
•IO(MAX)
•
1−DMAX
ꢀ
ꢀ
AꢀlowꢀESRꢀandꢀESL,ꢀX5RꢀorꢀX7Rꢀceramicꢀcapacitorꢀworksꢀ
Itꢀisꢀrecommendedꢀthatꢀtheꢀpeakꢀrepetitiveꢀreverseꢀvoltageꢀ
ratingꢀV ꢀisꢀhigherꢀthanꢀV ꢀ+ꢀV ꢀbyꢀaꢀsafetyꢀ
wellꢀforꢀC .
DC
RRM
OUT
IN(MAX)
marginꢀ(aꢀ10Vꢀsafetyꢀmarginꢀisꢀusuallyꢀsufficient).
INVERTING CONVERTER APPLICATIONS
Theꢀpowerꢀdissipatedꢀbyꢀtheꢀdiodeꢀis:
TheꢀLT3757ꢀcanꢀbeꢀconfiguredꢀasꢀaꢀdual-inductorꢀinvert-
ꢀ P ꢀ=ꢀI
ꢀ•ꢀV
D
D
O(MAX)
ingꢀtopology,ꢀasꢀshownꢀinꢀFigureꢀ10.ꢀTheꢀV ꢀtoꢀV ꢀ
OUT
IN
andꢀtheꢀdiodeꢀjunctionꢀtemperatureꢀis:
ꢀ T ꢀ=ꢀT ꢀ+ꢀP ꢀ•ꢀR
ratioꢀis:
J
A
D
θJA
VOUT − V
D
1−D
D = −
TheꢀR ꢀusedꢀinꢀthisꢀequationꢀnormallyꢀincludesꢀtheꢀR
ꢀ
θJC
θJA
V
ꢀ
forꢀtheꢀdevice,ꢀplusꢀtheꢀthermalꢀresistanceꢀfromꢀtheꢀboard,ꢀ
toꢀtheꢀambientꢀtemperatureꢀinꢀtheꢀenclosure.ꢀT ꢀmustꢀnotꢀ
inꢀcontinuousꢀconductionꢀmodeꢀ(CCM).
J
exceedꢀtheꢀdiodeꢀmaximumꢀjunctionꢀtemperatureꢀrating.ꢀ
C
+
DC
L1
L2
C
–
SEPIC Converter: Output and Input Capacitor Selection
V
IN
–
+
C
LT3757
GATE
IN
Theꢀselectionsꢀofꢀtheꢀoutputꢀandꢀinputꢀcapacitorsꢀofꢀtheꢀ
SEPICꢀconverterꢀareꢀsimilarꢀtoꢀthoseꢀofꢀtheꢀboostꢀconverter.ꢀ
Pleaseꢀ referꢀ toꢀ theꢀ Boostꢀ Converter,ꢀ Outputꢀ Capacitorꢀ
SelectionꢀandꢀBoostꢀConverter,ꢀInputꢀCapacitorꢀSelectionꢀ
sections.
D1
OUT
M1
+
V
OUT
SENSE
R
SENSE
+
GND
3757 F09
Figure 10. A Simplified Inverting Converter
SEPIC Converter: Selecting the DC Coupling Capacitor
TheꢀDCꢀvoltageꢀratingꢀofꢀtheꢀDCꢀcouplingꢀcapacitorꢀ(C ,ꢀ
DC
asꢀshownꢀinꢀFigureꢀ1)ꢀshouldꢀbeꢀlargerꢀthanꢀtheꢀmaximumꢀ
inputꢀvoltage:
ꢀ V ꢀ>ꢀV
CDC
IN(MAX)
3757fb
ꢁꢃ
LT3757
applicaTions inForMaTion
Inverting Converter: Switch Duty Cycle and Frequency
Afterꢀspecifyingꢀtheꢀmaximumꢀoutputꢀripple,ꢀtheꢀuserꢀcanꢀ
selectꢀtheꢀoutputꢀcapacitorsꢀaccordingꢀtoꢀtheꢀprecedingꢀ
equation.ꢀ
ForꢀanꢀinvertingꢀconverterꢀoperatingꢀinꢀCCM,ꢀtheꢀdutyꢀcycleꢀ
ofꢀtheꢀmainꢀswitchꢀcanꢀbeꢀcalculatedꢀbasedꢀonꢀtheꢀnegativeꢀ
outputꢀvoltageꢀ(V )ꢀandꢀtheꢀinputꢀvoltageꢀ(V ).
TheꢀESRꢀcanꢀbeꢀminimizedꢀbyꢀusingꢀhighꢀqualityꢀX5Rꢀorꢀ
X7Rꢀdielectricꢀceramicꢀcapacitors.ꢀInꢀmanyꢀapplications,ꢀ
ceramicꢀcapacitorsꢀareꢀsufficientꢀtoꢀlimitꢀtheꢀoutputꢀvolt-
ageꢀripple.
OUT
IN
Theꢀmaximumꢀdutyꢀcycleꢀ(D )ꢀoccursꢀwhenꢀtheꢀconverterꢀ
MAX
hasꢀtheꢀminimumꢀinputꢀvoltage:
VOUT − VD
VOUT − VD − VIN(MIN)
Theꢀ RMSꢀ rippleꢀ currentꢀ ratingꢀ ofꢀ theꢀ outputꢀ capacitorꢀ
needsꢀtoꢀbeꢀgreaterꢀthan:
DMAX
=
ꢀ
ꢀ I
ꢀ>ꢀ0.3ꢀ•ꢀ∆I
L2
RMS(COUT)
Inverting Converter: Inductor, Sense Resistor, Power
MOSFET, Output Diode and Input Capacitor Selections
Inverting Converter: Selecting the DC Coupling Capacitor
Theꢀ selectionsꢀ ofꢀ theꢀ inductor,ꢀ senseꢀ resistor,ꢀ powerꢀ
MOSFET,ꢀoutputꢀdiodeꢀandꢀinputꢀcapacitorꢀofꢀanꢀinvertingꢀ
converterꢀareꢀsimilarꢀtoꢀthoseꢀofꢀtheꢀSEPICꢀconverter.ꢀPleaseꢀ
referꢀtoꢀtheꢀcorrespondingꢀSEPICꢀconverterꢀsections.
Theꢀ DCꢀ voltageꢀ ratingꢀ ofꢀ theꢀ DCꢀ couplingꢀ capacitorꢀ
(C ,ꢀasꢀshownꢀinꢀFigureꢀ10)ꢀshouldꢀbeꢀlargerꢀthanꢀtheꢀ
DC
maximumꢀinputꢀvoltageꢀminusꢀtheꢀoutputꢀvoltageꢀ(nega-
tiveꢀvoltage):
ꢀ V ꢀ>ꢀV
ꢀ–ꢀV
IN(MAX) OUT
Inverting Converter: Output Capacitor Selection
CDC
C ꢀhasꢀnearlyꢀaꢀrectangularꢀcurrentꢀwaveform.ꢀDuringꢀ
Theꢀ invertingꢀ converterꢀ requiresꢀ muchꢀ smallerꢀ outputꢀ
capacitorsꢀthanꢀthoseꢀofꢀtheꢀboost,ꢀflybackꢀandꢀSEPICꢀ
convertersꢀforꢀsimilarꢀoutputꢀripples.ꢀThisꢀisꢀdueꢀtoꢀtheꢀfactꢀ
that,ꢀinꢀtheꢀinvertingꢀconverter,ꢀtheꢀinductorꢀL2ꢀisꢀinꢀseriesꢀ
withꢀtheꢀoutput,ꢀandꢀtheꢀrippleꢀcurrentꢀflowingꢀthroughꢀtheꢀ
outputꢀcapacitorsꢀareꢀcontinuous.ꢀTheꢀoutputꢀrippleꢀvoltageꢀ
isꢀproducedꢀbyꢀtheꢀrippleꢀcurrentꢀofꢀL2ꢀflowingꢀthroughꢀtheꢀ
ESRꢀandꢀbulkꢀcapacitanceꢀofꢀtheꢀoutputꢀcapacitor:
DC
theꢀswitchꢀoff-time,ꢀtheꢀcurrentꢀthroughꢀC ꢀisꢀI ,ꢀwhileꢀ
DC
IN
approximatelyꢀ–I ꢀflowsꢀduringꢀtheꢀon-time.ꢀTheꢀRMSꢀ
O
ratingꢀofꢀtheꢀcouplingꢀcapacitorꢀisꢀdeterminedꢀbyꢀtheꢀfol-
lowingꢀequation:
DMAX
1−DMAX
IRMS(CDC) >IO(MAX)
•
ꢀ
AꢀlowꢀESRꢀandꢀESL,ꢀX5RꢀorꢀX7Rꢀceramicꢀcapacitorꢀworksꢀ
1
∆VOUT(P–P) = ∆I • ESR
+
COUT
wellꢀforꢀC .
DC
L2
8• f •C
OUT
ꢀ
3757fb
ꢁꢄ
LT3757
applicaTions inForMaTion
Board Layout
topologiesꢀshouldꢀbeꢀkeptꢀasꢀtightꢀasꢀpossibleꢀtoꢀreduceꢀ
inductiveꢀringing:ꢀ
TheꢀhighꢀspeedꢀoperationꢀofꢀtheꢀLT3757ꢀdemandsꢀcarefulꢀ
attentionꢀtoꢀboardꢀlayoutꢀandꢀcomponentꢀplacement.ꢀTheꢀ
ExposedꢀPadꢀofꢀtheꢀpackageꢀisꢀtheꢀonlyꢀGNDꢀterminalꢀofꢀ
theꢀIC,ꢀandꢀisꢀimportantꢀforꢀthermalꢀmanagementꢀofꢀtheꢀ
IC.ꢀTherefore,ꢀitꢀisꢀcrucialꢀtoꢀachieveꢀaꢀgoodꢀelectricalꢀandꢀ
thermalꢀcontactꢀbetweenꢀtheꢀExposedꢀPadꢀandꢀtheꢀgroundꢀ
planeꢀofꢀtheꢀboard.ꢀForꢀtheꢀLT3757ꢀtoꢀdeliverꢀitsꢀfullꢀoutputꢀ
power,ꢀitꢀisꢀimperativeꢀthatꢀaꢀgoodꢀthermalꢀpathꢀbeꢀpro-
videdꢀtoꢀdissipateꢀtheꢀheatꢀgeneratedꢀwithinꢀtheꢀpackage.ꢀ
Itꢀisꢀrecommendedꢀthatꢀmultipleꢀviasꢀinꢀtheꢀprintedꢀcircuitꢀ
boardꢀbeꢀusedꢀtoꢀconductꢀheatꢀawayꢀfromꢀtheꢀICꢀandꢀintoꢀ
aꢀcopperꢀplaneꢀwithꢀasꢀmuchꢀareaꢀasꢀpossible.
•ꢀ Inꢀboostꢀ configuration,ꢀ theꢀ highꢀ di/dtꢀ loopꢀ containsꢀ
theꢀoutputꢀcapacitor,ꢀtheꢀsensingꢀresistor,ꢀtheꢀpowerꢀ
MOSFETꢀandꢀtheꢀSchottkyꢀdiode.
•ꢀ Inꢀflybackꢀconfiguration,ꢀtheꢀhighꢀdi/dtꢀprimaryꢀloopꢀ
containsꢀtheꢀinputꢀcapacitor,ꢀtheꢀprimaryꢀwinding,ꢀtheꢀ
powerꢀ MOSFETꢀ andꢀ theꢀ sensingꢀ resistor.ꢀ Theꢀ highꢀ
di/dtꢀsecondaryꢀloopꢀcontainsꢀtheꢀoutputꢀcapacitor,ꢀtheꢀ
secondaryꢀwindingꢀandꢀtheꢀoutputꢀdiode.
•ꢀ InꢀSEPICꢀconfiguration,ꢀtheꢀhighꢀdi/dtꢀloopꢀcontainsꢀ
theꢀpowerꢀMOSFET,ꢀsenseꢀresistor,ꢀoutputꢀcapacitor,ꢀ
Schottkyꢀdiodeꢀandꢀtheꢀcouplingꢀcapacitor.
Toꢀ preventꢀ radiationꢀ andꢀ highꢀ frequencyꢀ resonanceꢀ
problems,ꢀproperꢀlayoutꢀofꢀtheꢀcomponentsꢀconnectedꢀ
toꢀtheꢀICꢀisꢀessential,ꢀespeciallyꢀtheꢀpowerꢀpathsꢀwithꢀ
higherꢀdi/dt.ꢀTheꢀfollowingꢀhighꢀdi/dtꢀloopsꢀofꢀdifferentꢀ
•ꢀ Inꢀinvertingꢀconfiguration,ꢀtheꢀhighꢀdi/dtꢀloopꢀcontainsꢀ
powerꢀMOSFET,ꢀsenseꢀresistor,ꢀSchottkyꢀdiodeꢀandꢀtheꢀ
couplingꢀcapacitor.
C
IN
V
IN
C
C
C1
C2
L1
R3
R
C
R1
R2
R
1
2
3
4
5
10
LT3757
9
8
7
6
C
SS
VCC
R
T
1
2
3
4
8
7
6
5
M1
R
S
VIAS TO GROUND
PLANE
D1
C
C
OUT1
OUT2
V
OUT
3757 F10
Figure 11. 8V to 16V Input, 24V/2A Output Boost Converter Suggested Layout
3757fb
ꢁꢅ
LT3757
applicaTions inForMaTion
CheckꢀtheꢀstressꢀonꢀtheꢀpowerꢀMOSFETꢀbyꢀmeasuringꢀitsꢀ
drain-to-sourceꢀvoltageꢀdirectlyꢀacrossꢀtheꢀdeviceꢀterminalsꢀ
(referenceꢀtheꢀgroundꢀofꢀaꢀsingleꢀscopeꢀprobeꢀdirectlyꢀtoꢀ
theꢀsourceꢀpadꢀonꢀtheꢀPCꢀboard).ꢀBewareꢀofꢀinductiveꢀ
ringing,ꢀwhichꢀcanꢀexceedꢀtheꢀmaximumꢀspecifiedꢀvoltageꢀ
ratingꢀofꢀtheꢀMOSFET.ꢀIfꢀthisꢀringingꢀcannotꢀbeꢀavoided,ꢀ
andꢀexceedsꢀtheꢀmaximumꢀratingꢀofꢀtheꢀdevice,ꢀeitherꢀ
chooseꢀaꢀhigherꢀvoltageꢀdeviceꢀorꢀspecifyꢀanꢀavalanche-
ratedꢀpowerꢀMOSFET.
Table 2. Recommended Component Manufacturers
VENDOR
AVX
COMPONENTS
WEB ADDRESS
Capacitors
avx.com
BHꢀElectronics
Inductors,ꢀ
Transformers
bhelectronics.com
Coilcraft
Inductors
Inductors
Diodes
coilcraft.com
bussmann.com
CooperꢀBussmann
Diodes,ꢀInc
Fairchild
diodes.com
MOSFETs
Diodes
fairchildsemi.com
generalsemiconductor.com
Generalꢀ
Semiconductor
Theꢀsmall-signalꢀcomponentsꢀshouldꢀbeꢀplacedꢀawayꢀfromꢀ
highꢀfrequencyꢀswitchingꢀnodes.ꢀForꢀoptimumꢀloadꢀregula-
tionꢀandꢀtrueꢀremoteꢀsensing,ꢀtheꢀtopꢀofꢀtheꢀoutputꢀvoltageꢀ
sensingꢀresistorꢀdividerꢀshouldꢀconnectꢀindependentlyꢀtoꢀ
theꢀtopꢀofꢀtheꢀoutputꢀcapacitorꢀ(Kelvinꢀconnection),ꢀstayingꢀ
awayꢀfromꢀanyꢀhighꢀdV/dtꢀtraces.ꢀPlaceꢀtheꢀdividerꢀresis-
torsꢀnearꢀtheꢀLT3757ꢀinꢀorderꢀtoꢀkeepꢀtheꢀhighꢀimpedanceꢀ
FBXꢀnodeꢀshort.ꢀ
InternationalꢀRectifier MOSFETs,ꢀDiodes
irf.com
irctt.com
IRC
SenseꢀResistors
Capacitors
ToroidꢀCores
Diodes
Kemet
kemet.com
mag-inc.com
microsemi.com
murata.co.jp
MagneticsꢀInc
Microsemi
Murata-Erie
Inductors,ꢀ
Capacitors
Nichicon
Capacitors
Diodes
nichicon.com
onsemi.com
Figureꢀ11ꢀshowsꢀtheꢀsuggestedꢀlayoutꢀofꢀtheꢀ8Vꢀtoꢀ16Vꢀ
Input,ꢀ24V/2AꢀOutputꢀBoostꢀConverter.
OnꢀSemiconductor
Panasonic
Sanyo
Capacitors
Capacitors
Inductors
Capacitors
panasonic.com
sanyo.co.jp
Recommended Component Manufacturers
Sumida
sumida.com
Someꢀofꢀtheꢀrecommendedꢀ componentꢀ manufacturersꢀ
areꢀlistedꢀinꢀTableꢀ2.
TaiyoꢀYuden
TDK
t-yuden.com
Capacitors,ꢀ
Inductors
component.tdk.com
Thermalloy
Tokin
HeatꢀSinks
Capacitors
Inductors
Capacitors
Resistors
MOSFETs
Capacitors
Inductors
aavidthermalloy.com
nec-tokinamerica.com
tokoam.com
Toko
UnitedꢀChemicon
Vishay/Dale
Vishay/Siliconix
Vishay/Sprague
WürthꢀElectronik
Zetex
chemi-com.com
vishay.com
vishay.com
vishay.com
we-online.com
zetex.com
Small-Signalꢀ
Discretes
3757fb
ꢁꢆ
LT3757
Typical applicaTions
3.3V Input, 5V/10A Output Boost Converter
L1
0.5µH
V
IN
3.3V
C
IN
22µF
6.3V
s2
V
IN
49.9k
34k
C
INTV
VCC
CC
4.7µF
10V
SHDN/UVLO
D1
V
5V
10A
OUT
X5R
LT3757
SYNC
GATE
M1
34k
1%
FBX
22Ω
C
RT
SS
+
OUT1
SENSE
150µF
6.3V
VC
GND
s4
41.2k
300kHz
0.004Ω
1W
C
6.8k
22nF
OUT2
22µF
15.8k
1%
0.1µF
2.2nF
6.3V
X5R
s4
C
C
C
: TAIYO YUDEN JMK325BJ226MM
D1: MBRB2515L
L1: VISHAY SILICONIX IHLP-5050FD-01
M1: VISHAY SILICONIX SI4448DY
IN
3757 TA02a
: PANASONIC EEFUEOJ151R
OUT1
OUT2
: TAIYO YUDEN JMK325BJ226MM
Efficiency vs Output Current
100
90
80
70
60
50
40
30
20
0.001
0.1
1
10
0.01
OUTPUT CURRENT (A)
3757 TA02b
3757fb
ꢁꢇ
LT3757
Typical applicaTions
8V to 16V Input, 24V/2A Output Boost Converter
V
IN
8V TO 16V
C
IN
R3
200k
L1
10µF
25V
X5R
V
IN
10µH
SHDN/UVLO
D1
V
24V
2A
OUT
R4
43.2k
LT3757
SYNC
GATE
M1
R2
226k
1%
SENSE
C
OUT1
RT
SS
+
47µF
35V
s4
FBX
GND INTV
CC
VC
R
T
R
41.2k
300kHz
S
C
R
C2
C
0.01Ω
1W
C
10µF
25V
X5R
100pF
22k
OUT2
R1
16.2k
1%
C
VCC
C
4.7µF
10V
C
6.8nF
SS
0.1µF
C1
X5R
C
C
, C
OUT1
: MURATA GRM31CR61E106KA12
IN OUT2
3757 TA03a
: KEMET T495X476K035AS
D1: ON SEMI MBRS340T3G
L1: VISHAY SILICONIX IHLP-5050FD-01 10µH
M1: VISHAY SILICONIX Si4840BDP
Efficiency vs Output Current
Load Step Response at VIN = 12V
100
90
V
OUT
V
= 8V
500mV/DIV
(AC)
IN
80
V
= 16V
IN
70
60
50
40
30
1.6A
I
OUT
1A/DIV
0.4A
3757 TA03c
500µs/DIV
0.001
0.1
1
10
0.01
OUTPUT CURRENT (A)
3757 TA03b
3757fb
ꢁꢈ
LT3757
Typical applicaTions
High Voltage Flyback Power Supply
DANGER! HIGH VOLTAGE OPERATION BY HIGH VOLTAGE TRAINED PERSONNEL ONLY
T1
1:10
D1
V
350V
OUT
V
IN
5V TO 12V
C
10mA
IN
•
150µF
6.3V
s2
105k
1.50M
1%
•
SHDN/UVLO
V
IN
22Ω
C
47µF
25V
46.4k
INTV
CC
VCC
1M
1%
220pF
C
68nF
OUT
SYNC
V
SW
LT3757
X5R
s2
1M
1%
GATE
M1
RT
SS
VC
22Ω
SENSE
FBX
GND
140k
100kHz
10nF
16.2k
1%
6.8k
22nF
0.02Ω
0.1µF
100pF
3757 TA04a
C
C
: MURATA GRM32DR61C106K
IN
: TDK C3225X7R2J683K
OUT
D1: VISHAY SILICONIX GSD2004S DUAL DIODE CONNECTED IN SERIES
M1: VISHAY SILICONIX Si7850DP
T1: TDK DCT15EFD-U44S003
Start-Up Waveforms
Switching Waveforms
V
OUT
5V/DIV
(AC)
V
SW
20V/DIV
V
OUT
100V/DIV
3757 TA04b
3757 TA04c
2ms/DIV
5µs/DIV
3757fb
ꢂ0
LT3757
Typical applicaTions
5.5V to 36V Input, 12V/2A Output SEPIC Converter
V
IN
5.5V TO 36V
C
IN
•
C
4.7µF
4.7µF
50V
s2
DC
105k
I
V
L1A
L1A
IN
50V, X5R, s2
SHDN/UVLO
D1
V
OUT
12V
2A
V
SW
46.4k
LT3757
SYNC
GATE
M1
L1B
I
L1B
105k
1%
•
SENSE
0.008Ω
1W
C
47µF
OUT1
RT
SS
+
FBX
20V
VC
GND INTV
CC
s2
41.2k
300kHz
10k
6.8nF
C
10µF
25V
X5R
OUT2
4.7µF
10V
X5R
15.8k
1%
0.1µF
3757 TA05a
C
C
C
, C : TAIYO YUDEN UMK316BJ475KL
IN DC
: KEMET T495X476K020AS
OUT1
OUT2
: TAIYO YUDEN TMK432BJ106MM
D1: ON SEMI MBRS360T3G
L1A, L1B: COILTRONICS DRQ127-3R3 (*COUPLED INDUCTORS)
M1: VISHAY SILICONIX Si7460DP
Efficiency vs Output Current
Load Step Waveforms
100
90
V
= 8V
IN
V
OUT
80
70
200mV/DIV
(AC)
V
= 16V
IN
60
50
1.6A
I
OUT
1A/DIV
0.4A
40
3757 TA05c
500µs/DIV
30
20
0.001
0.1
1
10
0.01
OUTPUT CURRENT (A)
3757 TA05b
Start-Up Waveforms
Frequency Foldback Waveforms When Output Short-Circuits
V
= 12V
V
= 12V
V
IN
IN
OUT
10V/DIV
V
SW
V
20V/DIV
OUT
5V/DIV
I
+ I
L1A L1B
I
+ I
5A/DIV
L1A L1B
5A/DIV
3757 TA05d
3757 TA05e
2ms/DIV
50µs/DIV
3757fb
ꢂꢀ
LT3757
Typical applicaTions
5V to 12V Input, 12V/0.2A Output SEPIC Converter
V
IN
5V TO 12V
C
47µF
16V
C
IN1
IN2
+
•
C
105k
DC1
V
1µF
IN
T1
1,2,3,4
4.7µF
16V, X5R
16V, X5R
SHDN/UVLO
D1
V
OUT1
12V
46.4k
LT3757
0.4A
1.05k
1%
C
M1
C
OUT2
SYNC
RT
GATE
DC2
4.7µF
16V, X5R
s3
4.7µF
16V
5
SENSE
FBX
158Ω
1%
•
X5R
GND
0.02Ω
C
OUT2
SS
VC
D2
4.7µF
16V, X5R
s3
GND INTV
CC
6
V
–12V
0.4A
OUT2
30.9k
400kHz
22k
6.8nF
3757 TA06
C
VCC
4.7µF
10V
0.1µF
100pF
X5R
D1, D2: MBRS140T3
T1: COILTRONICS VP1-0076 (*PRIMARY = 4 WINDINGS IN PARALLEL)
M1: SILICONIX/VISHAY Si4840BDY
Nonisolated Inverting SLIC Supply
VP5-0155 (PRIMARY = 3 WINDINGS IN PARALLEL)
D1
DFLS160
V
IN
GND
5V TO 16V
C
IN
22µF
C2
C3
R2
•
10µF
50V
X5R
V
IN
22µF
25V
X5R
T1
105k
25V, X5R
s2
4
1,2,3
SHDN/UVLO
•
•
•
R1
46.4k
LT3757
M1
Si7850DP
D2
DFLS160
SYNC
RT
GATE
V
OUT1
–24V
SENSE
FBX
200mA
C4
C
3.3µF
100V
OUT
22µF
25V
X5R
5
SS
VC
GND INTV
CC
D3
63.4k
200kHz
0.012Ω
0.5W
DFLS160
9.1k
10nF
C
4.7µF
10V, X5R
VCC
0.1µF
C5
22µF
25V
X5R
100pF
6
V
OUT1
15.8k
–72V
464k
200mA
3757 TA07
3757fb
ꢂꢁ
LT3757
package DescripTion
DD Package
10-Lead Plastic DFN (3mm × 3mm)
(ReferenceꢀLTCꢀDWGꢀ#ꢀ05-08-1699ꢀRevꢀB)
0.70 p0.05
3.55 p0.05
2.15 p0.05 (2 SIDES)
1.65 p0.05
PACKAGE
OUTLINE
0.25 p 0.05
0.50
BSC
2.38 p0.05
(2 SIDES)
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
R = 0.125
0.40 p 0.10
TYP
6
10
3.00 p0.10
(4 SIDES)
1.65 p 0.10
(2 SIDES)
PIN 1
TOP MARK
(SEE NOTE 6)
(DD) DFN REV B 0309
5
1
0.25 p 0.05
0.50 BSC
0.75 p0.05
0.200 REF
2.38 p0.10
(2 SIDES)
0.00 – 0.05
BOTTOM VIEW—EXPOSED PAD
NOTE:
1. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M0-229 VARIATION OF (WEED-2).
CHECK THE LTC WEBSITE DATA SHEET FOR CURRENT STATUS OF VARIATION ASSIGNMENT
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE
TOP AND BOTTOM OF PACKAGE
3757fb
ꢂꢂ
LT3757
package DescripTion
MSE Package
10-Lead Plastic MSOP, Exposed Die Pad
(Reference LTC DWG # 05-08-1664 Rev C)
BOTTOM VIEW OF
EXPOSED PAD OPTION
2.06 p 0.102
(.081 p .004)
1.83 p 0.102
(.072 p .004)
2.794 p 0.102
(.110 p .004)
0.889 p 0.127
(.035 p .005)
1
0.29
REF
0.05 REF
5.23
(.206)
MIN
2.083 p 0.102 3.20 – 3.45
(.082 p .004) (.126 – .136)
DETAIL “B”
CORNER TAIL IS PART OF
THE LEADFRAME FEATURE.
FOR REFERENCE ONLY
NO MEASUREMENT PURPOSE
DETAIL “B”
10
0.50
(.0197)
BSC
0.305 p 0.038
(.0120 p .0015)
TYP
3.00 p 0.102
(.118 p .004)
(NOTE 3)
0.497 p 0.076
(.0196 p .003)
10 9
8
7 6
RECOMMENDED SOLDER PAD LAYOUT
REF
3.00 p 0.102
(.118 p .004)
(NOTE 4)
4.90 p 0.152
(.193 p .006)
DETAIL “A”
0.254
(.010)
0o – 6o TYP
1
2
3
4 5
GAUGE PLANE
0.53 p 0.152
(.021 p .006)
0.86
(.034)
REF
1.10
(.043)
MAX
DETAIL “A”
0.18
(.007)
SEATING
PLANE
0.17 – 0.27
(.007 – .011)
TYP
0.1016 p 0.0508
(.004 p .002)
0.50
(.0197)
BSC
MSOP (MSE) 0908 REV C
NOTE:
1. DIMENSIONS IN MILLIMETER/(INCH)
2. DRAWING NOT TO SCALE
3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.
INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX
3757fb
LT3757
revision hisTory (Revision history begins at Rev B)
REV
DATE
DESCRIPTION
PAGE NUMBER
B
3/10
DeletedꢀBulletꢀfromꢀFeaturesꢀandꢀLastꢀLineꢀofꢀDescription
UpdatedꢀEntireꢀPageꢀtoꢀAddꢀH-GradeꢀandꢀMilitaryꢀGrade
UpdatedꢀElectricalꢀCharacteristicsꢀNotesꢀandꢀTypicalꢀPerformanceꢀCharacteristicsꢀforꢀH-GradeꢀandꢀMilitaryꢀGrade
RevisedꢀTA04aꢀandꢀReplacedꢀTA04cꢀinꢀTypicalꢀApplications
UpdatedꢀRelatedꢀParts
1
2
4ꢀtoꢀ6
30
36
3757fb
InformationꢀfurnishedꢀbyꢀLinearꢀTechnologyꢀCorporationꢀisꢀbelievedꢀtoꢀbeꢀaccurateꢀandꢀreliable.ꢀ
However,ꢀnoꢀresponsibilityꢀisꢀassumedꢀforꢀitsꢀuse.ꢀLinearꢀTechnologyꢀCorporationꢀmakesꢀnoꢀrepresenta-
tionꢀthatꢀtheꢀinterconnectionꢀofꢀitsꢀcircuitsꢀasꢀdescribedꢀhereinꢀwillꢀnotꢀinfringeꢀonꢀexistingꢀpatentꢀrights.
ꢀꢁ
LT3757
Typical applicaTion
High Efficiency Inverting Power Supply
Efficiency vs Output Current
V
IN
100
5V TO
15V
C
47µF
16V
R2
105k
IN
C
47µF
25V, X5R
DC
•
V
IN
90
80
70
60
50
40
L1
L2
SHDN/UVLO
V
–5V
3A to 5A
X5R
OUT
R1
46.4k
V
= 5V
IN
LT3757
V
= 16V
SYNC
GATE
M1
IN
84.5k
Si7848BDP
SENSE
D1
MBRD835L
0.006Ω
1W
RT
SS
FBX
VC
GND INTV
CC
30
20
10
41.2k
300kHz
C
9.1k
10nF
VCC
C
16k
OUT
4.7µF
10V
X5R
100µF
0.1µF
6.3V, X5R
0.001
0.1
1
10
0.01
s2
OUTPUT CURRENT (A)
3757 TA08b
3757 TA08a
L1, L2: COILTRONICS DRQ127-3R3 (*COUPLED INDUCTORS)
relaTeD parTs
PART NUMBER
DESCRIPTION
COMMENTS
LT3758
Boost,ꢀFlyback,ꢀSEPICꢀandꢀInvertingꢀController
2.9Vꢀ≤ꢀV ꢀ≤ꢀ100V,ꢀCurrentꢀModeꢀControl,ꢀ100kHzꢀtoꢀ1MHzꢀProgrammableꢀ
IN
OperationꢀFrequency,ꢀ3mmꢀ×ꢀ3mmꢀ10-LeadꢀDFNꢀandꢀ10-LeadꢀMSOP-Eꢀ
Packages
LT3573
IsolatedꢀFlybackꢀSwitchingꢀRegulatorꢀwithꢀ60Vꢀ
IntegratedꢀSwitch
3Vꢀ≤ꢀV ꢀ≤ꢀ40V,ꢀNoꢀOpto-IsolatorꢀorꢀThirdꢀWindingꢀRequired,ꢀUpꢀtoꢀ7W,ꢀꢀ
IN
16-LeadꢀMSOP-EꢀPackage
LTC1871/LTC1871-1/ Boost,ꢀFlybackꢀandꢀSEPICꢀController,ꢀNoꢀR
™,ꢀ AdjustableꢀSwitchingꢀFrequency,ꢀ2.5Vꢀ≤ꢀV ꢀ≤ꢀ36V,ꢀBurstꢀMode®ꢀOperationꢀatꢀ
SENSE
IN
LTC1871-7
LowꢀQuiescentꢀCurrent
LightꢀLoads
LTC3872
Boost,ꢀFlyback,ꢀSEPICꢀController
2.75Vꢀ≤ꢀV ꢀ≤ꢀ9.8V,ꢀ23-LeadꢀThinSot™ꢀandꢀ2mmꢀ×ꢀ3mmꢀ8-LeadꢀDFNꢀ
IN
Packages
LT3837
LT3825
IsolatedꢀNo-OptoꢀSynchronousꢀFlybackꢀController
IsolatedꢀNo-OptoꢀSynchronousꢀFlybackꢀController
IdealꢀforꢀV ꢀfromꢀ4.5Vꢀtoꢀ36VꢀLimitedꢀbyꢀExternalꢀComponents,ꢀUpꢀtoꢀ60W,ꢀ
IN
CurrentꢀModeꢀControl
V ꢀ16Vꢀtoꢀ75VꢀLimitedꢀbyꢀExternalꢀComponents,ꢀUpꢀtoꢀ60W,ꢀCurrentꢀModeꢀ
IN
Control
LTC3803/LTC3803-3/ 200kHzꢀFlybackꢀDC/DCꢀController
LTC3803-5
V ꢀandꢀV ꢀLimitedꢀOnlyꢀbyꢀExternalꢀComponents,ꢀ6-LeadꢀThinSotꢀPackage
IN OUT
LTC3805/LTC3805-5 AdjustableꢀFixedꢀ70kHzꢀtoꢀ700kHzꢀOperatingꢀ
FrequencyꢀFlybackꢀController
V ꢀandꢀV ꢀLimitedꢀOnlyꢀbyꢀExternalꢀComponents,ꢀ3mmꢀ×ꢀ3mmꢀ10-Leadꢀ
IN
OUT
DFN,ꢀ10-LeadꢀMSOP-EꢀPackages
3757fb
LT 0310 REV B • PRINTED IN USA
Linear Technology Corporation
1630ꢀ McCarthyꢀ Blvd.,ꢀ Milpitas,ꢀ CAꢀ 95035-7417
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ꢀꢂ
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LINEAR TECHNOLOGY CORPORATION 2008
(408)ꢀ432-1900ꢀ ꢀFAX:ꢀ(408)ꢀ434-0507ꢀ ꢀwww.linear.com
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