LT3748 [Linear]
Secondary-Side Opto-Coupler Driver Ground-Referenced Opto-Coupler Drive; 次级侧光耦合器驱动以地为参考光耦合器驱动器
| 型号： | LT3748 |
| 厂家： | 
Linear |
| 描述： | Secondary-Side Opto-Coupler Driver Ground-Referenced Opto-Coupler Drive |
| 文件： | 总26页 (文件大小：465K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
LT4430
Secondary-Side
Opto-Coupler Driver
FEATURES
DESCRIPTION
The LT®4430 drives the opto-coupler that crosses the gal-
vanic barrier in an isolated power supply. The IC contains
a precision-trimmed reference, a high bandwidth error
amplifier, an inverting gain of 6 stage to drive the opto-
coupler and unique overshoot control circuitry.
n
600mV Reference (1.25% Over Temperature)
n
Wide Input Supply Range: 3V to 20V
n
Overshoot Control Function Prevents Output
Overshoot on Start-Up and Short-Circuit Recovery
n
High Bandwidth Error Amplifier Permits Simple Loop
Frequency Compensation
Ground-Referenced Opto-Coupler Drive
The LT4430’s 600mV reference provides ±0.ꢀ75 initial
accuracy and ±±.ꢁ75 tolerance over temperature. A high
bandwidth9MHzerroramplifierpermitssimplefrequency
compensation and negligible phase shift at typical loop
crossover frequencies. The opto-coupler driver provides
±0mA of output current and is short-circuit protected.
A unique overshoot control function prevents output
overshoot on start-up and short-circuit recovery with a
single capacitor.
n
n
±0mA Opto-Coupler Drive with Current Limiting
Low Profile (±mm) ThinSOTTM Package
n
APPLICATIONS
n
48V Input Isolated DC/DC Converters
n
Isolated Telecommunication Power Systems
n
Distributed Power Step-Down Converters
n
Offline Isolated Power Supplies
The LT4430 is available in the low profile 6-lead TSOT-ꢁ3
package.
L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear
Technology Corporation. ThinSOT is a trademark of Linear Technology Corporation. All other
trademarks are the property of their respective owners.
n
Industrial Control Systems
n
Automotive and Heavy Equipment
TYPICAL APPLICATION
Simplified Isolated Synchronous Forward Converter
ISOLATION
BARRIER
Isolated Flyback Telecom Converter
Start-Up with Overshoot Control
(See Schematic on Back Page)
V
V
OUT
IN
•
•
+
+
V
IN
70V/DIV
FG
CG
V
LT1952
SYNC
LTC3900
CC
•
•
V
OUT
7V/DIV
V
OVERSHOOT CONTROL
IMPLEMENTED
CC
V
OPTO
COMP
FB
IN
LT4430
GND
OC
4430 TA0±b
t = 7ms/DIV
4430 TA01
4430fb
1
LT4430
ABSOLUTE MAXIMUM RATINGS
PIN CONFIGURATION
(Note 1)
TOP VIEW
Supply Voltage
V
±
6 OPTO
7 COMP
4 FB
V ........................................................................ꢁ0V
IN
IN
GND ꢁ
OC 3
FB Voltage.................................................... –0.3V to 6V
OPTO Short-Circuit Duration............................ Indefinite
Operating Junction Temperature Range (Note ꢁ)
S6 PACKAGE
6-LEAD PLASTIC TSOT-ꢁ3
E-, I-Grades ....................................... –40°C to ±ꢁ7°C
H-Grade ............................................. –40°C to ±70°C
MP-Grade .......................................... –77°C to ±70°C
Storage Temperature Range .................. –67°C to ±70°C
Lead Temperature (Soldering, ±0 sec)...................300°C
T
= ±ꢁ7°C, θ = ꢁ70°C/W
JA
JMAX
ORDER INFORMATION
LEAD FREE FINISH
LT4430ES6#PBF
LT4430IS6#PBF
LT4430HS6#PBF
LT4430MPS6#PBF
LEAD BASED FINISH
LT4430ES6
TAPE AND REEL
LT4430ES6#TRPBF
LT4430IS6#TRPBF
LT4430HS6#TRPBF
LT4430MPS6#TRPBF
TAPE AND REEL
LT4430ES6#TR
PART MARKING*
LTBFY
PACKAGE DESCRIPTION
6-Lead Plastic TSOT-ꢁ3
6-Lead Plastic TSOT-ꢁ3
6-Lead Plastic TSOT-ꢁ3
6-Lead Plastic TSOT-ꢁ3
PACKAGE DESCRIPTION
6-Lead Plastic TSOT-ꢁ3
6-Lead Plastic TSOT-ꢁ3
6-Lead Plastic TSOT-ꢁ3
6-Lead Plastic TSOT-ꢁ3
TEMPERATURE RANGE
–40°C to ±ꢁ7°C
–40°C to ±ꢁ7°C
–40°C to ±70°C
–77°C to ±70°C
TEMPERATURE RANGE
–40°C to ±ꢁ7°C
–40°C to ±ꢁ7°C
–40°C to ±70°C
–77°C to ±70°C
LTBFY
LTBFY
LTBFY
PART MARKING*
LTBFY
LT4430IS6
LT4430IS6#TR
LTBFY
LT4430HS6
LT4430HS6#TR
LTBFY
LT4430MPS6
LT4430MPS6#TR
LTBFY
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
ELECTRICAL CHARACTERISTICS The ● denotes the specifications which apply over the full operating
junction temperature range, otherwise specifications are at TA = 25°C. VIN = 5V, FB = VFB, COMP = 1V, unless otherwise noted (Note 3).
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
●
●
V
Input Voltage Range
Supply Current
3
20
V
IN
I
IN
3V ≤ V ≤ 20V (E-, I-Grades)
1.9
1.9
3.9
4.3
mA
mA
IN
3V ≤ V ≤ 20V (H-, MP-Grades)
IN
●
●
●
V
V
Undervoltage Lockout Threshold
Feedback Reference Voltage
OC Held Low for V < V
(E-, I-Grades)
(H-Grade)
(MP-Grade)
1.95
1.9
2.2
2.2
2.2
2.5
2.5
V
V
V
UVLO
FB
IN
UVLO
UVLO
UVLO
OC Held Low for V < V
IN
OC Held Low for V < V
1.9
2.55
IN
0.5955
0.5925
0.6
0.6
0.6045
0.6075
V
V
●
3V ≤ V ≤ 20V
IN
V
Line Regulation
3V ≤ V ≤ 20V
0.02
–75
0.1
%
FB
IN
I
FB Input Bias Current
FB = V
–150
nA
FB
FB
4430fb
2
LT4430
ELECTRICAL CHARACTERISTICS The ● denotes the specifications which apply over the full operating
junction temperature range, otherwise specifications are at TA = 25°C. VIN = 5V, FB = VFB, COMP = 1V, unless otherwise noted (Note 3).
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
●
●
●
I
OC
Overshoot Control Charging Current
V
OC
V
OC
V
OC
= 0V (E-, I-Grades)
= 0V (H-Grade)
= 0V (MP-Grade)
–15
–17
–17
–8.5
–8.5
–8.5
–5
–5
–4
μA
μA
μA
OC Clamp Voltage
0.93
48
V
OC Amplifier Offset Voltage
Error Amplifier Open-Loop DC Gain
FB = 0.3V
mV
●
●
A
VOL
V
COMP
V
COMP
= 0.8V to 1V (E-, I-Grades)
= 0.8V to 1V (H-, MP-Grades)
60
55
80
80
dB
dB
Error Amplifier Unity-Gain Bandwidth
Error Amplifier Output Swing Low
Error Amplifier Output Swing High
No Load (Note 4)
FB = 1V
9
MHz
V
●
0.1
0.35
0.55
●
●
●
FB = 0V (E-, I-Grades)
FB = 0V (H-Grade)
FB = 0V (MP-Grade)
1.2
1.2
1.15
1.33
1.33
1.33
1.5
1.55
1.55
V
V
V
●
●
●
Error Amplifier Output Source Current
FB = 0V, COMP = 1V (E-, I-Grades)
FB = 0V, COMP = 1V (H-Grade)
FB = 0V, COMP = 1V (MP-Grade)
–800
–825
–825
–450
–450
–450
–225
–225
–200
μA
μA
μA
Error Amplifier Output Sink Current
Opto Driver Inverting DC Gain
Opto Driver –3dB Bandwidth
Opto Driver Output Swing Low
FB = 1V, COMP = 1V
25
–6
mA
V/V
kHz
–6.4
–5.6
No Load (Note 4)
600
●
●
FB = 0V, COMP = Open (E-, I-Grades)
FB = 0V, COMP = Open (H-, MP-Grades)
0.5
0.5
0.85
0.9
V
V
●
●
Opto Driver Output Swing High
V
OPTO
= 3V, FB = 1V, COMP = Open,
V
– 1.25
V
V
– 1.05
V
IN
IN
IN
I
= 10mA (E-, I-, H-Grades)
V
OPTO
= 3V, FB = 1V, COMP = Open,
= 10mA (MP-Grade)
V
– 1.3
– 1.05
5.6
V
IN
IN
IN
I
●
Opto Driver Output Swing High
V
OPTO
= 20V, FB = 1V, COMP = Open,
= 10mA
4.2
7.5
V
IN
I
●
●
I
SC
Opto Driver Output
Short-Circuit Current (Sourcing)
FB = 1V, COMP = Open, OPTO = 0V
(E-, I-, H-Grades)
FB = 1V, COMP = Open, OPTO = 0V
(MP-Grade)
10.5
9.5
22
22
45
45
mA
mA
●
●
Opto Driver Output Sink Current
FB = 0V, OPTO = 1.5V (E-, I-, H-Grades)
FB = 0V, OPTO = 1.5V (MP-Grade)
150
135
350
350
650
650
μA
μA
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
–77°C to ±70°C operating junction temperature range. High junction
temperatures degrade operating lifetimes; operating lifetime is derated
for junction temperatures greater than ±ꢁ7°C. Note that the maximum
ambient temperature consistent with these specifications is determined by
specific operating conditions in conjunction with board layout, the rated
package thermal impedance and other environmental factors.
Note 2: The LT4430 is tested under pulsed load conditions such that T ≈ T .
J
A
The LT4430E is guaranteed to meet specifications from 0°C to ±ꢁ7°C
junction temperature. Specifications over the –40°C to ±ꢁ7°C operating
junction temperature range are assured by design, characterization and
correlation with statistical process controls. The LT4430I is guaranteed
over the –40°C to ±ꢁ7°C operating junction temperature range, the
LT4430H is guaranteed over the –40°C to ±70°C operating junction
temperature range and the LT4430MP is tested and guaranteed over the
Note 3: All currents into device pins are positive. All currents out of device
pins are negative. All voltages are referenced to GND unless otherwise
specified.
Note 4: This parameter is guaranteed by correlation and is not tested.
4430fb
3
LT4430
TYPICAL PERFORMANCE CHARACTERISTICS
Undervoltage Lockout Threshold
vs Temperature
Feedback Reference Voltage
vs Temperature
Quiescent Current vs Temperature
4.0
3.7
3.0
ꢁ.7
ꢁ.0
±.7
±.0
0.606
0.607
0.604
0.603
0.60ꢁ
0.60±
0.600
0.799
0.798
0.79ꢀ
0.796
0.797
0.794
3.0
ꢁ.7
ꢁ.0
±.7
±.0
V
= ꢁ0V
IN
V
= 3V
IN
ꢀ7 ±00
ꢀ7 ±00
TEMPERATURE (°C)
–ꢀ7 –70 –ꢁ7
0
ꢁ7 70
TEMPERATURE (°C)
±ꢁ7 ±70
ꢀ7 ±00
TEMPERATURE (°C)
–ꢀ7 –70 –ꢁ7
0
ꢁ7 70
±ꢁ7 ±70
–ꢀ7 –70 –ꢁ7
0
ꢁ7 70
±ꢁ7 ±70
4430 G0±
4430 G03
4430 G0ꢁ
FB Input Bias Current
vs Temperature
OC Charging Current
vs Input Voltage
FB Voltage Line Regulation
±7
±3
±±
9
0.60±0
0.6007
0.6000
0.7997
0.7990
70
ꢁ7
T
= ꢁ7°C
A
0
–ꢁ7
–70
–ꢀ7
–±00
–±ꢁ7
–±70
–±ꢀ7
–ꢁ00
ꢀ
7
±0 ±ꢁ
(V)
±6
±8 ꢁ0
0
ꢁ
4
6
8
±4
0
7
±0
(V)
±7
ꢁ0
ꢀ7 ±00
–ꢀ7 –70 –ꢁ7
0
ꢁ7 70
±ꢁ7 ±70
V
V
TEMPERATURE (°C)
IN
IN
4430 G04
4430 G06
4430 G07
OC Charging Current
vs Temperature
OC Clamp Voltage
vs Temperature
OC Amplifier Offset Voltage
vs Temperature
±7
±3
±±
9
±.7
±.3
±.±
0.9
0.ꢀ
0.7
±00
90
80
ꢀ0
60
70
40
30
ꢁ0
±0
0
V
= 7V
IN
ꢀ
7
ꢀ7 ±00
ꢀ7 ±00
±ꢁ7 ±70
–ꢀ7 –70 –ꢁ7
0
ꢁ7 70
±ꢁ7 ±70
–ꢀ7 –70 –ꢁ7
0
ꢁ7 70
ꢀ7 ±00
–ꢀ7 –70 –ꢁ7
0
ꢁ7 70
±ꢁ7 ±70
TEMPERATURE (°C)
TEMPERATURE (°C)
TEMPERATURE (°C)
4430 G0ꢀ
4430 G08
4430 G09
4430fb
4
LT4430
TYPICAL PERFORMANCE CHARACTERISTICS
Error Amplifier Open Loop Gain
and Phase vs Frequency
Error Amplifier Output Swing Low
vs Temperature
Error Amplifier Output Swing High
vs Temperature
80
ꢀ0
60
70
40
30
ꢁ0
±0
0
±80
±37
90
0.7
0.4
0.3
0.ꢁ
0.±
0
±.7
±.4
±.3
±.ꢁ
±.±
±.0
PHASE
GAIN
47
0
–±0
–ꢁ0
–47
±M
±00k
FREQUENCY (Hz)
ꢀ7 ±00
ꢀ7 ±00
±ꢁ7 ±70
±k
±0k
±0M 70M
–ꢀ7 –70 –ꢁ7
0
ꢁ7 70
±ꢁ7 ±70
–ꢀ7 –70 –ꢁ7
0
ꢁ7 70
TEMPERATURE (°C)
TEMPERATURE (°C)
4430 G±ꢁ
4430 G±0
4430 G±±
Error Amplifier Output Sink
Current vs Temperature
Error Amplifier Output Source
Current vs Temperature
±000
900
800
ꢀ00
600
700
400
300
ꢁ00
±00
0
50
40
30
20
10
0
ꢀ7 ±00
–ꢀ7 –70 –ꢁ7
0
ꢁ7 70
±ꢁ7 ±70
75 100
125 150
–75 –50 –25
0
25 50
TEMPERATURE (°C)
TEMPERATURE (°C)
4430 G14
4430 G±3
Opto Driver Inverting DC Gain
vs Temperature
Opto Driver Inverting Closed Loop
Gain and Phase vs Frequency
40
37
30
ꢁ7
ꢁ0
±7
±0
7
±80
±37
90
6.4
6.3
6.ꢁ
6.±
6.0
7.9
7.8
7.ꢀ
7.6
PHASE
GAIN
47
0
0
–7
–±0
–47
±M
±k
±0k
±00k
FREQUENCY (Hz)
±0M
ꢀ7 ±00
TEMPERATURE (°C)
–ꢀ7 –70 –ꢁ7
0
ꢁ7 70
±ꢁ7 ±70
4430 G±6
4430 G±7
4430fb
5
LT4430
TYPICAL PERFORMANCE CHARACTERISTICS
Opto Driver Output Swing Low
vs Temperature
Opto Driver Output Swing High
vs Temperature
Opto Driver Output Swing High
vs Temperature
±.0
0.9
0.8
0.ꢀ
0.6
0.7
0.4
0.3
0.ꢁ
0.±
0
±.7
±.4
±.3
±.ꢁ
±.±
±.0
0.9
0.8
0.ꢀ
0.6
0.7
8.0
ꢀ.7
ꢀ.0
6.7
6.0
7.7
7.0
4.7
4.0
V
I
= 3V
OPTO
V
I
= ꢁ0V
IN
OPTO
IN
= ±0mA
= ±0mA
ꢀ7 ±00
ꢀ7 ±00
ꢀ7 ±00
±ꢁ7 ±70
–ꢀ7 –70 –ꢁ7
0
ꢁ7 70
±ꢁ7 ±70
–ꢀ7 –70 –ꢁ7
0
ꢁ7 70
±ꢁ7 ±70
–ꢀ7 –70 –ꢁ7
0
ꢁ7 70
TEMPERATURE (°C)
TEMPERATURE (°C)
TEMPERATURE (°C)
4430 G±8
4430 G±ꢀ
4430 G±9
Opto Driver Output Sink Current
vs Temperature
Opto Driver Output Short-Circuit
Current (Sourcing) vs Temperature
40
30
ꢁ0
±0
0
±000
900
800
ꢀ00
600
700
400
300
ꢁ00
±00
0
ꢀ7 ±00
–ꢀ7 –70 –ꢁ7
0
ꢁ7 70
±ꢁ7 ±70
ꢀ7 ±00
–ꢀ7 –70 –ꢁ7
0
ꢁ7 70
±ꢁ7 ±70
TEMPERATURE (°C)
TEMPERATURE (°C)
4430 Gꢁ±
4430 Gꢁ0
4430fb
6
LT4430
PIN FUNCTIONS
V
(Pin 1): This is the input supply that powers all in-
FB (Pin 4): This is the inverting input of the error ampli-
fier. The noninverting input is tied to the internal 0.6V
reference. Input bias current for this pin is typically ꢀ7nA
flowing out of the pin. This pin normally ties to a resistor
divider network to set output voltage. Tie the top of the
external resistor divider directly to the output voltage for
best regulation performance.
IN
ternal circuitry. The input supply range is 3V minimum
to ꢁ0V maximum and the typical input quiescent current
is ±.9mA. Connect a ±μF bypass capacitor directly from
V to GND.
IN
GND (Pin 2): Analog Ground Pin. It is also the negative
senseterminalfortheinternal0.6Vreference. Connectthe
externalfeedbackdividernetworkthatterminatestoground
directly to this pin for best regulation and performance.
COMP (Pin 5): This is the output of the error amplifier. The
error amplifier is a true voltage-mode error amplifier and
frequencycompensationisperformedaroundtheamplifier.
Typical LT4430 compensation schemes use series R-C in
parallel with C networks from the COMP pin to the FB pin.
COMP also ties to the overshoot control amplifier logic
that detects if the COMP pin is at its high clamp level. The
logic activates the overshoot control amplifier if COMP is
at its clamp level for longer than ±μs.
OC (Pin 3): Overshoot Control Pin. A typical 8.7μA current
sourceandacapacitorplacedfromthispintoGNDcontrols
output voltage overshoot on start-up and recovery from
short-circuit. The typical ramp time is (C • 0.6V)/8.7μA.
OC
If V is below V
(its undervoltage lockout threshold),
IN
UVLO
the OC pin is actively held low. The OC pin also ties to the
overshoot control amplifier output. This amplifier moni-
tors the FB pin voltage and the error amplifier output. If
FB is low due to a short-circuit fault condition, the COMP
pin goes high. Logic detects the error amplifier COMP pin
high state and activates the overshoot control amplifier.
The amplifier responds by discharging the OC capacitor
down to the FB voltage plus a built-in offset voltage of
48mV. If the short-circuit condition persists, the amplifier
maintains the voltage on OC. If the short-circuit condition
goes away, the FB pin recovers under the control of the
OC pin.
OPTO (Pin 6): This is the output of the amplifier that
drives the opto-coupler. The opto driver amplifier uses an
invertinggainofsixconfigurationtodrivetheopto-coupler
referencedtoground.Drivingtheopto-couplerreferenced
to GND accommodates low output voltages and eases
loop frequency compensation as the secondary feedback
path with a traditional “43±” topology is eliminated. The
opto driver amplifier sources a maximum of ±0mA, sinks
370μA typically and is short-circuit protected.
4430fb
7
LT4430
BLOCK DIAGRAM
V
IN
+
OPTO
DRIVER
I±
±ꢁ.7μA
R3
±7k
COMP
OUT
–
+
±.±V
0.6V
BIAS AND
REFERENCE
GENERATOR
R4
90k
ERROR
AMP
V
STARTUP
IN
Qꢁ
Q3
–
V
IN
Iꢁ
±ꢁ.7μA
Qꢀ
GND
UVLO
FB
Q±
Vꢁ
0.6V
+
V
–
IN
LOGIC
AND
DELAY
I
OC
R±
ꢁk
8.7μA
Q4
Rꢁ
ꢁk
–
DFB
OC
AMP
Q7
Q6
+
S±
V±
0.ꢁV
NORMALLY
OPEN
+
–
V
+
–
OS
48mV
OC
4430 BD0±
4430fb
8
LT4430
APPLICATIONS INFORMATION
Block Diagram Operation
preventing overshoot. A capacitor, connected from the OC
pin to GND and charged by internal 8.7μA current source
OC
A precision voltage reference, a high-bandwidth error
amplifier,aninvertingopto-couplerdriverandanovershoot
control amplifier comprise the LT4430. Referring to the
block diagram, a start-up circuit establishes all internal
currentandvoltagebiasingfortheIC.Aprecision-trimmed
bandgap generates the 600mV reference voltage and a
±.±V bias voltage for the opto-coupler driver. Room tem-
peraturereferencevoltageaccuracyisspecifiedat±0.ꢀ75
and operating temperature range tolerance is specified at
±±.ꢁ75. The 600mV reference ties to the noninverting
input of the error amplifier.
I , sets the ramp rate. On start-up, Q± actively holds the
OC capacitor low until V of the LT4430 reaches its typi-
IN
cal undervoltage lockout threshold of ꢁ.ꢁV. Q± then turns
off and the OC capacitor charges linearly. Qꢁ and Q3 OR
the OC pin voltage and the 600mV reference voltage at
the noninverting terminal of the error amplifier. The OC
pin voltage is the reference voltage for the error amplifier
until it increases above 600mV. If the feedback loop is in
control, the FB pin voltage follows and regulates to the OC
pin voltage. As the OC pin voltage increases past 600mV,
the reference voltage takes control of the error amplifier
and the FB pin regulates to 600mV. The OC pin voltage
increases until it is internally clamped by Rꢁ, Q6 and V±.
The OC pin’s typical clamp voltage of 0.93V ensures that
Q3 turns off. All of I±’s current flows in Qꢁ, matching Iꢁ’s
current in Q4.
The LT4430 error amplifier senses the output voltage
through an external resistor divider and regulates the
FB pin to 600mV. The FB pin ties to the inverting input
of the error amplifier. The error amplifier’s open loop DC
gain is 80dB and its unity-gain crossover frequency of
9MHz provides negligible phase shift at typical feedback
loop crossover frequencies. The error amplifier is a true
voltage-modeamplifierandfrequencycompensationcon-
nects around the amplifier. Typical LT4430 compensation
schemes use series R-C in parallel with C networks from
the COMP pin to the FB pin.
Inashort-circuitcondition,theoutputvoltagedecreasesto
something well below the regulated level. The error ampli-
fier reacts by increasing the COMP pin voltage, thereby
decreasing the drive to the opto-coupler. The decreased
opto-coupler bias signals the primary-side controller to
increase the amount of power it delivers in an attempt to
raise the output voltage back to its regulated value. As
long as the fault persists, the output voltage remains low.
The error amplifier’s COMP pin voltage increases until it
reaches a clamp level set by Qꢀ and Vꢁ. Qꢀ’s resultant
collector current drives internal logic that closes normally
openswitchS±.Thisactionactivatestheovershootcontrol
amplifier which employs a unity-gain follower configura-
tion. The overshoot control amplifier monitors the FB pin
voltage and, on S±’s closing, pulls the OC pin voltage
down to the FB pin voltage plus a built-in offset voltage
of typically 48mV. The built-in offset voltage serves two
purposes. First, the offset voltage prevents the overshoot
control amplifier from interfering with normal transient
operating conditions. Second, the offset voltage biases
the feedback loop so that if the short-circuit condition
ends, the feedback loop immediately starts to increase
the output voltage to its regulated value.
The opto-coupler driver amplifies the voltage difference
between the COMP pin and the ±.±V bias potential applied
toitsnoninvertingterminalwithaninvertinggainof6.This
signal drives the opto-coupler referenced to GND. Driving
the opto-coupler referenced to GND accommodates low
output voltages and simplifies loop frequency compen-
sation as the secondary feedback path with a traditional
“43±” topology is eliminated. A resistor in series with the
opto-coupler sets the opto-coupler’s DC bias current. The
opto driver amplifier sources a guaranteed maximum of
±0mA,sinks370μAtypicallyandisshort-circuitprotected.
Theopto-couplerdriveramplifier’stypical–3dBbandwidth
is 600kHz. The opto-coupler’s output crosses the galvanic
isolation barrier and closes the feedback loop to the pri-
mary-side controller.
The LT4430 incorporates a unique overshoot control
function that allows the user to ramp the output voltage
on start-up and recovery from short-circuit conditions,
4430fb
9
LT4430
APPLICATIONS INFORMATION
If the fault condition ceases, the output voltage increases.
In response, the error amplifier COMP pin’s voltage
decreases. This action opens switch S±, deactivates the
overshootcontrolamplifierandallowstheOCpincapacitor
to charge. The FB pin voltage increases quickly until the
FB pin voltage exceeds the OC pin voltage. The feedback
loop increases the drive to the opto-coupler until the FB
pin follows and regulates to the OC pin voltage. Again, as
the OC pin voltage increases past 600mV, the reference
voltage takes control of the error amplifier and the FB pin
regulates to 600mV.
Figures ±a to ±e illustrate bias supply circuits for the
flyback converter. Figure ±a shows the typical flyback
output connection. Figures ±b and ±c exhibit equivalent
circuit performance but rotate the rectifier connection to
theground-referredside.Thisconnectionpermitstheuser
to take advantage of the transformer secondary’s forward
behavior when the primary-side switch is on.
Figures ±d to ±e illustrate the bias generator circuit.
V • N volts appear across the secondary winding when
IN
the primary-side switch is on. Dꢁ forward biases and C±
charges. During this time, the secondary-voltage is in
series with V
and C± ultimately charges to (V • N +
IN
OUT
Generating a V Bias Supply
IN
V
– V ). V is the forward voltage of Dꢁ. When V
OUT
F F OUT
Biasing an LT4430 is crucial to proper operation. If the
overshoot control (OC) function is not being used and the
output voltage is greater than 3.3V, the IC may be biased
is zero at start-up, V • N volts exists to charge C±. C± is
IN
generally much smaller in value than C
and the bias
OUT
supply starts up ahead of V . R± in Figures ±d and
OUT
from V . In these cases, it is the user’s responsibility to
±e limits peak charging currents, lowering Dꢁ’s current
rating. R± also filters C± from peak-charging to the volt-
age spikes induced by the secondary winding’s leakage
inductance. Between ±Ω to ±0Ω is generally sufficient. R±
is usually necessary if C± is a low ESR ceramic capacitor
or if the transformer has high leakage inductance. It may
be possible to eliminate R± if C± is a low cost, high ESR,
surface-mount tantalum.
OUT
verify large-signal start-up and fault recovery behavior.
If the overshoot control function is being used or the
output voltage is below the LT4430’s minimum operat-
ing voltage of 3V, employing an alternate bias method is
necessary. The LT4430’s undervoltage lockout (UVLO)
circuitry, controlled by V , resets and holds the OC pin
IN
capacitor low for V less than ꢁ.ꢁV. When V increases
IN
IN
above ꢁ.ꢁV, the circuit releases the OC pin capacitor. The
LT4430’s supply voltage must come up faster than the
output voltage to assert loop control and limit output volt-
age overshoot. In most cases, a few simple components
accomplish this task. Adding a few biasing components
to control overshoot is advantageous. Let’s examine bias
circuits for different topologies.
V variationchangesthebiassupplyinFigure±d.Depend-
IN
ing on V , the transformer turns ratio N and V range,
OUT
IN
the bias supply may exceed the LT4430’s ꢁ0V V absolute
IN
maximum rating. If this occurs, two solutions exist. One
is to tap the secondary-side inductor to create a lower
voltage from which to rectify as illustrated in Figure ꢁa.
The bias voltage decreases to (V • N±/N + V
– V ).
IN
OUT
F
Thissolutionreliesonsecondary-sidepinsbeingavailable
for the tap point.
4430fb
10
LT4430
APPLICATIONS INFORMATION
T±
T±
D±
V
V
OUT
V
V
IN
OUT
IN
•
•
C
C
OUT
OUT
D±
•
•
±:N
±:N
4430 F0±a
4430 F0±b
Figure 1b. Equivalent Flyback Converter Connection
Figure 1a. Typical Flyback Converter Connection
T±
Tx±
V
V
OUT
V
IN
V
OUT
IN
•
•
C
C
OUT
OUT
D±
Dꢁ
Q±
•
•
±:N
±:N
R±*
LT4430
SYNC
4430 F0±c
V
BIAS
C±
*OPTIONAL SEE TEXT
4430 F0±d
Figure 1c. Synchronous Flyback Converter Connection
Figure 1d. Flyback Converter with Bias Generator
T±
V
V
IN
•
OUT
C
OUT
Q±
Dꢁ
•
±:N
SYNC
R±*
LT4430
V
BIAS
C±
*OPTIONAL SEE TEXT
4430 F0±e
Figure 1e. Synchronous Flyback with Bias Generator
4430fb
11
LT4430
APPLICATIONS INFORMATION
The second solution is to make a preregulator as shown
MOSFETs turn on and turnoff. The gate driver circuitry
requires supply current in the range of ±0mA to ±00mA
depending on the gate driver supply voltage, MOSFET size
and switching frequency. The preregulator bias supply is
ideal for powering both the LT4430 and the gate driver
circuitry, especially since the gate drivers typically use a
supply voltage between 7V to ±ꢁV. The preregulator circuit
finds wide use in fully synchronous forward converters,
push-pull converters and full-bridge converters.
in Figure ꢁb. In this example, the bias supply equals (V
Z±
– V ). Select Rꢁ to bias Zener diode Z± and to supply
BE
base current to QBS. Resistor R3 (on the order of a few
hundred ohms), in series with Q7’s base, suppresses
possible high frequency oscillations depending on QBS’s
selection. The preregulator circuit has additional value for
fullysynchronousconverters. Fullysynchronousconvert-
ers require gate drivers to control the secondary-side
T±
V
OUT
N±
V
IN
•
•
•
C
OUT
Nꢁ
D±
Dꢁ
±:N
N = N± + Nꢁ
R±*
LT4430
BIAS
V
C±
*OPTIONAL SEE TEXT
4430 F0ꢁa
Figure 2a. Flyback Converter with Tapped Secondary Bias
T±
V
OUT
V
IN
•
C
OUT
D±
Dꢁ
•
±:N
R±*
Rꢁ
R3*
QBS
C±
LT4430
V
BIAS
Cꢁ
Z±
*OPTIONAL SEE TEXT
4430 F0ꢁb
Figure 2b. Flyback Converter with Preregulator Bias
4430fb
12
LT4430
APPLICATIONS INFORMATION
Generateabiassupplyforaforwardconverterusingsimilar
techniques to that of the flyback converter. Figure 3a to 3c
detail the three common bias circuits for the synchronous
single-switch forward converter. In the flyback converter
V
. However, in the forward converter, L±’s presence
OUT
decouples the bias supply from V . In Figure 3a, the
OUT
bias supply equals (V • N – V ). In Figure 3b, the bias
IN
F
supply equals (V • N±/N – V ). In Figure 3c, the bias
IN
F
of Figure ±d, the bias supply is proportional to V and
supply equals (V – V ).
IN
Z±
F
D±
R±*
L±
LT4430
V
BIAS
C±
T±
V
OUT
V
IN
•
•
C
OUT
±:N
Q±
FG Qꢁ
CG
*OPTIONAL SEE TEXT
4430 F03a
Figure 3a. Typical Single-Switch Synchronous Forward
Converter with Bias Generator
D±
D±
R±*
R±*
LT4430
V
BIAS
C±
Rꢁ
R3*
T±
L±
QBS
C±
V
OUT
•
•
LT4430
BIAS
C
V
OUT
Nꢁ
N±
Z±
Cꢁ
V
IN
•
T±
L±
V
OUT
V
IN
•
•
C
OUT
±:N
±:N
N = N± + Nꢁ
Q±
FG Qꢁ
CG
Q±
FG Qꢁ
CG
*OPTIONAL SEE TEXT
*OPTIONAL SEE TEXT
4430 F03c
4430 F03b
Figure 3b. Single-Switch Synchronous Forward Converter
with Tapped Secondary Bias Generator
Figure 3c. Single-Switch Synchronous Forward Converter
with Preregulator Bias Generator
4430fb
13
LT4430
APPLICATIONS INFORMATION
Figures 4a to 4d demonstrate bias supply circuits for the
fully-synchronous push-pull topology. Biasing for full-
bridge schemes is identical to the push-pull circuits with
the obvious difference in the primary-side drive. In Figure
straints such as a very wide input voltage range may force
employment of other biasing circuits. Other methods of
generating the bias supply may include an additional
transformer or output inductor winding, low-cost linear
regulators, discrete or monolithic charge pumps and
buck/boostregulators.However,ifthebiassupplygetsthis
complicated, a quick chat with your local LTC applications
engineer may result in a simpler solution.
4a, the bias supply equals (V • N – V ). In Figure 4b and
IN
F
4d, the bias supply equals (ꢁ • V • N – V ). In Figure 4c
IN
F
and 4e, the bias supply equals (V – V ).
Z±
F
In general, one of the simple, low-cost biasing schemes
suffices for LT4430 applications. However, design con-
T±
D±
R±*
Qꢁ
LT4430
BIAS
•
V
C±
ME
•
L±
V
V
OUT
IN
C
OUT
•
Q±
•
±:N
*OPTIONAL SEE TEXT
4430 F04a
MF
Figure 4a. Typical Synchronous Push-Pull Converter
with Bias Generator
D±
R±*
LT4430
T±
V
BIAS
Qꢁ
C±
•
•
ME
•
•
L±
V
V
OUT
IN
C
OUT
Q±
MF
±:N
*OPTIONAL SEE TEXT
4430 F04b
Figure 4b. Typical Synchronous Push-Pull Converter
with 2x Bias Generator
4430fb
14
LT4430
APPLICATIONS INFORMATION
D±
D±
R±*
R±*
LT4430
V
BIAS
T±
Rꢁ
C±
Lꢁ
R3*
QBS
•
•
C±
Qꢁ
ME
LT4430
BIAS
V
•
•
Z±
Cꢁ
V
V
OUT
IN
C
OUT
T±
Qꢁ
•
•
L±
ME
±:N
•
•
Q±
MF
L±
*OPTIONAL SEE TEXT
V
V
OUT
IN
4430 F04d
C
OUT
Figure 4d. Typical Synchronous
Push-Pull Current-Doubler Converter
with Bias Generator
Q±
MF
±:N
*OPTIONAL SEE TEXT
4430 F04c
Figure 4c. Typical Synchronous Push-Pull
Converter with Preregulator Bias
D±
R±*
Rꢁ
R3*
QBS
C±
LT4430
BIAS
V
Z±
Cꢁ
T±
Lꢁ
•
Qꢁ
ME
•
•
V
V
OUT
IN
C
OUT
•
L±
±:N
Q±
MF
*OPTIONAL SEE TEXT
4430 F04e
Figure 4e. Typical Synchronous
Push-Pull Current-Doubler Converter
with Preregulator Bias
4430fb
15
LT4430
APPLICATIONS INFORMATION
Setting Output Voltage
circuitry resides on the primary-side. Coupling this signal
requiresanelementthatwithstandstheisolationpotentials
and still transfers the loop error signal.
Figure 7 shows how to program the power supply output
voltage with a resistor divider feedback network. Connect
the top of R± to V , the tap point of R±/Rꢁ to FB and
Opto-couplers remain in prevalent use because of their
ability to couple DC signals. Opto-couplers typically con-
sist of an input infrared light emitting diode (LED) and an
output phototransistor separated by an insulating gap.
Most opto-coupler data sheets loosely specify the gain,
or current transfer ratio (CTR), between the input diode
and the output transistor. CTR is a strong function of the
input diode current, temperature and time (aging). Ag-
ing degrades the LED’s brightness and accelerates with
higheroperatingcurrent. CTRvariationdirectlyaffectsthe
overall system loop gain and the design must account for
total variation. To make an effective optical detector, the
output transistor design maximizes the base area to col-
lect light energy. This constraint yields a transistor with a
large collector-to-base capacitance. This capacitance can
influence the circuit’s performance based on the output
transistor’s hookup.
OUT
the bottom of Rꢁ directly to GND of the LT4430. The FB
pin regulates to 600mV and has a typical input pin bias
current of ꢀ7nA flowing out of the pin.
The output voltage is set by the formula:
V
OUT
= 0.6V • (± + R±/Rꢁ) – (ꢀ7nA) • R±
V
OUT
R±
ꢀ7nA
FB
Rꢁ
4430 F07
Figure 5. Setting Output Voltage
Opto-Coupler Feedback and Frequency Compensation
An isolated power supply with good line and load regula-
tion generally employs the following strategy. Sense and
compare the output voltage with an accurate reference
potential. Amplify and feed back the error signal to the
supply’s control circuitry to correct the sensed error. Have
the error signal cross the isolation barrier if the control
The two most common topologies for the output tran-
sistor of the opto-coupler are the common-emitter and
common-collector configurations. Figure 6a illustrates
the common-emitter design with the output transistor’s
collector connected to the output of the primary-side
controller’s error amplifier.
ISOLATION
BARRIER
LT4430
V
OUT
+
–
±.±V
R4
±7k
V
CC
OPTO
PRIMARY-SIDE
ERROR AMP
OPTO
DRIVER
+
–
0.6V
FB
R±
ERROR
AMP
C±
R
R
C
K
R7
90k
V
+
REF
COMP
C
K
V
C
Rꢁ
FB
–
C
OPTO
C
C3
R3
Cꢁ
4430 F06a
Figure 6a. Frequency Compensation with Opto-Coupler Common-Emitter Configuration
4430fb
16
LT4430
APPLICATIONS INFORMATION
In this example, the error amplifier is typically a trans-
where:
A = LT4430 open loop DC Gain
conductance amplifier with high output impedance and
R dominates the impedance at the V node. Frequency
C
C
R = Opto-coupler diode equivalent small-signal
compensationforthisfeedbackloopisdirectlyaffectedby
the output transistor’s collector-to-base capacitance as it
introduces a pole into the feedback loop. This pole varies
considerably with the transistor’s operating conditions. In
manycases,thispolelimitstheachievableloopbandwidth.
Cascoding the output transistor significantly reduces the
effects of this capacitance and increases achievable loop
bandwidth. However, not all designs have the voltage
headroom required for the cascode connection or can
tolerate the additional circuit complexity. The open loop
transfer function from the output voltage to the primary-
side error amplifier’s output is:
D
resistance
CTR = Opto-coupler AC current transfer ratio
C
= Opto-coupler nonlinear collector-to-base
CB
capacitor
C
= Opto-coupler nonlinear base-to-emitter
BE
capacitor
r = Opto-coupler small-signal base-to-emitter
π
resistor
Figure 6a and its transfer function illustrate most of the
possible poles and zeroes that can be set and are shown
forthesakeofcompleteness.Inapracticalapplication,the
transfer function simplifies considerably because not all
thepolesandzeroesareused.Also,differentcombinations
of poles and zeroes can result in the same small signal
gain-phase characteristics but demonstrate dramatically
different large-signal behavior.
R2
R1+ R2
⎛
⎜
⎝
⎞
⎟
⎠
–A •
•(1+ s•R1•C1)•(1+ s•R3 •C3)
VC
VOUT
=
•
⎛
⎝
⎞
⎟
(C2•C3)
(C2 + C3)⎠
[s•A •R1•(C2 + C3)]• 1+ s•R3 •
⎜
(1+ s•RK •CK)
CTR•RC
⎞ (RK + RD)
6•
•
•
⎛
(RK •RD)
1+ s•
•CK⎟
⎜
⎝
The common-collector configuration eliminates the miller
effect of the output transistor’s collector-to-base capaci-
tance and generally increases achievable loop bandwidth.
Figure6billustratesthecommon-collectordesignwiththe
outputtransistor’semitterconnectedtotheinvertinginput
of the primary-side controller’s error amplifier.
(RK + RD)
⎠
1
•
⎛
⎞
⎡
⎤
(CTR•RC)
(RK + RD)
1+ s•r •
•CCB + CBE
π
⎜
⎟
⎠
⎢
⎣
⎥
⎦
⎝
1
1+ s•R •C
(
)
C
C
ISOLATION
BARRIER
LT4430
V
OUT
PRIMARY-SIDE
ERROR AMP
+
–
±.±V
R4
±7k
V
CC
OPTO
OPTO
DRIVER
+
–
0.6V
FB
R±
ERROR
AMP
C±
R
K
V
+
REF
R7
90k
V
C
C
K
COMP
FB
–
Rꢁ
OPTO
C3
R3
R
C
R
E
Cꢁ
C
C
4430 F06b
Figure 6b. Frequency Compensation with Opto-Coupler Common-Collector Configuration
4430fb
17
LT4430
APPLICATIONS INFORMATION
In this example, the error amplifier is typically a voltage
error amplifier configured as a transimpedance amplifier.
The opto-coupler transistor’s emitter provides feedback
This frequency compensation discussion only addresses
the transfer function from the output back to the control
node on the primary-side. Compensation of the entire
feedback loop must combine this transfer function with
the transfer function of the power processing circuitry,
commonly referred to as the modulator. In an isolated
power supply, the modulator’s transfer function depends
on topology (flyback, forward, push-pull, bridge), cur-
rent or voltage mode control, operation in discontinuous
or continuous mode, input/output voltage, transformer
turns ratio and output load current. It is beyond this data
sheet’s scope to detail the transfer functions for all of the
variouscombinations.However,thepowersupplydesigner
must fully characterize and understand the modulator’s
transfer function to successfully frequency compensate
the feedback loop for all operating conditions.
information directly to the FB pin and the resistor R from
E
FB to GND sets the DC bias condition for the opto-coupler.
The open loop transfer function from the output voltage
to the primary-side error amplifier’s output is:
R2
R1+ R2
⎛
⎜
⎝
⎞
⎟
⎠
–A •
•(1+ s•R1•C1)•(1+ s•R3 •C3)
VC
VOUT
=
•
⎛
⎝
⎞
⎟
(C2•C3)
(C2 + C3)⎠
[s•A •R1•(C2 + C3)]• 1+ s•R3 •
⎜
(1+ s•RK •CK)
CTR•RC
⎞ (RK + RD)
6•
•
•
⎛
(RK •RD)
1+ s•
•CK⎟
⎜
⎝
(RK + RD)
⎠
1
1
•
Opto-Couplers
1+ s•r •C
1+ s•R •C
(
BE) (
)
π
C C
Opto-couplers are available in a wide variety of package
styles and performance criteria including isolation rating,
CTR,outputtransistorbreakdownvoltage,outputtransistor
current capability, and response time. Table ± lists several
manufacturers of opto-coupler devices, although this is
by no means a complete list.
Figure 6b and its transfer function illustrate most of the
possible poles and zeroes that can be set and are shown
for the sake of completeness. In a practical application,
the transfer function simplifies considerably because not
all the poles and zeroes are used.
Inbothconfigurations,thetermsR ,CTR,r ,C andC .
D
π
CB
BE
Table 1. Opto-Coupler Vendors
vary from part to part and also change with bias current.
VENDOR
PHONE
URL
For most opto-couplers, R is 70Ω at a DC bias of ±mA,
D
Agilent Technologies
800-235-0312
www.agilent.com
www.fairchildsemi.com
www.isocom.com
www.kodenshi.co.kr
www.ncsd.necel.com
www.sharpsma.com
www.toshiba.com
www.vishay.com
and ꢁ7Ω at a DC bias of ꢁmA. CTR is the small signal AC
currenttransferratio.Asanexample,theFairchildMOCꢁ0ꢀ
opto-coupler has an AC CTR around ±, even though the
DC CTR is much lower when biased at ±mA or ꢁmA. Most
Fairchild Semiconductor 207-775-8100
Isocom
214-495-0755
82-63-839-2111
81-44-435-1588
877-343-2181
949-455-2000
402-563-6866
Kodenshi Korea Corp.
NEC
opto-coupler data sheets do not specify the terms C ,
CB
Sharp Microelectronics
Toshiba
C
and r and values must be obtained from empirical
BE
π
measurements.
Vishay
4430fb
18
LT4430
APPLICATIONS INFORMATION
Setting Overshoot Control Time
outputloadcharacteristicsheavilyinfluencepowersupply
behavior as it attempts to bring the output voltage into
regulation. Frequency compensation values that provide
stable response under normal operating conditions can
allow severe output voltage overshoot to occur during
start-up and short-circuit recovery conditions. Large
overshoot often results in damage or destruction to the
load circuitry being powered, not a desirable trait.
Figure ꢀ shows how to calculate the overshoot time by
connecting a capacitor from the OC pin to GND.
The overshoot control time, t , is set by the formula:
OC
t
= (C • 0.6V)/8.7μA
OC
OC
The OC pin requires a minimum capacitor of ±00pF due to
stabilityrequirementswiththeovershootcontrolamplifier.
This yields a minimum time of ꢀμs which is generally on
the order of a few cycles of the switching regulator. Us-
ing the minimum capacitor value results in no influence
on start-up characteristics. Larger OC capacitor values
increase the overshoot control time and only increase the
amplifier stability. Do not modulate the overshoot control
time by externally increasing the OC charging current or
by externally driving the OC pin.
TheLT4430’sovershootcontrolcircuitryplusoneexternal
capacitor (C ) provide independent control of start-up
OC
and short-circuit recovery response without compro-
mising small-signal frequency compensation. Choosing
the optimum C value is a straightforward laboratory
OC
procedure. The following description and set of pictures
explain this procedure.
Before choosing a value for the OC pin capacitor, complete
the remainder of the power supply design. This process
V
IN
includesevaluatingthechosenV biasgeneratortopology
IN
I
OC
(please consult prior applications information section)
8.7μA
OC
and optimizing frequency compensation under all normal
C
OC
operating conditions. During this design phase, set C
OC
4430 F0ꢀ
to its minimum value of ±00pF. This ensures negligible
interactionfromtheovershootcontrolcircuitry.Oncethese
steps are complete, construct a test setup that monitors
start-upandshort-circuitrecoverywaveforms.Performthis
testing with the output lightly loaded. Light load, following
full slew operation, is the worst-case as the feedback loop
transitions from full to minimal power delivery.
Figure 7. Setting Overshoot Control Time
Choosing the Overshoot Control (OC) Capacitor Value
As discussed in the frequency compensation section,
the designer enjoys considerable freedom in setting the
feedback loop’s pole and zero locations for stability. Dif-
ferent pole and zero combinations can produce the same
gain-phasecharacteristics,butresultinnoticeablydifferent
large-signalresponses.Choosingfrequencycompensation
values that optimize both small-signal and large-signal
responses is difficult. Compromise values often result.
As an example, refer to the schematic on the last page
illustrating the 7V, ꢁA isolated flyback converter. All of
the following photos are taken with V = 48V and I
=
IN
LD
ꢁ0mA. Figure 8a demonstrates the power supply start-up
and short-circuit recovery behavior with no overshoot
control compensation (C = ±00pF minimum). The 7V
OC
output overshoots by several volts on both start-up and
short-circuit recovery due to the conservative nature of
the small-signal frequency compensation values.
Power supply start-up and short-circuit recovery are the
worst-case large signal conditions. Input voltage and
4430fb
19
LT4430
APPLICATIONS INFORMATION
Next, increaseC ’svalue. Eitheruseacapacitorsubstitu-
short-circuitisthereforeidenticaltostart-up.Intheflyback
example discussed, the primary-side control circuitry is
always active. Switching never stops in short-circuit. The
LT4430 error amplifier COMP pin changes from its low
clamp level to its higher regulating value during start-up
and changes from its high clamp level to its lower regulat-
ing point during short-circuit recovery. This large-signal
behavior explains the observed difference in the start-up
versus short-circuit recovery waveforms.
OC
tion box or solder each new value into the circuit. Monitor
the start-up and short-circuit recovery waveforms. Note
any changes. Figures 8b to 8e illustrate what happens as
C
OC
increases. In general, overshoot decreases as C
OC
increases.
C
OC
= 0.0±68μF in Figure 8b begins to affect loop dynam-
ics, but start-up still exhibits about ±.7V of overshoot.
Short-circuit recovery is considerably more damped. C
= 0.0ꢁꢁμF in Figure 8c damps start-up overshoot to 0.7V
andshort-circuitrecoveryremainssimilartothatofFigure
OC
A final point of discussion involves the chosen C value.
OC
LTC recommends that the designer use a value that con-
trols overshoot to the acceptable level, but is not made
overly large. The temptation arises to use the overshoot
control function as a power supply “soft-start” feature.
8b. C = 0.033μF in Figure 8d provides under ±00mV
OC
of overshoot and short-circuit recovery is slightly more
damped. C = 0.04ꢀμF in Figure 8e achieves zero over-
OC
Larger values of C , above what is required to control
OC
shoot at the expense of additional damping and delay time
overshoot, do result in smaller dV/dt rates and longer
in short-circuit recovery. In this example, C = 0.033μF
OC
start-up times. However, large values of C may stall the
OC
provides the best value for both start-up and short-circuit
recovery. Figure 8f provides an expanded scale of the
feedback loop during start-up or short-circuit recovery,
resulting in an extended period of time that the output
voltage “flatspots”. This voltage shelf may occur at an
intermediatevalueofoutputvoltage,promotinganomalous
behavior with the powered load circuitry. If this situation
waveforms. After a C value is selected, check start-up
OC
and short-circuit recovery over the V supply range and
IN
with higher output load conditions. Modify the value as
necessary.
occurs with the desired C value, solutions may require
OC
Start-upandshort-circuitrecoverywaveformsforvarious
designs will differ from the photos shown in this example.
Factors affecting these waveforms include the isolated
topology chosen, the primary-side and secondary-side
bias circuitry and input/output conditions. For instance,
in many isolated power supplies, a winding on the main
power transformer bootstraps the supply voltage for the
primary-side control circuitry. Under short-circuit condi-
tions, the primary-side control circuitry’s supply voltage
collapses, generating a restart cycle. Recovery from
circuit modifications. In particular, bias supply holdup
times are a prime point of concern as switching stops
during these output voltage flatspots. As a reminder,
the purpose of this LT4430 circuitry is to control and
prevent excessive output voltage overshoot that would
otherwise induce damage or destruction, not to control
power supply timing, sequencing, etc. It is ultimately the
user’s responsibility to define the acceptance criteria for
any waveforms generated by the power supply relative to
overall system requirements.
4430fb
20
LT4430
APPLICATIONS INFORMATION
START-UP
OUT
7V/DIV
START-UP
OUT
7V/DIV
V
V
SHORT-CIRCUIT
RECOVERY
SHORT-CIRCUIT
RECOVERY
V
OUT
7V/DIV
V
OUT
7V/DIV
4430 F08a
4430 F08b
t = 7ms/DIV
t = 7ms/DIV
= 0.0±68μF = 0.0±μF + 6.8nF
C
= ±00pF
C
OC
OC
Figure 8a. Start-Up and Short-Circuit Recovery Waveforms
Figure 8b. Start-Up and Short-Circuit Recovery Waveforms
START-UP
OUT
7V/DIV
START-UP
OUT
7V/DIV
V
V
SHORT-CIRCUIT
RECOVERY
SHORT-CIRCUIT
RECOVERY
V
V
OUT
7V/DIV
OUT
7V/DIV
4430 F08c
4430 F08d
t = 7ms/DIV
t = 7ms/DIV
C
OC
= 0.0ꢁꢁμF
C
= 0.033μF
OC
Figure 8c. Start-Up and Short-Circuit Recovery Waveforms
Figure 8d. Start-Up and Short-Circuit Recovery Waveforms
START-UP
OUT
7V/DIV
START-UP
OUT
7V/DIV
V
V
SHORT-CIRCUIT
RECOVERY
SHORT-CIRCUIT
RECOVERY
V
OUT
7V/DIV
V
OUT
7V/DIV
4430 F08e
4430 F08f
t = 7ms/DIV
t = 7ms/DIV
C
OC
= 0.04ꢀμF
C
OC
= 0.033μF
Figure 8e. Start-Up and Short-Circuit Recovery Waveforms
Figure 8f. Zoom In of Waveforms with Selected COC = 0.033μF
4430fb
21
LT4430
TYPICAL APPLICATIONS
4430fb
22
LT4430
TYPICAL APPLICATIONS
•
•
•
•
•
•
•
•
E F F I C I E N C Y ( 5 )
4430fb
23
LT4430
PACKAGE DESCRIPTION
S6 Package
6-Lead Plastic TSOT-23
(Reference LTC DWG # 07-08-±636)
2.90 BSC
(NOTE 4)
0.62
MAX
0.95
REF
1.22 REF
1.4 MIN
1.50 – 1.75
2.80 BSC
3.85 MAX 2.62 REF
(NOTE 4)
PIN ONE ID
RECOMMENDED SOLDER PAD LAYOUT
PER IPC CALCULATOR
0.30 – 0.45
6 PLCS (NOTE 3)
0.95 BSC
0.80 – 0.90
0.20 BSC
DATUM ‘A’
0.01 – 0.10
1.00 MAX
0.30 – 0.50 REF
1.90 BSC
0.09 – 0.20
(NOTE 3)
S6 TSOT-23 0302 REV B
NOTE:
1. DIMENSIONS ARE IN MILLIMETERS
2. DRAWING NOT TO SCALE
3. DIMENSIONS ARE INCLUSIVE OF PLATING
4. DIMENSIONS ARE EXCLUSIVE OF MOLD FLASH AND METAL BURR
5. MOLD FLASH SHALL NOT EXCEED 0.254mm
6. JEDEC PACKAGE REFERENCE IS MO-193
4430fb
24
LT4430
REVISION HISTORY (Revision history begins at Rev B)
REV
DATE
DESCRIPTION
PAGE NUMBER
B
7/±±
H-Grade and MP-Grade parts added. Reflected throughout the data sheet.
±-ꢁ6
4430fb
InformationfurnishedbyLinearTechnologyCorporationisbelievedtobeaccurateandreliable.However,
no responsibility is assumed for its use. Linear Technology Corporation makes no representation that
the interconnection of its circuits as described herein will not infringe on existing patent rights.
25
LT4430
TYPICAL APPLICATION
5V, 2A Isolated Flyback Telecom Converter Start-Up Waveforms with and without Overshoot Control Implemented
ISOLATION
BARRIER
36V TO ꢀꢁV
V
IN
R±
Rꢁ
±00k
ꢁꢁ0k
C±
±μF
±00V
Qꢁ
CTX-0ꢁ-±7ꢁ4ꢁ
MMBTA4ꢁ
T±
D±
PDZ-9.±B
9.±V
7V
ꢁA
•
8.7V
ꢁ
4
9, ±0
CO±
±00μF
6.3V
COꢁ
±00μF
6.3V
CO3
±00μF
6.3V
D4
UPS840
Dꢁ
BAS7±6
–V
IN
±±, ±ꢁ
•
Q±
FDCꢁ7±ꢁ
I
/SHDN
TH
R4
ꢁꢁ0Ω
I /RUN
TH
NGATE
D7
MBR0730
Rꢀ
±±k
±5
LTC3803
C3
±70pF
ꢁ00V
GND
FB
V
R3
4.ꢀk
CC
SENSE
Cꢁ
±μF
±0V
R
CS
0.068Ω
8.7V
Cꢀ
V
OPTO
C7
IN
R9
±k
R7
6.8k
0.±μF
D3
BAS7±6
C8
0.04ꢀμF
R±0
680Ω
±μF
LT4430
GND
OC
COMP
FB
C6
0.033μF
R8
±700Ω
±5
MOCꢁ0ꢀ
C± = TDK, XꢀR
R6
4ꢀ0k
CO±, C0ꢁ, C03 = TDK, X7R
D±, Dꢁ, D3 = PHILIPS
D4 = MICROSEMI
4430 TA0ꢁ
C4
ꢁꢁ00pF
ꢁ70V
Q± = FAIRCHILD
Qꢁ = DIODES, INC.
T± = COOPER
MOCꢁ0ꢀ = FAIRCHILD
RELATED PARTS
PART NUMBER
DESCRIPTION
Isolated Synchronous Forward Controllers
Isolated Synchronous No-Opto Forward Controller Chip Set Ideal for Medium Power 24V and 48V Input Applications
COMMENTS
LT1952/LT1952-1
LTC3725/LTC3726
Ideal for Medium Power 24V and 48V Input Applications
LTC3723-1/LTC3723-2 Synchronous Push-Pull and Full-Bridge Controllers
LTC3721-1/LTC3721-2 Non-Synchronous Push-Pull and Full-Bridge Controllers
High Efficiency with On-Chip MOSFET Drivers
Minimizes External Components, On-Chip MOSFET Drivers
Ideal for High Power 24V and 48V Input Applications
LTC3722/LTC2722-2
LTC3900
Synchronous Isolated Full Bridge Controllers
Synchronous Rectifier Driver for Forward Converters
Programmable Timeout, Synchronization Sequencer, Reverse
Inductor Current Sense
LTC3901
Synchronous Rectifier Driver for Push-Pull and Full-Bridge Programmable Timeout, Synchronization Sequencer, Reverse
Inductor Current Sense
LTC3803/LTC3803-3/
LTC3803-5
Flyback DC/DC Controller with Fixed 200kHz or 300kHz
Operating Frequency
V
and V
Limited by External Components, 6-pin ThinSoT
IN
OUT
Package
LTC3805/LTC3805-5
Adjustable Constant Frequency (70KHz to 700kHz)
Frequency Flyback DC/DC Controller
V
IN
and V
Limited by External Components, MSOP-10E and
OUT
3mm × 3mm DFN-10 Packages
LT3748
100V No Opto Flyback Controller
5V ≤ V ≤ 100V, Boundary Mode Operation, MSOP-16 with Extra
IN
High Voltage Pin Spacing
LT3758
Boost, Flyback, SEPIC and Inverting Controller
5.5V ≤ V ≤ 100V, 100kHz to 1MHz Fixed Frequency, 3mm × 3mm
IN
DFN-10 and MSOP-10E Package
4430fb
LT 0511 REV B • PRINTED IN USA
LinearTechnology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
26
●
●
© LINEAR TECHNOLOGY CORPORATION 2004
(408) 432-1900 FAX: (408) 434-0507 www.linear.com
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