LT3748EMS#TRPBF [Linear]
LT3748 - 100V Isolated Flyback Controller; Package: MSOP; Pins: 16; Temperature Range: -40°C to 85°C;
| 型号： | LT3748EMS#TRPBF |
| 厂家： | 
Linear |
| 描述： | LT3748 - 100V Isolated Flyback Controller; Package: MSOP; Pins: 16; Temperature Range: -40°C to 85°C 开关 光电二极管 |
| 文件： | 总34页 (文件大小：526K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
LT3748
100V Isolated
Flyback Controller
Features
Description
TheLT®3748isaswitchingregulatorcontrollerspecifically
designed for the isolated flyback topology and capable of
high power. It drives a low side external N-channel power
MOSFET from an internally regulated 7V supply. No third
winding or opto-isolator is required for regulation as the
part senses the isolated output voltage directly from the
primary-side flyback waveform.
n
5V to 100V Input Voltage Range
1.9A Average Gate Drive Source and Sink Current
Boundary Mode Operation
No Transformer Third Winding or Opto-Isolator
n
n
n
Required for Regulation
Primary-Side Winding Feedback Load Regulation
n
n
V
Set with Two External Resistors
CC
OUT
n
n
n
n
INTV Pin for Control of Gate Driver Voltage
The LT3748 utilizes boundary mode to provide a small
magnetic solution without compromising load regulation.
Operatingfrequencyissetbyloadcurrentandtransformer
magnetizing inductance. The gate drive of the LT3748
combined with a suitable external MOSFET allow it to
deliver load power up to several tens of watts from input
voltages as high as 100V.
Programmable Soft Start
Programmable Undervoltage Lockout
Available in MSOP Package
applications
n
Isolated Telecom Converters
High Power Automotive Supplies
Isolated Industrial Power Supplies
Military and High Temperature Applications
The LT3748 is available in a high voltage 16-lead MSOP
package with four leads removed.
L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear
Technology Corporation. All other trademarks are the property of their respective owners.
Protected by U.S. Patents, including 5438499 and 7471522.
n
n
n
typical application
25W, 12V Output, Isolated Telecom Supply
Output Load and Line Regulation
+
V
12V
2A
OUT
4:1
12.6
12.4
V
IN
36V TO 72V
10µF
412k
100µF
60.8µH
243k
3.8µH
V
IN
EN/UVLO
–
V
R
15.4k
OUT
12.2
12.0
FB
R
REF
6.04k
LT3748
11.8
11.6
11.4
TC
SS
GATE
V
V
V
= 72V
= 48V
= 36V
IN
IN
IN
SENSE
V
C
GND INTV
CC
0.033Ω
0
0.5
1.0
1.5
2.0
56.2k
10k
2nF
3748 TA01a
LOAD CURRENT (A)
4.7µF
4700pF
3748 TA01b
3748fb
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For more information www.linear.com/LT3748
LT3748
absolute MaxiMuM ratings
pin conFiguration
(Note 1)
TOP VIEW
V , R ...................................................................100V
IN FB
1
3
V
16
14
R
R
IN
FB
V to R .................................................................. 5V
IN
FB
EN/UVLO
REF
EN/UVLO......................................................–0.3V, 100V
INTV ....................................................V + 0.3V, 20V
5
6
7
8
INTV
12 TC
11
10 SS
GND
CC
CC
IN
GATE
SENSE
GND
V
C
SS, V , TC, R ..........................................................6V
C
REF
9
SENSE......................................................................0.4V
MS PACKAGE
16 (12)-LEAD PLASTIC MSOP
Operating Junction Temperature Range (Note 2)
T
= 150°C, θ = 90°C/W
JA
JMAX
LT3748E/LT3748I...............................–40°C to 125°C
LT3748H ............................................ –40°C to 150°C
LT3748MP ......................................... –55°C to 150°C
Storage Temperature Range ..................–65°C to 150°C
orDer inForMation
LEAD FREE FINISH
LT3748EMS#PBF
LT3748IMS#PBF
LT3748HMS#PBF
LT3748MPMS#PBF
TAPE AND REEL
PART MARKING*
PACKAGE DESCRIPTION
16-Lead Plastic MSOP
16-Lead Plastic MSOP
16-Lead Plastic MSOP
16-Lead Plastic MSOP
TEMPERATURE RANGE
LT3748EMS#TRPBF
LT3748IMS#TRPBF
LT3748HMS#TRPBF
LT3748MPMS#TRPBF
3748
3748
3748
3748
–40°C to 125°C
–40°C to 125°C
–40°C to 150°C
–55°C to 150°C
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
The l denotes the specifications which apply over the full operating
electrical characteristics
temperature range, otherwise specifications are at TA = 25°C. VIN = 10V, unless otherwise noted.
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
l
Input Voltage Range
Quiescent Current
5
100
V
Not Switching
EN/UVLO
1.3
0
1.75
1
mA
µA
V
= 0.2V
V
Quiescent Current, INTV Overdriven
V = 10V
INTVCC
300
450
20
µA
V
IN
CC
l
INTV Voltage Range
4.5
6.8
CC
INTV Pin Regulation Voltage
7
7.2
V
CC
INTV Dropout
(V – V
), I
= 10mA, V = 5V
0.7
V
CC
IN
INTVCC INTVCC
IN
l
l
INTV Undervoltage Lockout
Falling Threshold
3.45
1.19
3.6
3.75
1.25
V
CC
EN/UVLO Pin Threshold
EN/UVLO Pin Voltage Rising
EN/UVLO = 1V
1.223
V
EN/UVLO Pin Hysteresis Current
Soft-Start Current
1.9
2.4
5
2.9
µA
µA
V
V
= 0.4V (Note 3)
SS
Soft-Start Threshold
0.65
3
Soft-Start Reset Current
mA
3748fb
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For more information www.linear.com/LT3748
LT3748
electrical characteristics The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VIN = 10V, unless otherwise noted.
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
Maximum SENSE Current Limit Threshold V = 2.2V
95
90
100
100
105
110
mV
mV
C
l
l
Minimum SENSE Current Limit Threshold V = 0V
15
mV
C
Maximum to Minimum SENSE Threshold
Ratio
5.2
6.6
8.2
mV/mV
SENSE Overcurrent Threshold
SENSE Input Bias Current
V = 2.2V
115
10
130
15
145
20
mV
µA
C
V
= 10mV (Note 3)
SENSE
R
Voltage
V = 1.1V
1.20
1.195
1.223
1.24
V
V
REF
C
l
l
1.245
R
R
Voltage Line Regulation
Pin Bias Current
5V < V < 100V
0.005
35
0.025
500
%/V
nA
REF
REF
IN
(Note 3)
TC Current into R
R
= 20k
27.5
115
155
–45
48
µA
REF
TC
Error Amplifier Voltage Gain
V/V
µmhos
µA
Error Amplifier Transconductance
∆I = 10µA
V = 1.1V, V
V Source Current
C
= 0.5V
= 2V
C
RREF
RREF
V Sink Current
C
V = 1.1V, V
C
µA
Flyback Comparator Trip Current
Minimum GATE Off-Time
Minimum GATE On-Time
Maximum Discontinuous Off-Time
Maximum GATE Off-Time
Maximum GATE On-Time
GATE Output Rise Time
Current into R Pin, R = 6.04k
10
µA
FB
REF
700
250
24
ns
ns
V = 0V
C
µs
V
V
= 0.5V
55
µs
RREF
= 0V
55
µs
SENSE
C = 3300pF, 10% to 90%
L
16
ns
GATE Output Fall Time
C = 3300pF, 10% to 90%
L
16
ns
GATE Output Low (V
)
OL
0.05
V
GATE Output High (V
)
OH
V
– 0.05
INTVCC
V
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: The LT3748E is guaranteed to meet performance specifications
from 0°C to 125°C junction temperature. Specifications over the –40°C
to 125°C operating junction temperature range are assured by design
characterization and correlation with statistical process controls. The
LT3748I is guaranteed over the full –40°C to 125°C operating junction
temperature range. The LT3748H is guaranteed over the full –40°C to
150°C operating junction temperature range. The LT3748MP is guaranteed
over the full –55°C to 150°C operating junction temperature range. High
junction temperatures degrade operating lifetimes. Operating lifetime is
derated at junction temperatures greater than 125°C.
Note 3: Current flows out of the pin.
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For more information www.linear.com/LT3748
LT3748
T = 25°C, unless otherwise noted.
A
typical perForMance characteristics
Quiescent Current vs Temperature
Quiescent Current vs VIN Voltage
Output Regulation vs Temperature
1.6
1.4
1.2
1.0
1.7
1.6
1.5
1.4
1.3
1.2
1.1
1.0
0.9
0.8
15.6
15.4
15.2
15.0
14.8
14.6
14.4
V
= 0V
V
= 0V
CC
SS
SS
FIGURE 16 CIRCUIT
INTV = OPEN
CC
INTV = OPEN
I
= 150mA ON EACH OUTPUT
= 12V
OUT
IN
V
V
IN
= 72V
V
= 36V
= 6V
IN
0.8
0.6
V
IN
= 12V
V
IN
0.4
0.2
0
20
40
80
50 75
0
100
–55 –25
0
25
100 125 150
60
(V)
75 100
–55 –25
0
25 50
125 150
TEMPERATURE (°C)
V
TEMPERATURE (°C)
IN
3748 G03
3748 G02
3748 G01
INTVCC Undervoltage Lockout
vs Temperature
INTVCC Voltage vs Temperature
INTVCC Voltage vs VIN Voltage
7.5
7.0
7.5
7.4
7.3
7.2
7.1
7.0
6.9
6.8
6.7
6.6
6.5
4.0
3.9
I
= 0mA
INTVCC
I
= 10mA
INTVCC
6.5
3.8
I
= 0mA
I
INTVCC
6.0
5.5
5.0
4.5
RISING THRESHOLD
FALLING THRESHOLD
3.7
3.6
3.5
3.4
= 10mA
INTVCC
4.0
3.3
8
10 20 40
100
4
6
60 80
–25
0
150
–55
25 50 75 100 125
TEMPERATURE (°C)
–55
50
100 125
150
–25
0
25
75
V
IN
VOLTAGE (V)
TEMPERATURE (°C)
3748 G05
3748 G06
3748 G04
INTVCC Regulator Dropout
vs INTVCC Current
Soft-Start Current vs Temperature
INTVCC Dropout vs Temperature
3.0
2.5
6
5
4
3
2
1
0
3.0
2.5
2.0
1.5
1.0
0.5
0
V
IN
= 5V
V
IN
= 5V
2.0
1.5
I
= 20mA
INTVCC
I
= 10mA
INTVCC
1.0
0.5
0
150°C
100°C
25°C
I
= 5mA
INTVCC
–50°C
0
10
20
30
40
75 100
125 150
–55 –25
0
25 50
75 100
–55 –25
0
25 50
125 150
TEMPERATURE (°C)
INTV CURRENT (mA)
TEMPERATURE (°C)
CC
3748 G07
3748 G09
3748 G08
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For more information www.linear.com/LT3748
LT3748
TA = 25°C, unless otherwise noted.
typical perForMance characteristics
EN/UVLO Threshold
vs Temperature
EN/UVLO Current vs Temperature
TC Pin Voltage vs Temperature
1.40
1.35
1.30
1.25
1.20
1.15
1.10
1.05
1.00
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
3.0
2.5
2.0
1.5
1.0
0.5
0
V
= 1.1V
EN/UVLO
V
= 0.9V
EN/UVLO
V
= 1.3V
EN/UVLO
50 75
TEMPERATURE (°C)
50 75
75 100
–55 –25
0
25
100 125 150
–55 –25
0
25
100 125 150
–55 –25
0
25 50
TEMPERATURE (°C)
125 150
TEMPERATURE (°C)
3748 G11
3748 G12
3748 G10
Error Amplifier Transconductance
vs Temperature
SENSE Pin Threshold
vs Temperature
Error Amplifier Output Current
vs RREF Pin Voltage
60
50
200
190
180
170
160
150
140
130
120
110
100
160
140
120
100
80
OVERCURRENT
40
30
V
C
= 2.2V
20
10
0
–10
–20
–30
–40
–50
–60
60
40
150°C
100°C
25°C
V
C
= 0.2V
20
V
V
= 100V
= 6V
IN
IN
–50°C
0
0
0.5
1.0
V
1.5
(V)
2.0
2.5
50 75
–55 –25
0
25
100 125 150
–55
50
100 125
150
–25
0
25
75
TEMPERATURE (°C)
TEMPERATURE (°C)
REF
3748 G14
3748 G15
3748 G13
Maximum Discontinuous Off-Time
vs Temperature
GATE Rise and Fall Time
vs INTVCC Voltage
GATE Rise and Fall Time vs Charge
2.0
30
29
28
27
26
25
24
23
22
21
20
25
20
15
10
5
C
r
= 3.3nF
GATE
f
t , t 10% TO 90%
1.5
1.0
0.5
0
AVERAGE
CURRENT
FALLING
RISING
50
40
30
20
10
0
RISE TIME
FALL TIME
Q = C • V
V
r
= 7V
INTVCC
f
t , t 10% TO 90%
0
0
40
60
80
100
120
20
5
10
15
0
20
–55
50
100 125
150
–25
0
25
75
TOTAL GATE CHARGE (nC)
V
(V)
TEMPERATURE (°C)
INTVCC
3748 G17
3748 G18
3748 G16
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For more information www.linear.com/LT3748
LT3748
pin Functions
V (Pin 1) Input Voltage. This pin supplies current to the
GND (Pins 8, 9): Ground.
IN
internal start-up circuitry and is the reference voltage for
SS (Pin 10): Soft-Start Pin. This pin delays start-up and
the feedback circuitry connected to the R pin. This pin
FB
clamps V pin voltage. Soft-start timing is set by the size
C
must be locally bypassed with a capacitor.
of the external capacitor at the pin. Switching starts when
EN/UVLO(Pin3):Enable/UndervoltageLockout.Aresistor
V
reaches ~0.65V.
SS
divider connected to V is tied to this pin to program the
IN
V (Pin 11): Compensation Pin for the Internal Error
C
minimum input voltage at which the LT3748 will operate.
At a voltage below ~0.5V, the part draws less than 1µA
quiescent current. When below 1.223V but above ~0.5V,
the part will draw quiescent current but will not regulate
Amplifier. Connect a series RC from this pin to ground to
compensate the switching regulator. A 100pF capacitor
in parallel helps eliminate noise.
TC (Pin 12): Output Voltage Temperature Compensation.
Connect a resistor to ground to produce a current pro-
portional to absolute temperature to be sourced into the
RREF node. I = 0.55V/R .
the INTV supply or power the gate drive circuitry. Above
CC
1.223V, all internal circuitry will start and the SS pin will
source 5μA. When EN/UVLO falls below 1.223V, 2.4μA is
sunk from the pin to provide programmable hysteresis
for undervoltage lockout.
TC
TC
R
(Pin 14): Input Pin for the External Ground-Referred
REF
ReferenceResistor.Theresistoratthispinshouldbe6.04k,
but for convenience in selecting a resistor divider ratio,
the value may range from 5.76k to 6.34k. The resistor
should be as close to the LT3748 as possible.
INTV (Pin 5): Gate Driver Bias Voltage. This pin supplies
CC
current to the internal gate driver circuitry of the LT3748.
The INTV pin must be locally bypassed with a capacitor.
CC
This pin may also be connected to V if a third winding
IN
is not used and if V ≤ 20V. If a third winding is used,
IN
R (Pin 16): Input Pin forthe ExternalFeedback Resistor.
FB
the INTV voltage should be lower than the input voltage
CC
This pin is connected to the transformer primary at the
for proper operation.
external MOSFET power switch. The ratio of this resistor
to the R resistor, times the internal bandgap reference,
GATE (Pin 6): N-Channel MOSFET Gate Driver Output.
REF
determines the output voltage (plus the effect of any
non-unity transformer turns ratio). The average current
through this resistor during the flyback period should be
approximately 200μA. The resistor should be as close
to the LT3748 as possible.
Switches between INTV and GND.
CC
SENSE (Pin 7): The Current Sense Input for the Control
Loop. Kelvin connect this pin to the positive terminal of
the switch current sense resistor, R
, in the source
SENSE
of the N-channel MOSFET. The negative terminal of the
current sense resistor should be connected to the GND
plane close to the IC.
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For more information www.linear.com/LT3748
LT3748
block DiagraM
T1
:1
D
OUT
N
PS
+
–
V
IN
V
OUT
C
IN
L
L
SEC
PRI
C
OUT
R
FB
V
OUT
1
16
V
IN
R
FB
TC
CURRENT
–
A4
+
BOUNDARY
1.223V
Q1
Q2
MODE DETECT
TC
INTV
CC
12
14
–
5
A1
R
R
TC
+
C
BIAS
6.04k
20µA
ERROR AMP
50µs MAX
OFF TIMER
1.223V
+
g
m
R
REF
–
MASTER
LATCH
REF
GATE
S
R
S
R
VARIABLE
DELAY TIMER
Q
6
NMOS
A4
R1
R2
1.223V
EN/UVLO
+
–
50µs MAX
ON TIMER
GND
8, 9
INTERNAL
REFERENCE
AND
A3
3
5µA
A2
REGULATORS
+
– –
SENSE
2.4µA
SS
100mV
7
CURRENT
LIMIT
R
SENSE
V
C
10
11
C
SS
R
C
3748 BD
C
C
3748fb
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For more information www.linear.com/LT3748
LT3748
operation
The LT3748 is a current mode switching regulator con-
troller designed specifically for the isolated flyback topol-
ogy. The special problem normally encountered in such
circuits is that information relating to the output voltage
on the isolated secondary side of the transformer must
be communicated to the primary side in order to maintain
regulation. Historically, this has been done with opto-
isolators or extra transformer windings. Opto-isolator
circuits waste output power and the extra components
increase the cost and physical size of the power supply.
Opto-isolators can also exhibit trouble due to limited
dynamic response, nonlinearity, unit-to-unit variation
and aging over life. Circuits employing extra transformer
windings also exhibit deficiencies. Using an extra wind-
ing adds to the transformer’s physical size and cost, and
dynamic response is often mediocre.
Boundary Mode Operation
Boundary mode is a variable frequency, current mode
switching scheme. The external N-channel MOSFET turns
onandtheinductorcurrentincreasesuntilitreachestheV
pin-controlled current limit. After the external MOSFET is
turned off, the voltage on the drain of the MOSFET rises to
theoutputvoltagemultipliedbytheprimary-to-secondary
transformer turns ratio plus the input voltage. When the
secondary current through the output diode falls to zero,
C
the voltage on the drain of the MOSFET falls below V . A
boundary mode detection comparator detects this event
and turns the external MOSFET back on.
IN
Boundarymodereturnsthesecondarycurrenttozeroevery
cycle, so the parasitic resistive voltage drops do not cause
loadregulationerrors. Boundarymodealsoallowstheuse
ofasmallertransformercomparedtocontinuousconduc-
tion mode and does not exhibit subharmonic oscillation.
The LT3748 derives its information about the isolated
output voltage by examining the primary-side flyback
pulse waveform. In this manner, no opto-isolator nor
extra transformer winding is required for regulation. The
output voltage is easily programmed with two resistors.
The LT3748 features a boundary mode control method,
(also called critical conduction mode) where the part
operates at the boundary between continuous conduc-
tion mode and discontinuous conduction mode. Due to
the boundary control mode operation, the output voltage
can be calculated from the transformer primary voltage
when the secondary current is almost zero. This method
improves load regulation without external resistors and
capacitors.
At low output currents the LT3748 delays turning on the
externalMOSFETandthusoperatesindiscontinuousmode.
Unliketraditionalflybackconverters,theexternalMOSFET
has to turn on to update the output voltage information.
Below 0.6V on the V pin, the current comparator level
C
decreases to its minimum value and a variable delay timer
waitstoresetbeforeturningontheexternalMOSFET.With
the addition of delay before turning the MOSFET back
on, the part starts to operate in discontinuous mode. The
averageoutputcurrentisabletodecreasewhilestillallow-
ing a minimum off-time for the error amplifier sampling
circuitry. The typical maximum discontinuous off-time
with V equal to 0V is 24µs.
C
The Block Diagram shows an overall view of the system.
Many of the blocks are similar to those found in traditional
switchingregulators,includingcurrentcomparators,inter-
nalreferenceandregulators,logic,timersandanN-channel
MOSFET gate driver. The novel sections include a special
samplingerroramplifierandatemperaturecompensation
circuit.
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For more information www.linear.com/LT3748
LT3748
applications inForMation
Pseudo-DC Theory of Operation
Combining with the previous V
expression yields an
FLBK
expression for V , in terms of the internal reference,
OUT
TheR andR resistorsasdepictedintheBlockDiagram
REF
FB
programming resistors, transformer turns ratio and diode
forward voltage drop:
are external resistors used to program the output voltage.
The LT3748 operates much the same way as traditional
current mode switchers with the exception of the unique
error amplifier which derives its feedback information
from the flyback pulse.
RFB
1
VOUT = V
− VF − ISEC (ESR)
BG
RREF NPS
Operation is as follows: when the NMOS output switch
Additionally, it includes the effect of nonzero secondary
output impedance (ESR). This term can be assumed to
be zero in boundary control mode.
turns off, its drain voltage rises above V . The amplitude
IN
of this flyback pulse (i.e., the difference between it and
V ) is given as:
IN
Temperature Compensation
V
FLBK
= (V
+ V + I
• ESR) • N
SEC PS
OUT
F
The first term in the V
equation does not have a tem-
OUT
V = D
forward voltage
F
OUT
peraturedependence,butthediodeforwarddrop,V ,hasa
F
I
= Transformer secondary current
SEC
significantnegativetemperaturecoefficient.To compensate
for this, a positive temperature coefficient current source
ESR = Total impedance of secondary circuit
is internally connected to the R pin. The current is set
REF
N
= Transformer effective primary-to-secondary
PS
by resistor R to ground connected between the TC pin
TC
turns ratio
and ground. To cancel the temperature coefficient, the
The flyback voltage is converted to a current by R and
Q2. NearlyallofthiscurrentflowsthroughresistorR to
formaground-referredvoltage. Thisvoltageisfedintothe
flybackerroramplifier.Theflybackerroramplifiersamples
this output voltage information when the secondary-side
winding current reaches zero. The error amplifier uses a
bandgap voltage, 1.223V, as the reference voltage.
following equation is used:
FB
REF
dVF
dT
RFB
RTC
dVTC
dT
1
= −
•
•
or,
RFB
NPS
dVTC
−RFB
1
RTC =
•
•
≈
NPS dV / dT dT
NPS
F
The relatively high gain in the overall loop will then cause
(dV /d ) = Diode’s forward voltage temperature coef-
F
T
the voltage at the R
resistor to be nearly equal to the
REF
ficient
bandgapreference voltage, V . The relationshipbetween
BG
(dV /d ) = 1.85mV/°C
V
and V may then be expressed as:
TC
T
FLBK
BG
V
= 0.55V
TC
VBG
RREF
VFLBK
=
or
The resistor value given by this equation should also
be verified experimentally and adjusted, if necessary, to
achieve optimal regulation over temperature.
RFB
RFB
VFLBK = V
BG
The revised output voltage is as follows:
RREF
RFB
1
VOUT = V
− VF
BG
V
= Internal bandgap reference
BG
RREF NPS
V
RFB
NPS
− TC •
–ISEC (ESR)
R
TC
3748fb
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Selecting Actual R , R and R Resistor Values
With a new value of R selected, the temperature co-
REF
FB
TC
FB
efficient of the output diode in the application can be
The preceding equations define how the LT3748 would
regulatetheoutputvoltageifthesystemhadnotimedelays
and no error sources. However, there are a number of
repeatable delays and parasitics in each application which
will affect the output voltage and force a re-evaluation of
tested to verify the nominal R value. The R resistor
TC
TC
should be removed from the circuit under test (this will
cause V to increase for this step) and V should
OUT
OUT
be measured over temperature at a desired target output
load. It is very important for this evaluation that uniform
temperature be applied to both the output diode and the
LT3748—if freeze spray or a heat gun is used there can
be a significant mismatch in temperature between the
two devices that causes significant error. Attempting to
extrapolate the data from a diode datasheet or assuming
theR andR componentvalues.Thefollowingapproach
FB
TC
is the best method for selecting the correct values.
The expression for V
developed in the Operation sec-
OUT,
tion, can be rearranged to yield the following expression
for R :
FB
the nominal R value may yield a better result if there is
TC
+ V + V
TC
F
OUT
VBG
RREF •N
PS
V
(
)
no method to apply uniform heat or cooling such as an
oven. With at least two data points (although more data
points from hot to cold are recommended), the change
in V/°C can be determined by:
RFB =
where:
V
= Output voltage
∆VOUT
VOUT1 – VOUT2
OUT
=
∆TEMP TEMP1– TEMP2
V = Output diode forward voltage
F
UsingthemeasuredV temperaturecoefficient,anexact
TC
OUT
N
= Effective primary-to-secondary turns ratio
= 0.55V
PS
TC
R
value can be selected using the following equation:
V
1.85mV/°C
∆VOUT
RFB
NPS
RTC
=
•
The equation assumes the temperature coefficients of the
outputdiodeandV areequalandsubstitutesR /N for
TC
FB PS
∆TEMP
the value of R . This is a good first order approximation
TC
but will be revisited later.
If the value of R has changed significantly, which can
TC
happen with the use of some output diodes that have
First, the value of R
should be approximately 6.04k
REF
a very low forward drop, the R value may need to be
FB
since the LT3748 is trimmed and specified using this
changed to restore V
to the desired value. As in the
previous iteration, after measuring V , a new R can
OUT
value. If the impedance of R varies considerably from
REF
OUT
FB
6.04k, additional errors will result. However, a variation in
once again be selected using:
R
of several percent is acceptable. This yields a bit of
REF
freedom in selecting standard 1% resistor values to yield
nominal R /R ratios.
VOUT(DESIRED)
RFB(NEW)
=
•RFB(OLD)
FB REF
VOUT(MEASURED)
With starting values for R and R , an initial iteration
FB
TC
OncethevaluesofR andR areselected, theregulation
FB
TC
of the application should be built with final selections of
accuracyfromboardtoboardforagivenapplicationwillbe
veryconsistent,typicallyunder 5%whenincludingdevice
variation of all the components in the system (assuming
resistor tolerances and transformer windings matching
of 1% or better). However, if the transformer, the output
diode or MOSFET switch are changed or the layout is
all external components (transformer, diode, MOSFET,
etc.). The resulting V
should be measured and used
FB
OUT
to re-evaluate the value of R due to non-idealities in the
sampling system:
VOUT(DESIRED)
RFB(NEW)
=
•RFB(OLD)
VOUT(MEASURED)
dramatically altered, there may be some change in V
.
OUT
3748fb
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Minimum Primary Inductance Requirements
Output Power
The LT3748 obtains output voltage information from the
externalMOSFETdrainvoltagewhenthesecondarywinding
conductscurrent.Thesamplingcircuitryneedsaminimum
of 400ns to settle and sample the output voltage while the
MOSFET switch is off. This required settle and sample
time is controlled by external components independent of
the minimum off-time of the GATE pin as specified in the
ElectricalCharacteristicstable. Theelectricalspecification
minimum off-time is based on an internal timer and acts
as a maximum frequency clamp. The following equation
gives the minimum value for primary-side magnetizing
inductance:
Because the MOSFET power switch is located outside the
LT3748, the maximum output power is primarily limited
by external components. Output power limitations can
be separated into three categories—voltage limitations,
current limitations and thermal limitations.
The voltage limitations in a flyback design are primar-
ily the MOSFET switch V
and the output diode
DS(MAX)
reverse-bias rating. Increasing the voltage rating of either
component will typically decrease application efficiency if
all else is equal and the voltage requirements on each of
those components will be directly related to the windings
ratio of the transformer, the input and output voltages
and the use of any additional snubbing components.
V
+ VF(DIODE) •R
• tSETTLE(MIN) •NPS
(
)
OUT
SENSE
The MOSFET V
must theoretically be higher than
LPRI
≥
DS(MAX)
VSENSE(MIN)
V
+ (V
• N ) and the output diode reverse bias
IN(MAX)
OUT PS
V
t
= 15mV
= 400ns
SENSE(MIN)
must be higher than V
+ (V
/N ), though leak-
IN(MAX) PS
OUT
age inductance spikes on both the drain of the MOSFET
and the anode of the output diode may more than double
that requirement (see section on leakage inductance for
more details on snubbers). Figure 1 illustrates the effect
on available output power for several MOSFET voltage
ratings while continuously maximizing windings ratio
for input voltage with a fixed MOSFET current limit and
output voltage. Increasing the MOSFET rating increases
the possible windings ratio and or maximum input voltage
and can increase the available output power for a given
application. Both figures assume no leakage inductance
and high efficiency.
SETTLE(MIN)
N
PS
= Ratio of primary windings to secondary windings
In addition to the primary inductance requirement for
minimum settling and sampling time, the LT3748 has
internal circuit constraints that prevent it from setting the
GATE node high for shorter than approximately 250ns.
If the inductor current exceeds the desired current limit
during that time oscillation may occur at the output as
the current control loop will lose its ability to regulate.
Therefore, the following equation relating to maximum
input voltage must also be followed in selecting primary-
side magnetizing inductance:
50
V
IN(MAX)•RSENSE • tON(MIN)
V
= 200V
DS
LPRI
≥
V
= 150V
DS
40
30
20
10
0
VSENSE(MIN)
t
= 250ns
ON(MIN)
V
= 100V
DS
The last constraint on minimum inductance value would
relatetominimumfull-loadoperatingfrequency,f
and is derived from f = 1/(t + t ):
,
SW(MIN)
SW
ON
OFF
L
≤V
• (V +V
)•N /(f
IN(MIN)
• I
•
PRI
IN(MIN)
+ V
OUT
) • N + V
F(DIODE)
PS SW(MIN) LIM
((V
))
OUT
F(DIODE)
PS
0
20
40
60
80
100
INPUT VOLTAGE (V)
The minimum operating frequency may be lower than
the calculated number due to delays in detecting current
limit and detecting boundary mode that are specific to
each application.
3748 F01
Figure 1. Maximum Output Power at 12VOUT with a
3A ILIM and Maximum VDS = 100V, 150V, 200V
3748fb
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The current limitation on output power delivery is gen-
erally constrained by transformer saturation current in
higher power applications, although the MOSFET switch
and output diode will need to be rated for the desired
currents, as well. Increasing the peak current on the pri-
increasing as a percentage basis of loss as the output
voltage is increased. As power levels increase the output
diodeandtransformermayexceedtheirratedtemperature
specifications. Minimizing RMS output diode current,
selecting a diode with minimal forward drop at expected
currentsandminimizingparasiticresistancesandleakage
inductanceinthetransformerwillkeepthosecomponents
below their maximum temperatures while maximizing
efficiency. The following section discussing transformer
selectionwillfurtherhelpfocusonhowtominimizelosses
in the output diode.
mary side of the flyback by reducing the R
resistor
SENSE
is the primary way to increase output power, and power
delivered increases fairly linearly with current limit as
showninFigure2,untilparasiticlossesbegintodominate.
However, once the saturation current of the transformer
is exceeded the energy coupling between the primary and
the secondary will be reduced and incremental power will
not be delivered to the output. In addition, the primary
inductancewilldrop, theSENSEpinovercurrentthreshold
may trip due to a corresponding rapid rise in current, and
the transformer will have to absorb the energy that is not
transferred through the saturated core, leading to heating.
Some manufacturers may not specify the rated saturation
current but it is a necessary specification when trying to
minimize transformer size and maximize output power
and efficiency. Also necessary for proper design is data
on saturation current over temperature—the saturation
of typical power ferrites may reduce by over 20% from
25°C to 100°C.
While quiescent current in the LT3748 itself is low (ap-
proximately 300µA from VIN and 1mA from INTVCC), the
current required to drive the external MOSFET (fSW • QG),
if drawn from VIN through the LT3748 INTVCC LDO, dis-
sipates (VIN – INTVCC) • fSW • QG. If that power is high
enough to cause significant heating of the LT3748 the
currentmayneedtobedrawnfromathirdwinding. Doing
so will push all thermal limitations outside of the LT3748.
Selecting a Transformer
Transformer specification and design is perhaps the most
critical part of successfully applying the LT3748. In addi-
tion to the usual list ofcaveats dealing with highfrequency
isolated power supply transformer design, the following
information should be carefully considered.
The thermal limitation in flyback applications for lower
output voltages will be dominated by losses in the output
diode, with resistive and leakage losses in the transformer
First and most importantly, since the voltage on the sec-
ondary side of the transformer is inferred by the voltage
sampled on the primary, the transformer turns ratio must
be tightly controlled to ensure a consistent output volt-
age. A tolerance of 5% in turns ratio from transformer
to transformer could result in a variation of more than
5% in output regulation. Fortunately, most magnetic
component manufacturers are capable of guaranteeing a
turns ratio tolerance of 1% or better.
50
I
= 3A
LIM
40
30
20
10
0
I
I
= 2A
= 1A
LIM
LIM
Linear Technology has worked with several leading mag-
netic component manufacturers to produce predesigned
flyback transformers for use with the LT3748. Table 1
shows the details of several of these transformers.
0
20
40
60
80
100
INPUT VOLTAGE (V)
3748 F02
Figure 2. Maximum Output Power at 12VOUT
with 150V VDS(MAX) and ILIM = 1A, 2A, 3A
3748fb
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Table 1. Pre-Designed Transformers—Typical Specifications Unless Otherwise Noted
†
TARGET APPLICATION
TRANSFORMER
PART NUMBER
L
L
N
P
I
R
R
SEC
PRI
LEAK
PS
S
SAT
PRI
Size (W x L x H) mm
17.7 × 14.0 × 12.7
(µH)
100
100
37
50
50
50
15
9
(nH)
844
900
750
570
600
600
175
120
150
300
500
500
500
500
200
200
200
400
200
200
750
800
750
800
100
(N :N )
(A)
(mΩ)
180
225
89
(mΩ)
29
31
28
12
12
12
6
MANUFACTURER
Würth Electronics
Würth Electronics
Würth Electronics
Würth Electronics
Würth Electronics
Würth Electronics
Würth Electronics
Würth Electronics
Würth Electronics
Würth Electronics
Würth Electronics
Würth Electronics
Würth Electronics
Würth Electronics
Würth Electronics
Würth Electronics
Würth Electronics
Würth Electronics
Würth Electronics
Würth Electronics
Pulse Engineering
Pulse Engineering
Pulse Engineering
Pulse Engineering
Pulse Engineering
INPUT (V)
40 to 75
40 to 75
30 to 75
30 to 75
30 to 75
30 to 75
10 to 40
10 to 40
10 to 40
10 to 40
10 to 40
20 to 75
20 to 75
20 to 75
10 to 40
10 to 40
10 to 40
20 to 75
20 to 70
20 to 70
20 to 75
20 to 75
20 to 75
20 to 75
10 to 40
OUTPUT
12V/1A
12V/1A
12V/1A
5V/3A
750311424
750311456*
750311439
750311423
750311457
750311689
750311458*
750311564
750311624
750311604
750311599
750311600
750311608
750311607
750311590
750311591
750311592
750311594
750311595
750311596
PA2367NL
PA1276NL
PA2467NL
PA1260NL
PA3177NL
3:1
3
3:1
2:1
4:1
4:1
4:1
3:1
3:1
2.4
2.8
4
17.7 × 14.0 × 12.7
17.7 × 14.0 × 12.7
90
17.7 × 14.0 × 12.7
3.7
3.7
5
115
115
35
5V/3A
17.7 × 14.0 × 12.7
5V/3A
17.7 × 14.0 × 12.7
5V/2.5A
5V/3A
17.7 × 14.0 × 12.7
8
36
7
17.7 × 14.0 × 12.7
9
1.5:1
1:1
8
34
21
12
12
40
20
10
8
15V/1A
24V/1.3A
15V/2A
15V/2A
24V/1.3A
12V/2.5A
12V/3.8A
15V/3A
24V/1.9A
12V/3.8A
15V/3A
24V/1.9A
12V/1A
12V/1A
12V/1A
5V/2A
17.7 × 14.0 × 12.7
8
9.5
12
11
9
30
29.08 × 23.11 × 11.43
29.08 × 23.11 × 11.43
29.08 × 23.11 × 11.43
29.08 × 23.11 × 11.43
29.08 × 23.11 × 11.43
32.31 × 27.03 × 13.69
32.31 × 27.03 × 13.69
32.31 × 27.03 × 13.69
32.31 × 27.03 × 13.69
32.31 × 27.03 × 13.69
32.31 × 27.03 × 13.69
17.7 × 14.0 × 12.7
8
1.5:1
3:1
30
12
12
14
8
30
1.5:1
2.5:1
2:1
30
9.5
18
20
18
18
18
16
1.7
1.6
2.9
1.5
8.6
40
15
8
1.5:1
1:1
15
12
20
15
12
30
26
75
28
18
7
8
15
15
12
12
85
77.4
37
77.4
8.3
2.33:1
3:1
35
15
1.5:1
2.7:1
1.47:1
2:1
30
325
100
89
17.7 × 14.0 × 12.7
17.7 × 14.0 × 12.7
3.67:1
2:1
220
10
17.7 × 14.0 × 12.7
10V/2.5A
29.21 × 21.84 × 11.43
*2.5k isolation, others are rated for 1.5kV isolation.
†
TARGET APPLICATION, NOT GUARANTEED.
efficiency and better utilize the saturation current of a
given transformer. Figure 3 shows the maximum output
power using three transformers with different windings
ratios that have the same output inductance and peak
output current, illustrating that increasing current while
decreasing turns ratio can deliver more power.
Turns Ratio and RMS Diode Current
Note that when using an R /R
resistor ratio to set
FB REF
output voltage, the user has relative freedom in selecting
a transformer turns ratio to suit a given application. In
contrast, simpler ratios of small integers (e.g., 1:1, 2:1,
3:2, etc.) can be employed to provide more freedom in
setting total turns and mutual inductance.
There are two significant constraints on the turns ratio.
First, as described in the previous section on limitations
to output power, the drain of the MOSFET switch will
see a voltage equal to the maximum input supply plus
While the turns ratio can be selected to maximize output
power for a given current limit, minimizing the turns
ratio and increasing the current limit will often increase
3748fb
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the output voltage multiplied by the windings ratio plus
someamountofovershootcausedbyleakageinductance.
Second, increasing the turns ratio will increase the peak
current seen on the output diode generally increasing the
RMS diode current thereby lowering the efficiency. This
efficiencylimitationisworseatloweroutputvoltageswhen
the diode forward voltage is significant compared to the
output voltage. In a typical application such as the 5V, 2A
outputshownonthebackpage,thediodelossesdominate
all the other losses, as shown in Figure 4. To calculate
RMS diode current, two equations are needed—the first
for calculating duty cycle, D, and the second to calculate
the RMS current of a triangle waveform:
25
20
15
10
5
N
LIM
= 2:1
= 3A
PS
I
N
LIM
= 3:1
= 2A
PS
I
N
LIM
= 6:1
= 1A
PS
I
0
0
20
40
60
80
100
INPUT VOLTAGE (V)
3748 F03
Figure 3. Maximum Output Power at 12V Out Using Three
Transformers with Equal Peak Output Current and Secondary
Inductance
V
+ VF(DODE) •N
(
)
OUT
PS
D =
V + V
+ VF(DIODE) •N
(
)
IN
OUT
PS
100
V
= 12V
IN
2
95
90
85
80
75
70
I
•N
• 1– D
(
)
(
)
LIM
PS
D
OUT
IDIODE(RMS)
=
3
For a more general analysis, Figure 5 illustrates a sweep
of windings ratio on the x-axis while comparing output
power and estimated efficiency for a 5V output using a
48V input. If the desired application required 20W, the
maximum power curve indicates that a winding ratio of
f
• Q + I
G Q
SW
FET R
DS(ON)
TRANSFORMER I • R + LEAKAGE
0.2A MIN
2A MAX
12:1 would be sufficient at a current limit of 2A (R
=
SENSE
I
(A)
OUT
0.05Ω),whileawindingratioof5:1woulddeliverthesame
powerat3A.However,whenexaminingthecorresponding
efficiency at max load for those two windings ratios and
current limits, the 5:1, 3A selection is clearly the superior
solution with an estimated efficiency of 85% compared to
78% for the 12:1, 2A application.
3748 F03
Figure 4. Sources of Loss In 5V, 2A Out Typical Application
100
95
32
28
24
20
I
I
= 3A
= 2A
LIM
LIM
OUTPUT
POWER
90
There are several caveats to this evaluation. First, as the
diode forward voltage becomes a smaller percentage of
totallossathigheroutputvoltages(>12V)theRMScurrent
becomes less of a concern and minimizing it will have a
much smaller impact on efficiency. More significantly, if
a lower turns ratio forces the use of a diode with a larger
forward drop to obtain a higher reverse voltage rating,
any gains from minimizing current might be lost. For low
outputvoltages(3.3Vor5V)orhighinputvoltages(>48V),
a turns ratio greater than one can be used with multiple
primary windings relative to the secondary to maximize
the transformer’s current gain.
85
80
75
16
12
70
65
60
8
4
0
EFFICIENCY
3
6
12
0
15
18
9
N
PS
3748 F05
Figure 5. Estimated Efficiency and Output Power at 5VOUT from
48VIN vs Windings Ratio, NPS, at 2A and 3A Current Limits
3748fb
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Saturation Current
seriesresistanceusingtheobservedperiods(t
PERIOD(SNUBBED)
, and
SNUBBER
PERIOD
t
) and snubber capacitance (C
) is
As discussed earlier in the Maximum Output Power sec-
tion, because the core of the transformer is being used for
energy storage in a flyback, the current in the transformer
windings should not exceed their rated saturation current
as energy injected once the core is saturated will not be
transferredtothesecondaryandwillinsteadbedissipated
in the core. Information on saturation current should be
provided by the transformer manufacturers and Table 1
lists the saturation current of the transformers designed
for use with the LT3748.
below, andtheresultantwaveformsareshowninFigure6.
CSNUBBER
CPAR
=
=
2
t
PERIOD(SNUBBED)
– 1
tPERIOD
2
tPERIOD
LPAR
CPAR • 4π2
LPAR
CPAR
RSNUBBER
=
Leakage Inductance and Snubbers
Transformer leakage inductance (on either the primary
or secondary) causes a voltage spike to appear at the
primary after the MOSFET switch turns off. This spike is
increasinglyprominentathigherloadcurrentswheremore
stored energy must be dissipated. Transformer leakage
inductance should be minimized.
90
80
70
60
50
40
30
20
10
In most cases, proper selection of the external MOSFET
andawelldesignedtransformerwilleliminatetheneedfor
snubber circuitry, but in some cases the optimal MOSFET
may require protection from this leakage spike. An RC
(resistor capacitor) snubber may be sufficient in applica-
tions where the MOSFET has significant margin beyond
the predicted DC drain voltage applied in flyback while a
clamp using an RCD (resistor capacitor diode) or a Zener
might be a better option when using a MOSFET with very
little margin for leakage inductance spiking.
NO SNUBBER
WITH SNUBBER
CAPACITOR
WITH RESISTOR
AND CAPACITOR
0
0
0.05 0.10 0.15
0.30
0.20 0.25
TIME (µs)
3748 F06
Figure 6. Observed Waveforms at MOSFET Drain when
Iteratively Implementing an RC Snubber
Note that energy absorbed by a snubber will be converted
to heat and will not be delivered to the load. In high volt-
age or high current applications, the snubber may need to
be sized for thermal dissipation. To determine the power
dissipated in the snubber resistor from capacitive losses,
measurethedrainvoltageimmediatelybeforetheMOSFET
turns on and use the following equation relating that volt-
age and the MOSFET switching frequency to determine
the expected power dissipation:
The recommended approach for designing an RC snubber
is to measure the period of the ringing at the MOSFET
drain when the MOSFET turns off without the snubber
and then add capacitance—starting with something in
the range of 100pF—until the period of the ringing is 1.5
to 2 times longer. The change in period will determine
the value of the parasitic capacitance, from which the
parasitic inductance can be determined from the initial
period, as well. Similarly, initial values can be estimating
using stated switch capacitance and transformer leakage
inductance. Once the value of the drain node capacitance
and inductance is known, a series resistor can be added to
the snubber capacitance to dissipate power and critically
dampen the ringing. The equation for deriving the optimal
2
P
= f • C
• V
/2
SNUBBER
SW
SNUBBER
DRAIN
Decreasing the value of the capacitor will reduce the dis-
sipated power in the snubber at the expense of increased
peak voltage on the MOSFET drain, while increasing the
value of the capacitance will decrease the overshoot.
3748fb
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Although it typically does not decrease efficiency, leakage
inductance energy that would normally have been dis-
sipated in the switch or transformer is also dissipated in
the RC snubber resistor and can be calculated as:
ring beyond that expected reverse voltage. An RC snubber
or RCD clamp may be implemented to reduce the voltage
spike if it is desirable to use a lower reverse voltage diode.
Secondary Leakage Inductance
2
P
= f • L
• I
/2
SNUBBER
SW
LEAK LIM
In addition to the previously described effects of leakage
inductance in general, leakage inductance on the sec-
ondary in particular exhibits an additional phenomena. It
forms an inductive divider on the transformer secondary
that effectively reduces the size of the primary-referred
flyback pulse used for feedback. This will increase the
output voltage target by a similar percentage. Note that,
unlike leakage spike behavior, this phenomena is load
independent. To the extent that the secondary leakage
inductance is a constant percentage of mutual inductance
An RCD clamp, shown in Figure 7, also prevents the
leakage inductance spike from exceeding the breakdown
voltage of the MOSFET switch. In most applications, there
will be a very fast voltage spike caused by a slow clamp
diode. Once the diode clamps, the leakage inductance
current is absorbed by the clamp capacitor. This period
should not last longer than 200ns so as not to interfere
with the output regulation. The clamp diode turns off after
the leakage inductance energy is absorbed and the switch
voltage is then equal to:
V
= V + N • (V
+ V
)
F(DIODE)
200
180
160
140
120
100
80
DS
IN
PS
OUT
Schottky diodes are typically the best choice for use in a
snubber, but some PN diodes can be used if they turn on
fastenoughtolimittheleakageinductancespike.Figures 8
and 9 show the waveform at the drain of the MOSFET
switch for the 48V output application shown in Figure 17
at maximum rated load and maximum input voltage with
an RC snubber and RCD clamp, respectively. Both solu-
tions limit the leakage spike to less than 190V, below the
60
40
20
0
V
V
= 96V
IN
= 48V
OUT
OUT
I
= 0.5A
R = 66Ω
C = 150pF
200V V
rating of the Si7464DP MOSFET.
DS(MAX)
0
50
150
200
250
300
100
TIME (ns)
3748 F08
L
LEAK
+
V
V
IN
OUT
Figure 8. Waveform of MOSFET Drain During Normal Operation
of Figure 19 with RC Snubber (as Drawn)
C
R
+
200
180
160
140
120
100
80
D
–
V
OUT
GATE
NMOS
3748 F07
Figure 7. RCD Clamp
V
V
= 96V
IN
60
40
20
0
= 48V
OUT
OUT
Leakage Inductance and Output Diode Stress
I
= 0.5A
R = 4.99k
C = TDK 0.22µF 250V
D = CMR1U-02M-LTC
The output diode may also see increased reverse voltage
stresses from leakage inductance. While it nominally sees
a reverse voltage of the input voltage divided by the wind-
ingsratioplustheoutputvoltagewhentheMOSFETpower
switch turns on, the capacitance on the output diode and
the leakage inductance will cause an LC tank which may
0
50
150
TIME (ns)
200
250
300
100
3748 F08
Figure 9. Waveform of MOSFET Drain During Normal Operation
of Figure 19 Using RCD Clamp with Central Semiconductor
CMR1U-02M-LTC Instead of RC Snubber
3748fb
16
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LT3748
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(overmanufacturingvariations),thiscanbeaccommodated
GATE pin is near its final value, or until at least 150ns
has passed, whichever occurs more slowly. This should
be entirely sufficient for most applications but premature
tripping of the SENSE comparator may occur in cases
by adjusting the R /R resistor ratio.
FB REF
Winding Resistance Effects
where a MOSFET with very high Q is used with a series
G
Resistance in either the primary or secondary will reduce
resistor at the GATE pin.
overall efficiency (P /P ). Good output voltage regula-
OUT IN
tion will be maintained independent of winding resistance
Output Short Circuits and SENSE Pin Over Current
due to the boundary mode operation of the LT3748.
The LT3748 has an internal threshold to detect when
primary inductor current exceeds the programmed range.
This can result from an inductive output short-circuit and
an output voltage below zero, reflecting a voltage back to
the primary side of the transformer which, in turn, causes
the LT3748 to turn the external MOSFET on before the
secondary current has discharged. When the voltage at
the SENSE pin exceeds approximately 130mV—equiva-
Bifilar Winding
A bifilar, or similar winding technique, is a good way to
minimize troublesome leakage inductances. However, re-
member that this will also increase primary-to-secondary
capacitanceandlimittheprimary-to-secondarybreakdown
voltage, so, bifilar winding is not always practical. The
Linear Technology Applications group is available and
extremely qualified to assist in the selection and/or design
of the transformer.
lent to 30% higher than the programmed I
in
LIM(MAX)
the R
resistor—the SS pin will be reset, stopping
SENSE
switching. Once the soft-start capacitor is recharged and
the soft-start threshold is reached, switching will resume
at the minimum current limit.
Selecting a Current Sense Resistor
The external current sense resistor allows the user to
optimize the current limit behavior for the particular ap-
plicationunderconsideration.Asthecurrentsenseresistor
is varied from several ohms down to tens of milliohms,
peak switch current goes from a fraction of an ampere
to tens of amperes. Care must be taken to ensure proper
circuit operation, especially with small current sense
resistor values.
High Drain Capacitance and Low Current Operation
When designing applications with some combination of a
low current limit (I < 1A), a high secondary-to-primary
LIM
turns ratio (N << 1), multiple output windings, or very
PS
capacitive output diodes, it is important to minimize the
capacitance reflected onto the primary winding and on the
drain of the external MOSFET. After the MOSFET turns off
during each switching cycle, the primary current charges
thatcapacitancetoslewtheMOSFETdrainuntilthesecond-
ary begins to deliver power, and if the drain node does not
Forexample,apeakMOSFETswitchcurrentof4Arequires
a sense resistor of 0.025Ω. Note that the instantaneous
peak power in the sense resistor is 1W, and it must be
rated accordingly. The LT3748 has only a single sense line
to this resistor. Therefore, any parasitic resistance in the
ground side connection of the sense resistor will increase
its apparent value. In the case of a 0.025Ω sense resistor,
1mΩ of parasitic resistance will cause a 4% reduction in
peakswitchcurrent.Therefore,resistanceofprintedcircuit
copper traces and vias cannot necessarily be ignored.
slew and remain above V within approximately 200ns
IN
once the GATE pin goes low and the MOSFET turns off,
the LT3748 may detect that the current in the secondary
is zero and turn the MOSFET back on prematurely, caus-
ing the LT3748 to switch continuously while delivering
very little power to the output. The result will be droop of
the output voltage at lighter loads and oscillation at the
V node. This problem can be prevented by maximizing
Another issue for proper operation of the current sense
circuitry is avoiding prematurely tripping the SENSE
threshold while slewing the MOSFET drain when the GATE
pin goes high. The LT3748 does not begin to compare
the SENSE pin voltage with the target threshold until the
C
N
(minimizing ratio of secondary windings to primary
PS
windings), increasing the peak drain current (minimizing
),andminimizingtheoutputdiodeandtransformer
R
SENSE
capacitance.
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LT3748
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Soft-Start
Minimum Load Requirement
The LT3748 contains an optional soft-start function that
is enabled by connecting an explicit external capacitor
betweentheSSpinandground. Internalcircuitryprevents
The LT3748 recovers output voltage information using
the flyback pulse that occurs once the external MOSFET
turns off and the secondary winding conducts current. In
order to regulate the output voltage, the LT3748 needs to
sample the flybackpulse. The LT3748 deliversa minimum
amount of energy even during light load conditions to
ensureaccurateoutputvoltageinformation.Theminimum
delivery of energy creates a minimum load requirement
on the output of approximately 2% of maximum load.
The minimum operating frequency at minimum load is
approximately 42kHz.
the control voltage at the V pin from exceeding that on
C
the SS pin.
The soft-start function is engaged whenever power at V
IN
is removed, or as a result of either undervoltage lockout,
overcurrentinthesenseresistororthermal(overtempera-
ture)shutdown.TheSSnodeisthendischargedtoroughly
600mV. When this condition is removed, a nominal 5µA
current acts to charge up the SS node towards roughly
2.2V. For example, a 0.1µF soft-start capacitor will place
Alternatively, a Zener diode sufficiently rated to handle the
minimum load power can be used to provide a minimum
load without decreasing efficiency in normal operation.
In selecting a Zener diode for this purpose, the Zener
voltage should be high enough that the diode does not
become the load path during transient conditions but the
voltage must still be low enough that the MOSFET and
output voltage ratings are not exceeded when the Zener
functions as the minimum load.
a 0.05V/ms limit on the turn-on ramp rate at the V node.
C
ENABLE and Undervoltage Lockout (UVLO)
AresistivedividerfromV totheEN/UVLOpinimplements
IN
undervoltagelockout(UVLO). TheEN/UVLOpinthreshold
issetat1.223V. In addition, theEN/UVLO pindraws2.4µA
when the voltage at the pin is below 1.223V. This current
providesuserprogrammablehysteresisbasedonthevalue
of R1. The effective UVLO thresholds are:
INTV Pin Considerations
CC
1.223V •(R1+ R2)
VIN(UVLO,RISING)
=
+ 2.4µA •R1
The INTV pin powers the internal circuitry and gate
CC
R2
driver of the LT3748. Three unique configurations exist
for regulation of the INTV pin as shown in Figure 11. In
1.223V •(R1+ R2)
CC
VIN(UVLO,FALLING)
=
the first configuration, the internal LDO drives the INTV
CC
R2
pininternallyfromtheV supply.Inthesecondconfigura-
IN
Figure10showstheimplementationofexternalshutdown
control while still using the UVLO function. The NMOS
grounds the EN/UVLO pin when turned on, and puts the
LT3748 in shutdown with a quiescent current draw of
less than 1µA.
tion, the V supply directly drives the INTV pin through
IN
CC
a direct connection bypassing the internal LDO. Use this
optional configuration for voltages lower than 20V. In the
third configuration, an external supply or third winding
drives the INTV pin. Use this option when a voltage
CC
supply exists lower than the input supply but higher than
the regulated INTV voltage. Using a lower voltage sup-
CC
V
IN
ply provides a more efficient source of power for internal
R1
R2
circuitry and reduces power dissipation in the LT3748.
EN/UVLO
When calculating the minimum input voltage required for
RUN/STOP
CONTROL
(OPTIONAL)
LT3748
a valid INTV , or the power dissipated in the LT3748, it is
CC
useful to know how much current will be drawn from the
GND
INTV LDO during normal operation. The easiest way to
CC
3748 F10
calculate this current is to use the gate charge (Q ) for the
G
Figure 10. Undervoltage Lockout (UVLO)
selected MOSFET switch at the expected V and INTV
IN
CC
3748fb
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3.0
2.5
2.0
1.5
1.0
0.5
0
LT3748
V
IN
= 5V
5V TO 100V
V
IN
LDO
INTV UVLO = 3.6V
CC
(V – DROPOUT) TO 7V
IN
INTV
CC
I
= 20mA
INTVCC
LT3748
5V TO 20V
V
IN
75 100
125 150
TEMPERATURE (°C)
–50 –25
0
25 50
LDO
3748 F12
INTV
CC
Figure 12. INTVCC Current at Low VIN Can Cause the LT3748
to Stop Switching Due to INTVCC Undervoltage Lockout
OPTIONAL
temperature, but when the dropout for the same current
exceeds 1.4V and trips the UVLO at higher temperatures
the LT3748 will stop switching.
LT3748
5V TO 100V
V
IN
LDO
3.6V < BIAS < 20V,
V
IN
> BIAS
Overdriving INTV with a Third Winding
CC
EXTERNAL SUPPLY
OR THIRD WINDING
INTV
CC
The LT3748 provides excellent output voltage regulation
withouttheneedforanopto-couplerorthirdwinding,butfor
someapplicationswithinputvoltagesgreaterthan20V,an
additionalwindingmayimproveoverallsystemefficiency.
Thethirdwindingshouldbedesignedtooutputavoltagebe-
tween7.2Vand20V.Aresistorinseries withtherectifieris
3748 F09
Figure 11. INTVCC Pin Configurations
voltages and multiply that charge required with each
turn-on event by the maximum operating frequency. The
maximum operating frequency in a given application can
beapproximatedfromtheprimarytransformerinductance,
recommendedtoabsorbleakagespikes.Foratypical48V ,
IN
10W application, overdriving the INTV pin may improve
CC
efficiency by several percent at maximum load and as
the windings ratio (N ), the nominal output voltage and
PS
much as 30% at light loads.
the maximum input voltage. Unless the part is limited by
minimum on- or off-times, this maximum frequency will
occur when the part is regulating in boundary mode at the
minimum peak switch current, and can be derived from:
Loop Compensation
The LT3748 is compensated using an external resistor-
capacitor network on the V pin. Typical values are in the
C
VIN(MAX) • V
+ VF(DIODE) •N
(
)
OUT
PS
range of R = 50k and C = 1nF (see the numerous sche-
fSW(MAX)
≈
C
C
LPRI •ILIM(MIN) • V
+ VF(DIODE) •N + VIN(MAX)
(
)
OUT
PS
maticsintheTypicalApplicationssectionforotherpossible
values). If too large of an R value is used, the part will be
C
WiththemaximumINTVCCcurrentcalculated,theexpected
dropout when VIN drops below 7V can be extracted from
the curves in the Typical Performance Characteristics
section. The LT3748 is tested as low as VIN = 5V but
the hard limit on minimum VIN operation is the INTVCC
regulator dropout and the 3.6V under voltage lockout.
Figure 12 illustrates an example where operation with VIN
= 5V and IINTVCC = 20mA might be fully functional at room
more susceptible to high frequency noise and jitter. If too
smallofanR valueisused,thetransientperformancewill
C
suffer. The value choice for C is somewhat the inverse
C
of the R choice: if too small a C value is used, the loop
C
C
may be unstable and if too large a C value is used, the
C
transient performance will also suffer. Transient response
plays an important role for any DC/DC converter.
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Synchronous Secondary Applications
100
80
60
40
20
0
PRIMARY SIDE
DRAIN VOLTAGE
Using a synchronous secondary controller such as the
LT8309 with the LT3748 is an excellent method to boost
converterefficiencyandminimizeheat,especiallyforlower
output voltages and higher output currents. However,
there are some important details to understand when
designing a synchronous application. First, although the
LT8309 controls a synchronous MOSFET in place of the
standard output rectifier, when properly configured that
synchronous MOSFET must turn off before the end of
the secondary conduction time. This ensures that there
is no reverse current sending power back to the primary
side of the transformer and no cross conduction once the
LT3748 GATE pin goes high on the next switching cycle.
As a result, the forward voltage drop of the secondary
MOSFET body diode is reflected back to the primary side
and sampled by the LT3748. In order to guarantee an
accurate sample and to maintain excellent line and load
regulation, the RDRAIN resistor of the LT8309 must be
optimized to allow the body diode to conduct long enough
to provide an accurate reflected voltage. To ensure ac-
curate output regulation the secondary MOSFET should
turn off at least 180ns before the secondary current goes
to zero. Figure 13 illustrates the expected waveform at
the primary side drain node and the LT8309 GATE pin us-
ing the circuit from Figure 21 with sufficient body diode
conduction time marked.
BODY DIODE
CONDUCTION
LT8309
V
GATE
0
1
2
3
4
5
6
7
8
TIME (µs)
LT3748 F13
Figure 13. Waveforms at LT3748 Primary Side MOSFET
Drain and LT8309 GATE Pin During Operation Illustrating
Optimum Body Diode Conduction Time
Because the body diode is conducting at the sampling
point for the LT3748 when the secondary current goes
to zero, the temperature coefficient of this body diode
should be compensated using the TC pin using the same
procedures outlined when a normal rectifier is used on the
secondary. The silicon junction of the body diode has a
negativetemperaturecoefficientcomparabletoastandard
or Schottky diode and standard values specified earlier in
the applications section should be a good starting point.
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applications inForMation
DESIGN EXAMPLE: 12V TO 5V, 2A OUT
Evaluating the results of the table, the 1:2 turns ratio looks
demandingintermsofdiodereverse-voltagerequirements
(a diode with higher reverse bias capability generally will
havealargerforwarddropandthereforelowerapplication
efficiency) and primary side currents and only decreases
the output diode RMS current by 13% from the 1:1 case.
However, on evaluating the minimum and maximum in-
ductance requirements in Step 3, even the 1:1 case does
IN
The first example is an automotive application shown on
the back page of this data sheet—a nominal 12V , 5V
IN
OUT
at 2A with an operating input voltage range of 6V to 45V
with a design focus of maximizing efficiency.
1. Select Transformer Turns Ratio
Transformer turns ratio will affect the requirements for the
not allow for enough on-time from maximum V for the
IN
MOSFET switch V rating, the output diode reverse bias
DS
range of inductance that provides sufficient off-time.
For that reason, a 2:1 turns ratio is selected, easing the
requirement on the output diode reverse voltage rating
in the process.
rating, the output power capability, and the efficiency of
the overall converter. Because the output voltage is low
compared to the forward drop on the output diode and
the currents are high in this application, efficiency can be
optimized by minimizing the RMS diode current. Typical
efficiency in a variety of applications will be 85% to 90%
and due to compromises made for the wide input voltage
range and the low output voltage in this specific applica-
tion, an efficiency of 85% is assumed for calculating
output power. This assumption can be revised once the
application is tested. Equations for evaluating each of the
important criteria are:
2. Calculate Sense Resistor Value
The sense resistor can be calculated by the following
equation:
100mV
ILIM
RSENSE
=
The desired 5.8A current limit leads to an unusual value of
0.0172Ω, so the current limit is increased to use a more
N
= N /N
P S
PS
standard 0.016Ω value and I of 6.25A.
LIM
V
V
≥ V
+ V
• N
DS(MAX)
R(DIODE)
OUT(MAX)
IN(MAX)
OUT
PS
3. Select a Transformer Based on Inductance and
Saturation Current Requirements
≥ V
/N + V
IN(MAX) PS
OUT
I
≈ 0.85 • (1 – D) • N • I /2
PS LIM
The transformer in this application will be selected to
optimize efficiency at a 80kHz minimum switching fre-
quency at maximum load from the nominal input voltage.
In applications where transformer size is the primary
requirement, reducing the current limit or increasing the
switchingfrequencymayberequired. Thefollowingequa-
tions select the inductance required for a given switching
frequency at max load and then verify that the inductance
is large enough to satisfy the minimum on and minimum
sampling times of the LT3748.
D = (V
+ V
) • N /(V + (V
+ V
)
F(DIODE)
OUT
F(DIODE)
PS IN
OUT
• N )
PS
2
I
= √(I • N ) • (1 – D)/3
DIODE(RMS)
LIM
PS
The equation for output power can be rearranged to solve
for the current limit, I , which can be solved at the
LIM
nominal or the minimum V depending on application
IN
requirements. In this application the 2A load requirement
will be set at V = 7.5V to reduce operating stresses at
IN
higher input voltages. The results of the aforementioned
equations in this application are found in Table 2.
Table 2. Voltage Stresses, Output Capability and Diode Current vs Turns Ratio in 12VIN to 5V, 2A Application
N
PS
V
V
D (V = 12V)
D (V = 7.5V)
I
(2A OUT AT V = 7.5V)
I (V = 12V)
DIODE(RMS) IN
DS(MAX)
R(DIODE)
IN
IN
LIM
IN
0.5
1
47.5
95
0.19
0.31
0.48
0.58
0.27
0.42
0.59
0.69
12.9
8.2
5.8
5.0
3.3
3.9
4.8
5.6
50
55
60
50
27.5
20
2
3
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L
≤V
OUT
• (V +V
)•N /(f
IN(MIN)
• I
•
squared and multiplied by the R
and the current required to drive the FET at frequency can
be determined, by the following equations:
to calculate losses
PRI
(V
IN(MIN)
+ V
OUT
F(DIODE)
PS SW(MIN) LIM
DS(ON)
) • N + V ))
F(DIODE)
PS
L
PRI
L
PRI
≥ (V
+ V ) • R
F(DIODE)
• 400ns • N /15mV
SENSE PS
OUT
2
I
I
= √I
• D/3
MOSFET(RMS)
LIM
≥ V
• R
• 200ns/15mV
IN(MAX)
SENSE
= f • Q
G
INTVCC
SW
For this application, the primary inductance with a 2:1
transformer and a 0.016Ω sense resistor for an 6.25A
current limit is bounded by the minimum desired switch-
ing frequency and the minimum off time requirement to
be between 9.6µH and 11.5µH. Looking at Table 1, there
are no transformers that fit that exact requirement. For the
sakeofprototyping,atransformerwithslightlylessthanthe
desiredprimaryinductanceisselectedwiththePA3177NL.
The application will need to be tested thoroughly for sta-
bility at higher input voltages and when the current limit
is at a minimum (in the middle of the output load range).
The easiest solution to ease the requirement on minimum
P
= I
• (V – V
)
INTVCC
INTVCC
INTVCC
IN
In this application the MOSFET RMS current at maximum
load is about 2.7A, which into the 0.038Ω R will be
DS(ON)
0.28W, or on the order of 2% loss in efficiency. Assum-
ing that the maximum operating frequency is around four
timeshigherthanthemaximumloadfrequency(atabouta
quartertheoutputload)andreadingtheapproximateQ at
G
7V operation from the Vishay data sheet, the approximate
INTV current is likely close to 8mA, dissipating 0.04W
CC
when the load is on the order of 2.5W, or less than 2%,
and much less at maximum load.
on-time is to reduce the maximum V voltage although
IN
alternatively N could be increased at the expense of ef-
PS
5. Select the Output Diode
ficiency (and requiring a more thorough redesign).
The output diode reverse voltage, as calculated earlier, is
thefirstimportantspecificationfortheoutputdiode.Aswith
theMOSFET,choosingadiodewithenoughmarginshould
preclude the use of a snubber. The second criterion is the
power requirement of the diode which is more difficult to
correctlyascertain—somemanufacturersgivedirectdata
about power dissipation versus duty cycle, which can be
used with the data from the table to determine. To avoid
using a snubber, a diode with a 60V reverse-bias capabil-
ity and minimal forward drop was selected—in this case,
the Diodes Inc. SBR 8U60P5. In this particular application
where maximizing efficiency is the goal, minimizing the
4. Select a MOSFET Switch
Theselected2:1transformerrequiresanominal55Vrating
on the MOSFET switch, assuming no leakage inductance.
However, even a small amount of leakage inductance may
cause the drain to ring to double the anticipated voltage,
and generally this needs to be verified in the final design.
However, at currents below 10A it is fairly easy to find a
MOSFET with sufficiently low R
to be a very small
DS(ON)
contributor to maximum load efficiency losses while
similarly having a low enough Q to require minimum
G
current and minimal losses when driving the MOSFET at
lighter loads. Also, while considering the efficiency gains
and losses with a given MOSFET, it is important to real-
maximum voltage requirement on V may allow the use
IN
of a diode with a lower reverse bias rating and a lower
forward drop which could further increase efficiency. Al-
ternatively, if no efficient diode is available for a particular
reverse bias rating, it may be more beneficial to increase
the windings ratio until a diode with low forward drop can
be selected and then reevaluate whether that solution with
higher RMS diode current is beneficial.
ize that a trade-off in R
for V
may backfire
DS(ON)
DS(MAX)
if a snubber needs to be added to the circuit to meet the
voltagerequirementsanddissipatesmoreenergythanthe
difference in switch resistance. For that reason, a Vishay
Si7738 is selected to give lots of margin with its 150V
rating. The RMS current in the MOSFET can be calculated,
3748fb
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6. Select the Feedback Resistor for Proper Output
was considered in order to maximize efficiency but was
unabletoturnonfastenoughtosufficientlyclampthevery
fast leakage spike. The final solution is an RC snubber,
implemented iteratively, that decreases efficiency by less
than 1% across the majority ofthe outputload range while
reducing the worst-case drain voltage spike to just 80V.
Similarly, the anode of the output diode is probed to look
at potential ringing when the MOSFET switch turns on and
a peak of 45V is measured across the diode. Therefore,
no snubber circuitry is required.
Voltage
UsingtheiterativeprocesslaidoutearlierintheApplications
Information section, select the feedback resistor R and
FB
program the output voltage to 5V. Adjust the R resistor
TC
for temperature compensation of the output voltage. R
is selected as 6.04k.
REF
7. Select the Output Capacitor
The output capacitor should be chosen to minimize the
output voltage ripple while considering the increase in
size and cost of a larger capacitor. The following equation
calculates the output voltage ripple:
9. Optimize the Compensation Network
To setthecompensation,theapplicationisfirstconfigured
witha22nFcapacitorand10kresistorasastartingpoint.A
loadstepisappliedatbothlightandheavyloadsatthe60V
maximum input voltage and the capacitance is decreased
until damping decreases to the desired limit, in this case
with a compensation capacitance of 2.2nF and a response
implyingabout60˚ofphasemargin.Afterverifyingstability
at the minimum input voltage, as well, the compensation
capacitanceis doubled forsafety margin. Theseries resis-
tance is varied from 5k to 50k but the optimal response is
observed with 24.7k. For best ripple performance, select
a compensation capacitor not less than 1nF, and select a
compensation resistor not greater than 50k.
2
L
PRI •ILIM
∆VMAX
=
2• COUT • VOUT
8. Add Snubber Circuitry as Necessary
With the primary components selected, the application
shouldbeconstructedtoevaluateringingatthedrainofthe
MOSFET switch and to evaluate step response to optimize
the compensation network. If using an RC snubber, the
equations from the Applications Information section can
be used or a rough estimate of component values may
come from using the published leakage inductance of the
transformer and selecting a snubber capacitor ranging
from1to3timeslargerthanthepublishedMOSFEToutput
capacitance. In this application, the peak MOSFET drain
10. Soft-Start Capacitor and UVLO Resistor Divider
A soft-start capacitor helps during the start-up of the
flyback converter. Select the UVLO resistor divider for
the intended input operation range. These equations are
aforementioned.
voltagewasmeasuredatmaximumloadfromminimumV
and exceeded the 150V rating of the Si7738. A DZ clamp
IN
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For more information www.linear.com/LT3748
LT3748
applications inForMation
DESIGN EXAMPLE: 48V TO 12V, 2A OUT
The output diode only nominally has 30V of reverse bias
but a B360 diode is selected to ensure enough margin that
a snubber will not be required. A more expensive diode
with lower forward drop might recover several percent
efficiency and if high temperature operation is required
a diode rated for more average current at temperature
might be needed, but the B360 is small and inexpensive.
IN
The second example is a telecom application shown on
the front page of the datasheet. The focus of this applica-
tion is a cheap, small and simple solution. Table 3 shows
the results of the initial step for selecting the turns ratio.
In this example, the output diode is a much smaller ef-
ficiency loss due to the smaller voltage drop across it in
Therestofthedesignandcomponentselectionisstraight-
forward.
ratio to V
so minimizing output diode current is not
OUT
as important. Of greater importance is minimizing the
stresses on the MOSFET and output diode and the 4:1
case seems to be the best compromise for that to avoid
using a snubber on either device.
Suggested Layout
See Figures 14 and 15 for the DC1557A demo board lay-
out. Note the proximity of the R and R resistors (R9,
REF
FB
20µH of primary inductance is required for minimum
off-time while selecting the transformer, but in order to
minimize output ripple at maximum load a 60.8µH trans-
former is selected. To meet the saturation current (12A,
peak,onthesecondarywindings),aVersa-PakVP4-0047-R
provides a compact and efficient solution.
R5) to the LT3748 for optimal regulation. The location of
these two resistors as close to the physical pins of the
LT3748 is critical for accurate regulation. In addition, the
highfrequencycurrentpathfromtheV bypasscapacitor
IN
(C2)throughtheprimary-sidewinding,theMOSFETswitch
and sense resistor (R10) is a very tight loop. Similarly,
the high frequency current path for the MOSFET gate
For the MOSFET switch, since the input voltage is so high,
resistive losses on the primary side will be very low so
switchingfromtheINTV capacitorthroughthesourceof
CC
minimizingR
isofminimumbenefit.However,since
the MOSFET and sense resistor is similarly small in area.
For improved regulation it is recommended that the user
ensure that the high current ground is kept separate or
at least physically isolated from the small-signal ground
used by the other ground-referenced pins.
DS(ON)
the current for the gate drive is pulled from a high V ,
IN
minimizing both Q and operating frequency is essential
G
unlessathirdwindingisadded.TheVishaySi7464DP,with
a 200V V
and low gate charge, keeps the INTV
DS(MAX)
CC
current to just over 3mA, worst-case, which when added
to quiescent current will keep power dissipation in the
LT3748 to just over 1/4W at 72V V .
IN
Table 3. Voltage Stresses, Output Capability and Diode Current vs Turns Ratio in 48VIN to 12V, 2A Application
N
PS
V
V
D (V = 48V)
D (V = 36V)
I
(2A OUT AT V = 36V)
I (V = 48V)
DIODE(RMS) IN
DS(MAX)
R(DIODE)
IN
IN
LIM
IN
1
2
4
6
84
84
0.21
0.34
0.51
0.61
0.26
0.41
0.58
0.68
6
4
3
2
3.3
3.7
4.6
5.2
96
48
30
24
120
144
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For more information www.linear.com/LT3748
LT3748
applications inForMation
Figure 14. Demo Board Topside Silkscreen
Figure 15. Demo Board Topside Metal
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For more information www.linear.com/LT3748
LT3748
typical applications
320V
T1
V
V
V
V
1:1:1:1:1
O1
O2
O3
O4
IGBT
V
IN
DRIVER
12V TYP
D1
15V
10µF
1µF
825k
150k
C1
C2
C3
C4
Z1
Z1
Z1
6µH
71.5k
V
IN
EN/UVLO
300mA
R
FB
R
REF
IGBT
DRIVER
6.04k
D2
15V
LT3748
300mA
M1
TC
SS
GATE
SENSE
IGBT
DRIVER
V
C
GND INTV
CC
0.0125Ω
D3
15V
133k
10k
2nF
300mA
4.7µF
4700pF
3-PHASE
MOTOR
IGBT
DRIVER
D4
15V
49.9k
9.09k
C1-C4: 22µH 25V X7R ×2
D1-D4: DIODES INC. PDS3100
M1: VISHAY Si7898DP
T1: COILTRONICS VERSA-PAC VP4-0075-R
Z1: DIODES INC. DFLZ18-7
CATHODE
REF
300mA
TL431ACD
ANODE
0V
3748 F16
Figure 16. Automotive IGBT Controller Supply
17.0
16.5
V
O4
(NO LOAD)
16.0
15.5
15.0
14.5
14.0
V
(100mA)
O3
V
(SWEPT)
V
(300mA)
200
O2
O1
0
400
600
800
LOAD CURRENT (mA)
LT3748 F17
Figure 17. Cross Regulation Performance of the Supply in Figure 16 with VO1 and VO3 Loaded with VO2 Swept
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For more information www.linear.com/LT3748
LT3748
typical applications
DANGER HIGH VOLTAGE! OPERATION BY HIGH VOLTAGE TRAINED PERSONNEL ONLY
T1
1:10:10
+
D1
V
OUT
V
IN
300V
8mA
7V TO 15V
C8
0.22µF
50V
C1
10µF
C2
1µF
R5
R7
C5
C6
10k
600k
R1
357k
D3
–
V
IN
V
V
R3
140k
OUT
EN/UVLO
+
D2
R2
93.1k
OUT
R
FB
300V
8mA
R
REF
R8
600k
R4
6.04k
LT3748
SS
TC
–
V
OUT
GATE
M1
SENSE
C7
0.1µF
V
C
GND INTV
50mΩ
CC
3748 F18
R6
C9
100pF
C3
4.7µF
24.9k
C4
2.2nF
C5, C6: 0.1µF 600V ×2
D1, D2: CENTRAL SEMICONDUCTOR CMR1U-06M LTC
M1: FAIRCHILD FDM3622
T1: WÜRTH ELEKTRONIK 750311486
D3: CENTRAL SEMICONDUCTOR CMMR1U-02
Figure 18. 300V Isolated Flyback Converter
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For more information www.linear.com/LT3748
LT3748
typical applications
T1
1:1
+
–
D1
V
OUT
V
IN
48V
48V TYP
0.5A
4.7µF
100V
×3
4.7µF
0.22µF
66Ω
44.1µH
150pF
825k
V
IN
EN/UVLO
V
OUT
226k
R
49.9k
FB
R
REF
6.04k
LT3748
TC
SS
GATE
M1
SENSE
V
C
GND INTV
CC
0.030Ω
10k
2nF
3748 F19
4.7µF
4700pF
D1: CENTRAL SEMICONDUCTOR CMR5U-02-LTC
M1: VISHAY Si7464DP
T1: COILTRONICS VERSA-PAC VP4-0060-R
Figure 19. 48V, 0.5A Supply from 24V to 96V Input
100
95
V
= 24V
IN
90
85
V
= 48V
IN
80
75
V
IN
= 96V
70
65
60
0.1
0.2
OUTPUT CURRENT (A)
0.4
0
0.5
0.3
3748 F20
Figure 20. Efficiency of 48V Supply of Figure 17
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For more information www.linear.com/LT3748
LT3748
typical applications
PA1735NL
5.33:1:2.67
V
IN
+
V
OUT
36V TO
72V
5V, 8A
•
62µF
D1
D2
100Ω
120pF
1.2M
51k
910µF
V
•
IN
D4
3Ω
EN/UVLO
V
CC
147k
1µF
D6
R
REF
LT8309
FB
LT3748
R
D5
2.15k
6.04k
DRAIN
GATE
TC
INTV
CC
GATE
28k
M1
M2
GND
SS
V
SENSE
D1: SMBJ85A-13-F
4.7µF
GND INTV
0.22µF
C
CC
D2: CMMRIU-02
D3: BAV20W-7-F
D4: BAV20W-7-F
D5: CMZ5919B
0.012Ω
–
V
D3
OUT
3784 TA21
68Ω
12.1k
15nF
470pF
4.7nF
•
D6: CMHZ5258B
M1: BSC320N20NS3G
M2: BSC028N06NS
4.7µF
Figure 21. 5V, 8A Isolated Supply with Synchronous Secondary-Side Rectification Using LT8309
92
90
88
LT8309 & MOSFET
86
84
82
80
78
76
PDS760
DIODE
V
V
V
= 36V
= 48V
= 72V
IN
IN
IN
0
1
2
3
4
5
6
7
8
9
I
(A)
LOAD
Figure 22. Efficiency of the Supply in Figure 21 as well as Performance Using a Conventional PDS760 Schottky Rectifier
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For more information www.linear.com/LT3748
LT3748
typical applications
Figure 23 Thermal Image of the Supply in Figure 21 Using a PDS760 Instead of the LT8309 and Synchronous Switch at 5V/5A Output
Figure 24 Thermal Image of the Supply in Figure 21 with Synchronous Secondary-Side at 5V/5A Output with Much Lower Temperatures
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For more information www.linear.com/LT3748
LT3748
typical applications
PA1477NL
8:1.4
+
V
IN
V
OUT
36V TO
72V
3.3V, 10A
•
62µF
D1
D2
100Ω
120pF
1.2M
51k
1500µF
V
•
IN
D4
3Ω
EN/UVLO
V
CC
158k
1µF
D6
R
REF
LT8309
FB
LT3748
R
D5
2k
6.04k
DRAIN
GATE
INTV
CC
TC
GATE
M1
M2
GND
19.1k
SS
V
SENSE
D1: SMBJ85A-13-F
4.7µF
GND INTV
D2: CMMRIU-02
D3: BAV20W-7-F
D4: BAV20W-7-F
D5: CMZ5914 B
C
CC
0.22µF
0.015Ω
D3
–
68Ω
V
OUT
3748 F25
470pF
15k
22nF
•
4.7nF
D6: CMHZ5258B
M1: BSC320N20NS3G
M2: BSC016N04LS
4.7µF
Figure 25. 3.3V, 10A Isolated, Synchronous Flyback Converter
100
95
90
85
80
V
V
V
= 36V
= 48V
= 72V
IN
IN
IN
75
70
0
200
400
600
800
10
LOAD CURRENT (A)
LT3748 F26
Figure 26. Efficiency of the Supply in Figure 25
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For more information www.linear.com/LT3748
LT3748
package Description
MS Package
Varitation: MS16 (12)
16-Lead Plastic MSOP with 4 Pins Removed
(Reference LTC DWG # 05-08-1847 Rev A)
1.0
0.889 ± 0.127
(.035 ± .005)
(.0394)
BSC
5.23
(.206)
MIN
3.20 – 3.45
(.126 – .136)
4.039 ± 0.102
(.159 ± .004)
(NOTE 3)
0.280 ± 0.076
(.011 ± .003)
REF
16 14 121110
9
0.50
(.0197)
BSC
0.305 ± 0.038
(.0120 ± .0015)
TYP
3.00 ± 0.102
(.118 ± .004)
(NOTE 4)
4.90 ± 0.152
(.193 ± .006)
RECOMMENDED SOLDER PAD LAYOUT
DETAIL “A”
0.254
(.010)
0° – 6° TYP
1
3 5 6 7 8
GAUGE PLANE
1.0
(.0394)
BSC
0.53 ± 0.152
(.021 ± .006)
0.86
(.034)
REF
1.10
(.043)
MAX
DETAIL “A”
0.18
(.007)
SEATING
PLANE
0.17 – 0.27
(.007 – .011)
TYP
0.1016 ± 0.0508
(.004 ± .002)
MSOP (MS12) 0510 REV A
0.50
(.0197)
BSC
NOTE:
1. DIMENSIONS IN MILLIMETER/(INCH)
2. DRAWING NOT TO SCALE
3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.
INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX
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For more information www.linear.com/LT3748
LT3748
revision history
REV
DATE
DESCRIPTION
PAGE NUMBER
A
10/10 Added H-grade information to Absolute Maximum Ratings, Pin Configuration, Order Information, and Electrical
Characteristics sections.
2, 3
Revised text and Table 2 in the Applications Information section.
Revised Figures 10 and 17 in the Applications Information section.
Revised Typical Application drawing.
15, 16, 20, 22
26, 27
30
B
2/15
Added MP-grade device.
2, 3
Added Synchronous Secondary Applications paragraphs
Added Figures 21, 22, 23, 24, 25 and 26
20
29, 30, 31
3748fb
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-
tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.
33
LT3748
typical application
5V, 2A Output from Automotive Input with Continuous Operation from 6V to 45V
D1
T1
2:1
+
V
V
OUT
IN
5V, 2A
12V TYP
100µF
10V
10µF
18.2Ω
330pF
D2
8.3µH
825k
215k
V
–
IN
V
OUT
EN/UVLO
48.7k
R
FB
R
REF
6.04k
LT3748
D1: DIODES INC. SBR8U60P5
D2: DIODES INC. BZT52C5V6
M1: Si7738DP
TC
SS
GATE
M1
T1: PULSE PA3177NL
SENSE
V
GND INTV
CC
C
0.016Ω
24.7k
2.2nF
86.6k
47nF
3748 TA02
4.7µF
relateD parts
PART NUMBER
DESCRIPTION
COMMENTS
Low I Monolithic No-Opto Flybacks, 5-Lead TSOT-23
LT8300
100V Micropower Isolated Flyback Converter with
IN
Q
150V/260mA Switch
LT8301
LT8302
42V Micropower Isolated Flyback Converter with
Low I Monolithic No-Opto Flybacks, 5-Lead TSOT-23
Q
IN
65V/1.2A Switch
42V Micropower Isolated Flyback Converter with
Low I Monolithic No-Opto Flybacks, 8-Lead SO-8E
Q
IN
65V/3.6A Switch
LT8309
Secondary-Side Synchronous Rectifier Driver
40V Isolated Flyback Converter
40V Isolated Flyback Converters
40V/100V Flyback, Boost Controllers
40V/100V Flyback, Boost Converters
20V Isolated Flyback Controller
20V Isolated Flyback Controller
4.5V ≤ V ≤ 40V, Fast Turn-On and Turn-Off, 5-Lead TSOT-23
CC
LT3573
Monolithic No-Opto Flyback with Integrated 1.25A, 60V Switch
Monolithic No-Opto Flybacks with Integrated 0.65A / 2.5A 60V Switch
Universal Controllers with Small Package and Powerful Gate Drive
Monolithic with Integrated 5A/3.3A Switch
LT3574/LT3575
LT3757/LT3758
LT3957/LT3958
LT1725
Controller with Load Compensation Circuitry
LT1737
No Opto-Isolator or Third Winding Required, Up to 50W Output
LTC®3803/LTC3803-3 200kHz/300kHz Flyback DC/DC Controllers
LTC3803-5
V
IN
and V
Limited Only by External Components
OUT
LTC3805/LTC3805-5
Adjustable Frequency Flyback Controllers
V
and V
Limited Only by External Components
IN
OUT
3748fb
LT 0215 REV B • PRINTED IN USA
LinearTechnology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
34
(408)432-1900 FAX: (408) 434-0507 www.linear.com/LT3748
●
●
LINEAR TECHNOLOGY CORPORATION 2010
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