LT1158I [Linear]
Half Bridge N-Channel Power MOSFET Driver; 半桥式N沟道功率MOSFET驱动器
| 型号： | LT1158I |
| 厂家： | 
Linear |
| 描述： | Half Bridge N-Channel Power MOSFET Driver |
| 文件： | 总20页 (文件大小：425K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
LT1158
Half Bridge N-Channel
Power MOSFET Driver
U
DESCRIPTION
FEATURES
Drives Gate of Top Side MOSFET Above V+
A single input pin on the LT1158 synchronously controls
two N-channel power MOSFETs in a totem pole configura-
tion. Unique adaptive protection against shoot-through
currents eliminates all matching requirements for the two
MOSFETs. This greatly eases the design of high efficiency
motor control and switching regulator systems.
■
■
Operates at Supply Voltages from 5V to 30V
■
150ns Transition Times Driving 3000pF
■
Over 500mA Peak Driver Current
■
Adaptive Non-Overlap Gate Drives
■
Continuous Current Limit Protection
■
Auto Shutdown and Retry Capability
A continuous current limit loop in the LT1158 regulates
short-circuit current in the top power MOSFET. Higher
start-up currents are allowed as long as the MOSFET VDS
does not exceed 1.2V. By returning the fault output to the
enable input, the LT1158 will automatically shut down in
the event of a fault and retry when an internal pull-up
current has recharged the enable capacitor.
■
Internal Charge Pump for DC Operation
■
Built-In Gate Voltage Protection
■
Compatible with Current-Sensing MOSFETs
■
TTL/CMOS Input Levels
Fault Output Indication
■
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APPLICATIONS
An on-chip charge pump is switched in when needed to
turn on the top N-channel MOSFET continuously. Special
circuitry ensures that the top side gate drive is safely
maintained in the transition between PWM and DC opera-
tion. The gate-to-source voltages are internally limited to
14.5V when operating at higher supply voltages.
■
PWM of High Current Inductive Loads
■
Half Bridge and Full Bridge Motor Control
■
Synchronous Step-Down Switching Regulators
Three-Phase Brushless Motor Drive
High Current Transducer Drivers
■
■
■
Battery-Operated Logic-Level MOSFETs
U
TYPICAL APPLICATION
24V
Top and Bottom Gate Waveforms
1N4148
0.1µF
BOOST DR
+
BOOST
V
T GATE DR
+
IRFZ34
+
+
500µF
LOW
ESR
+
10µF
V
T GATE FB
T SOURCE
PWM
0Hz TO
100kHz
+
+
INPUT
SENSE
LT1158
R
SENSE
0.015Ω
–
LOAD
ENABLE
FAULT
BIAS
SENSE
–
VIN = 24V
RL = 12Ω
1µF
1158 TA02
B GATE DR
B GATE FB
IRFZ34
0.01µF
GND
LT1158 TA01
1
LT1158
W W U W
U
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ABSOLUTE MAXIMUM RATINGS
PACKAGE/ORDER INFORMATION
Supply Voltage (Pins 2, 10) .................................... 36V
Boost Voltage (Pin 16)............................................ 56V
Continuous Output Currents (Pins 1, 9, 15) ....... 100mA
Sense Voltages (Pins 11, 12)................... –5V to V++5V
Top Source Voltage (Pin 13).................... –5V to V++5V
Boost to Source Voltage (V16 – V13) ....... –0.3V to 20V
Operating Temperature Range
TOP VIEW
ORDER PART
NUMBER
1
2
3
4
5
6
7
8
BOOST
16
15
14
13
12
11
10
9
BOOST DR
+
T GATE DR
T GATE FB
T SOURCE
V
BIAS
ENABLE
FAULT
LT1158CN
LT1158IN
+
SENSE
–
SENSE
INPUT
+
V
GND
LT1158C ................................................ 0°C to 70°C
LT1158I ............................................ –40°C to 85°C
Junction Temperature (Note 1)
LT1158C .......................................................... 125°C
LT1158I ........................................................... 150°C
Storage Temperature Range ................ –65°C to 150°C
Lead Temperature (Soldering, 10 sec.)................ 300°C
B GATE DR
B GATE FB
N PACKAGE
16-LEAD PLASTIC DIP
θJA = 70°C/W
TOP VIEW
LT1158CS
LT1158IS
BOOST DR
1
2
3
4
5
6
7
8
16
BOOST
+
V
15
14
13
12
11
10
9
T GATE DR
T GATE FB
T SOURCE
BIAS
ENABLE
FAULT
+
SENSE
–
INPUT
SENSE
+
GND
V
B GATE FB
B GATE DR
S PACKAGE
16-LEAD PLASTIC SOL
θJA = 110°C/W
Consult factory for Military grade parts.
Test Circuit, TA = 25
°
C, V+ = V16 = 12V, V11 = V12 = V13 = 0V, Pins 1 and 4
open, Gate Feedback pins connected to Gate Drive pins unless otherwise specified.
ELECTRICAL CHARACTERISTICS
LT1158I
MIN TYP MAX
LT1158C
MIN TYP MAX UNITS
SYMBOL PARAMETER
CONDITIONS
+
I + I
DC Supply Current (Note 2) V = 30V, V16 = 15V, V4 = 0.5V
2.2
7
13
3
10
18
2.2
7
13
3
10
18
mA
mA
mA
2
10
+
V = 30V, V16 = 15V, V6 = 0.8V
4.5
8
4.5
8
+
V = 30V, V16 = 15V, V6 = 2V
+
I
Boost Current
V = V13 = 30V, V16 = 45V, V6 = 0.8V
3
1.4
5
4.5
2
3
1.4
5
4.5
2
mA
V
16
V6
Input Threshold
●
●
●
●
●
0.8
0.8
I
Input Current
V6 = 5V
15
15
µA
V
6
V4
Enable Low Threshold
Enable Hysteresis
Enable Pullup Current
Charge Pump Voltage
V6 = 0.8V, Monitor V9
V6 = 0.8V, Monitor V9
V4 = 0V
0.9 1.15 1.4
0.85 1.15 1.4
∆V4
1.3
15
1.5 1.7
1.2
15
1.5
25
1.8
35
V
I
25
35
µA
4
+
V15
V = 5V, V6 = 2V, Pin 16 open, V13 → 5V
●
●
9
40
11
43
9
40
11
43
V
V
+
V = 30V, V6 = 2V, Pin16 open, V13 → 30V
47
47
+
V9
V1
Bottom Gate “ON” Voltage
Boost Drive Voltage
V = V16 = 18V, V6 = 0.8V
●
●
12 14.5 17
12 14.5 17
12 14.5 17
12 14.5 17
V
V
+
V = V16 = 18V, V6 = 0.8V, 100mA Pulsed Load
2
LT1158
Test Circuit, TA = 25
°
C, V+ = V16 = 12V, V11 = V12 = V13 = 0V, Pins 1 and 4
open, Gate Feedback pins connected to Gate Drive pins unless otherwise specified.
ELECTRICAL CHARACTERISTICS
LT1158I
TYP MAX
LT1158C
MIN TYP MAX UNITS
SYMBOL PARAMETER
CONDITIONS
MIN
1
+
V14 – V13 Top Turn-Off Threshold
V = V16 = 5V, V6 = 0.8V
1.75
1.5
2.5
2
1
1
1.75 2.5
V
V
+
V8
Bottom Turn-Off Threshold
Fault Output Leakage
V = V16 = 5V, V6 = 2V
1
1.5
0.1
0.5
2
1
1
+
I
V = 30V, V16 = 15V, V6 = 2V
●
●
0.1
1
µA
V
5
+
V5
Fault Output Saturation
V = 30V, V16 = 15V, V6 = 2V, I5 = 10mA
0.5
1
+
V12 – V11 Fault Conduction Threshold
V12 – V11 Current Limit Threshold
V = 30V, V16 = 15V, V6 = 2V, I5 = 100µA
90
110
150
130
85 110 135
120 150 180
mV
+
V = 30V, V16 = 15V, V6 = 2V, Closed Loop
130
120
170
180
mV
mV
120
180
+
V12 – V11 Current Limit Inhibit
V = V12 = 12V, V6 = 2V, Decrease V11
1.1
1.25
1.4
1.1 1.25 1.4
V
V
DS
Threshold
until V15 goes low
t
t
t
t
t
t
Top Gate Rise Time
Pin 6 (+) Transition, Meas. V15 – V13 (Note 3)
Pin 6 (–) Transition, Meas. V15 – V13 (Note 3)
Pin 6 (–) Transition, Meas. V15 – V13 (Note 3)
Pin 6 (–) Transition, Meas. V9 (Note 3)
Pin 6 (+) Transition, Meas. V9 (Note 3)
Pin 6 (+) Transition, Meas. V9 (Note 3)
●
●
●
●
●
●
130
350
120
130
200
100
250
550
250
250
400
200
130 250
350 550
120 250
130 250
200 400
100 200
ns
ns
ns
ns
ns
ns
R
D
F
Top Gate Turn-Off Delay
Top Gate Fall Time
Bottom Gate Rise Time
Bottom Gate Turn-Off Delay
Bottom Gate Fall Time
R
D
F
The
range.
Note 1: T is calculated from the ambient temperature T and power
●
denotes specifications that apply over the full operating temperature
Note 2: Dynamic supply current is higher due to the gate charge being
delivered at the switching frequency. See typical performance
characteristics and applications information.
J
A
dissipation P according to the following formulas:
Note 3: Gate rise times are measured from 2V to 10V, delay times are
D
measured from the input transition to when the gate voltage has decreased
to 10V, and fall times are measured from 10V to 2V.
LT1158IN, LT1158CN: T = T + (P × 70°C/W)
J
A
D
LT1158IS, LT1158CS: T = T + (P × 110°C/W)
J
A
D
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TYPICAL PERFORMANCE CHARACTERISTICS
Dynamic Supply Current (V+)
DC Supply Current
DC Supply Current
30
25
20
15
10
5
14
12
14
12
I
+ I + I
10 16
50% DUTY CYCLE
2
V13 = 0V
INPUT HIGH
I
+ I + I
10 16
2
+
V
= 12V
C
= 3000pF
GATE
+
V13 = V
INPUT HIGH
INPUT LOW
10
8
10
+
INPUT LOW
V
= 24V
8
6
4
2
+
V
= 12V
6
+
V
= 6V
4
ENABLE LOW
ENABLE LOW
2
0
0
0
1
10
INPUT FREQUENCY (kHz)
100
10
20
SUPPLY VOLTAGE (V)
35 40
50
TEMPERATURE (°C)
100 125
0
5
15
25 30
–50 –25
0
25
75
LT1158 G03
LT1158 G01
LT1158 G02
3
LT1158
TYPICAL PERFORMANCE CHARACTERISTICS
W
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Input Thresholds
Charge Pump Output Voltage
Dynamic Supply Current
40
35
30
25
20
15
10
5
50
45
40
35
30
25
20
15
10
5
2.0
1.8
1.6
1.4
1.2
1.0
0.8
50% DUTY CYCLE
+
V
= 12V
V(HIGH)
–40°C
+25°C
+85°C
NO LOAD
C
GATE
= 10000pF
–40°C
+25°C
+85°C
C
GATE
= 3000pF
10µA LOAD
V(LOW)
C
GATE
= 1000pF
0
0
30
SUPPLY VOLTAGE (V)
0
5
10
20 25
35 40
1
10
INPUT FREQUENCY (kHz)
100
15
0
20
30 35
5
10 15
25
40
SUPPLY VOLTAGE (V)
LT1158 G06
LT1158 G04
LT1158 G05
Fault Conduction Threshold
Current Limit Threshold
Enable Thresholds
160
150
140
130
120
110
100
90
200
190
180
170
160
150
140
130
120
110
100
3.5
3.0
CLOSED LOOP
V11 = 0V
V(HIGH)
–40°C
+85°C
+25°C
+25°C
2.5
+85°C
+25°C
2.0
1.5
1.0
0.5
+85°C
+25°C
–40°C
–40°C
+85°C
–40°C
V(LOW)
80
70
60
0
0
20
30 35
0
20
30 35
5
10 15
25
40
5
10 15
25
40
10
20
35 40
0
5
15
25 30
SUPPLY VOLTAGE (V)
SUPPLY VOLTAGE (V)
SUPPLY VOLTAGE (V)
LT1158 G08
LT1158 G09
LT1158 G07
Current Limit Inhibit VDS Threshold
Bottom Gate Rise Time
Bottom Gate Fall Time
1.50
1.45
1.40
1.35
1.30
1.25
1.20
1.15
1.10
1.05
1.00
400
350
300
250
200
150
100
50
400
350
300
250
200
150
100
50
V2 – V11
C
= 10000pF
GATE
C
GATE
= 10000pF
–40°C
+25°C
+85°C
C
= 3000pF
= 1000pF
C
GATE
= 3000pF
= 1000pF
GATE
C
GATE
C
GATE
0
0
0
20
30 35
5
10 15
25
40
5
15 20 25
10
SUPPLY VOLTAGE (V)
35
5
15 20 25
10
SUPPLY VOLTAGE (V)
35
0
30
40
0
30
40
SUPPLY VOLTAGE (V)
LT1158 G10
LT1158 G12
LT1158 G11
4
LT1158
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TYPICAL PERFORMANCE CHARACTERISTICS
Transition Times vs RGate
Top Gate Rise Time
Top Gate Fall Time
800
700
400
350
300
250
200
150
100
50
400
350
300
250
200
150
100
50
+
V
C
= 12V
= 3000pF
GATE
C
GATE
= 10000pF
600
500
400
300
C
GATE
= 10000pF
RISE TIME
C
GATE
= 3000pF
= 1000pF
FALL TIME
C
GATE
= 3000pF
= 1000pF
200
100
0
C
GATE
C
GATE
0
0
5
15 20 25
10
SUPPLY VOLTAGE (V)
35
70
80
90
100
5
15 20 25
35
0
30
40
10 20 30
50 60
0
10
30
40
0
40
SUPPLY VOLTAGE (V)
GATE RESISTANCE (Ω)
LT1158 G14
LT1158 G13
LT1158 G15
U
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PI FU CTIO S
Pin 10 (V+): Bottom side driver supply; must be con-
nected to the same supply as pin 2.
Pin 1 (Boost Drive): Recharges and clamps the bootstrap
capacitorto14.5Vhigherthanpin13viaanexternaldiode.
Pin 2 (V+): Main supply pin; must be closely decoupled to
Pin 11 (Sense Negative): The floating reference for the
current limit comparator. Connects to the low side of a
currentshuntorKelvinleadofacurrent-sensingMOSFET.
When pin 11 is within 1.2V of V+, current limit is inhibited.
the ground pin 7.
Pin 3 (Bias): Decouple point for the internal 2.6V bias
generator. Pin 3 cannot have any external DC loading.
Pin 12 (Sense Positive): Connects to the high side of the
current shunt or sense lead of a current-sensing MOSFET.
A built-in offset between pins 11 and 12 in conjunction
with RSENSE sets the top MOSFET short-circuit current.
Pin 4 (Enable): When left open, the LT1158 operates
normally. Pulling pin 4 low holds both MOSFETs off
regardless of the input state.
Pin 5 (Fault): Open collector NPN output which turns on
when V12 – V11 exceeds the fault conduction threshold.
Pin 13 (Top Source): Top side driver return; connects to
MOSFET source and low side of the bootstrap capacitor.
Pin 6 (Input): Taking pin 6 high turns the top MOSFET on
and bottom MOSFET off; pin 6 low reverses these states.
An input latch captures each low state, ignoring an ensu-
ing high until pin 13 has gone below 2.6V.
Pin 14 (Top Gate Feedback): Must connect directly to the
top power MOSFET gate. The bottom MOSFET turn-on is
inhibited until V14 – V13 has discharged to 1.75V. An on-
chip charge pump also feeds the top gate via pin 14.
Pin 8 (Bottom Gate Feedback): Must connect directly to
thebottompowerMOSFETgate. ThetopMOSFETturn-on
is inhibited until pin 8 has discharged to 1.5V. A hold-on
current source also feeds the bottom gate via pin 8.
Pin 15 (Top Gate Drive): The high current drive point for
thetopMOSFET.Whenagateresistorisused,itisinserted
between pin 15 and the gate of the MOSFET.
Pin 16 (Boost): Top side driver supply; connects to the
high side of the bootstrap capacitor and to a diode either
from supply (V+ < 10V) or from pin 1 (V+ > 10V).
Pin 9 (Bottom Gate Drive): The high current drive point
for the bottom MOSFET. When a gate resistor is used, it is
inserted between pin 9 and the gate of the MOSFET.
5
LT1158
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FUNCTIONAL DIAGRA
+
BOOST
16
V
+
V
CHG
PUMP
BOOST DR
1
2
15
14
T GATE DR
T GATE FB
+
+
V
V
15V
BIAS
GEN
LOGIC
INPUT
3
BIAS
–
+
T
25µA
1.75V
+
–
ENABLE
FAULT
4
5
13
T SOURCE
7.5V
2.7V
1.2V
110mV
+
+
–
12
11
SENSE
S
–
SENSE
–
+
O
2.6V
7.5V
+
10
V
1-SHOT
R
S
R
+
–
INPUT
6
Q
Q
1.4V
15V
B GATE DR
9
1-SHOT
R
–
+
B
1.5V
GND
7
8
1158 FD
B GATE FB
6
LT1158
TEST CIRCUIT
150Ω
2W
16
15
14
13
12
11
10
9
1
2
BOOST DR
BOOST
T GATE DR
T GATE FB
T SOURCE
+
+
VN2222LL
1µF
V16
+
V
+
0.01µF
+
+
3
4
5
6
7
8
V
10µF
BIAS
2k
1/2W
3000pF
+
ENABLE
FAULT
INPUT
GND
V14 – V13
+
LT1158
+
CLOSED
LOOP
V4
SENSE
3k
1/2W
100Ω
+
–
SENSE
V12
V6
+
50Ω
+
V
V11
B GATE FB
B GATE DR
3000pF
+
V8
LT1158 TC01
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(Refer to Functional Diagram)
OPERATIO
The LT1158 self-enables via an internal 25µA pull-up on
the enable pin 4. When pin 4 is pulled down, much of the
input logic is disabled, reducing supply current to 2mA.
Withpin4low, theinputstateisignoredandbothMOSFET
gates are actively held low. With pin 4 enabled, one or the
other of the 2 MOSFETs is turned on, depending on the
state of the input pin 6: high for top side on, and low for
bottom side on. The 1.4V input threshold is regulated and
has 200mV of hysteresis.
Whenever there is an input transition on pin 6, the LT1158
follows a logical sequence to turn off one MOSFET and
turn on the other. First, turn-off is initiated, then VGS is
monitoreduntilithasdecreasedbelowtheturn-offthresh-
old, and finally the other gate is turned on. An input latch
gets reset by every low state at pin 6, but can only be set
if thetopsourcepinhasgonelow,indicatingthattherewill
be sufficient charge in the bootstrap capacitor to safely
turn on the top MOSFET.
In order to allow operation over 5V to 30V nominal supply
voltages, an internal bias generator is employed to furnish
constant bias voltages and currents. The bias generator is
decoupled at pin 3 to eliminate any effects from switching
transients. No DC loading is allowed on pin 3.
In order to conserve power, the gate drivers only provide
turn-on current for up to 2µs, set by internal one-shot
circuits. EachLT1158drivercandeliver500mAfor2µs, or
1000nC of gate charge––more than enough to turn on
multipleMOSFETsinparallel. Onceturnedon, eachgateis
heldhighbyaDCgatesustainingcurrent: thebottomgate
by a 100µA current source, and the top gate by an on-chip
charge pump running at approximately 500kHz.
The top and bottom gate drivers in the LT1158 each utilize
two gate connections: 1) A gate drive pin, which provides
the turn-on and turn-off currents through an optional
series gate resistor; and 2) A gate feedback pin which
connectsdirectlytothegatetomonitorthegate-to-source
voltage and supply the DC gate sustaining current.
The floating supply for the top side driver is provided by
a bootstrap capacitor between the boost pin 16 and top
source pin 13. This capacitor is recharged each time pin
7
LT1158
OPERATIO
13 goes low in PWM operation, and is maintained by the
charge pump when the top MOSFET is on DC. A regulated
boost driver at pin 1 employs a source-referenced 15V
clamp that prevents the bootstrap capacitor from over-
charging regardless of V+ or output transients.
U
(Refer to Functional Diagram)
The comparator input pins 11 and 12 are normally con-
nected across a shunt in the source of the top power
MOSFET (or to a current-sensing MOSFET). When pin 11
is more than 1.2V below V+ and V12 – V11 exceeds the
110mV offset, fault pin 5 begins to sink current. During a
short circuit, the feedback loop regulates V12 – V11 to
150mV, thereby limiting the top MOSFET current.
The LT1158 provides a current-sense comparator and
faultoutputcircuitforprotectionofthetoppowerMOSFET.
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APPLICATIONS INFORMATION
Power MOSFET Selection
the MOSFET junction temperature will be 125°C, and
∂ = 0.007(125 – 25) = 0.7. This means that the required
RDS(ON) of the MOSFET will be 0.089Ω/1.7 = 0.0523Ω,
which can be satisfied by an IRFZ34.
Since the LT1158 inherently protects the top and bottom
MOSFETs from simultaneous conduction, there are no
size or matching constraints. Therefore selection can be
made based on the operating voltage and RDS(ON)
requirements. The MOSFET BVDSS should be at least
2 × VSUPPLY, and should be increased to 3 × VSUPPLY in
harshenvironmentswithfrequentfaultconditions. Forthe
LT1158 maximum operating supply of 30V, the MOSFET
BVDSS should be from 60V to 100V.
Note that these calculations are for the continuous oper-
ating condition; power MOSFETs can sustain far higher
dissipations during transients. Additional RDS(ON) con-
straints are discussed under Starting High In-Rush Cur-
rent Loads.
The MOSFET RDS(ON) is specified at TJ = 25°C and is
generally chosen based on the operating efficiency re-
quired as long as the maximum MOSFET junction tem-
perature is not exceeded. The dissipation in each MOSFET
is given by:
Paralleling MOSFETs
GATE DR
LT1158
GATE FB
R
R
2
G
G
P =D I
1+ ∂ R
(DS) (
)
DS ON
(
)
where D is the duty cycle and ∂ is the increase in RDS(ON)
at the anticipated MOSFET junction temperature. From
this equation the required RDS(ON) can be derived:
R : OPTIONAL 10Ω
G
1158 F01
Figure 1. Paralleling MOSFETs
P
RDS ON
=
(
)
2
D I
1+ ∂
WhentheabovecalculationsresultinalowerRDS(ON) than
is economically feasible with a single MOSFET, two or
more MOSFETs can be paralleled. The MOSFETs will
inherently share the currents according to their RDS(ON)
ratio. The LT1158 top and bottom drivers can each drive
four power MOSFETs in parallel with only a small loss in
switching speeds (see Typical Performance Characteris-
tics). Individual gate resistors may be required to
“decouple” each MOSFET from its neighbors to prevent
(DS) (
)
For example, if the MOSFET loss is to be limited to 2W
when operating at 5A and a 90% duty cycle, the required
RDS(ON) would be 0.089Ω/(1 + ∂). (1 + ∂) is given for each
MOSFET in the form of a normalized RDS(ON) vs. tempera-
ture curve, but ∂ = 0.007/°C can be used as an approxima-
tion for low voltage MOSFETs. Thus if TA = 85°C and the
available heat sinking has a thermal resistance of 20°C/W,
8
LT1158
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APPLICATIONS INFORMATION
highfrequencyoscillations––consultmanufacturer’srec-
ommendations. If individual gate decoupling resistors are
used, the gate feedback pins can be connected to any one
of the gates.
MOSFET Gate Drive Protection
For supply voltages of over 8V, the LT1158 will protect
standard N-channel MOSFETs from under or overvoltage
gatedriveconditionsforanyinputdutycycleincludingDC.
Gate-to-source zener clamps are not required and not
recommended since they can reduce operating efficiency.
Driving multiple MOSFETs in parallel may restrict the
operating frequency at high supply voltages to prevent
over-dissipation in the LT1158 (see Gate Charge and
Driver Dissipation below). When the total gate capaci-
tance exceeds 10,000pF on the top side, the bootstrap
capacitorshouldbeincreasedproportionallyabove0.1µF.
A discontinuity in tracking between the output pulse width
and input pulse width may be noted as the top side
MOSFET approaches 100% duty cycle. As the input low
signal becomes narrower, it may become shorter than the
timerequiredtorecharge thebootstrapcapacitortoasafe
voltage for the top side driver. Below this duty cycle the
output pulse width will stop tracking the input until the
input low signal is <100ns, at which point the output will
jump to the DC condition of top MOSFET “on” and bottom
MOSFET “off.”
Gate Charge and Driver Dissipation
A useful indicator of the load presented to the driver by a
power MOSFET is the total gate charge QG, which includes
the additional charge required by the gate-to-drain swing.
QGisusuallyspecifiedforVGS=10VandVDS=0.8VDS(MAX)
.
When the supply current is measured in a switching
application, it will be larger than given by the DC electrical
characteristics because of the additional supply current
associated with sourcing the MOSFET gate charge:
Low Voltage Operation
The LT1158 can operate from 5V supplies (4.5V min.) and
in 6V battery-powered applications by using logic-level
N-channel power MOSFETs. These MOSFETs have 2V
maximum threshold voltages and guaranteed RDS(ON)
limits at VGS = 4V. The switching speed of the LT1158,
unlike CMOS drivers, does not degrade at low supply
voltages. Foroperationdownto4.5V, theboostpinshould
be connected as shown in Figure 2 to maximize gate drive
to the top side MOSFET. Supply voltages over 10V should
not be used with logic-level MOSFETs because of their
lower maximum gate-to-source voltage rating.
dQG
dt
dQG
dt
ISUPPLY =IDC +
+
TOP
BOTTOM
The actual increase in supply current is slightly higher due
to LT1158 switching losses and the fact that the gates are
being charged to more than 10V. Supply current vs.
switching frequency is given in the Typical Performance
Characteristics.
The LT1158 junction temperature can be estimated by
using the equations given in Note 1 of the electrical
characteristics. For example, the LT1158SI is limited to
less than 25mA from a 24V supply:
5V
N.C.
+
D1
BOOST DR
BOOST
TJ = 85°C + (25mA × 24V × 110°C/W)
= 151°C exceeds absolute maximum
0.1µF
T GATE DR
T GATE FB
T SOURCE
LT1158
LOGIC-LEVEL
MOSFET
In order to prevent the maximum junction temperature
from being exceeded, the LT1158 supply current must be
checked with the actual MOSFETs operating at the maxi-
mum switching frequency.
D1: LOW-LEAKAGE SCHOTTKY
BAT85 OR EQUIVALENT
LT1158 F02
Figure 2. Low Voltage Operation
9
LT1158
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APPLICATIONS INFORMATION
Ugly Transient Issues
regulators. Most step-down regulators use a high current
Schottky diode to conduct the inductor current when the
switch is off. The fractions of the oscillator period that the
switch is on (switch conducting) and off (diode conduct-
ing) are given by:
In PWM applications the drain current of the top MOSFET
is a square wave at the input frequency and duty cycle. To
prevent large voltage transients at the top drain, a low ESR
electrolytic capacitor must be used and returned to the
power ground. The capacitor is generally in the range of
250µF to 5000µF and must be physically sized for the
RMS current flowing in the drain to prevent heating and
premature failure. In addition, the LT1158 requires a
separate 10µF capacitor connected closely between pins
2 and 7.
VOUT
SWITCH “ON” =
SWITCH “OFF” =
× TOTAL PERIOD
V
IN
V − VOUT
IN
× TOTAL PERIOD
V
IN
The LT1158 top source and sense pins are internally
protected against transients below ground and above
supply. However, the gate drive pins cannot be forced
below ground. In most applications, negative transients
coupled from the source to the gate of the top MOSFET do
not cause any problems. However, in some high current
(10A and above) motor control applications, negative
transients on the top gate drive may cause early tripping
of the current limit. A small Schottky diode (BAT85) from
pin 15 to ground avoids this problem.
Note that for VIN > 2VOUT, the switch is off longer than it is
on, making the diode losses more significant than the
switch. The worst case for the diode is during a short
circuit, when VOUT approaches zero and the diode con-
ducts the short-circuit current almost continuosly.
Figure 3 shows the LT1158 used to synchronously drive a
pair of power MOSFETs in a step-down regulator applica-
tion, where the top MOSFET is the switch and the bottom
MOSFET replaces the Schottky diode. Since both conduc-
tionpathshavelowlosses,thisapproachcanresultinvery
high efficiency––from 90% to 95% in most applications.
And for regulators under 5A, using low RDS(ON) N-channel
MOSFETs eliminates the need for heatsinks.
Switching Regulator Applications
The LT1158 is ideal as a synchronous switch driver to
improve the efficiency of step-down (buck) switching
V
IN
+
T GATE DR
T GATE FB
R
GS
R
SENSE
V
T SOURCE
OUT
+
LT1158
+
SENSE
SENSE
–
FAULT
INPUT
REF
PWM
B GATE DR
B GATE FB
1158 F03
Figure 3. Adding Synchronous Switching to a Step-Down Switching Regulator
10
LT1158
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APPLICATIONS INFORMATION
100
efficiency vs. output current for the Figure 12 regulator
with VIN = 12V.
90
Current Limit in Switching Regulator Applications
FIGURE 12 CIRCUIT
V
= 12V
IN
Current is sensed by the LT1158 by measuring the voltage
across a current shunt (low valued resistor). Normally,
this shunt is placed in the source lead of the top MOSFET
(see Short-Circuit Protection in Bridge Applications).
However, in step-down switching regulator applications,
theremotecurrentsensingcapabilityoftheLT1158allows
the actual inductor current to be sensed. This is done by
placing the shunt in the output lead of the inductor as
shown in Figure 3. Routing of the sense+ and sense– PC
tracesiscriticaltopreventstraypickup.Thesetracesmust
be routed together at minimum spacing and use a Kelvin
connection at the shunt.
80
70
60
1.5 2.0 2.5
OUTPUT CURRENT (A)
3.5
4.0
0
0.5 1.0
3.0
LT1158 F04
Figure 4. Typical Efficiency Curve for Step-Down
Regulator with Synchronous Switch
One fundamental difference in the operation of a step-
downregulatorwithsynchronousswitchingisthatitnever
becomes discontinuous at light loads. The inductor cur-
rent doesn’t stop ramping down when it reaches zero, but
actually reverses polarity resulting in a constant ripple
current independent of load. This does not cause any
efficiency loss as might be expected, since the negative
inductor current is returned to VIN when the switch turns
back on.
When the voltage across RSENSE exceeds 110mV, the
LT1158 fault pin begins to conduct. By feeding the fault
signal back to a control input of the PWM, the LT1158 will
assume control of the duty cycle forming a true current
mode loop to limit the output current:
110mV
RSENSE
IOUT
=
in current limit
In LT3525 based circuits, connecting the fault pin to the
LT3525 soft-start pin accomplishes this function. In cir-
cuits where the LT1158 input is being driven with a ramp
or sawtooth, the fault pin is used to pull down the DC level
of the input.
TheLT1158performsthesynchronousMOSFETdriveand
current sense functions in a step-down switching regula-
tor. A reference and PWM are required to complete the
regulator. Any voltage-mode PWM controller may be
used, but the LT3525 is particularly well suited to high
power, high efficiency applications such as the 10A circuit
shown in Figure 13. In higher current regulators a small
Schottky diode across the bottom MOSFET helps to re-
duce reverse-recovery switching losses.
The constant off-time circuits shown in Figures 10 and 12
are unique in that they also use the current sense during
normal operation. The LT1431 output reduces the normal
LT1158 110mV fault conduction threshold such that the
fault pin conducts at the required load current, thus
discharging the input ramp capacitor. In current limit the
LT1431 output turns off, allowing the fault conduction
threshold to reach its normal value.
The LT1158 input pin can also be driven directly with a
ramp or sawtooth. In this case, the DC level of the input
waveform relative to the 1.4V threshold sets the LT1158
duty cycle. In the 5V to 3.3V converter circuit shown in
Figure 11, an LT1431 controls the DC level of a triangle
wave generated by a CMOS 555. The Figure 10 and 12
circuits use an RC network to ramp the LT1158 input
back up to its 1.4V threshold following each switch
cycle, setting a constant off time. Figure 4 shows the
The resistor RGS shown in Figure 3 is necessary to prevent
output voltage overshoot due to charge coupled into the
gate of the top MOSFET by a large start-up dv/dt on VIN. If
DC operation of the top MOSFET is required, RGS must be
330k or greater to prevent loading the charge pump.
11
LT1158
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APPLICATIONS INFORMATION
shown in Figure 7, the sense resistor is inserted between
the sense and Kelvin leads.
Low Current Shutdown
The LT1158 may be shutdown to a current level of 2mA by
pulling the enable pin 4 low. In this state both the top and
bottom MOSFETs are actively held off against any tran-
sients which might occur on the output during shutdown.
This is important in applications such as 3-phase DC
motorcontrolwhenoneofthephasesisdisabledwhilethe
other two are switching.
The sense+ and sense– PC traces must be routed together
at minimum spacing to prevent stray pickup, and a Kelvin
connection must be used at the current shunt for the 3-
lead MOSFET. Using a twisted pair is the safest approach
and is recommended for sense runs of several inches.
When the voltage across RSENSE exceeds 110mV, the
LT1158 fault pin begins to conduct, signaling a fault
condition.Thecurrentinashortcircuitrampsveryrapidly,
limited only by the series inductance and ultimately the
MOSFET and shunt resistance. Due to the response time
of the LT1158 current limit loop, an initial current spike of
If zero standby current is required and the load returns to
ground, then a switch can be inserted into the supply path
of the LT1158 as shown in Figure 5. Resistor RGS ensures
that the top MOSFET gate discharges, while the voltage
across the bottom MOSFET goes to zero. The voltage drop
across the P-channel supply switch must be less than
300mV,andRGS mustbe330korgreaterforDCoperation.
Thistechniqueisnotrecommendedforapplicationswhich
require the LT1158 VDS sensing function.
+
V
+
T GATE DR
T GATE FB
+
V
+
T SOURCE
100k
5V
LT1158
+
T GATE DR
VP0300
SENSE
SENSE
R
SENSE
10k
+
T GATE FB
V
–
2N2222
FAULT
R
GS
+
V
100k
T SOURCE
1158 F06
LT1158
CMOS
ON/OFF
+
LOAD
TO OTHER
CONTROL
CIRCUITS
GND
B GATE DR
B GATE FB
Figure 6. Short-Circuit Protection with Standard MOSFET
+
1158 F05
V
+
Figure 5. Adding Zero Current Shutdown
T GATE DR
T GATE FB
KELVIN
SENSE
Short-Circuit Protection in Bridge Applications
T SOURCE
R
SENSE
5V
The LT1158 protects the top power MOSFET from output
shorts to ground, or in a full bridge application, shorts
across the load. Both standard 3-lead MOSFETs and
current-sensing 5-lead MOSFETs can be protected. The
bottom MOSFET is not protected from shorts to supply.
LT1158
+
SENSE
OUTPUT
10k
–
SENSE
FAULT
Current is sensed by measuring the voltage across a
current shunt in the source lead of a standard 3-lead
MOSFET (Figure 6). For the current-sensing MOSFET
1158 F07
Figure 7. Short-Circuit Protection with Current-Sensing MOSFET
12
LT1158
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APPLICATIONS INFORMATION
value of RSENSE for the 5-lead MOSFET increases by the
current sensing ratio (typically 1000 – 3000), thus elimi-
nating the need for a low valued shunt. ∆V is in the range
of 1V to 3V in most applications.
from 2 to 5 times the final value will be present for a few
µs, followed by an interval in which IDS = 0. The current
spike is normally well within the safe operating area (SOA)
of the MOSFET, but can be further reduced with a small
(0.5µH) inductor in series with the output.
Assuming a dead short, the MOSFET dissipation will rise
to VSUPPLY × ISC. For example, with a 24V supply and ISC
= 10A, the dissipation would be 240W. To determine how
long the MOSFET can remain at this dissipation level
before it must be shut down, refer to the SOA curves given
in the MOSFET data sheet. For example, an IRFZ34 would
be safe if shut down within 10ms.
A Tektronix A6303 current probe is highly recommended
for viewing output fault currents.
I
SC
If Short-Circuit Protection is Not Required
5µs/DIV
LT1158 F08
In applications which do not require the current sense
capability of the LT1158, the sense pins 11 and 12 should
both be connected to pin 13, and the fault pin 5 left open.
The enable pin 4 may still be used to shut down the device.
Note, however, that when unprotected the top MOSFET
can be easily (and often dramatically) destroyed by even a
momentary short.
Figure 8. Top MOSFET Short-Circuit Turn-On current
If neither the enable nor input pins are pulled low in
response to the fault indication, the top MOSFET current
will recover to a steady-state value ISC regulated by the
LT1158 as shown in Figure 8:
Self-Protection with Automatic Restart
150mV
ISC =
When using the current sense circuits of Figures 6 and 7,
localshutdowncanbeachievedbyconnectingthefaultpin
through resistor RF to the enable pin as shown in Figure 9.
An optional thermostat mounted to the load or MOSFET
heatsink can also be used to pull enable low.
RSENSE
150mV
Standard 3-Lead
MOSFET
RSENSE
=
ISC
−2
r 150mV
(
)
150mV
ISC =
1−
An internal 25µA current source normally keeps the en-
able capacitor CEN charged to the 7.5V clamp voltage (or
to V+, for V+ < 7.5V). When a fault occurs, CEN is dis-
charged to below the enable low threshold (1.15V typ.)
which shuts down both MOSFETs. When the fault pin or
thermostat releases, CEN recharges to the upper enable
threshold where restart is attempted. In a sustained short
circuit, fault will again pull low and the cycle will repeat
until the short is removed. The time to shut down for a DC
input or thermal fault is given by:
RSENSE
∆V
5-Lead
MOSFET
−2
r 150mV
(
)
150mV
RSENSE
=
1−
ISC
∆V
r = current sense ratio, ∆V = VGS = VGS − VT
The time for the current to recover to ISC following the
initial current spike is approximately QGS/0.5mA, where
QGS istheMOSFETgate-to-sourcecharge.ISC neednotbe
set higher than the required start-up current for motors
(see Starting High In-Rush Current Loads). Note that the
tSHUTDOWN = (100 + 0.8RF) CEN
DC input
13
LT1158
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APPLICATIONS INFORMATION
Note that for the first event only, tSHUTDOWN is approxi-
matelytwicetheabovevaluesinceCEN isbeingdischarged
all the way from its quiescent voltage. Allowable values for
RF are from zero to 10k.
sense– pin is within 1.2V of supply. Under these condi-
tions the current is limited only by the RDS(ON) in series
with RSENSE. For a 5-lead MOSFET the current is limited by
RDS(ON) alone, since RSENSE is not in the output path (see
Figure 7). Again adjusting RDS(ON) for temperature, the
worst-case start currents are:
7.5V
1.15V
25µA
1.2V
3-Lead MOSFET
5-Lead MOSFET
I
=
=
START
ENABLE
1+ ∂ R
+ R
SENSE
(
)
DS ON
+
(
)
C
EN
7.5V
1µF
R
F
1.2V
1k
LT1158
I
START
1+ ∂ R
(
)
DS ON
(
)
FAULT
Properly sizing the MOSFET for ISTART allows inductive
loads with long time constants, such as motors with high
mechanical inertia, to be started.
OPTIONAL THERMOSTAT
CLOSE ON RISE
AIRPAX #67FXXX
1158 F09
Returning to the example used in Power MOSFET Selec-
tion, an IRFZ34 (RDS(ON) = 0.05Ω max.) was selected for
operationat5A.Iftheshort-circuitcurrentisalsosetat5A,
what start current can be supported? From the equation
for RSENSE, a 0.03Ω shunt would be required, allowing the
worst-case start current to be calculated:
Figure 9. Self-Protection with Auto Restart
tSHUTDOWN becomes more difficult to analyze when the
output is shorted with a PWM input. This is because the
fault pin only conducts when fault currents are actually
present in the MOSFET. Fault does not conduct while the
input is low in Figures 6 and 7 or during the interval IDS
=
1.2V
I
=
= 10A
0 in Figure 8. Thus tSHUTDOWN will safely increase when
the duty cycle of the current in the top MOSFET is low,
maintaining the average MOSFET current at a relatively
constant level.
START
1.7 0.05Ω +0.03Ω
(
)
This calculation gives the minimum current which could
be delivered with the IRFZ34 at TJ = 125°C without activat-
ing the fault pin on the LT1158. If more start current is
required, usinganIRFZ44(RDS(ON)=0.028Ω max.)would
increase ISTART to over 15A at TJ = 110°C, even though the
short-circuit current remains at 5A.
The length of time following shutdown before restart is
attempted is given by:
1.5V
25µA
tRESTART
=
CEN = 6 ×104 CEN
In order for the VDS sensing function to work properly, the
supply pins for the LT1158 must be connected at the drain
of the top MOSFET, which must be properly decoupled
(see Ugly Transient Issues).
In Figure 9, the top MOSFET would shut down after being
in DC current limit for 0.9ms and try to restart at 60ms
intervals, thus producing a duty cyle of 1.5% in short
circuit. The resulting average top MOSFET dissipation
during a short is easily measured by taking the product of
the supply voltage and the average supply current.
Driving Lamps
Incandescent lamps represent a challenging load because
they have much in common with a short circuit when cold.
ThetopgatedriverintheLT1158canbeconfiguredtoturn
on large lamps while still protecting the power MOSFET
Starting High In-Rush Current Loads
TheLT1158hasaVDS sensingfunctionwhichallowsmore
than ISC to flow in the top MOSFET providing that the
14
LT1158
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APPLICATIONS INFORMATION
from a true short. This is done by using the current limit to
control cold filament current in conjunction with the self-
protection circuit of Figure 9. The reduced cold filament
current also extends the life of the filament.
MOSFET. The LT1158 will then go into the automatic
restartmodedescribedinSelf-ProtectionwithAutomatic
Restart above.
The time constant for an incandescent filament is tens of
milliseconds, which means that tSHUTDOWN will have to be
longer than in most other applications. This places in-
creased SOA demands on the MOSFET during a short
circuit, requiring that a larger than normal device be used.
A protected high current lamp driver application is shown
in Figure 18.
A good guideline is to choose RSENSE to set ISC at approxi-
mately twice the steady state “on” current of the lamp(s).
tSHUTDOWN isthenmadelongenoughtoguaranteethatthe
lampfilamentsheatanddropoutofcurrentlimitbeforethe
enable capacitor discharges to the enable low threshold.
For a short circuit, the enable capacitor will continue to
discharge below the threshold, shutting down the top
U
TYPICAL APPLICATIONS
5V TO 10V INPUT (USE LOGIC-LEVEL Q1, Q2)
8V TO 20V INPUT (USE STANDARD Q1, Q2
AND CONNECT BOOST DIODE TO PIN 1)
1N4148
100k
×
16
1
+
BOOST DR
BOOST
500µF
LOW ESR
Q1
VP0300
15
2
+
V
T GATE DR
0.01µF
14
13
12
11
10
9
3
4
5
6
7
8
SHORT-CIRCUIT
CURRENT = 8A
INSERT FOR
ZERO POWER
SHUTDOWN
0.1µF
680k
BIAS
T GATE FB
T SOURCE
L1
R
S
22µH
0.015Ω
+3.3V/6A
OUTPUT
ENABLE
FAULT
INPUT
GND
+
100k
+
–
+
10µF
LT1158
100Ω
100Ω
2N2222
1000µF
LOW ESR
+
SENSE
CMOS
ON/OFF
–
SENSE
Q2
+
V
Q1, Q2: IRLZ44 (LOGIC-LEVEL)
IRFZ44 (STANDARD)
B GATE FB
B GATE DR
1.62k
1%
24k
510Ω
1N4148
1
L1: HURRICANE LAB
HL-KK122T/BB
8
7
6
5
1000pF
0.05µF
1k
2
R : VISHAY/DALE TYPE LVR-3
S
4.99k
1%
VISHAY/ULTRONIX RCS01, SM1
ISOTEK CORP. ISA-PLAN SMR
LT1431
3
4
200pF
CONSTANT OFF TIME CURRENT MODE CONTROL LOOP
1
V
OUT
FREQUENCY =
WHERE t
≈ 10µs
OFF
1 –
(
)
t
V
IN
LT1158 F10
OFF
Figure 10. High Efficiency 3.3V Step-Down Switching Regulator (Requires No Heatsinks)
15
LT1158
TYPICAL APPLICATIONS
U
DRIVER SUPPLY 10V TO 15V
(CAN BE POWERED FROM V
V
4.5V TO 6V
IN
IN
WITH LOGIC-LEVEL Q1, Q2)
0.33µF
16k
0.01µF
+
+
BAS16
10µF
220µF
1
16
15
14
13
12
11
10
9
BOOST DR
BOOST
T GATE DR
T GATE FB
T SOURCE
1
2
3
4
8
7
6
5
10V
OS-CON × 4
2
+
200pF
V
Q1
0.01µF
SHORT-CIRCUIT
CURRENT = 22A
LT1431
0.22µF
3
4.99k
1%
BIAS
500k
L1
R
S
8µH
+
–
4
V
OUT
15A
ENABLE
FAULT
SHUTDOWN
470pF
3.3k
LT1158
+
0.01Ω
EA
5
6
7
8
330µF
6.3V
AVX × 4
+
SENSE
1000pF
1
2
3
4
8
7
6
5
–
INPUT
SENSE
+
GND
V
CMOS
555
24k
R
X
Q2
B GATE FB
B GATE DR
1%
LT1158 F11
L1: COILTRONICS CTX02-12171-1
S
Q1, Q2: MTB75N05HD (USE WITH 10V TO 15V DRIVER SUPPLY)
V
R
2.90V 3.05V 3.30V 3.45V 3.60V
(1%) 806Ω 1.10k 1.62k 1.91k 2.21k
OUT
R : KRL/BANTRY SL-1R010J × 2
MTB75N03HDL (USE WITH V DRIVER SUPLY)
IN
X
CMOS 555: LMC555 OR TLC555
Figure 11. 5V to 3.XXV,15A Converter (Uses PC Board Area for Heatsink)
8V TO 20V INPUT
1N4148
100k
×
16
15
14
13
12
11
10
9
1
2
+
BOOST DR
BOOST
500µF
LOW ESR
IRFZ34
510k
VP0300
+
V
T GATE DR
T GATE FB
T SOURCE
SHORT-CIRCUIT
CURRENT = 6A
0.01µF
INSERT FOR
ZERO POWER
SHUTDOWN
3
4
5
6
7
8
BIAS
0.1µF
L1
50µH
R
S
20mΩ
+5V/4A
OUTPUT
ENABLE
FAULT
INPUT
GND
+
100k
+
–
10µF
+
LT1158
2N2222
100Ω
100Ω
1000µF
+
SENSE
CMOS
ON/OFF
LOW ESR
–
SENSE
IRFZ44
1N4148
+
V
B GATE FB
B GATE DR
24k
510Ω
L1: COILTRONICS
CTX50-5-52
1
2
3
4
8
7
6
5
1000pF
0.05µF
1k
R : VISHAY/DALE TYPE LVR-3
S
VISHAY/ULTRONIX RCS01, SM1
ISOTEK CORP. ISA-PLAN SMR
LT1431
CONSTANT OFF TIME CURRENT MODE CONTROL LOOP
SEE FIGURE 4 FOR EFFICIENCY CURVE
1
V
OUT
FREQUENCY =
WHERE t
≈ 10µs
1 –
OFF
(
)
LT1158 F12
t
V
IN
OFF
Figure 12. High Efficiency 5V Step-Down Switching Regulator (Requires No Heatsinks)
16
LT1158
U
TYPICAL APPLICATIONS
INPUT
30V MAX
SHUTDOWN
4.7k
0.01µF
1N4148
4.7k
1µF
+
+
500µF EA
LOW ESR
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
1
2
16
15
14
13
12
11
10
9
BOOST DR
BOOST
0.1µF
IRFZ44
330k
*
3.4k
+
V
T GATE DR
T GATE FB
T SOURCE
SHORT-CIRCUIT
CURRENT = 15A
+
0.01µF
0.1µF
10µF
3
EXT
BIAS
L1
70µH
R
S
SYNC
30k
0.007Ω
4
5
6
7
8
5V OR
12V
1N4148
ENABLE
FAULT
INPUT
GND
f = 25kHz
*
+
–
2.2nF
LT3525
LT1158
+
SENSE
+
0.01µF
1000µF
LOW ESR
1N4148
–
SENSE
27k
(2) IRFZ44
+
V
1µF
*
510Ω
10k
B GATE FB
B GATE DR
MBR340
330pF
LT1158 F13
*
ADD THESE COMPONENTS TO IMPLEMENT
LOW-DROPOUT 12V REGULATOR
L1: MAGNETICS CORE #55585-A2
R : DALE TYPE LVR-3
S
30 TURNS 14GA MAGNET WIRE
ULTRONIX RCS01
Figure 13. 90% Efficiency 24V to 5V 10A Switching Regulator
95% Efficiency 24V to 12V 10A Low Dropout Switching Regulator
MOTOR SPEED
0 TO 100%
10V TO 30V
5.1k
1N4148
10k
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
+
1N5231A
BOOST DR
BOOST
T GATE DR
T GATE FB
T SOURCE
0.1µF
+
1000µF
1µF
7.5k
24Ω
+
LOW ESR
V
0.01µF
10µF
+
Q1
BIAS
0.33µF
510Ω
1
2
3
4
8
7
6
5
ENABLE
FAULT
INPUT
GND
START CURRENT
= 15A MINIMUM
+
LT1158
1k
+
SENSE
CMOS
555
0.02Ω
13k
–
SENSE
–
2.2nF
+
V
Q2
24Ω
Μ
B GATE FB
B GATE DR
THE CMOS 555 IS USED AS A 25kHz TRIANGLE-WAVE
OSCILLATOR DRIVING THE LT1158 INPUT PIN. THE
D.C. LEVEL OF THE TRIANGLE WAVE IS SET BY THE
POTENTIOMETER ON THE CMOS 555 SUPPLY PIN, AND
ALLOW ADJUSTMENT OF THE LT1158 DUTY CYCLE
FROM 0 TO 100%.
CMOS 555: LMC555 OR TLC555
Q1, Q2: MTP35N06E
LT1158 F14
Figure 14. Potentiometer-Adjusted Open Loop Motor Speed Control with Short-Circuit Protection
17
LT1158
U
TYPICAL APPLICATIONS
7.2V
NOMINAL
+
BAT85
100µF
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
BOOST DR
BOOST
T GATE DR
T GATE FB
T SOURCE
15Ω
0.1µF
+
V
+
0.01µF
10µF
BIAS
Q1
1N4148
STOP
(FREE RUN)
ENABLE
FAULT
INPUT
GND
START CURRENT
= 25A MINIMUM
+
+
–
LT1158
1k
1µF
+
SENSE
R
S
0.015Ω
–
PWM
SENSE
+
V
15Ω
Μ
Q2
B GATE FB
B GATE DR
LT1158 F15
Q1, Q2: IRLZ44 (LOGIC-LEVEL)
R : DALE TYPE LVR-3
S
ULTRONIX RCS01
Figure 15. High Efficiency 6-Cell NiCd Protected Motor Drive
+
+
+
V
V
V
LT1158
ENABLE
LT1158
ENABLE
LT1158
ENABLE
φ
A
FAULT
INPUT
FAULT
INPUT
φ
B
FAULT
INPUT
φ
C
5V
SHUTDOWN
POSITION FEEDBACK
CONTROLS LT1158
ENABLE INPUTS
COMMUTATING LOGIC
PWM CONTROLS
LT1158 INPUTS
1158 F16
Figure 16. 3-Phase Brushless DC Motor Control
18
LT1158
U
TYPICAL APPLICATIONS
1N4148
10V TO 30V
1
16
15
14
13
12
11
10
9
BOOST DR
BOOST
0.1µF
15Ω
D1
2
+
SIDE A: SHOWS
STANDARD MOSFET
CONNECTION
+
V
T GATE DR
T GATE FB
T SOURCE
Q1
470µF
LOW
ESR
0.01µF
3
BIAS
4
ENABLE A
FAULT A
INPUT A
ENABLE
FAULT
+
+
10µF
LT1158
5
6
7
8
+
SENSE
R
S
0.015Ω
–
INPUT
SENSE
–
Q2
+
GND
V
2.4k
15Ω
B GATE FB
B GATE DR
1N4148
+
Μ
1
16
15
14
13
12
11
10
9
470µF
LOW
ESR
BOOST DR
BOOST
Q3
15Ω
SIDE B: SHOWS
CURRENT-SENSING
MOSFET CONNECTION
2
3
4
5
6
7
8
+
V
T GATE DR
T GATE FB
T SOURCE
0.01µF
10µF
0.1µF
D2
BIAS
+
–
ENABLE B
ENABLE
FAULT
INPUT
GND
+
LT1158
2.4k
+
SENSE
FAULT B
INPUT B
47Ω
15Ω
–
SENSE
Q4
Q1, Q3: IRF540 (STANDARD)
IRC540 (SENSE FET)
Q2, Q4: IRFZ44
+
V
D1, D2: BAT83
B GATE FB
B GATE DR
R : DALE TYPE LVR-3
S
ULTRONIX RCS01
LT1158 F17a
Control Logic for Locked Anti-Phase Drive
Motor stops if either side is shorted to ground
Control Logic for Sign/Magnitude Drive
5V
5.1k
ENABLE A
FAULT A
INPUT A
ENABLE A
0.01µF
74HC132
74HC02
FAULT A
INPUT A
PWM
PWM
DIRECTION
1N4148
150k
ENABLE B
FAULT B
STOP
(FREE RUN)
ENABLE B
FAULT B
+
0.1µF
1µF
1N4148
INPUT B
INPUT B
1158F17c
1158F17b
Figure 17. 10A Full Bridge Motor Control
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tationthattheinterconnectionofitscircuitsasdescribedhereinwillnotinfringeonexistingpatentrights.
19
LT1158
U
TYPICAL APPLICATIONS
12V
1N4148
+
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
1000µF
BOOST DR
BOOST
IRCZ44
+
V
T GATE DR
T GATE FB
T SOURCE
+
0.01µF
10µF
10µF
0.1µF
BIAS
+
–
ENABLE
FAULT
INPUT
GND
+
LT1158
6.2k
12V
55W
+
MBR330
SENSE
51Ω
–
ON/OFF
SENSE
+
V
B GATE FB
B GATE DR
I
t
t
: 10A
SC
SHUTDOWN
= 50ms
= 600ms
LT1158 F18
RESTART
Figure 18. High Current Lamp Driver with Short-Circuit Protection
U
PACKAGE DESCRIPTION
Dimensions in inches (millimeters) unless otherwise noted.
N Package
16-Lead Plastic DIP
0.770
(19.558)
MAX
0.300 – 0.325
0.130 ± 0.005
0.045 – 0.065
(7.620 – 8.255)
(3.302 ± 0.127)
(1.143 – 1.651)
14
12
10
9
8
15
13
11
16
0.015
(0.381)
MIN
0.260 ± 0.010
(6.604 ± 0.254)
0.065
(1.651)
TYP
0.009 – 0.015
(0.229 – 0.381)
+0.025
–0.015
2
1
3
4
6
5
7
0.325
0.125
(3.175)
MIN
0.045 ± 0.015
(1.143 ± 0.381)
0.018 ± 0.003
(0.457 ± 0.076)
+0.635
8.255
(
)
–0.381
0.100 ± 0.010
(2.540 ± 0.254)
S Package
16-Lead Plastic SOL
0.398 – 0.413
(10.109 – 10.490)
(NOTE 2)
0.291 – 0.299
(7.391 – 7.595)
(NOTE 2)
0.037 – 0.045
(0.940 – 1.143)
0.093 – 0.104
(2.362 – 2.642)
15 14
12
10
11
9
16
13
0.005
(0.127)
RAD MIN
0.010 – 0.029
× 45°
(0.254 – 0.737)
0° – 8° TYP
0.050
(1.270)
TYP
0.394 – 0.419
(10.007 – 10.643)
NOTE 1
0.004 – 0.012
(0.102 – 0.305)
0.009 – 0.013
(0.229 – 0.330)
NOTE 1
0.014 – 0.019
0.016 – 0.050
(0.356 – 0.482)
TYP
(0.406 – 1.270)
NOTE:
1. PIN 1 IDENT, NOTCH ON TOP AND CAVITIES ON THE BOTTOM OF PACKAGES ARE THE MANUFACTURING OPTIONS.
THE PART MAY BE SUPPLIED WITH OR WITHOUT ANY OF THE OPTIONS.
2. THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS.
MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.006 INCH (0.15mm).
2
3
5
7
8
1
4
6
LT/GP 0394 5K REV A • PRINTED IN USA
20 Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7487
●
●
(408) 432-1900 FAX: (408) 434-0507 TELEX: 499-3977
LINEAR TECHNOLOGY CORPORATION 1994
相关型号：
LT1158ISW#TRPBF
LT1158 - Half Bridge N-Channel Power MOSFET Driver; Package: SO; Pins: 16; Temperature Range: -40°C to 85°C
Linear
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