LTC3221EDC-3.3#TRMPBF [Linear]
LTC3221 - Micropower, Regulated Charge Pump in 2 x 2 DFN; Package: DFN; Pins: 6; Temperature Range: -40°C to 85°C;
| 型号： | LTC3221EDC-3.3#TRMPBF |
| 厂家： | 
Linear |
| 描述： | LTC3221 - Micropower, Regulated Charge Pump in 2 x 2 DFN; Package: DFN; Pins: 6; Temperature Range: -40°C to 85°C 泵 |
| 文件： | 总12页 (文件大小：487K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
LTC3221/
LTC3221-3.3/LTC3221-5
Micropower,
Regulated Charge Pump
in 2 × 2 DFN
U
FEATURES
DESCRIPTIO
TheLTC®3221familyaremicropowerchargepumpDC/DC
converters that produce a regulated output at up to 60mA.
The input voltage range is 1.8V to 5.5V. Extremely low
operating current (8µA typical at no load) and low external
parts count (one flying capacitor and two small bypass
■
Ultralow Power: 8µA Quiescent Current
■
Regulated Output Voltages: 3.3V 4%, 5V 4%, ADJ
■
V Range:
IN
1.8V to 4.4V (LTC3221-3.3)
2.7V to 5.5V (LTC3221-5)
■
Output Current: Up to 60mA
capacitors at V and V ) make them ideally suited for
IN
OUT
■
No Inductors Needed
small, battery-powered applications.
■
Very Low Shutdown Current: <1µA
The LTC3221 family includes fixed 5V and 3.3V output
versions plus an adjustable version. All parts operate
as Burst Mode® switched capacitor voltage doublers
to achieve ultralow quiescent current. The chips use a
controlled current to supply the output and will survive
■
Shutdown Disconnects Load from V
Burst Mode Control
Short-Circuit Protected
Solution Profile < 1mm
Tiny 2mm × 2mm 6-Pin DFN Package
IN
■
■
■
■
a continuous short-circuit from V
to GND. The FB pin
OUT
of the adjustable LTC3221 can be used to program the
U
desired output voltage.
APPLICATIO S
The LTC3221 family is available in a low profile (0.75mm)
■
Low Power 2 AA Cell to 3.3V Supply
2mm × 2mm 6-pin DFN package.
■
Memory Backup Supplies
, LT, LTC and LTM are registered trademarks of Linear Technology Corporation. Burst
Mode is a registered trademark of Linear Technology Corporation. All other trademarks are
the property of their respective owners.
■
Tire Pressure Sensors
General Purpose Low Power Li-Ion to 5V Supply
RF Transmitters
Glucose Meters
■
■
■
U
TYPICAL APPLICATIO
No-Load Input Current
vs Supply Voltage
1µF
16
14
12
2
–
1
+
C
V
C
6
5
V
V
V
OUT
IN
IN
OUT
2.2µF
4.7µF
LTC3221-X
GND
T
= 90°C
A
4,7
3
10
8
T
= 25°C
A
OFF ON
SHDN
3221 TA01
T
= –45°C
A
6
REGULATED 3.3V OUTPUT FROM 1.8V TO 4.4V INPUT
4
V
I
I
= 3.3V 4%
= OmA TO 25mA; V >1.8V
= OmA TO 60mA; V >2V
OUT
OUT
OUT
IN
IN
2
REGULATED 5V OUTPUT FROM 2.7V TO 5.5V INPUT
0
V
I
I
= 5V 4%
= OmA TO 25mA; V >2.7V
= OmA TO 60mA; V >3V
OUT
OUT
OUT
1.5
2.0
2.5
3.0
3.5
4.0
4.5
IN
IN
SUPPLY VOLTAGE (V)
3221 TA01b
3221f
1
LTC3221/
LTC3221-3.3/LTC3221-5
W W U W
U
W
U
ABSOLUTE AXI U RATI GS
PACKAGE/ORDER I FOR ATIO
(Note 1)
TOP VIEW
V , SHDN, FB............................................. – 0.3V to 6V
IN
OUT
OUT
V
V
to GND............................................. – 0.3V to 5.5V
Short-Circuit Duration ............................ Indefinite
+
C
1
2
3
6
5
4
V
V
OUT
IN
–
7
C
Operating Temperature Range (Note 2) .. – 40°C to 85°C
Storage Temperature Range.................. – 65°C to 125°C
Maximum Junction Temperature .......................... 125°C
SHDN/FB*
GND
T
= 125°C, θ = 80°C/W
JA
JMAX
EXPOSED PAD IS GND (PIN 7) MUST BE SOLDERED TO PCB
*SHDN ON LTC3221-3.3;LTC3221-5 FB ON LTC3221
ORDER PART NUMBER
DC PART MARKING
LTC3221EDC
LTC3221EDC-3.3
LTC3221EDC-5
LCCP
LBQP
LCCN
Order Options Tape and Reel: Add #TR
Lead Free: Add #PBF Lead Free Tape and Reel: Add #TRPBF
Lead Free Part Marking: http://www.linear.com/leadfree/
Consult LTC Marketing for parts specified with wider operating temperature ranges.
The
●
denotes the specifications which apply over the full operating
ELECTRICAL CHARACTERISTICS
temperature range, otherwise specifications are at T = 25°C. V = 2.5V (LTC3221-3.3/LTC3221) or 3V (LTC3221-5), SHDN = V ,
A
IN
IN
C
FLY
= 1µF, C = 2.2µF, C
= 2.2µF, unless otherwise specified.
IN
OUT
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
LTC3221-3.3
●
V
V
Input Supply Voltage
Output Voltage
1.8
4.4
V
IN
1.8V ≤ V ≤ 4.4V, I ≤ 25mA
OUT
OUT
IN
2V ≤ V < 4.4V, I
≤ 60mA
OUT
●
●
3.168
3.3
8
3.432
15
V
µA
IN
I
Operating Supply Current
Output Ripple
I
= 0mA
OUT
CC
V
R
V
V
V
= 2V, I
= 2V, I
= 60mA, C
= 4.7µF (Note 3)
35
82
mV
P-P
IN
OUT
OUT
OUT
η
Efficiency
= 60mA (Note 3)
%
IN
●
●
I
SC
Output Short-Circuit Current
= 0V
120
240
5.5
mA
OUT
LTC3221-5
V
V
Input Supply Voltage
Output Voltage
2.7
4.8
V
IN
2.7V ≤ V ≤ 5.5V, I < 25mA
OUT
OUT
IN
3V ≤ V ≤ 5.5V, I
< 60mA
●
●
5
8
5.2
15
V
µA
IN
OUT
I
Operating Supply Current
Output Ripple
I
= 0mA
OUT
CC
V
R
V
V
V
= 3V, I
= 3V, I
= 60mA, C
= 4.7µF (Note 3)
45
82
mV
P-P
IN
OUT
OUT
OUT
η
Efficiency
= 60mA (Note 3)
%
IN
●
I
SC
Output Short-Circuit Current
= 0V
120
240
mA
OUT
LTC3221
●
●
●
●
●
V
V
Input Supply Voltage
Feedback Voltage
1.8
5.5
1.279
20
V
V
IN
1.181
1.23
10
5
FB
Ω
R
Open-Loop Impedance
Operating Supply Current
FB Input Current
V
= 1.8V, V
= 3V (Note 4)
OL
IN
OUT
I
CC
I
FB
I
= 0mA
12
µA
OUT
FB = 1.33V, V = 2V
–100
100
nA
IN
3221f
2
LTC3221/
LTC3221-3.3/LTC3221-5
The
●
denotes the specifications which apply over the full operating
ELECTRICAL CHARACTERISTICS
temperature range, otherwise specifications are at T = 25°C. V = 2.5V (LTC3221-3.3/LTC3221) or 3V (LTC3221-5), SHDN = V ,
A
IN
IN
C
= 1µF, C = 2.2µF, C
= 2.2µF, unless otherwise specified.
FLY
SYMBOL
LTC3221-3.3/LTC3221-5
IN
OUT
PARAMETER
CONDITIONS
= 0V, SHDN = 0V
MIN
TYP
MAX
UNITS
●
●
●
●
●
I
V
V
I
I
Shutdown Supply Current
SHDN Input Threshold (High)
SHDN Input Threshold (Low)
SHDN Input Current (High)
SHDN Input Current (Low)
V
1
µA
V
V
µA
µA
SHDN
OUT
1.3
IH
0.4
1
1
IL
SHDN = V
–1
–1
IH
IN
SHDN = 0V
IL
LTC3221/LTC3221-3.3/LTC3221-5
f
V
Switching Frequency
UVLO Threshold
V
= 2.5V
600
1
kHz
V
OSC
OUT
UVLO
Note 1: Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
operating temperature range are assured by design, characterization and
correlation with statisitical process controls.
Note 2: The LTC3221EDC-X is guaranteed to meet performance
Note 3: Guaranteed by design, not subject to test.
specifications from 0°C to 70°C. Specificaiton over the –40°C to 85°C
Note 4: R = (2V – V )/I .
OUT OUT
OL
IN
U W
TYPICAL PERFOR A CE CHARACTERISTICS
Oscillator Frequency vs
Supply Voltage
Oscillator Frequency vs
Temperature
SHDN Threshold Voltage vs
Supply Voltage
0.9
0.8
0.7
0.6
0.5
0.4
800
750
700
650
600
550
500
450
400
800
750
700
650
600
550
500
450
400
LOW-TO-HIGH THRESHOLD
V
= 4.5V
= 2.5V
IN
HIGH-TO-LOW THRESHOLD
V
= 1.8V
V
IN
IN
1.5
2.0
2.5
3.0
3.5
4.0
4.5
1.5
2.0
2.5
3.0
3.5
4.0
4.5
–50 –25
0
25
50
75 100 125
SUPPLY VOLTAGE (V)
SUPPLY VOLTAGE (V)
TEMPERATURE (°C)
3221 G03
3221 G01
3221 G02
SHDN LO-to-HI Threshold vs
Temperature
SHDN HI-to-LO Threshold vs
Temperature
Short-Circuit Current vs
Supply Voltage
150
130
110
90
0.9
0.8
0.7
0.6
0.5
0.4
0.9
0.8
0.7
0.6
0.5
0.4
T
= –45°C
= 90°C
A
V
= 3.2V
IN
V
= 3.2V
IN
V
V
= 2.5V
T
IN
V
A
T
= 25°C
= 2.5V
A
IN
= 1.8V
IN
V
= 1.8V
IN
70
50
1.5
2.0
2.5
3.0
3.5
4.0
4.5
–50 –25
0
25
50
75 100 125
–50 –25
0
25
50
75 100 125
SUPPLY VOLTAGE (V)
TEMPERATURE (°C)
TEMPERATURE (°C)
3221 G06
3221 G04
3221 G05
3221f
3
LTC3221/
LTC3221-3.3/LTC3221-5
U W
TYPICAL PERFOR A CE CHARACTERISTICS
(LTC3221-3.3 only)
Output Load Capability at 4%
Below Regulation
Effective Open-Loop Output
Resistance vs Temperature
Load Regulation
120
110
100
90
3.36
3.34
3.32
3.30
3.28
3.26
3.24
3.22
3.20
3.18
3.16
15
14
13
12
11
10
9
V
= 3.168V
V
V
= 1.8V
= 3V
OUT
IN
OUT
T
= –45°C
A
V
= 3.2V
IN
T
= 90°C
V
= 2.5V
A
IN
80
T = 25°C
A
70
V
= 1.8V
IN
8
60
7
50
6
40
5
1.5
2.0
2.5
3.0
3.5
0
20
40
60
80
100
120
–50
–25
0
25
50
75
100
SUPPLY VOLTAGE (V)
LOAD CURRENT (mA)
TEMPERATURE (°C)
3221 G08
3221 G09
3221 G07
No-Load Input Current vs
Supply Voltage
Extra Input Current vs Load
Current (I -2 I
)
Efficiency vs Supply Voltage
IN
LOAD
100
90
80
70
60
50
40
30
20
10
0
16
14
12
10
8
10
1
V
= 2.5V
IN
THEORETICAL MAX
T
= 90°C
A
I
= 30mA
OUT
I
= 1mA
OUT
T
= 25°C
A
0.1
T
= –45°C
A
6
4
0.01
2
0
0.001
1.8 2.0 2.2 2.4 2.6
2.8 3.0 3.2
1.5
2.0
2.5
3.0
3.5
4.0
4.5
0.01
0.1
1
10
100
SUPPLY VOLTAGE (V)
SUPPLY VOLTAGE (V)
LOAD CURRENT (mA)
3221 G10
3221 G12
3221 G11
Output Ripple vs Load Current
Output Ripple
Load Transient Response
70
60
V
OUT
20mV/DIV
C
= 2.2µF
OUT
(AC-COUPLED)
V
OUT
50
40
30
20
10
0
20mV/DIV
(AC-COUPLED)
60mA
C
= 4.7µF
OUT
I
OUT
0mA
5µs/DIV
1µs/DIV
V
I
= 2V
LOAD
V
I
= 2V
IN
IN
= 0mA TO 60mA STEP
= 4.7µF, 6.3V, SIZE 0603
= 60mA
LOAD
3221 G15
3221 G14
C
C
= 4.7µF, 6.3V, SIZE 0603
OUT
OUT
0
20
40
60
80
100
LOAD CURRENT (mA)
3221 G13
3221f
4
LTC3221/
LTC3221-3.3/LTC3221-5
U W
TYPICAL PERFOR A CE CHARACTERISTICS
(LTC3221-5 only)
Output Load Capability at 4%
Effective Open-Loop Output
Resistance vs Temperature
15
Load Regulation
Below Regulation
120
110
100
90
5.10
5.05
5.00
4.95
4.90
4.85
4.80
V
= 4.8V
V
V
= 2.7V
IN
OUT
OUT
T
= –45°C
A
= 4.5V
14
13
12
11
10
9
V
= 4.2V
IN
T
= 90°C
A
V
= 3.6V
IN
T
= 25°C
A
80
V
= 2.7V
IN
70
8
60
7
50
6
40
5
2.7
3.0
3.3
3.6
3.9
4.2
0
20
40
60
80
100
120
–50
–25
0
25
50
75
100
SUPPLY VOLTAGE (V)
LOAD CURRENT (mA)
TEMPERATURE (°C)
3221 G17
3221 G18
3221 G16
No-Load Input Current vs
Supply Voltage
Extra Input Current vs Load
Current (I -2 I
)
Efficiency vs Supply Voltage
IN
LOAD
100
90
80
70
60
50
40
30
20
10
0
16
14
12
10
8
10
1
V
IN
= 3V
THEORETICAL MAX
I
= 1mA
OUT
T
= 90°C
A
I
= 30mA
OUT
0.1
T
= –45°C
A
6
T
= 25°C
A
4
0.01
2
0
0.001
2.7
3.0
3.3
3.6
3.9
4.2
4.5
2.7
3.0
3.3
3.6
3.9
4.2
4.5
0.01
0.1
1
10
100
SUPPLY VOLTAGE (V)
SUPPLY VOLTAGE (V)
LOAD CURRENT (mA)
3221 G19
3221 G21
3221 G20
Output Ripple vs Load Current
Output Ripple
Load Transient Response
90
80
70
60
50
40
30
20
10
0
V
= 3V
IN
V
OUT
50mV/DIV
(AC-COUPLED)
C
= 2.2µF
OUT
V
OUT
50mV/DIV
(AC-COUPLED)
60mA
I
OUT
C
= 4.7µF
OUT
0mA
5µs/DIV
1µs/DIV
V
I
= 3V
LOAD
V
I
= 3V
IN
IN
= 0mA TO 60mA STEP
= 4.7µF, 6.3V, SIZE 0603
= 60mA
LOAD
3221 G24
3221 G23
C
C
= 4.7µF, 6.3V, SIZE 0603
OUT
OUT
0
20
40
60
80
100
LOAD CURRENT (mA)
3221 G13
3221f
5
LTC3221/
LTC3221-3.3/LTC3221-5
U
U
U
PI FU CTIO S
C+ (Pin 1): Flying Capacitor Positive Terminal.
GND (Pin 4): Ground. Should be tied to a ground plane
for best performance.
C– (Pin 2): Flying Capacitor Negative Terminal.
V (Pin 5): Input Supply Voltage. V should be bypassed
IN
IN
SHDN (Pin 3) (LTC3221-3.3/LTC3221-5): Active Low
Shutdown Input. A low on SHDN disables the LTC3221-3.3/
LTC3221-5. SHDN must not be allowed to float.
with a 2.2µF low ESR capacitor.
V
(Pin 6): Regulated Output Voltage. For best perfor-
OUT
mance, V
should be bypassed with a 2.2µF or higher
OUT
FB (Pin 3) (LTC3221): Feedback. The voltage on this pin
is compared to the internal reference voltage (1.23V) by
the error comparator to keep the output in regulation. An
low ESR capacitor as close as possible to the pin.
Exposed Pad (Pin 7) Ground. The exposed pad must be
soldered to PCB ground to provide electrical contact and
optimum thermal performance.
external resistor divider is required between V
to program the output voltage.
and FB
OUT
W
BLOCK DIAGRA
LTC3221-3.3/LTC3221-5
LTC3221
V
6
V
6
3
OUT
OUT
+
+
1
1
C
V
C
C
V
C
2
2
1
1
2
CMP
I
I
SW
SW
CMP
+
–
5
2
4
5
2
4
IN
–
IN
–
FB
+
–
2
1
CONTROL
CONTROL
1
V
REF
V
GND
GND
REF
SHDN
3
3221 BD
U
(Refer to Block Diagrams)
OPERATIO
Shutdown Mode
TheLTC3221familyusesaswitchedcapacitorchargepump
to boost V to a regulated output voltage. Regulation is
IN
The SHDN pin is a CMOS input with a threshold voltage
of approximately 0.8V. The LTC3221-3.3/ LTC3221-5 are
in shutdown when a logic low is applied to the SHDN
pin. In shutdown mode, all circuitry is turned off and the
LTC3221-3.3/ LTC3221-5 draw only leakage current from
achieved by monitoring the output voltage, V
using a
OUT
comparator (CMP in the Block Diagram) and keeping it
within a hysteresis window. If V drops below the lower
OUT
trip point of CMP, V
is charged by the controlled cur-
OUT
rent,I inserieswiththeflyingcapacitorC .OnceV
SW
FLY
OUT
the V supply. Furthermore, V
is disconnected from
IN
OUT
goes above the upper trip point of CMP, or if the upper
V . Since the SHDN pin is a very high impedance CMOS
IN
trip point is not reached after 0.8µs, C is disconnected
FLY
input, it should never be allowed to float.
from V . The bottom plate of C is then connected
OUT
FLY
When SHDN is asserted low, the charge pump is first dis-
abled, but the LTC3221-3.3/LTC3221-5 continue to draw
5µA of supply current. This current will drop to zero when
to GND to allow I to replenish the charge on C for
SW
FLY
0.8µs. After which, I is turned off to keep the operating
SW
supply current low. CMP continues to monitor V
and
OUT
the output voltage (V ) is fully discharged to 0V.
OUT
turns on I if the lower threshold is reached again.
SW
3221f
6
LTC3221/
LTC3221-3.3/LTC3221-5
U
(Refer to Block Diagrams)
OPERATIO
The LTC3221 has a FB pin in place of the SHDN pin. This
allows the output voltage to be programmed using an
external resistive divider.
V
stays above this lower threshold for a long period of
OUT
time, this result in a very low average input current.
Soft-Start and Short-Circuit Protection
Burst Mode Operation
The LTC3221 family uses a controlled current, I
to
SW
TheLTC3221familyregulatestheoutputvoltagethroughout
the full 60mA load range using Burst Mode control. This
keeps the quiescent current low at light load and improves
the efficiency at full load by reducing the switching losses.
All the internal circuitry except the comparator is kept off
if the output voltage is high and the flying capacitor has
deliver current to the output. This helps to limit the input
and output current during start-up and output short-circuit
condition.DuringstartupI isusedtochargeuptheflying
SW
capacitor and output capacitor, this limits the input current
to approximately 240mA. During short-circuit condition,
the output current is delivered through I and this limits
SW
beenfullycharged.ThesecircuitsareturnedononlyifV
dropsbelowthecomparatorlowerthreshold. Atlightload,
the output current to approximately 120mA. This prevents
OUT
excessive self-heating that causes damage to the part.
U
W U U
APPLICATIO S I FOR ATIO
Power Efficiency
the theoretical 83.3% calculation. The LTC3221 product
family continues to maintain good efficiency even at fairly
light loads because of its inherently low power design.
TheinputcurrentofadoublingchargepumpliketheLTC3221
family is always twice that of the output current. This is
trueregardlessofwhethertheoutputvoltageisunregulated
or regulated or of the regulation method used. In an ideal
unregulateddoublingchargepump,conservationofenergy
implies that the input current has to be twice that of the
output current in order to obtain an output voltage twice
that of the input voltage. In a regulated charge pump like
Maximum Available Output Current
FortheadjustableLTC3221,themaximumavailableoutput
current and voltage can be calculated from the effective
open-loop output resistance, R , and effective output
OL
voltage, 2V
.
IN(MIN)
the LTC3221, the regulation of V
is similar to that of a
OUT
From Figure 1 the available current is given by:
linear regulator, with the voltage difference between 2 • V
IN
2V – VOUT
IN
(Input voltage plus the voltage across a fully charged flying
IOUT
=
ROL
capacitor) and V
being absorbed in an internal pass
OUT
transistor.IntheLTC3221,thecontrolledcurrentI actsas
SW
Effective Open-Loop Output Resistance (R )
a pass transistor. So the input current of an ideal regulated
doubling charge pump is the same as an unregulated one,
which is equal to twice the output current. The efficiency
(n) of an ideal regulated doubler is therefore given by:
OL
Theeffectiveopen-loopoutputresistance(R )ofacharge
OL
pump is a very important parameter which determines the
strength of the charge pump. The value of this parameter
POUT VOUT •IOUT VOUT
η =
=
=
R
OL
PIN
V •2IOUT
IN
2V
IN
+
+
Atmoderatetohighoutputpower,theswitchinglossesand
quiescent current of the LTC3221 family are negligible and
2V
I
V
OUT
IN
OUT
–
–
theexpressionisvalid.Forexample,anLTC3221-5withV
IN
3221 F01
= 3V, I
= 60mA and V
regulating to 5V, has a mea-
OUT
OUT
sured efficiency of 82% which is in close agreement with
Figure 1. Equivalent Open-Loop Circuit
3221f
7
LTC3221/
LTC3221-3.3/LTC3221-5
U
W U U
APPLICATIO S I FOR ATIO
depends on many factors such as the oscillator frequency ESR of the output capacitor. It is proportional to the input
(f ), value of the flying capacitor (C ), the nonoverlap voltage, the value of the flying capacitor and the ESR of
OSC
FLY
time, the internal switch resistances (R ) and the ESR of the output capacitor.
S
the external capacitors. A first order approximation for
OL
A smaller output capacitor and/ or larger output current
load will result in higher ripple due to higher output volt-
age slew rates.
R
is given below:
1
ROL ≅ 2
RS +
∑
There are several ways to reduce output voltage ripple.
For applications requiring lower peak-to-peak ripple, a
f
OSC •CFLY
S=1TO 4
Typical R values as a function of temperature are shown
larger C
capacitor (4.7µF or greater) is recommended.
OL
OUT
in Figure 2.
A larger capacitor will reduce both the low and high fre-
quency ripple due to the lower charging and discharging
slew rates, as well as the lower ESR typically found with
higher value (larger case size) capacitors. A low ESR ce-
ramic output capacitor will minimize the high frequency
ripple, but will not reduce the low frequency ripple unless
a high capacitance value is used.
15
V
V
= 1.8V
= 3V
IN
OUT
14
13
12
11
10
9
V , V
IN OUT
Capacitor Selection
8
The style and value of capacitors used with the LTC3221
family determine several important parameters such as
output ripple, charge pump strength and minimum start-
up time.
7
6
5
–50
–25
0
25
50
75
100
TEMPERATURE (°C)
3221 F02
To reduce noise and ripple, it is recommended that low
ESR (< 0.1Ω) capacitors be used for both C and C
.
Figure 2. Effective Open-Loop Output Resistance vs Temperature
IN
OUT
These capacitors should be either ceramic or tantalum
and should be 2.2µF or greater. Aluminum capacitors are
not recommended because of their high ESR.
Output Ripple
Low frequency regulation mode ripple exists due to the
hysteresis in the comparator CMP and propagation delay
in the charge pump control circuit. The amplitude and
frequency of this ripple are heavily dependent on the load
current, the input voltage and the output capacitor size.
Flying Capacitor Selection
Warning: A polarized capacitor such as tantalum or alumi-
num should never be used for the flying capacitor since
its voltage can reverse upon start-up of the LTC3221.
Low ESR ceramic capacitors should always be used for
the flying capacitor.
TheLTC3221familyusesacontrolledcurrent,I todeliver
SW
current to the output. This helps to keep the output ripple
fairly constant over the full input voltage range. Typical
The flying capacitor controls the strength of the charge
pump. In order to achieve the rated output current, it is
necessary to have at least 0.6µF of capacitance for the
flying capacitor. For very light load applications, the flying
capacitor may be reduced to save space or cost.From the
combined output ripple for the LTC3221-3.3 with V
=
IN
2V under maximum load is 35mV using a 4.7µF 6.3V
P-P
X5R case size 0603 output capacitor.
A high frequency ripple component may also be present
on the output capacitor due to the charge transfer action
of the charge pump. In this case the output can display
a voltage pulse during the charging phase. This pulse
results from the product of the charging current and the
first order approximation of R in the section “Effective
OL
Open-Loop Output Resistance,” the theoretical minimum
output resistance of a voltage doubling charge pump can
3221f
8
LTC3221/
LTC3221-3.3/LTC3221-5
U
W U U
APPLICATIO S I FOR ATIO
be expressed by the following equation:
Programming the LTC3221 Output Voltage (FB Pin)
While the LTC3221-3.3/LTC3221-5 versions have internal
resistive dividers to program the output voltage, the pro-
grammable LTC3221 may be set to an arbitrary voltage via
an external resistive divider. Figure 3 shows the required
voltage divider connection.
2V – VOUT
1
IN
ROL(MIN)
where f
≡
≅
IOUT
fOSC •CFLY
is the switching frequency (600kHz) and C
OSC
FLY
is the value of the flying capacitor. The charge pump will
typically be weaker than the theoretical limit due to ad-
ditional switch resistance. However, for very light load ap-
plications,theaboveexpressioncanbeusedasaguideline
in determining a starting capacitor value.
6
R1
R2
V
V
= 1.23V (1 +
)
OUT
OUT
R1
R2
C1
LTC3221
FB
C
3
4
OUT
Ceramic Capacitors
GND
3221 F03
Capacitors of different materials lose their capacitance
with higher temperature and voltage at different rates.
For example, a ceramic capacitor made of X7R material
will retain most of its capacitance from –40°C to 85°C,
whereas,aZ5UorY5Vstylecapacitorwillloseconsiderable
capacitance over that range. Z5U and Y5V capacitors may
also have a very strong voltage coefficient causing them
to lose 50% or more of their capacitance when the rated
voltage is applied. Therefore when comparing different
capacitors, it is often more appropriate to compare the
amount of achievable capacitance for a given case size
rather than discussing the specified capacitance value.
For example, over rated voltage and temperature condi-
tions, a 1µF 10V Y5V ceramic capacitor in a 0603 case
may not provide any more capacitance than a 0.22µF 10V
X7R capacitor available in the same 0603 case. In fact,
for most LTC3221-3.3/LTC3221-5/LTC3221 applications,
thesecapacitorscanbeconsideredroughlyequivalent.The
capacitor manufacturer’s data sheet should be consulted
to determine what value of capacitor is needed to ensure
0.6µF at all temperatures and voltages.
Figure 3. Programming the Adjustable LTC3221
The voltage divider ratio is given by the expression:
R1 VOUT
R2 1.23V
=
– 1
Since the LTC3221 employs a voltage doubling charge
pump, it is not possible to achieve output voltages greater
than twice the available input voltage. The V supply
IN
range required for regulation is given by the following
expression:
Maximum V < V
+ 0.6
IN
OUT
V
OUT +IOUT •ROL
(
)
or 1.8V;
Minimum V =
IN
2
whichever is higher
WhereR istheeffectiveopen-loopoutputresistanceand
OL
I
is the maximum load current. V cannot be higher
OUT
than V
IN
by more than 0.6V, or else the line regulation
Table 1 shows a list of ceramic capacitor manufacturers
and how to contact them.
Table 1. Ceramic Capacitor Manufacturers
OUT
is poor. Also, V has to be higher than the minimum
IN
operating voltage of 1.8V.
AVX
www.avxcorp.com
www.kemet.com
www.murata.com
www.t-yuden.com
www.vishay.com
The sum of the voltage divider resistors can be made large
to keep the quiescent current to a minimum. Any standing
current in the output divider (given by 1.23/R2) will be
reflected by a factor of 2 in the input current. A reasonable
resistance value should be such that the standing current
Kemet
Murata
Taiyo Yuden
Vishay
is in the range of 10µA to 100µA when V
is regulated.
OUT
3221f
9
LTC3221/
LTC3221-3.3/LTC3221-5
U
W U U
APPLICATIO S I FOR ATIO
If the standing current is too low, the FB pin becomes very
sensitive to the switching noise and will result in errors in
to the PC board is recommended. Connecting the GND pin
(Pin 4 and Pin 7 on the DFN package) to a ground plane,
and maintaining a solid ground plane under the device
can reduce the thermal resistance of the package and PC
board considerably.
the programmed V
.
OUT
The compensation capacitor (C1) helps to improve the
response time of the comparator and to keep the output
ripple within an acceptable range. For best results, C1
should be between 22pF to 220pF.
Derating Power at High Temperatures
To prevent an overtemperature condition in high power
applications, Figure 5 should be used to determine the
maximumcombinationofambienttemperatureandpower
dissipation.
Layout Considerations
Due to high switching frequency and high transient cur-
rents produced by the LTC3221 product family, careful
board layout is necessary. A true ground plane and short
ThepowerdissipatedintheLTC3221familyshouldalways
fall under the line shown for a given ambient temperature.
The power dissipation is given by the expression:
2.2µF
(LTC3221)
PD = (2VIN– VOUT )•IOUT
V
V
1
2
3
6
5
4
OUT
IN
1µF
This derating curve assumes a maximum thermal resis-
PIN 7
2.2µF
tance, θ , of 80°C/W for 2mm × 2mm DFN package.
GND
JA
R1 R2
This can be achieved from a printed circuit board layout
with a solid ground plane and a good connection to the
ground pins of the LTC3221 and the Exposed Pad of the
DFN package. Operation out of this curve will cause the
junction temperature to exceed 150°C which is the maxi-
mum junction temperature allowed.
3221 F04
V
OUT
Figure 4. Recommended Layout
connections to all capacitors will improve performance
andensureproperregulationunderallconditions.Figure 4
shows the recommended layout configuration.
3.0
θ
J
= 80°C/W
JA
+
–
The flying capacitor pins C and C will have very high
edge rate waveforms. The large dv/dt on these pins can
coupleenergycapacitivelytoadjacentprintedcircuitboard
runs. Magnetic fields can also be generated if the flying
capacitors are not close to the LTC3221 (i.e. the loop area
islarge). Todecouplecapacitiveenergytransfer, aFaraday
shield may be used. This is a grounded PC trace between
thesensitivenodeandtheLTC3221pins. Forahighquality
AC ground it should be returned to a solid ground plane
that extends all the way to the LTC3221.
T
= 160°C
2.5
2.0
1.5
1.0
0.5
0
–50 –25
0
25 50 75 100 125 150
AMBIENT TEMPERATURE (°C)
3221 F05
To reduce the maximum junction temperature due to
power dissipation in the chip, a good thermal connection
Figure 5. Maximum Power Dissipation vs Ambient Temperature
3221f
10
LTC3221/
LTC3221-3.3/LTC3221-5
U
PACKAGE DESCRIPTIO
DC Package
6-Lead Plastic DFN (2mm × 2mm)
(Reference LTC DWG # 05-08-1703)
R = 0.115
TYP
0.56 0.05
(2 SIDES)
0.38 0.05
4
6
0.675 0.05
2.50 0.05
1.15 0.05
0.61 0.05
(2 SIDES)
2.00 0.10
(4 SIDES)
PIN 1 BAR
TOP MARK
(SEE NOTE 6)
PIN 1
PACKAGE
OUTLINE
CHAMFER OF
EXPOSED PAD
(DC6) DFN 1103
3
1
0.25 0.05
0.25 0.05
0.50 BSC
0.50 BSC
0.75 0.05
0.200 REF
1.37 0.05
(2 SIDES)
1.42 0.05
(2 SIDES)
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
0.00 – 0.05
BOTTOM VIEW—EXPOSED PAD
NOTE:
1. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M0-229 VARIATION OF (WCCD-2)
2. DRAWING NOT TO SCALE
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
3. ALL DIMENSIONS ARE IN MILLIMETERS
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE
TOP AND BOTTOM OF PACKAGE
3221f
InformationfurnishedbyLinearTechnologyCorporationisbelievedtobeaccurateandreliable.However,
no responsibility is assumed for its use. Linear Technology Corporation makes no representation that
the interconnection of its circuits as described herein will not infringe on existing patent rights.
11
LTC3221/
LTC3221-3.3/LTC3221-5
RELATED PARTS
PART NUMBER
LTC1262
DESCRIPTION
COMMENTS
12V, 30mA Flash Memory Program Supply
Regulated 12V 5% Output, I = 500µA
Q
LTC1514/LTC1515
LTC1516
Buck/Boost Charge Pumps with I = 60µA
50mA Output at 3.3V or 5V; 2V to 10V Input
Q
Micropower 5V Charge Pump
I = 12µA, Up to 50mA Output, V = 2V to 5V
Q IN
LTC1517-5/LTC1517-3.3
LTC1522
Micropower 5V/3.3V Doubler Charge Pumps
Micropower 5V Doubler Charge Pump
SIM Card Interface
I = 6µA, Up to 20mA Output
Q
I = 6µA, Up to 20mA Output
Q
LTC1555/LTC1556
LTC1682
Step-Up/Step-Down Charge Pump, V = 2.7V to 10V
IN
Low Noise Doubler Charge Pump
Micropower 5V/3.3V Doubler Charge Pumps
Micropower 5V/3.3V Doubler Charge Pumps
Smart Card Interface
Output Noise = 60µV , 2.5V to 5.5V Output
RMS
LTC1751-3.3/LTC1751-5
LTC1754-3.3/LTC1754-5
LTC1755
I = 20µA, Up to 100mA Output, SOT-23 Package
Q
I = 13µA, Up to 50mA Output, SOT-23 Package
Q
Buck/Boost Charge Pump, I = 60µA, V = 2.7V to 6V
Q
IN
LTC3200
Constant Frequency Doubler Charge Pump
Low Noise, 5V Output or Adjustable
LTC3203/LTC3203B/
LTC3203B-1/LTC3203-1
500mA Low Noise High Efficiency Dual Mode
Step Up Charge Pumps
V : 2.7V to 5.5V, 3mm × 3mm DFN-10 Package
IN
LTC3204/LTC3204B-3.3/
LTC3204-5
Low Noise Regulated Charge Pumps
Up to 150mA (LTC3204-5), Up to 50mA (LTC3204-3.3)
Up to 150mA Output
LTC3240-3.3/LTC3240-2.5 Step-Up/Step-Down Regulated Charge Pumps
3221f
LT 1006 • PRINTED IN USA
LinearTechnology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
12
●
●
(408) 432-1900 FAX: (408) 434-0507 www.linear.com
© LINEAR TECHNOLOGY CORPORATION 2006
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