IRFR1010ZTRL [KERSEMI]
Advanced Process Technology; 先进的工艺技术
| 型号： | IRFR1010ZTRL |
| 厂家： | 
Kersemi Electronic Co., Ltd. |
| 描述： | Advanced Process Technology |
| 文件： | 总11页 (文件大小：4515K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
AUIRFR1010Z
D
VDSS
RDS(on) typ.
max.
ID (Silicon Limited)
ID (Package Limited)
55V
●
●
●
●
●
●
●
Advanced Process Technology
LowOn-Resistance
175°COperatingTemperature
Fast Switching
Repetitive Avalanche Allowed up to Tjmax
Lead-Free,RoHSCompliant
Automotive Qualified *
5.8m
7.5m
Ω
Ω
G
91A
42A
S
Description
Specifically designed for Automotive applications,
this HEXFET® Power MOSFET utilizes the latest
processing techniques to achieve extremely low
on-resistance per silicon area. Additional features
of this design are a 175°C junction operating
temperature, fast switching speed and improved
repetitive avalanche rating . These features com-
bine to make this design an extremely efficient and
reliable device for use in Automotive applications
and a wide variety of other applications.
D
S
G
D-Pak
AUIRFR1010Z
G
D
S
Gate
Drain
Source
Absolute Maximum Ratings
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These
are stress ratings only; and functional operation of the device at these or any other condition beyond those indicated in
the specifications is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device
reliability. The thermal resistance and power dissipation ratings are measured under board mounted and still air conditions.
Ambient temperature (TA) is 25°C, unless otherwise specified.
Parameter
Max.
91
Units
Continuous Drain Current, VGS @ 10V (Silicon Limited)
I
I
I
I
@ T = 25°C
C
D
D
D
@ T = 100°C
C
Continuous Drain Current, VGS @ 10V (Silicon Limited)
Continuous Drain Current, VGS @ 10V (Package Limited)
Pulsed Drain Current
65
A
@ T = 25°C
C
42
360
140
DM
P
@T = 25°C
Power Dissipation
C
W
D
Linear Derating Factor
Gate-to-Source Voltage
0.9
± 20
W/°C
V
V
GS
Single Pulse Avalanche Energy (Thermally limited)
EAS
110
220
mJ
Single Pulse Avalanche Energy Tested Value
Avalanche Current
EAS (tested )
IAR
See Fig.12a, 12b, 15, 16
A
Repetitive Avalanche Energy
EAR
mJ
T
J
Operating Junction and
-55 to + 175
300
T
Storage Temperature Range
°C
STG
Soldering Temperature, for 10 seconds (1.6mm from case )
Thermal Resistance
Parameter
Typ.
–––
–––
–––
Max.
1.11
40
Units
Junction-to-Case
RθJC
RθJA
RθJA
Junction-to-Ambient (PCB mount)
Junction-to-Ambient
°C/W
110
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1
06/16/11
AUIRFR1010Z
Static Electrical @ TJ = 25°C (unless otherwise specified)
Symbol
V(BR)DSS
Parameter
Drain-to-Source Breakdown Voltage
Min. Typ. Max. Units
55 ––– –––
Conditions
VGS = 0V, ID = 250μA
V
Δ
Δ
V(BR)DSS/ TJ
Breakdown Voltage Temp. Coefficient ––– 0.051 ––– V/°C Reference to 25°C, ID = 1mA
Ω
m
RDS(on)
VGS(th)
Static Drain-to-Source On-Resistance
Gate Threshold Voltage
–––
2.0
5.8
–––
–––
–––
–––
–––
7.5
4.0
–––
20
VGS = 10V, ID = 42A
V
VDS = VGS, ID = 100μA
gfs
IDSS
Forward Transconductance
31
S
VDS = 25V, ID = 42A
Drain-to-Source Leakage Current
–––
–––
–––
–––
μA VDS = 55V, VGS = 0V
250
200
V
DS = 55V, VGS = 0V, TJ = 125°C
IGSS
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
nA VGS = 20V
––– -200
VGS = -20V
Dynamic Electrical @ TJ = 25°C (unless otherwise specified)
Symbol
Parameter
Total Gate Charge
Min. Typ. Max. Units
Conditions
Qg
–––
–––
–––
–––
–––
–––
–––
–––
63
17
23
17
76
42
48
4.5
95
ID = 42A
Qgs
Qgd
td(on)
tr
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Turn-On Delay Time
Rise Time
–––
–––
–––
–––
–––
–––
–––
nC
V
V
DS = 44V
GS = 10V
VDD = 28V
ID = 42A
td(off)
tf
Ω
Turn-Off Delay Time
Fall Time
ns RG = 7.6
VGS = 10V
LD
Internal Drain Inductance
Between lead,
D
S
nH 6mm (0.25in.)
from package
G
LS
Internal Source Inductance
–––
7.5
–––
and center of die contact
Ciss
Input Capacitance
––– 2840 –––
VGS = 0V
Coss
Output Capacitance
–––
–––
470
250
–––
–––
VDS = 25V
Crss
Reverse Transfer Capacitance
Output Capacitance
pF ƒ = 1.0MHz
Coss
––– 1630 –––
VGS = 0V, VDS = 1.0V, ƒ = 1.0MHz
GS = 0V, VDS = 44V, ƒ = 1.0MHz
Coss
Output Capacitance
–––
–––
360
560
–––
–––
V
Coss eff.
Effective Output Capacitance
VGS = 0V, VDS = 0V to 44V
Diode Characteristics
Symbol
Parameter
Min. Typ. Max. Units
Conditions
I
I
Continuous Source Current
–––
–––
42
MOSFET symbol
S
(Body Diode)
Pulsed Source Current
A
showing the
integral reverse
–––
–––
360
SM
(Body Diode)
p-n junction diode.
V
t
Diode Forward Voltage
–––
–––
–––
–––
24
1.3
36
30
V
T = 25°C, I = 42A, V = 0V
SD
J
S
GS
Reverse Recovery Time
Reverse Recovery Charge
Forward Turn-On Time
ns T = 25°C, I = 42A, VDD = 28V
J F
rr
di/dt = 100A/μs
Q
t
20
nC
rr
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
on
Notes:
ꢀ Limited by TJmax , see Fig.12a, 12b, 15, 16 for typical
repetitive avalanche performance.
Repetitive rating; pulse width limited by
max. junction temperature. (See fig. 11).
Limited by TJmax, starting TJ = 25°C, L = 0.13mH
RG = 25Ω, IAS = 42A, VGS =10V. Part not
This value determined from sample failure population.
100% tested to this value in production.
recommended for use above this value.
When mounted on 1" square PCB (FR-4 or G-10 Material) .
For recommended footprint and soldering techniques refer to
application note #AN-994
Pulse width ≤ 1.0ms; duty cycle ≤ 2%.
Coss eff. is a fixed capacitance that gives the same
charging time as Coss while VDS is rising from
Rθ is measured at TJ approximately 90°C
0 to 80% VDSS
.
2
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AUIRFR1010Z
Qualification Information†
Automotive
††
(per AEC-Q101)
Qualification Level
Comments: This part number(s) passed Automotive qualification.
IR’s Industrial and Consumer qualification level is granted by
extension of the higher Automotive level.
Moisture Sensitivity Level
D-PAK
MSL1
Class M4 (+/- 700V)†††
Machine Model
AEC-Q101-002
Class H1C (+/- 1500V)†††
Human Body Model
ESD
AEC-Q101-001
Class C5 (+/- 2000V)†††
AEC-Q101-005
Charged Device
Model
Yes
RoHS Compliant
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3
AUIRFR1010Z
1000
100
10
1000
VGS
15V
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
4.5V
TOP
TOP
10V
8.0V
7.0V
6.0V
5.5V
5.0V
4.5V
100
10
1
BOTTOM
BOTTOM
4.5V
60μs PULSE WIDTH
≤
≤60μs PULSE WIDTH
4.5V
1
Tj = 175°C
Tj = 25°C
1
0.1
1
10
100
0.1
10
100
V
, Drain-to-Source Voltage (V)
V
, Drain-to-Source Voltage (V)
DS
DS
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
1000
120
T
= 25°C
J
100
80
60
40
20
0
100
10
1
T
= 175°C
J
T
= 175°C
J
T
= 25°C
V
J
V
= 10V
= 25V
DS
380μs PULSE WIDTH
DS
60μs PULSE WIDTH
≤
0.1
2
4
6
8
10
0
20
40
60
80
100
I ,Drain-to-Source Current (A)
D
V
, Gate-to-Source Voltage (V)
GS
Fig 3. Typical Transfer Characteristics
Fig 4. Typical Forward Transconductance
vs. Drain Current
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4
AUIRFR1010Z
20
16
12
8
5000
4000
3000
2000
1000
0
V
C
= 0V,
f = 1 MHZ
I
= 42A
GS
D
= C + C , C SHORTED
iss
gs
gd ds
V
= 44V
DS
C
= C
rss
gd
VDS= 28V
VDS= 11V
C
= C + C
ds
oss
gd
C
iss
4
C
C
oss
rss
0
0
20
40
60
80
100
1
10
100
Q
Total Gate Charge (nC)
G
V
, Drain-to-Source Voltage (V)
DS
Fig 6. Typical Gate Charge vs.
Fig 5. Typical Capacitance vs.
Gate-to-SourceVoltage
Drain-to-SourceVoltage
1000.00
100.00
10.00
1.00
10000
1000
100
10
OPERATION IN THIS AREA
LIMITED BY R
(on)
DS
T
= 175°C
J
100μsec
1msec
10msec
T
= 25°C
1
J
Tc = 25°C
Tj = 175°C
Single Pulse
V
= 0V
DC
GS
0.1
0.10
1
10
, Drain-toSource Voltage (V)
100
0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0
, Source-to-Drain Voltage (V)
V
V
DS
SD
Fig 8. Maximum Safe Operating Area
Fig 7. Typical Source-Drain Diode
Forward Voltage
5
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AUIRFR1010Z
100
2.5
2.0
1.5
1.0
0.5
I
= 42A
LIMITED BY PACKAGE
D
V
= 10V
GS
80
60
40
20
0
25
50
75
100
125
150
175
-60 -40 -20
0
20 40 60 80 100 120 140 160 180
T
, Case Temperature (°C)
C
T
, Junction Temperature (°C)
J
Fig 10. Normalized On-Resistance
Fig 9. Maximum Drain Current vs.
vs.Temperature
CaseTemperature
10
1
0.1
D = 0.50
0.20
0.10
0.05
R1
R2
R2
R3
R3
Ri (°C/W) τi (sec)
R1
τ
J τJ
τ
τ
Cτ
0.3854
0.3138
0.4102
0.000251
1τ1
τ
τ
0.02
0.01
2τ2
3τ3
0.001092
0.015307
0.01
Ci= τi/Ri
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthjc + Tc
SINGLE PULSE
( THERMAL RESPONSE )
0.001
1E-006
1E-005
0.0001
0.001
0.01
0.1
t
, Rectangular Pulse Duration (sec)
1
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
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6
AUIRFR1010Z
15V
500
400
300
200
100
0
I
D
TOP
7.6A
11A
42A
DRIVER
+
L
V
DS
BOTTOM
D.U.T
AS
R
G
V
DD
-
I
A
V
20V
GS
Ω
0.01
t
p
Fig 12a. Unclamped Inductive Test Circuit
V
(BR)DSS
t
p
25
50
75
100
125
150
175
Starting T , Junction Temperature (°C)
J
I
AS
Fig 12c. Maximum Avalanche Energy
Fig 12b. Unclamped Inductive Waveforms
vs. Drain Current
Q
G
10 V
Q
Q
GD
GS
4.0
3.5
3.0
2.5
2.0
1.5
1.0
V
G
I
I
I
= 1.0mA
= 250μA
= 100μA
D
D
D
Charge
Fig 13a. Basic Gate Charge Waveform
L
VCC
DUT
-75 -50 -25
0
J
25 50 75 100 125 150 175
, Temperature ( °C )
0
T
1K
Fig 14. Threshold Voltage vs. Temperature
Fig 13b. Gate Charge Test Circuit
7
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AUIRFR1010Z
1000
Duty Cycle = Single Pulse
100
Allowed avalanche Current vs
avalanche pulsewidth, tav
assuming ΔTj = 25°C due to
avalanche losses
0.01
0.05
10
0.10
1
0.1
1.0E-06
1.0E-05
1.0E-04
1.0E-03
1.0E-02
1.0E-01
tav (sec)
Fig 15. Typical Avalanche Current vs.Pulsewidth
120
Notes on Repetitive Avalanche Curves , Figures 15, 16:
(For further info, see AN-1005 at www.irf.com)
1. Avalanche failures assumption:
Purely a thermal phenomenon and failure occurs at a
temperature far in excess of Tjmax. This is validated for
every part type.
2. Safe operation in Avalanche is allowed as long asTjmax is
not exceeded.
3. Equation below based on circuit and waveforms shown in
Figures 12a, 12b.
4. PD (ave) = Average power dissipation per single
avalanche pulse.
5. BV = Rated breakdown voltage (1.3 factor accounts for
voltage increase during avalanche).
6. Iav = Allowable avalanche current.
TOP
BOTTOM 1% Duty Cycle
= 42A
Single Pulse
100
80
60
40
20
0
I
D
7. ΔT = Allowable rise in junction temperature, not to exceed
Tjmax (assumed as 25°C in Figure 15, 16).
tav = Average time in avalanche.
175
25
50
75
100
125
150
D = Duty cycle in avalanche = tav ·f
ZthJC(D, tav) = Transient thermal resistance, see figure 11)
Starting T , Junction Temperature (°C)
J
PD (ave) = 1/2 ( 1.3·BV·Iav) = DT/ ZthJC
Iav = 2DT/ [1.3·BV·Zth]
EAS (AR) = PD (ave)·tav
Fig 16. Maximum Avalanche Energy
vs.Temperature
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8
AUIRFR1010Z
Driver Gate Drive
P.W.
P.W.
Period
D.U.T
Period
D =
+
*
=10V
V
GS
CircuitLayoutConsiderations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
-
D.U.T. I Waveform
SD
+
-
Reverse
Recovery
Current
Body Diode Forward
Current
di/dt
-
+
D.U.T. V Waveform
DS
Diode Recovery
dv/dt
V
DD
VDD
Re-Applied
Voltage
• dv/dtcontrolledbyRG
RG
+
-
Body Diode
Forward Drop
• Driver same type as D.U.T.
• ISD controlled by Duty Factor "D"
• D.U.T. - Device Under Test
Inductor Curent
I
SD
Ripple ≤ 5%
* VGS = 5V for Logic Level Devices
Fig 17. Peak Diode Recovery dv/dt Test Circuit for N-Channel
HEXFET® Power MOSFETs
RD
VDS
VGS
D.U.T.
RG
+VDD
-
10V
PulseWidth ≤ 1 µs
Duty Factor≤ 0.1 %
Fig 18a. Switching Time Test Circuit
V
DS
90%
10%
V
GS
t
t
r
t
t
f
d(on)
d(off)
Fig 18b. Switching Time Waveforms
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9
AUIRFR1010Z
D-Pak (TO-252AA) Package Outline
Dimensions are shown in millimeters (inches)
D-Pak (TO-252AA) Part Marking Information
PartNumber
AUFR1010Z
DateCode
Y= Year
WW= Work Week
A=Automotive,LeadFree
IRLogo
YWWA
XX or XX
LotCode
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10
AUIRFR1010Z
D-Pak (TO-252AA) Tape & Reel Information
Dimensions are shown in millimeters (inches)
TR
TRL
TRR
16.3 ( .641 )
15.7 ( .619 )
16.3 ( .641 )
15.7 ( .619 )
12.1 ( .476 )
11.9 ( .469 )
8.1 ( .318 )
7.9 ( .312 )
FEED DIRECTION
FEED DIRECTION
NOTES :
1. CONTROLLING DIMENSION : MILLIMETER.
2. ALL DIMENSIONS ARE SHOWN IN MILLIMETERS ( INCHES ).
3. OUTLINE CONFORMS TO EIA-481 & EIA-541.
13 INCH
16 mm
NOTES :
1. OUTLINE CONFORMS TO EIA-481.
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11
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