ISL23511WFB8Z [INTERSIL]

Low Noise, Low Power, 32 Taps, Push Button Controlled Potentiometer; 低噪声,低功耗, 32个抽头,按钮控制电位器
ISL23511WFB8Z
型号: ISL23511WFB8Z
厂家: Intersil    Intersil
描述:

Low Noise, Low Power, 32 Taps, Push Button Controlled Potentiometer
低噪声,低功耗, 32个抽头,按钮控制电位器

转换器 电位器 电阻器 光电二极管
文件: 总11页 (文件大小:389K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
ISL23511  
®
Single Push Button Controlled Potentiometer (XDCP™)  
Data Sheet  
December 3, 2007  
FN6588.0  
Low Noise, Low Power, 32 Taps, Push  
Button Controlled Potentiometer  
Features  
• Solid-state volatile potentiometer  
• Push button controlled  
The Intersil ISL23511 is a three-terminal digitally-controlled  
potentiometer (XDCP) implemented by a resistor array  
composed of 31 resistive elements and a wiper switching  
network. The ISL23511 features a push button control, a  
shutdown mode, as well as an industry-leading µTQFN  
package.  
• Single or Auto increment/decrement  
- Fast Mode after 1s button press  
• Shutdown Mode  
• 32 wiper tap points  
The push button control has individual PU and PD inputs for  
adjusting the wiper. To eliminate redundancy the wiper  
position will automatically increment or decrement if one of  
these inputs is held longer than one second.  
- Zero scale wiper position on power-up  
• Low power CMOS  
- VCC = 2.7V to 5.5V  
- Terminal voltage, 0 to V  
CC  
Forcing both PU and PD low for more than two seconds  
activates shutdown mode. Shutdown mode disconnects the  
top of the resistor chain and moves the wiper to the lowest  
position, minimizing power consumption.  
- Standby current, 3µA max  
• RTOTAL value = 10kΩ, 50kΩ  
• Packages  
- 8 Ld SOIC and 10 Ld µTQFN (2.1x1.6mm)  
The three terminals accessing the resistor chain naturally  
configure the ISL23511 as a voltage divider. A rheostat is  
easily formed by floating an end terminal or connecting it to  
the wiper.  
• Pb-free (RoHS compliant)  
Applications  
NC  
VCC (SUPPLY VOLTAGE)  
• Volume Control  
O
NC  
V
PU  
1
9
8
7
6
• LED/LCD Brightness Control  
• Contrast Control  
uTFQFN  
2
3
4
PD  
RH  
CC  
(Top View)  
NC  
RL  
RH  
V
PU  
PD  
SS  
• Programming Bias Voltages  
• Ladder Networks  
CONTROL  
BLOCK  
RW  
RW  
O
PU  
PD  
RH  
1
2
3
4
8
7
6
5
V
CC  
RL  
SOIC  
NC  
RL  
(Top View)  
V
RW  
SS  
VSS (GROUND)  
Ordering Information  
PART  
NUMBER  
PART  
MARKING  
RTOTAL  
(kΩ)  
TEMP.  
RANGE(°C)  
PACKAGE  
(Pb-Free)  
PKG.  
DWG. #  
ISL23511WFB8Z* (Note 1)  
ISL23511UFB8Z* (Note 1)  
ISL23511WFRU10Z* (Note 2)  
ISL23511UFRU10Z* (Note 2)  
23511 WFBZ  
23511 UFBZ  
GA  
10  
-40 to +125  
-40 to +125  
-40 to +125  
-40 to +125  
8 Ld SOIC  
M8.15  
M8.15  
50  
8 Ld SOIC  
10  
10 Ld µTQFN  
10 Ld µTQFN  
L10.2.1x1.6A  
L10.2.1x1.6A  
FZ  
50  
*Add “-TK” suffix for tape and reel. Please refer to TB347 for details on reel specifications.  
NOTES:  
1. These Intersil Pb-free plastic packaged products employ special Pb-free material sets; molding compounds/die attach materials and 100%  
matte tin plate PLUS ANNEAL - e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering  
operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of  
IPC/JEDEC J STD-020.  
2. These Intersil Pb-free plastic packaged products employ special Pb-free material sets; molding compounds/die attach materials and NiPdAu  
plate - e4 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free  
products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.  
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.  
1
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.  
XDCP is a trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2007. All Rights Reserved  
All other trademarks mentioned are the property of their respective owners.  
ISL23511  
Pinouts  
ISL23511  
(8 LD SOIC)  
TOP VIEW  
ISL23511  
(10 LD µTDFN)  
TOP VIEW  
NC  
O
O
PU  
PD  
RH  
1
8
7
6
5
V
CC  
NC  
V
PU  
1
9
8
7
6
2
3
4
NC  
RL  
2
3
4
PD  
RH  
CC  
NC  
RL  
V
RW  
SS  
V
SS  
RW  
Pin Descriptions  
SOIC  
PIN  
µTQFN  
PIN  
SYMBOL  
BRIEF DESCRIPTION  
1
2
3
1
2
3
PU  
The PU is a negative-edge triggered input with internal pull-up. Toggling PU will move the wiper close to RH  
terminal.  
PD  
RH  
The PD is a negative-edge triggered input with internal pull-up. Toggling PD will move the wiper close to RL  
terminal.  
The RH and RL pins of the ISL23511 are equivalent to the fixed terminals of a mechanical potentiometer. The  
minimum voltage is V  
of the terminal in relation to wiper movement direction selected by the PU/PD input.  
and the maximum is V . The terminology of RH and RL references the relative position  
SS  
CC  
4
5
4
5
VSS  
RW  
Ground  
The RW pin is the wiper terminal of the potentiometer which is equivalent to the movable terminal of a mechanical  
potentiometer.  
6
6
RL  
The RH and RL pins of the ISL23511 are equivalent to the fixed terminals of a mechanical potentiometer. The  
minimum voltage is V  
of the terminal in relation to wiper movement direction selected by the PU/PD input.  
and the maximum is V . The terminology of RH and RL references the relative position  
SS  
CC  
7
8
7, 9, 10  
8
NC  
No connection  
Supply Voltage  
VCC  
Block Diagrams  
5-BIT  
31  
RH  
PU  
PD  
UP/DOWN  
COUNTER  
V
(SUPPLY VOLTAGE)  
CC  
30  
29  
ONE 28  
OF  
THIRTY  
TWO  
DECODER  
RH  
PU  
PD  
RW  
TRANSFER  
GATES  
RESISTOR  
ARRAY  
CONTROL  
BLOCK  
RW  
2
RL  
1
0
V
(GROUND)  
SS  
RL  
GENERAL  
DETAILED  
FN6588.0  
December 3, 2007  
2
ISL23511  
Absolute Maximum Ratings  
Thermal Information  
Storage temperature . . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C  
Voltage at PU and PD Pin with Respect to GND . -0.3V to VCC + 0.3  
VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-0.3V to +6V  
Voltage at any DCP Pin with respect to GND . . . . . . . .-0.3V to VCC  
IW (10s) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±6mA  
Latchup . . . . . . . . . . . . . . . . . . . . . . . . . Class II, Level A @ +125°C  
ESD Rating  
Thermal Resistance (Typical, Note 3, 4)  
θ
JA (°C/W)  
θ
JC (°C/W)  
48.3  
8 Lead SOIC . . . . . . . . . . . . . . . . . . . .  
10 Lead µTQFN . . . . . . . . . . . . . . . . .  
Maximum Junction Temperature (Plastic Package). . . . . . . . +150°C  
Pb-free reflow profile . . . . . . . . . . . . . . . . . . . . . . . . . .see link below  
http://www.intersil.com/pbfree/Pb-FreeReflow.asp  
120  
150  
Human Body Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3kV  
Machine Model. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .250V  
Recommended Operating Conditions  
Temperature Range (Extended Industrial). . . . . . . .-40°C to +125°C  
VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.7V to 5.5V  
Power Rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15mW  
Wiper Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .±3.0mA  
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and  
result in failures not covered by warranty.  
NOTE:  
3. θJA is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief TB379 for details.  
4. θJC is for the location in the center of the exposed metal pad on the package underside.  
Potentiometer Specifications Over recommended operating conditions, unless otherwise specified.  
MIN  
TYP  
MAX  
SYMBOL  
PARAMETER  
RH to RL Resistance  
TEST CONDITIONS  
(Note 18) (Note 5) (Note 18)  
UNIT  
kΩ  
RTOTAL  
W option  
U option  
10  
50  
kΩ  
RH to RL Resistance Tolerance  
-20  
+20  
%
End-to-End Temperature Coefficient W option  
±80  
±125  
130  
ppm/°C  
(Note 16)  
U option  
ppm/°C  
(Note 16)  
RW  
Wiper Resistance  
VCC = 3.3V, wiper current IRW = VCC/RTOTAL  
VRH and VRL to GND  
400  
VCC  
Ω
V
VRH, VRL  
VRH and VRL Terminal Voltages  
Noise on wiper terminal  
Potentiometer Capacitance  
0
from 0Hz to 10MHz  
-80  
dBV  
pF  
CH/CL/CW  
(Note 17)  
10/10/25  
ILkgDCP  
Leakage on DCP Pins  
Voltage at pin from GND to VCC  
0.05  
0.4  
µA  
VOLTAGE DIVIDER MODE (0V @ RL; VCC @ RH; measured at RW unloaded)  
INL  
(Note 10)  
Integral Non-linearity  
Differential Non-linearity  
Zero-scale Error  
-1  
1
LSB  
(Note 6)  
DNL  
(Note 9)  
Monotonic over all tap positions  
-0.5  
0.5  
LSB  
(Note 6)  
ZSerror  
(Note 7)  
W option  
U option  
W option  
U option  
0
0
0.3  
0.3  
3
1
0
0
LSB  
(Note 6)  
FSerror  
(Note 8)  
Full-scale Error  
-3  
-1  
-0.3  
-0.3  
±25  
LSB  
(Note 6)  
TCV  
Ratiometric Temperature Coefficient wiper from 5 hex to 1F hex for W and U option  
ppm/°C  
(Note 11)  
fCUTOFF  
3dB cut off frequency  
wiper at the middle scale, W option  
wiper at the middle scale, U option  
500  
75  
kHz  
kHz  
RESISTOR MODE (Measurements between RW and RL with RH not connected, or between RW and RH with RL not connected)  
RINL  
(Note 15)  
Integral Non-linearity  
DCP register set between 1 hex and 1F hex;  
monotonic over all tap positions; W option  
-1.5  
1.5  
MI  
(Note 12)  
DCP register set between 1 hex and 1F hex;  
monotonic over all tap positions; U option  
-1  
1
MI  
(Note 12)  
FN6588.0  
December 3, 2007  
3
ISL23511  
Potentiometer Specifications Over recommended operating conditions, unless otherwise specified. (Continued)  
MIN  
TYP  
MAX  
SYMBOL  
PARAMETER  
TEST CONDITIONS  
W and U option  
(Note 18) (Note 5) (Note 18)  
UNIT  
RDNL  
(Note 14)  
Differential Non-linearity  
-0.5  
0
0.5  
3
MI  
(Note 12)  
Roffset  
(Note 13)  
Offset  
W option  
U option  
1
MI  
(Note 12)  
0
0.5  
1
MI  
(Note 12)  
DC Electrical Specifications Over recommended operating conditions unless otherwise specified.  
MIN  
TYP  
MAX  
SYMBOL  
PARAMETER  
VCC Active Current  
TEST CONDITIONS  
(Note 18) (Note 5) (Note 18)  
UNIT  
ICC  
VCC = 5.5V, perform wiper move  
operation  
150  
µA  
ISB  
ILkg  
VIH  
VIL  
Standby Current  
0.6  
3
µA  
µA  
V
PU, PD Input Leakage Current  
PU, PD Input HIGH Voltage  
PU, PD input LOW Voltage  
PU, PD Input Capacitance  
VIN = VSS to VCC  
-2  
+2  
VCC x 0.7  
VCC x 0.1  
V
CIN  
(Note 17)  
VCC = 3.3V, TA = +25°C, f = 1MHz  
10  
1
pF  
Rpull_up  
(Note 17)  
Pull-up Resistor for PU and PD  
MΩ  
AC Electrical Specifications Over recommended operating conditions unless otherwise specified.  
MIN  
TYP  
MAX  
SYMBOL  
PARAMETER  
(Note 18)  
(Note 5)  
(Note 18)  
UNIT  
tGAP  
Time Between Two Separate Push Button Events  
1
ms  
(Note 17)  
tDB  
Debounce Time  
15  
250  
50  
2
30  
375  
75  
ms  
ms  
ms  
s
tS SLOW  
tS FAST  
Wiper Change on a Slow Mode  
Wiper Change on a Fast Mode  
Time to Enter Shutdown Mode (keep PU and PD LOW)  
100  
25  
tstdn  
(Note 17)  
t
R VCC  
NOTES:  
5. Typical values are for TA = +25°C and 3.3V supply voltage.  
VCC Power-up Rate  
0.2  
50  
V/ms  
6. LSB: [V(RW)31 – V(RW)0]/31. V(RW)31 and V(RW)0 are voltage on RW pin for the DCP register set to 1F hex and 00 hex respectively. LSB is  
the incremental voltage when changing from one tap to an adjacent tap.  
7. ZS error = V(RW)0/LSB.  
8. FS error = [V(RW)31 – VCC]/LSB.  
9. DNL = [V(RW)i – V(RW)i-1]/LSB -1, for i = 1 to 31; i is the DCP register setting.  
10. INL = [V(RW)i – i • LSB – V(RW)]/LSB for i = 1 to 31  
Max(V(RW) ) Min(V(RW) )  
6
10  
i
i
11.  
for i = 5 to 31 decimal, T = -40°C to +125°C. Max( ) is the maximum value of the wiper  
[Max(V(RW) ) + Min(V(RW) )] ⁄ 2 +165°C voltage and Min ( ) is the minimum value of the wiper voltage over the temperature range.  
--------------------------------------------------------------------------------------------- --------------------  
TC  
=
×
V
i
i
12. MI = |RW31 – RW0|/31. MI is a minimum increment. RW31 and RW0 are the measured resistances for the DCP register set to 1F hex and 00  
hex respectively.  
13. Roffset = RW0/MI, when measuring between RW and RL.  
Roffset = RW31/MI, when measuring between RW and RH.  
14. RDNL = (RWi – RWi-1)/MI, for i = 1 to 31.  
15. RINL = [RWi – (MI • i) – RW0]/MI, for i = 1 to 31.  
6
16.  
for i = 5 to 31, T = -40°C to +125°C. Max( ) is the maximum value of the resistance and Min ( ) is the  
minimum value of the resistance over the temperature range.  
[Max(Ri) Min(Ri)]  
10  
--------------------------------------------------------------- --------------------  
TC  
=
×
R
+165°C  
[Max(Ri) + Min(Ri)] ⁄ 2  
17. Limits should be considered typical and are not production tested.  
18. Parts are 100% tested at +25°C. Over-temperature limits established by characterization and are not production tested.  
FN6588.0  
December 3, 2007  
4
ISL23511  
Slow Mode Timing  
t
DB  
t
GAP  
PU  
*
MI  
V
W
* MI in the AC timing diagram refers to the minimum incremental change in the wiper voltage.  
Fast Mode Timing  
t
DB  
PU  
t
S FAST  
t
S SLOW  
*
MI  
V
W
1s  
* MI in the AC timing diagram refers to the minimum incremental change in the wiper voltage.  
Shutdown Mode Timing  
t
DB  
2s  
SHUTDOWN MODE  
PU  
PD  
V
W
FN6588.0  
December 3, 2007  
5
ISL23511  
Typical Performance Curves  
3.0  
2.5  
2.0  
1.5  
1.0  
0.5  
0
160  
V
= 5.5V  
CC  
+125ºC  
+25ºC  
140  
120  
100  
80  
V
= 5.5V  
V
= 2.7V  
CC  
CC  
60  
-40ºC  
40  
20  
0
-40  
-15  
10  
35  
60  
85  
110  
0
5
10  
15  
20  
25  
30  
TAP POSITION (DECIMAL)  
TEMPERATURE (°C)  
FIGURE 1. WIPER RESISTANCE vs TAP POSITION  
FIGURE 2. STANDBY ICC vs TEMPERATURE  
[ I(RW) = VCC/RTOTAL ] FOR 10kΩ (W)  
0.03  
0.02  
0.01  
0.00  
-0.01  
-0.02  
-0.03  
0.010  
0.005  
0.000  
-0.005  
V
= 2.7V  
CC  
V
= 2.7V  
CC  
V
= 5.5V  
CC  
V
= 5.5V  
CC  
-0.010  
0
5
10  
15  
20  
25  
30  
0
5
10  
15  
20  
25  
30  
TAP POSITION (DECIMAL)  
TAP POSITION (DECIMAL)  
FIGURE 4. INL vs TAP POSITION IN VOLTAGE DIVIDER  
FIGURE 3. DNL vs TAP POSITION IN VOLTAGE DIVIDER  
MODE FOR 10kΩ (W)  
MODE FOR 10kΩ (W)  
0
0.006  
0.005  
0.004  
V
= 5.5V  
CC  
-0.1  
-0.2  
-0.3  
-0.4  
-0.5  
V
= 5.5V  
CC  
0.003  
0.002  
0.001  
0
V
= 2.7V  
CC  
V
= 2.7V  
CC  
-40  
-15  
10  
35  
60  
85  
110  
-40  
-15  
10  
35  
60  
85  
110  
TEMPERATURE (°C)  
TEMPERATURE (°C)  
FIGURE 5. ZS ERROR vs TEMPERATURE  
FIGURE 6. FS ERROR vs TEMPERATURE  
FN6588.0  
December 3, 2007  
6
ISL23511  
Typical Performance Curves (Continued)  
0.2  
0.8  
0.6  
0.4  
0.2  
0.0  
V
= 2.7V  
CC  
V
= 2.7V  
CC  
0.1  
0.0  
V
= 5.5V  
CC  
-0.1  
-0.2  
V
= 5.5V  
CC  
0
5
10  
15  
20  
25  
30  
0
5
10  
15  
20  
25  
30  
TAP POSITION (DECIMAL)  
TAP POSITION (DECIMAL)  
FIGURE 7. DNL vs TAP POSITION IN RHEOSTAT MODE FOR  
FIGURE 8. INL vs TAP POSITION IN RHEOSTAT MODE FOR  
10kΩ (W)  
10kΩ (W)  
40  
1.20  
10k  
35  
30  
25  
V
= 5.5V  
CC  
0.60  
0.00  
V
= 2.7V  
V
= 5.5V  
CC  
CC  
10k  
20  
15  
10  
5
50k  
V
= 2.7V  
CC  
-0.60  
-1.20  
50k  
0
5
10  
15  
20  
25  
30  
-40  
-15  
10  
35  
60  
85  
110  
TAP POSITION (DECIMAL)  
TEMPERATURE (°C)  
FIGURE 10. TC FOR VOLTAGE DIVIDER MODE IN ppm  
FIGURE 9. END TO END RTOTAL % CHANGE vs  
TEMPERATURE  
300  
250  
50k  
200  
V
= 5.5V  
CC  
10k  
150  
100  
50  
V
= 2.7V  
CC  
0
5
10  
15  
20  
25  
30  
TAP POSITION (DECIMAL)  
FIGURE 11. TC FOR RHEOSTAT MODE IN ppm  
FIGURE 12. FREQUENCY RESPONSE (500kHz)  
ISL23511  
input, the wiper will be switched to the next adjacent tap  
position.  
Power-Up and Power-Down Requirements  
There are no restrictions on the power-up or power-down  
conditions of VCC and the voltages applied to the  
potentiometer pins provided that VCC is always more  
Internal debounce circuitry prevents inadvertent switching of  
the wiper position if PU or PD remain LOW for less than  
15ms, typical. Each of the buttons can be pushed either  
once for a single increment/decrement or continuously for a  
multiple increments/decrements. The number of  
positive than or equal to VRH and VRL, i.e., VCC VRH,VRL  
.
The VCC ramp rate specification is always in effect.  
Pin Descriptions  
increments/decrements of the wiper position depend on how  
long the button is being pushed. When making a continuous  
push, after the first second, the increment/decrement speed  
increases. For the first second, the device will be in the slow  
scan mode. Then, if the button is held for longer than 1s, the  
device will go into the fast scan mode. As soon as the button  
is released, the ISL23511 will return to a stand-by condition.  
RH and RL  
The RH and RL pins of the ISL23511 are equivalent to the  
fixed terminals of a mechanical potentiometer. The minimum  
voltage is V and the maximum is V . The terminology of  
SS  
CC  
RH and RL references the relative position of the terminal in  
relation to wiper movement direction.  
If both PU and PD buttons are pulled low more than 15ms  
from each other, all commands are ignored upon release of  
ALL buttons.  
RW  
The RW pin is the wiper terminal of the potentiometer which  
is equivalent to the movable terminal of a mechanical  
potentiometer. The default wiper position at power-up is at  
0 tap.  
The wiper, when at either fixed terminal, acts like its  
mechanical equivalent and does not move beyond the last  
position. That is, the counter does not wrap around when  
clocked to either extreme.  
PU  
The debounced PU input is used to increment the wiper  
position. An on-chip pull-up holds the PU input HIGH. A  
switch closure to ground or a LOW logic level will, after a  
debounce time, move the wiper to the next adjacent higher  
tap position.  
Shutdown Mode  
The ISL23511 enters into Shutdown Mode if both PU and PD  
inputs are kept LOW for 2 seconds. In this mode, the  
resistors array is totally disconnected from its RH pin and the  
wiper is moved to the position closest to the RL pin, as  
shown in Figure 13.  
PD  
RH  
The debounced PD input is used to decrement the wiper  
position. An on-chip pull-up holds the PD input HIGH. A  
switch closure to ground or a LOW logic level will, after a  
debounce time, move the wiper to the next adjacent lower  
tap position.  
RW  
Device Operation  
RL  
There are three sections of the ISL23511: the input control,  
the counter and decode section and the resistor array. The  
input control section operates just like an up/down counter.  
The output of this counter is decoded to turn on a single  
electronic switch, connecting a point on the resistor array to  
the wiper output. The resistor array is comprised of 31  
individual resistors connected in series. At either end of the  
array and between each resistor is an electronic switch that  
transfers the potential at that point to the wiper.  
FIGURE 13. DCP CONNECTION IN SHUTDOWN MODE  
Note that PU and PD inputs must be brought LOW within tDB  
time window of 15ms (see “Shutdown Mode Timing” on  
page 5.) otherwise all commands will be ignored until both  
inputs are released.  
Holding either PU or PD input LOW for more than 15ms will  
exit shutdown mode and return wiper to prior shutdown  
position. If PU or PD will be held LOW for more than 250ms,  
the ISL23511 will start auto-increment or auto-decrement of  
wiper position.  
The ISL23511 is designed to interface directly to two push  
button switches for effectively moving the wiper up or down.  
The PU and PD inputs increment or decrement a 5-bit  
counter respectively. The output of this counter is decoded to  
select one of the thirty-two wiper positions along the resistive  
array. The wiper increment input, PU and the wiper  
R
with V Removed  
CC  
TOTAL  
The end to end resistance of the array will fluctuate once  
CC is removed.  
V
decrement input, PD are both connected to an internal  
pull-up so that they normally remain HIGH. When pulled  
LOW by an external push button switch or a logic LOW level  
FN6588.0  
December 3, 2007  
8
ISL23511  
FN6588.0  
December 3, 2007  
9
ISL23511  
Ultra Thin Quad Flat No-Lead Plastic Package (UTQFN)  
L10.2.1x1.6A  
D
A
B
10 LEAD ULTRA THIN QUAD FLAT NO-LEAD PLASTIC  
PACKAGE  
6
MILLIMETERS  
INDEX AREA  
N
E
SYMBOL  
MIN  
0.45  
NOMINAL  
MAX  
0.55  
NOTES  
2X  
0.10 C  
A
A1  
A3  
b
0.50  
-
1
2
2X  
0.10 C  
-
-
0.05  
-
TOP VIEW  
0.127 REF  
-
0.15  
2.05  
1.55  
0.20  
0.25  
2.15  
1.65  
5
0.10 C  
0.05 C  
D
2.10  
-
C
A
E
1.60  
-
SEATING PLANE  
e
0.50 BSC  
-
A1  
k
0.20  
0.35  
-
0.40  
10  
4
-
-
SIDE VIEW  
L
0.45  
-
(DATUM A)  
N
2
PIN #1 ID  
Nd  
Ne  
θ
3
4xk  
1
2
NX L  
1
3
N
0
-
12  
4
(DATUM B)  
Rev. 3 6/06  
N-1  
NOTES:  
5
NX b  
e
1. Dimensioning and tolerancing conform to ASME Y14.5-1994.  
2. N is the number of terminals.  
3. Nd and Ne refer to the number of terminals on D and E side,  
respectively.  
0.10 M C A B  
0.05 M C  
3
(ND-1) X e  
4. All dimensions are in millimeters. Angles are in degrees.  
5. Dimension b applies to the metallized terminal and is measured  
between 0.15mm and 0.30mm from the terminal tip.  
6. The configuration of the pin #1 identifier is optional, but must be  
located within the zone indicated. The pin #1 identifier may be  
either a mold or mark feature.  
BOTTOM VIEW  
C
L
(A1)  
NX (b)  
L
5
7. Maximum package warpage is 0.05mm.  
e
8. Maximum allowable burrs is 0.076mm in all directions.  
9. Same as JEDEC MO-255UABD except:  
SECTION "C-C"  
TERMINAL TIP  
C C  
No lead-pull-back, "A" MIN dimension = 0.45 not 0.50mm  
"L" MAX dimension = 0.45 not 0.42mm.  
FOR ODD TERMINAL/SIDE  
10. For additional information, to assist with the PCB Land Pattern  
Design effort, see Intersil Technical Brief TB389.  
b
2.50  
1.75  
0.05 MIN  
L
2.00  
0.80  
0.275  
0.10 MIN  
0.25  
0.50  
DETAIL “A” PIN 1 ID  
10  
LAND PATTERN  
FN6588.0  
December 3, 2007  
10  
ISL23511  
Small Outline Plastic Packages (SOIC)  
M8.15 (JEDEC MS-012-AA ISSUE C)  
8 LEAD NARROW BODY SMALL OUTLINE PLASTIC PACKAGE  
N
INDEX  
AREA  
0.25(0.010)  
M
B M  
H
INCHES MILLIMETERS  
E
SYMBOL  
MIN  
MAX  
MIN  
1.35  
0.10  
0.33  
0.19  
4.80  
3.80  
MAX  
1.75  
0.25  
0.51  
0.25  
5.00  
4.00  
NOTES  
-B-  
A
A1  
B
C
D
E
e
0.0532  
0.0040  
0.013  
0.0688  
0.0098  
0.020  
-
-
1
2
3
L
9
SEATING PLANE  
A
0.0075  
0.1890  
0.1497  
0.0098  
0.1968  
0.1574  
-
-A-  
3
h x 45°  
D
4
-C-  
0.050 BSC  
1.27 BSC  
-
α
H
h
0.2284  
0.0099  
0.016  
0.2440  
0.0196  
0.050  
5.80  
0.25  
0.40  
6.20  
0.50  
1.27  
-
e
A1  
C
5
B
0.10(0.004)  
L
6
0.25(0.010) M  
C
A M B S  
N
α
8
8
7
NOTES:  
0°  
8°  
0°  
8°  
-
1. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of  
Publication Number 95.  
Rev. 1 6/05  
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.  
3. Dimension “D” does not include mold flash, protrusions or gate burrs.  
Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006  
inch) per side.  
4. Dimension “E” does not include interlead flash or protrusions. Inter-  
lead flash and protrusions shall not exceed 0.25mm (0.010 inch) per  
side.  
5. The chamfer on the body is optional. If it is not present, a visual index  
feature must be located within the crosshatched area.  
6. “L” is the length of terminal for soldering to a substrate.  
7. “N” is the number of terminal positions.  
8. Terminal numbers are shown for reference only.  
9. The lead width “B”, as measured 0.36mm (0.014 inch) or greater  
above the seating plane, shall not exceed a maximum value of  
0.61mm (0.024 inch).  
10. Controlling dimension: MILLIMETER. Converted inch dimensions  
are not necessarily exact.  
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.  
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality  
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without  
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and  
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result  
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.  
For information regarding Intersil Corporation and its products, see www.intersil.com  
FN6588.0  
December 3, 2007  
11  

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