ISL23710WIU10Z-T [RENESAS]

Terminal Voltage ±3V or ±5V, 128 Taps Up/Down Interface; MSOP10; Temp Range: -40° to 85°C;
ISL23710WIU10Z-T
型号: ISL23710WIU10Z-T
厂家: RENESAS TECHNOLOGY CORP    RENESAS TECHNOLOGY CORP
描述:

Terminal Voltage ±3V or ±5V, 128 Taps Up/Down Interface; MSOP10; Temp Range: -40° to 85°C

光电二极管 转换器 电阻器
文件: 总8页 (文件大小:420K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
DATASHEET  
NOT REC  
RECOMM  
OMMENDED  
FOR NEW  
DESIGNS  
T PART  
ENDED RE  
X9015  
PLACEMEN  
ISL23710  
FN6126  
Rev 0.00  
August 22, 2005  
Volatile Digitally Controlled Potentiometer (XDCP™) Terminal Voltage ±3V or ±5V,  
128 Taps Up/Down Interface  
The Intersil ISL23710 is a digitally controlled potentiometer  
(XDCP). The device consists of a resistor array, wiper  
Features  
• Up/Down Interface with Chip Select Enable  
• DCP Terminal Voltage from ±2.7V to ±5V  
• 127 Resistive Elements  
- Typical R tempco ±50ppm/°C  
switches, and a control section. The wiper position is  
controlled by a Up/Down interface.  
The potentiometer is implemented by a resistor array  
composed of 127 resistive elements and a wiper switching  
network. Between each element and at either end are tap  
points accessible to the wiper terminal. The position of the  
wiper element is controlled by the CS, U/D, and INC inputs.  
The wiper register is volatile and is reset to midscale on  
power up. The wiper position can be locked while powered  
up to prevent inadvertent changes.  
TOTAL  
- Ratiometric tempco ±4ppm/°C  
- End to end resistance range ±20%  
- Wiper resistance = 70typ at V  
= 3.3V  
CC  
• Low Power CMOS  
- V- = -2.7V to -5.5V  
- V  
CC  
= 2.7V to 5.5V  
The device can be used as a three-terminal potentiometer or  
as a two-terminal variable resistor in a wide variety of  
applications including:  
- Active current, 1mA max  
- Standby current, 500nA max  
• R  
TOTAL  
Values = 10k50k  
• Industrial and Automotive Control  
• Parameter and Bias Adjustments  
• Amplifier Bias and Control  
• Volatile Wiper Storage with Wiper Locking  
• Packages  
- 10 Ld MSOP  
• Pb-Free Plus Anneal Available (RoHS Compliant)  
Ordering Information  
TEMP  
Pinout  
PART NUMBER RESISTANCE RANGE  
PKG.  
PACKAGE DWG. #  
ISL23710  
(10 LD MSOP)  
TOP VIEW  
(BRAND)  
OPTION ()  
(°C)  
ISL23710WIU10Z  
(AOG) (Notes 1, 2)  
10K  
-40 to +85 10 Ld MSOP M10.118  
(Pb-Free)  
ISL23710UIU10Z  
(AOF) (Notes 1, 2)  
50K  
-40 to +85 10 Ld MSOP M10.118  
(Pb-Free)  
INC  
U/D  
10  
9
1
VCC  
V-  
2
3
NOTES:  
GND  
R
L
8
1. Add “-T” suffix for tape and reel.  
4
5
7
R
CS  
NC  
W
2. Intersil Pb-free plus anneal products employ special Pb-free material  
sets; molding compounds/die attach materials and 100% matte tin  
plate termination finish, which are RoHS compliant and compatible  
with both SnPb and Pb-free soldering operations. Intersil Pb-free  
products are MSL classified at Pb-free peak reflow temperatures that  
meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.  
R
H
6
FN6126 Rev 0.00  
August 22, 2005  
Page 1 of 8  
ISL23710  
Block Diagram  
U/D  
INC  
7-BIT  
UP/DOWN  
COUNTER  
R
127  
126  
H
V
V-  
CC  
CS  
125  
124  
UP/DOWN  
(U/D)  
R
R
H
INCREMENT  
(INC)  
INTERFACE  
AND  
CONTROL  
W
ONE  
OF  
128  
TRANSFER  
GATES  
RESISTOR  
ARRAY  
DEVICE SELECT  
(CS)  
DECODER  
R
L
2
RECALL  
CONTROL  
CIRCUITRY  
GND  
1
0
SIMPLE BLOCK DIAGRAM  
R
R
L
W
DETAILED BLOCK DIAGRAM  
DESCRIPTION  
Pin Descriptions  
PIN NUMBER  
SYMBOL  
U/D  
1
2
Controls the direction of wiper movement and whether the counter is incremented or decremented.  
Negative supply voltage for the potentiometer wiper control.  
Ground. Should be connected to a digital ground.  
V-  
3
GND  
CS  
4
Chip Select. The device is selected when the CS input is LOW.  
No Connect. Pin is to be left unconnected.  
5
NC  
6
R
A fixed terminal for one end of the potentiometer resistor.  
The wiper terminal which is equivalent to the movable terminal of a potentiometer.  
A fixed terminal for one end of the potentiometer resistor.  
Positive logic supply voltage.  
H
7
R
W
8
R
L
9
VCC  
INC  
10  
Increment input; negative edge triggered.  
FN6126 Rev 0.00  
August 22, 2005  
Page 2 of 8  
ISL23710  
Absolute Maximum Ratings  
Thermal Information  
Temperature Under Bias . . . . . . . . . . . . . . . . . . . . .-65C to +135C  
Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C  
Thermal Resistance (Typical, Note 1)  
(°C/W)  
170  
JA  
MSOP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . .  
Voltage on CS, INC, U/D and V  
CC  
with Respect to GND . . . . . . . . . . . . . . . . . . . .-0.3V to V +0.3V  
Voltage on V- (Referenced to GND) . . . . . . . . . . . . . . . . . . . . . . -6V  
CC  
Recommended Operating Conditions  
Temperature Range (Industrial). . . . . . . . . . . . . . . . .-40°C to +85°C  
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.7V to 5.5V  
V = |V  
-V  
| . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12V  
(RH) (RL)  
V
Lead Temperature (Soldering 10s) . . . . . . . . . . . . . . . . . . . . .300°C  
CC  
V- . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-2.7V to -5.5V  
I
(10s) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±6mA  
W
V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 6V  
CC  
R , R , R . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V- to V  
H
L
W
CC  
ESD Rating (MIL-STD-883, Method 3015.7) . . . . . . . . . . . . . . .>2kV  
CAUTION: Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only; functional  
operation of the device (at these or any other conditions above those listed in the operational sections of this specification) is not implied. Exposure to absolute  
maximum rating conditions for extended periods may affect device reliability.  
NOTE:  
1. is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief TB379 for details.  
JA  
Analog Specifications  
Over recommended operating conditions unless otherwise stated.  
TYP  
SYMBOL  
PARAMETER  
to R Resistance  
TEST CONDITIONS  
MIN  
(Note 1)  
MAX  
UNIT  
k  
k  
%
R
R
W option  
U option  
10  
50  
TOTAL  
H
L
R
R
to R Resistance Tolerance  
-20  
V-  
+20  
H
L
V
,V  
RH RL  
R Terminal Voltage  
V
V
H,  
l
CC  
R
Wiper Resistance  
V- = -5.5V; V  
= +5.5V,  
CC  
70  
200  
W
wiper current = (V  
- V-)/R  
CC  
TOTAL  
C /C /C  
W
Potentiometer Capacitance (Note 13)  
10/10/  
25  
pF  
µA  
H
L
I
Leakage on DCP Pins  
Voltage at pin from V- to V  
-1  
0.1  
1
LkgDCP  
CC  
VOLTAGE DIVIDER MODE (0V @ RL; V+ @ RH; measured at RW, unloaded)  
INL  
(Note 6)  
Integral Non-linearity  
Differential Non-linearity  
Zero-Scale Error  
-1  
1
LSB  
(Note 2)  
DNL  
(Note 5)  
W, U options  
-0.5  
0.5  
LSB  
(Note 2)  
ZSerror  
(Note 3)  
W option  
U option  
W option  
U option  
0
0
1
4
2
0
0
LSB  
(Note 2)  
0.5  
-1  
FSerror  
(Note 4)  
Full-Scale Error  
-4  
-2  
LSB  
(Note 2)  
-0.5  
±4  
TC  
Ratiometric Temperature Coefficient  
DCP register set to i = 16 to 120d,  
T = -40°C to 85°C  
ppm/°C  
V
(Note 7,13)  
RESISTOR MODE (Measurements between RW and RL with RH not connected, or between RW and RH with RL not connected)  
RINL  
(Note 11)  
Integral Non-linearity  
Differential Non-linearity  
Offset  
DCP register set between 16 and 127d Monotonic  
over all tap positions  
-1  
-0.5  
0
1
0.5  
5
MI  
(Note 8)  
RDNL  
(Note 10)  
MI  
(Note 8)  
Roffset  
(Note 9)  
DCP register set to 0d, W option  
DCP register set to 0d, U option  
2
MI  
(Note 8)  
0
0.5  
±50  
2
MI  
(Note 8)  
TC  
Resistance Temperature Coefficient  
DCP register set to i = 16 to 127d,  
T = -40°C to +85°C  
ppm/°C  
R
(Notes 12,13)  
FN6126 Rev 0.00  
August 22, 2005  
Page 3 of 8  
ISL23710  
Operating Specifications Over the recommended operating conditions unless otherwise specified.  
TYP  
SYMBOL  
PARAMETER  
TEST CONDITIONS  
MIN  
(Note 1) MAX  
UNITS  
I
V
Supply Current, Volatile Write/Read CS = V , U/D = V or V and INC = 0.4V/2.4V  
500  
µA  
CC1  
CC  
IL  
IL  
IH  
min. t  
R , R , R not connected  
CYC  
L
H
W
I
V- Supply Current, Volatile Write/Read CS = V , U/D = V or V and INC = 0.4V/2.4V  
-100  
µA  
V-  
IL  
IL  
IH  
min. t  
R , R , R not connected  
CYC  
L
H
W
I
V
Current (Standby)  
V
V
= +5.5V, 3 Wire Interface in Standby State  
= +2.7V, 3 Wire Interface in Standby State  
500  
300  
nA  
nA  
nA  
nA  
µA  
SB  
CC  
CC  
CC  
I
V- Current (Standby)  
V- = -5.5V, 3 Wire Interface in Standby State  
V- = -2.7V, 3 Wire Interface in Standby State  
-500  
-300  
-10  
V-SB  
I
Leakage Current, at Pins INC, CS, U/D, Voltage at pin from GND to V  
A0, and A1  
10  
LkgDig  
Vpor  
CC  
Power-on Recall Voltage  
Minimum V  
at which the wiper is Reset  
2.5  
V
CC  
SERIAL INTERFACE SPECS  
V
INC, CS, and U/D Input Buffer LOW  
Voltage  
-0.3  
0.3*V  
V
V
IL  
CC  
V
INC, CS, and U/D Input Buffer HIGH  
Voltage  
0.7*V  
V
+0.3  
CC  
IH  
CC  
Hysteresis INC, CS, and U/D Input Buffer Hysteresis  
(Note 13)  
0.15*  
V
V
CC  
Cpin  
INC, CS, and U/D Pin Capacitance  
10  
pF  
(Note 13)  
AC Electrical Specifications  
V
= 5V ±10%, T = Full Operating Temperature Range unless otherwise stated  
CC A  
SYMBOL  
PARAMETER  
MIN  
100  
100  
1
TYP (Note 1)  
MAX  
UNIT  
ns  
t
t
CS to INC Setup  
Cl  
lD  
DI  
INC HIGH to U/D Change  
U/D to INC Setup  
ns  
t
µs  
t
INC LOW Period  
1
µs  
lL  
t
INC HIGH Period  
1
µs  
lH  
t
Lock Setup Time, INC High to CS High  
1
µs  
ICL  
t
(Note 13)  
INC to R Change  
W
1
µs  
IW  
t
INC Cycle Time  
2
µs  
CYC  
t
t
INC Input Rise and Fall Time  
500  
µs  
R, F  
FN6126 Rev 0.00  
August 22, 2005  
Page 4 of 8  
ISL23710  
NOTES:  
1. Typical values are for T = 25°C and 3.3V supply voltage.  
A
2. LSB: [V(RW)  
127  
– V(RW) ]/127. V(RW) and V(RW) are V(RW) for the DCP register set to 7F hex and 00 hex respectively. LSB is the  
127 0  
0
incremental voltage when changing from one tap to an adjacent tap.  
3. ZS error = V(RW) /LSB.  
0
4. FS error = [V(RW)  
127  
– V ]/LSB.  
CC  
5. DNL = [V(RW) – V(RW) ]/LSB-1, for i = 1 to 127. i is the DCP register setting.  
i-1  
i
6. INL = V(RW) – (i • LSB – V(RW) ) for i = 1 to 127.  
i
0
MaxVRW  MinVRW   
6
i
i
10  
7. TC = ---------------------------------------------------------------------------------------------- x ----------------  
V
MaxVRW  + MinVRW   2  
125°C  
Max( ) is the maximum value of the wiper voltage and Min ( ) is the minimum value of the wiper voltage over the temperature range.  
8. MI = |R – R | /127. R and R are the measured resistances for the DCP register set to 7F hex and 00 hex respectively.  
i
i
127  
0
127  
0
9. Roffset = R /MI, when measuring between RW and RL.  
0
Roffset = R  
/MI, when measuring between RW and RH.  
127  
10. RDNL = (R – R )/MI, for i = 16 to 127d.  
i
i-1  
11. RINL = [R – (MI • i) – R ]/MI, for i = 16 to 127d.  
i
0
6
MaxRiMinRi  
10  
--------------------------------------------------------------- ----------------  
12.  
TC  
=
R
MaxRi+ MinRi  2  
Max( ) is the maximum value of the resistance and Min ( ) is the minimum value of the resistance over the temperature range.  
125°C  
13. This parameter is not 100% tested.  
Symbol Table  
WAVEFORM  
INPUTS  
OUTPUTS  
Must be steady  
Will be steady  
May change from Low to High  
May change from High to Low  
Will change from Low to High  
Will change from High to Low  
Don’t Care: Changes Allowed  
N/A  
Changing: State Not Known  
Center Line is High Impedance  
FN6126 Rev 0.00  
August 22, 2005  
Page 5 of 8  
ISL23710  
AC Timing  
CS  
t
CYC  
t
t
t
t
ICL  
CI  
IL  
IH  
90%  
10%  
90%  
INC  
U/D  
t
t
t
t
R
ID  
DI  
F
t
IW  
(3)  
MI  
R
W
Chip Select (CS)  
Power Up and Down Requirements  
The device is selected when the CS input is LOW.  
In order to prevent unwanted tap position changes, bring the  
CS and INC high before or concurrently with the V pin on  
power-up. The potentiometer voltages must be applied after  
this sequence is completed. During power-up, the data sheet  
CC  
Principles of Operation  
There are three sections of the ISL23710: the input control,  
counter and decode section, and the resistor array. The input  
control section operates just like an up/down counter. The  
output of this counter is decoded to turn on a single electronic  
switch connecting a point on the resistor array to the wiper  
output. The resistor array is comprised of 127 individual  
resistors connected in series. At either end of the array and  
between each resistor is an electronic switch that transfers the  
potential at that point to the wiper.  
parameters for the DCP do not fully apply until 1ms after V  
CC  
reaches its final value. The wiper will be set to its initial value  
(64d) once V exceeds V  
.
POR  
CC  
Pin Descriptions  
R
and R  
L
H
The high (R ) and low (R ) terminals of the ISL23710 are  
H
L
equivalent to the fixed terminals of a mechanical  
potentiometer. The terminology of R and R references the  
The wiper, when at either fixed terminal, acts like its  
mechanical equivalent and does not move beyond the last  
position. That is, the counter does not wrap around when  
clocked to either extreme.  
L
H
relative position of the terminal in relation to wiper movement  
direction selected by the U/D input and not the voltage  
potential on the terminal.  
The electronic switches on the device operate in a “make  
before break” mode when the wiper changes tap positions. If  
the wiper is moved several positions, multiple taps are  
RW  
R
is the wiper terminal and is equivalent to the movable  
w
terminal of a mechanical potentiometer. The position of the  
wiper within the array is determined by the control inputs.  
connected to the wiper for t (INC to V change). The  
IW  
W
R
value for the device can temporarily be reduced by a  
TOTAL  
Up/Down (U/D)  
significant amount if the wiper is moved several positions.  
The U/D input controls the direction of the wiper movement  
and whether the counter is incriminated or decremented.  
Instructions and Programming  
The INC, U/D and CS inputs control the movement of the wiper  
along the resistor array. With CS set LOW the device is  
selected and enabled to respond to the U/D and INC inputs.  
HIGH to LOW transitions on INC will increment or decrement  
(depending on the state of the U/D input) a seven bit counter.  
The output of this counter is decoded to select one of one-  
hundred twenty-eight wiper positions along the resistive array.  
Increment (INC)  
The INC input is negative-edge triggered. Toggling INC will  
move the wiper and either increment or decrement the counter  
in the direction indicated by the logic level on the U/D input.  
FN6126 Rev 0.00  
August 22, 2005  
Page 6 of 8  
ISL23710  
Bringing CS HIGH after INC is HIGH will cause the wiper value  
to be locked until power down (further changes in CS and INC  
will not change the wiper position). Otherwise, INC should be  
brought HIGH after CS to allow continued wiper changes.  
The state of U/D may be changed while CS remains LOW. This  
allows the host system to enable the device and then move the  
wiper up and down until the proper trim is attained. During  
initial power-up CS must go high along with or before V  
avoid an accidental tap position change.  
to  
CC  
TABLE 1. MODE SELECTION  
CS  
L
INC  
U/D  
H
MODE  
Wiper Up  
L
L
Wiper Down  
H
X
Lock Wiper Value  
Standby  
H
H
X
L
H
L
X
Standby  
X
Standby  
H
Wiper up One Position  
(not recommended)  
L
L
Wiper Down One Position  
(not recommended)  
© Copyright Intersil Americas LLC 2005. All Rights Reserved.  
All trademarks and registered trademarks are the property of their respective owners.  
For additional products, see www.intersil.com/en/products.html  
Intersil products are manufactured, assembled and tested utilizing ISO9001 quality systems as noted  
in the quality certifications found at www.intersil.com/en/support/qualandreliability.html  
Intersil products are sold by description only. Intersil may modify the circuit design and/or specifications of products at any time without notice, provided that such  
modification does not, in Intersil's sole judgment, affect the form, fit or function of the product. Accordingly, the reader is cautioned to verify that datasheets are  
current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its  
subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or  
otherwise under any patent or patent rights of Intersil or its subsidiaries.  
For information regarding Intersil Corporation and its products, see www.intersil.com  
FN6126 Rev 0.00  
August 22, 2005  
Page 7 of 8  
ISL23710  
Mini Small Outline Plastic Packages (MSOP)  
N
M10.118 (JEDEC MO-187BA)  
10 LEAD MINI SMALL OUTLINE PLASTIC PACKAGE  
INCHES  
MILLIMETERS  
E1  
E
SYMBOL  
MIN  
MAX  
MIN  
0.94  
0.05  
0.75  
0.18  
0.09  
2.95  
2.95  
MAX  
1.10  
0.15  
0.95  
0.27  
0.20  
3.05  
3.05  
NOTES  
A
A1  
A2  
b
0.037  
0.002  
0.030  
0.007  
0.004  
0.116  
0.116  
0.043  
0.006  
0.037  
0.011  
0.008  
0.120  
0.120  
-
-B-  
0.20 (0.008)  
INDEX  
AREA  
1 2  
A
B
C
-
-
TOP VIEW  
4X  
9
0.25  
(0.010)  
R1  
c
-
R
GAUGE  
PLANE  
D
3
E1  
e
4
SEATING  
PLANE  
L
0.020 BSC  
0.50 BSC  
-
-C-  
4X   
L1  
A
A2  
E
0.187  
0.016  
0.199  
0.028  
4.75  
0.40  
5.05  
0.70  
-
L
6
SEATING  
PLANE  
L1  
N
0.037 REF  
10  
0.95 REF  
10  
-
0.10 (0.004)  
-A-  
C
C
b
7
-H-  
A1  
e
R
0.003  
0.003  
-
-
0.07  
0.07  
-
-
-
D
0.20 (0.008)  
C
R1  
-
o
o
o
o
a
SIDE VIEW  
5
15  
5
15  
-
C
L
o
o
o
o
0
6
0
6
-
E
1
-B-  
Rev. 0 12/02  
0.20 (0.008)  
C
D
END VIEW  
NOTES:  
1. These package dimensions are within allowable dimensions of  
JEDEC MO-187BA.  
2. Dimensioning and tolerancing per ANSI Y14.5M-1994.  
3. Dimension “D” does not include mold flash, protrusions or gate  
burrs and are measured at Datum Plane. Mold flash, protrusion  
and gate burrs shall not exceed 0.15mm (0.006 inch) per side.  
4. Dimension “E1” does not include interlead flash or protrusions  
- H -  
and are measured at Datum Plane.  
Interlead flash and  
protrusions shall not exceed 0.15mm (0.006 inch) per side.  
5. Formed leads shall be planar with respect to one another within  
0.10mm (.004) at seating Plane.  
6. “L” is the length of terminal for soldering to a substrate.  
7. “N” is the number of terminal positions.  
8. Terminal numbers are shown for reference only.  
9. Dimension “b” does not include dambar protrusion. Allowable  
dambar protrusion shall be 0.08mm (0.003 inch) total in excess  
of “b” dimension at maximum material condition. Minimum space  
between protrusion and adjacent lead is 0.07mm (0.0027 inch).  
- B -  
-A -  
10. Datums  
and  
to be determined at Datum plane  
.
- H -  
11. Controlling dimension: MILLIMETER. Converted inch dimen-  
sions are for reference only  
FN6126 Rev 0.00  
August 22, 2005  
Page 8 of 8  

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