IRFR320 [INTERSIL]

3.1A, 400V, 1.800 Ohm, N-Channel Power MOSFETs; 3.1A , 400V , 1.800 Ohm的N通道功率MOSFET
IRFR320
型号: IRFR320
厂家: Intersil    Intersil
描述:

3.1A, 400V, 1.800 Ohm, N-Channel Power MOSFETs
3.1A , 400V , 1.800 Ohm的N通道功率MOSFET

晶体 晶体管 开关 脉冲
文件: 总7页 (文件大小:59K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
IRFR320, IRFU320  
Data Sheet  
July 1999  
File Number 2412.3  
3.1A, 400V, 1.800 Ohm, N-Channel Power  
MOSFETs  
Features  
• 3.1A, 400V  
These are N-Channel enhancement mode silicon gate  
power field effect transistors. They are advanced power  
MOSFETs designed, tested, and guaranteed to withstand a  
specified level of energy in the breakdown avalanche mode  
of operation. All of these power MOSFETs are designed for  
applications such as switching regulators, switching  
convertors, motor drivers, relay drivers, and drivers for high  
power bipolar switching transistors requiring high speed and  
low gate drive power. These types can be operated directly  
from integrated circuits.  
• r  
= 1.800  
DS(ON)  
• Single Pulse Avalanche Energy Rated  
• SOA is Power Dissipation Limited  
• Nanosecond Switching Speeds  
• Linear Transfer Characteristics  
• High Input Impedance  
• Related Literature  
- TB334 “Guidelines for Soldering Surface Mount  
Components to PC Boards”  
Formerly developmental type TA17404.  
Ordering Information  
Symbol  
D
PART NUMBER  
IRFR320  
IRFU320  
PACKAGE  
TO-252AA  
TO-251AA  
BRAND  
IFR320  
IFU320  
G
NOTE: When ordering, use the entire part number. Add the suffix 9A  
to obtain the TO-252AA variant in tape and reel, i.e., IRFR3209A.  
S
Packaging  
JEDEC TO-251AA  
JEDEC TO-252AA  
SOURCE  
DRAIN  
GATE  
GATE  
DRAIN  
(FLANGE)  
DRAIN  
SOURCE  
DRAIN (FLANGE)  
CAUTION: These devices are sensitive to electrostatic discharge; follow proper ESD Handling Procedures.  
http://www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 1999  
4-395  
IRFR320, IRFU320  
o
Absolute Maximum Ratings  
T = 25 C, Unless Otherwise Specified  
C
IRFR320, IRFU320  
UNITS  
Drain to Source Voltage (Note 1). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V  
400  
400  
3.1  
2.0  
12  
±20  
50  
0.4  
V
V
A
A
A
V
W
DS  
Drain to Gate Voltage (R  
= 20kΩ) (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .V  
GS  
DGR  
Continuous Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .I  
D
D
o
T
= 100 C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .I  
C
Pulsed Drain Current (Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I  
DM  
Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V  
GS  
Maximum Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . P  
Linear Derating Factor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  
D
o
W/ C  
Single Pulse Avalanche Energy Rating (Note 4) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . E  
190  
-55 to 150  
mJ  
C
AS  
o
Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T  
Maximum Temperature for Soldering  
T
J, STG  
o
Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T  
300  
260  
C
L
o
Package Body for 10s, See Techbrief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .T  
C
pkg  
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the  
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.  
NOTE:  
o
o
1. T = 25 C to 125 C.  
J
o
Electrical Specifications  
T
= 25 C, Unless Otherwise Specified  
C
PARAMETER  
SYMBOL  
TEST CONDITIONS  
= 0V, (Figure 10)  
GS  
MIN  
400  
2.0  
-
TYP MAX UNITS  
Drain to Source Breakdown Voltage  
Gate Threshold Voltage  
BV  
DSS  
I
= 250µA, V  
-
-
-
-
-
-
V
V
D
V
V
V
V
V
= V , I = 250µA  
4.0  
25  
250  
-
GS(TH)  
GS  
DS  
DS  
DS  
DS  
D
Zero Gate Voltage Drain Current  
I
= Rated BV  
, V  
DSS GS  
= 0V  
µA  
µA  
A
DSS  
o
= 0.8 x Rated BV  
, V  
= 0V, T = 125 C  
-
DSS GS  
, V  
J
On-State Drain Current (Note 2)  
Gate to Source Leakage Current  
I
> I  
x r  
D(ON) DS(ON)MAX GS  
= 10V,  
3.1  
D(ON)  
(Figure 7)  
I
V
= ±20V  
-
-
±100  
nA  
GSS  
GS  
= 1.7A, V  
Drain to Source On Resistance (Note 2)  
Forward Transconductance (Note 2)  
Turn-On Delay Time  
r
I
= 10V, (Figures 8, 9)  
-
1.600 1.800  
DS(ON)  
D
GS  
10V, I = 2.0A, (Figure 12)  
g
V
1.7  
2.6  
10  
14  
30  
13  
13  
-
S
fs  
d(ON)  
DS  
D
t
V
V
= 200V, I 3.1A, R  
= 18, R = 63Ω,  
-
-
-
-
-
15  
21  
45  
20  
20  
ns  
ns  
ns  
ns  
nC  
DD  
D
GS  
L
= 10V  
GS  
Rise Time  
t
r
MOSFET Switching Times are Essentially Indepen-  
dent of Operating Temperature  
Turn-Off Delay Time  
t
d(OFF)  
Fall Time  
t
f
Total Gate Charge  
Q
V
= 10V, I = 3.1A, V  
= 0.8 x Rated BV  
DSS,  
g(TOT)  
GS  
D
DS  
(Gate to Source + Gate to Drain)  
I
= 1.5mA, (Figure 14)  
G(REF)  
Gate Charge is Essentially Independent of Operat-  
ing Temperature  
Gate to Source Charge  
Gate to Drain “Miller” Charge  
Input Capacitance  
Q
Q
-
-
-
-
-
-
2.2  
7.2  
350  
64  
3.3  
nC  
nC  
pF  
pF  
pF  
nH  
gs  
11  
-
gd  
C
V
= 25V, V  
= 0V, f = 1MHz, (Figure 11)  
GS  
ISS  
DS  
Output Capacitance  
C
-
OSS  
RSS  
Reverse Transfer Capacitance  
Internal Drain Inductance  
C
8.1  
4.5  
-
L
Measured From the Drain Modified MOSFET  
Lead, 6.0mm (0.25in) from Symbol Showing the  
-
D
S
Package to Center  
of Die  
Internal Device  
Inductances  
D
Internal Source Inductance  
L
Measured From the  
Source Lead, 6.0mm  
(0.25in) from Package to  
Source Bonding Pad  
-
7.5  
-
nH  
L
D
G
L
S
S
o
o
Thermal Resistance, Junction to Case  
Thermal Resistance, Junction to Ambient  
R
R
-
-
-
-
2.5  
C/W  
C/W  
θJC  
Typical Solder Mount  
110  
θJA  
4-396  
IRFR320, IRFU320  
Source to Drain Diode Specifications  
PARAMETER  
SYMBOL  
TEST CONDITIONS  
MIN  
TYP  
MAX  
3.1  
UNITS  
Continuous Source to Drain Current  
I
Modified MOSFET  
Symbol Showing the In-  
tegral Reverse P-N  
Junction Rectifier  
-
-
-
-
A
A
SD  
D
Pulse Source to Drain Current  
(Note 3)  
I
12  
SDM  
G
S
o
Source to Drain Diode Voltage (Note 2)  
V
T = 25 C, I  
J
= 3.1A, V  
GS  
= 0V,  
-
-
1.6  
V
SD  
SD  
(Figure 13)  
o
Reverse Recovery Time  
Reverse Recovery Charge  
NOTES:  
t
T = 25 C, I  
J
= 3.1A, dI /dt = 100A/µs  
SD  
120  
270  
1.4  
600  
3.0  
ns  
rr  
SD  
SD  
o
Q
T = 25 C, I  
= 3.1A, dI /dt = 100A/µs  
SD  
0.64  
µC  
RR  
J
2. Pulse test: pulse width 300µs, duty cycle 2%.  
3. Repetitive rating: pulse width limited by maximum junction temperature. See Transient Thermal Impedance curve (Figure 3).  
o
4. V  
= 50V, starting T = 25 C, L = 3.1mH, R  
= 25Ω, peak I = 3.1A.  
GS AS  
DD  
J
Typical Performance Curves Unless Otherwise Specified  
1.2  
1.0  
0.8  
0.6  
0.4  
0.2  
0
4.0  
3.2  
2.4  
1.6  
0.8  
0
125  
o
25  
50  
75  
100  
125  
150  
0
25  
50  
75  
100  
175  
150  
o
T
, CASE TEMPERATURE ( C)  
T , CASE TEMPERATURE ( C)  
C
C
FIGURE 1. NORMALIZED POWER DISSIPATION vs CASE  
TEMPERATURE  
FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs  
CASE TEMPERATURE  
10  
0.5  
1
0.2  
P
DM  
0.1  
0.05  
0.02  
0.01  
0.1  
-2  
t
t
1
2
NOTES:  
DUTY FACTOR: D = t /t  
SINGLE PULSE  
1
2
PEAK T = P  
x Z  
x R + T  
J
DM  
θJC  
θJC C  
10  
-5  
-4  
-3  
-2  
10  
10  
10  
10  
0.1  
1
10  
t , RECTANGULAR PULSE DURATION (s)  
1
FIGURE 3. MAXIMUM TRANSIENT THERMAL IMPEDANCE  
4-397  
IRFR320, IRFU320  
Typical Performance Curves Unless Otherwise Specified (Continued)  
100  
10  
1
5
4
V
= 10V  
GS  
OPERATION IN THIS  
AREA IS LIMITED  
V
= 6.0V  
GS  
BY r  
DS(ON)  
PULSE DURATION = 80µs  
DUTY CYCLE = 0.5% MAX  
10µs  
3
2
100µs  
V
= 5.5V  
GS  
1ms  
10ms  
DC  
V
= 5.0V  
= 4.5V  
GS  
1
0
T
T
= MAX RATED  
J
V
= 4.0V  
GS  
V
o
GS  
= 25 C  
C
SINGLE PULSE  
0.1  
0
40  
80  
120  
160  
200  
1
10  
100  
1000  
V
, DRAIN TO SOURCE VOLTAGE (V)  
DS  
V , DRAIN TO SOURCE VOLTAGE (V)  
DS  
FIGURE 4. FORWARD BIAS SAFE OPERATING AREA  
FIGURE 5. OUTPUT CHARACTERISTICS  
5
10  
1
PULSE DURATION = 80µs  
DUTY CYCLE = 0.5% MAX  
V
= 10V  
PULSE DURATION = 80µs  
DUTY CYCLE = 0.5% MAX  
GS  
V
350V  
DS  
4
V
= 6.0V  
GS  
3
2
V
= 5.5V  
GS  
o
o
T
J
= 150 C  
T
= 25 C  
J
0.1  
-2  
V
= 5.0V  
= 4.5V  
GS  
1
0
V
= 4.0V  
V
GS  
GS  
10  
0
6
9
12  
15  
3
0
2
4
6
8
10  
V
, DRAIN TO SOURCE VOLTAGE (V)  
V
, GATE TO SOURCE VOLTAGE (V)  
DS  
GS  
FIGURE 6. SATURATION CHARACTERISTICS  
FIGURE 7. TRANSFER CHARACTERISTICS  
10  
8
3.0  
2.4  
1.8  
1.2  
0.6  
PULSE DURATION = 80µs  
DUTY CYCLE = 0.5% MAX  
PULSE DURATION = 80µs  
DUTY CYCLE = 0.5% MAX  
V
= 10V, I = 1.7A  
GS  
D
V
= 10V  
GS  
6
V
= 20V  
GS  
4
2
0
0
-40  
0
40  
80  
120  
160  
0
3
6
9
12  
15  
o
I , DRAIN CURRENT (A)  
T , JUNCTION TEMPERATURE ( C)  
D
J
FIGURE 8. DRAIN TO SOURCE ON RESISTANCE vs GATE  
VOLTAGE AND DRAIN CURRENT  
FIGURE 9. NORMALIZED DRAIN TO SOURCE ON  
RESISTANCE vs JUNCTION TEMPERATURE  
4-398  
IRFR320, IRFU320  
Typical Performance Curves Unless Otherwise Specified (Continued)  
1.25  
1.15  
1.05  
0.95  
0.85  
750  
600  
450  
300  
150  
0
I
= 250µA  
V
= 0V, f = 1MHz  
D
GS  
ISS  
C
C
C
= C  
+ C  
GS  
GD  
= C  
GD  
RSS  
OSS  
C + C  
DS  
GD  
C
ISS  
C
OSS  
C
RSS  
0.75  
-40  
0
40  
80  
120  
160  
2
1
2
5
10  
, DRAIN TO SOURCE VOLTAGE (V)  
DS  
2
5
10  
o
T , JUNCTION TEMPERATURE ( C)  
V
J
FIGURE 10. NORMALIZED DRAIN TO SOURCE BREAKDOWN  
VOLTAGE vs JUNCTION TEMPERATURE  
FIGURE 11. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE  
5
100  
PULSE DURATION = 80µs  
PULSE DURATION = 80µs  
DUTY CYCLE = 0.5% MAX  
DUTY CYCLE = 0.5% MAX  
V
= 0V  
GS  
4
10  
1
o
T
= 25 C  
J
3
o
o
o
T
= 25 C  
T
= 150 C  
T
= 150 C  
J
J
J
2
1
0
0.1  
0
0.3  
0.6  
0.9  
1.2  
1.5  
0
1
2
3
4
5
I , DRAIN CURRENT (A)  
V , SOURCE TO DRAIN VOLTAGE (V)  
SD  
D
FIGURE 12. TRANSCONDUCTANCE vs DRAIN CURRENT  
FIGURE 13. SOURCE TO DRAIN DIODE VOLTAGE  
20  
I
= 3.1A  
D
V
V
V
= 320V  
= 200V  
= 80V  
DS  
DS  
DS  
16  
12  
8
4
0
0
4
8
12  
16  
20  
Q
, TOTAL GATE CHARGE (nC)  
G(TOT)  
FIGURE 14. GATE TO SOURCE VOLTAGE vs GATE CHARGE  
4-399  
IRFR320, IRFU320  
Test Circuits and Waveforms  
V
DS  
BV  
DSS  
L
t
P
V
DS  
I
VARY t TO OBTAIN  
P
AS  
+
V
DD  
R
REQUIRED PEAK I  
G
AS  
V
DD  
-
V
GS  
DUT  
t
P
I
AS  
0V  
0
0.01Ω  
t
AV  
FIGURE 15. UNCLAMPED ENERGY TEST CIRCUIT  
FIGURE 16. UNCLAMPED ENERGY WAVEFORMS  
t
t
ON  
OFF  
t
d(OFF)  
t
d(ON)  
t
t
f
r
R
L
V
DS  
90%  
90%  
+
V
DD  
10%  
10%  
R
G
0
0
-
DUT  
90%  
50%  
V
GS  
50%  
PULSE WIDTH  
10%  
V
GS  
FIGURE 17. SWITCHING TIME TEST CIRCUIT  
FIGURE 18. RESISTIVE SWITCHING WAVEFORMS  
V
DS  
(ISOLATED  
SUPPLY)  
CURRENT  
REGULATOR  
V
DD  
Q
SAME TYPE  
AS DUT  
g(TOT)  
V
GS  
12V  
BATTERY  
0.2µF  
Q
gd  
50kΩ  
0.3µF  
Q
gs  
D
S
V
DS  
G
DUT  
0
0
I
G(REF)  
0
V
I
DS  
G(REF)  
I
CURRENT  
SAMPLING  
RESISTOR  
I
CURRENT  
SAMPLING  
RESISTOR  
G
D
FIGURE 19. GATE CHARGE TEST CIRCUIT  
FIGURE 20. GATE CHARGE WAVEFORMS  
4-400  
IRFR320, IRFU320  
All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification.  
Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time with-  
out notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and  
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result  
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.  
For information regarding Intersil Corporation and its products, see web site http://www.intersil.com  
Sales Office Headquarters  
NORTH AMERICA  
EUROPE  
ASIA  
Intersil Corporation  
Intersil SA  
Mercure Center  
100, Rue de la Fusee  
1130 Brussels, Belgium  
TEL: (32) 2.724.2111  
FAX: (32) 2.724.22.05  
Intersil (Taiwan) Ltd.  
7F-6, No. 101 Fu Hsing North Road  
Taipei, Taiwan  
Republic of China  
TEL: (886) 2 2716 9310  
FAX: (886) 2 2715 3029  
P. O. Box 883, Mail Stop 53-204  
Melbourne, FL 32902  
TEL: (407) 724-7000  
FAX: (407) 724-7240  
4-401  

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