ICL232LBE [INTERSIL]
+5V Powered, Dual RS-232 Transmitter/Receiver; + 5V供电，双路RS - 232发射器/接收器
| 型号： | ICL232LBE |
| 厂家： | 
Intersil |
| 描述： | +5V Powered, Dual RS-232 Transmitter/Receiver |
| 文件： | 总6页 (文件大小：138K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
TM
ICL232
June 2001
+5V Powered, Dual RS-232 Transmitter/Receiver
Features
Description
itle
L23
• Meets All RS-232C and V.28 Specifications
• Requires Only Single +5V Power Supply
• Onboard Voltage Doubler/Inverter
• Low Power Consumption
The ICL232 is a dual RS-232 transmitter/receiver interface
circuit that meets all ElA RS-232C and V.28 specifications. It
requires a single +5V power supply, and features two
onboard charge pump voltage converters which generate
+10V and -10V supplies from the 5V supply.
b-
t
• 2 Drivers
The drivers feature true TTL/CMOS input compatibility, slew-
rate-limited output, and 300Ω power-off source impedance.
The receivers can handle up to +30V, and have a 3kΩ to 7kΩ
input impedance. The receivers also have hysteresis to
improve noise rejection.
V
w-
d,
al
-
-
9V Output Swing for +5V lnput
- 300Ω Power-off Source Impedance
- Output Current Limiting
- TTL/CMOS Compatible
- 30V/µs Maximum Slew Rate
Ordering Information
2
• 2 Receivers
ns-
t-
-
30V Input Voltage Range
TEMP.
PKG.
NO.
o
PART NUMBER RANGE ( C)
PACKAGE
- 3kΩ to 7kΩ Input Impedance
/Rec
er)
utho
)
ey-
rds
ter-
- 0.5V Hysteresis to Improve Noise Rejection
ICL232CPE
ICL232CBE
ICL232lPE
ICL232lBE
ICL232MJE
0 to 70
0 to 70
16 Ld PDIP
E16.3
• All Critical Parameters are Guaranteed Over the Entire
Commercial, Industrial and Military Temperature Ranges
16 Ld SOIC
16 Ld PDIP
16 Ld SOIC
16 Ld CERDIP
M16.3
E16.3
M16.3
F16.3
Applications
-40 to 85
-40 to 85
-55 to 125
• Any System Requiring RS-232 Communications Port
- Computer - Portable and Mainframe
- Peripheral - Printers and Terminals
- Portable Instrumentation
rpo-
ion)
re-
r ()
OCI
O
- Modems
• Dataloggers
Pinout
Functional Diagram
+5V
ICL232 (PDIP, CERDIP, SOIC)
+
TOP VIEW
f-
1.0µF
16
rk
V
1
C1+
V+
CC
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
V
1µF
1µF
CC
C1+
+
+
+
+
2
+5V TO 10V
VOLTAGE INVERTER
1µF
1µF
V+
V-
3
4
GND
T1
C1-
C2+
C1-
C2+
C2-
V-
ge-
de
se-
t-
OUT
+10V TO -10V
VOLTAGE INVERTER
6
5
C2-
R1
R1
T1
IN
+5V
T1
14
400kΩ
11
OUT
T1
T1
IN
OUT
+5V
400kΩ
T2
IN
IN
es
10
12
7
T2
T2
IN
OUT
T2
T2
OUT
OC-
EW
f-
13
R1
R1
IN
OUT
R2
IN
R2
OUT
5kΩ
5kΩ
R1
R2
9
8
R2
R2
IN
OUT
15
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Intersil and Design is a trademark of Intersil Americas Inc. | Copyright © Intersil Americas Inc. 2001
File Number 3020.6
1
ICL232
Absolute Maximum Ratings
Thermal Information
o
o
V
to Ground . . . . . . . . . . . . . . . . . . . . . .(GND -0.3V) < V
< 6V
-0.3V) < V+ < 12V
Thermal Resistance (Typical, Note 1)
CERDIP Package . . . . . . . . . . . . . . . .
PDIP Package . . . . . . . . . . . . . . . . . . .
SOIC Package. . . . . . . . . . . . . . . . . . .
Maximum Junction Temperature
θ
( C/W)
θ
( C/W)
CC
V+ to Ground . . . . . . . . . . . . . . . . . . . . . . . (V
CC
JA
JC
80
100
100
18
N/A
N/A
CC
V- to Ground . . . . . . . . . . . . . . . . . . . . . . . -12V < V- < (GND +0.3V)
Input Voltages
T1 , T2 . . . . . . . . . . . . . . . . . . . . (V- -0.3V) < V < (V+ +0.3V)
IN IN IN
o
R1 , R2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30V
Plastic Packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150 C
Ceramic Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 175 C
Maximum Storage Temperature Range . . . . . . . . . .-65 C to 150 C
+0.3V) Maximum Lead Temperature (Soldering 10s). . . . . . . . . . . . . 300 C
IN IN
o
Output Voltages
T1 , T2
o
o
o
. . . . . . . . . . . . (V- -0.3V) < V
OUT TXOUT
< (V+ +0.3V)
OUT
R1
, R2
. . . . . . . . .(GND -0.3V) < V
< (V
OUT OUT
RXOUT
CC
Short Circuit Duration
T1 , T2
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Continuous
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Continuous
OUT
R1
OUT
, R2
OUT OUT
Operating Conditions
Temperature Ranges
ICL232C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .0 C to 70 C
ICL232I . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -40 C to 85 C
ICL232M . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -55 C to 125 C
o
o
o
o
o
o
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation
of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1. θ is measured with the component mounted on an evaluation PC board in free air.
JA
Electrical Specifications Test Conditions: V
= +5V 10%, T = Operating Temperature Range. Test Circuit as in Figure 8
A
CC
Unless Otherwise Specified
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNITS
Transmitter Output Voltage Swing, T
T1
and T2
OUT
Loaded with 3kΩ
5
9
10
V
OUT
OUT
to Ground
o
Power Supply Current, I
Outputs Unloaded, T = 25 C
-
-
5
-
10
0.8
-
mA
V
CC
A
T
T
, Input Logic Low, V
IN
lL
, Input Logic High, V
2.0
-
-
V
IN
lH
Logic Pullup Current, I
T1 , T2 = 0V
IN IN
15
-
200
+30
7.0
-
µA
V
P
RS-232 Input Voltage Range, V
IN
-30
3.0
0.8
-
Receiver Input Impedance, R
IN
V
V
V
=
3V
5.0
1.2
1.7
0.5
0.1
4.6
0.5
-
kΩ
V
IN
o
Receiver Input Low Threshold, V (H-L)
lN
= 5V, T = 25 C
A
CC
CC
o
Receiver Input High Threshold, V (L-H)
IN
= 5V, T = 25 C
A
2.4
1.0
0.4
-
V
Receiver Input Hysteresis, V
HYST
0.2
-
V
TTL/CMOS Receiver Output Voltage Low, V
OL
I
= 3.2mA
= -1.0mA
V
OUT
TTL/CMOS Receiver Output Voltage High, V
I
3.5
-
V
OH OUT
Propagation Delay, t
PD
RS-232 to TTL
= 10pF, R = 3kΩ, T = 25 C
-
µs
V/µs
o
Instantaneous Slew Rate, SR
C
-
30
L
L
A
(Notes 2, 3)
Transition Region Slew Rate, SR
R
= 3kΩ, C = 2500pF Measured
-
3
-
V/µs
T
L
L
from +3V to -3V or -3V to +3V
Output Resistance, R
OUT
V
= V+ = V- = 0V, V
OUT
=
2V
300
-
-
-
-
Ω
CC
RS-232 Output Short Circuit Current, I
T1
or T2
OUT
Shorted to GND
10
mA
SC
OUT
NOTES:
2. Guaranteed by design.
3. See Figure 4 for definition.
2
ICL232
Test Circuits
C1+
V+
1
2
3
4
5
6
7
8
16
15
14
13
12
V
CC
+4.5V TO
+5.5V INPUT
-
+
GND
1µF
C3
C1+
V+
V
1
2
3
4
5
6
7
8
16
CC
C1-
C2+
C2-
T1
OUT
+
1µF
C1
GND 15
R1
IN
-
3kΩ
T1
R1
C1-
C2+
C2-
V-
14
13
12
11
10
9
OUT
OUT
T1 OUTPUT
T1 11
IN
V-
RS-232
30V INPUT
R1
IN
+
1µF
C2
T2
T2
IN
-
10
9
OUT
TTL/CMOS
OUTPUT
R1
OUT
1µF C4
-
+
R2
R2
OUT
IN
TTL/CMOS
INPUT
T1
T2
IN
IN
3kΩ
TTL/CMOS
INPUT
R
= V /I T2
IN
T2
OUT
2V
OUT
OUT
T2 OUTPUT
V
=
A
IN
RS-232
30V INPUT
TTL/CMOS
OUTPUT
R2
OUT
R2
IN
T1
OUT
FIGURE 1. GENERAL TEST CIRCUIT
FIGURE 2. POWER-OFF SOURCE RESISTANCE
CONFIGURATION
Typical Performance Curves
550
10
9
500
V+ (V
CC
= 5V)
o
= 25 C
V- SUPPLY
T
A
450
400
350
300
250
200
150
8
7
6
5
4
3
V+ (V
CC
= 4.5V)
EXTERNAL SUPPLY LOAD
1kΩ BETWEEN V+ + GND
OR V- + GND
TRANSMITTER OUTPUT
OPEN CIRCUIT
V- (V
= 5V)
V- (V
CC
= 4.5V)
CC
GUARANTEED
OPERATING
RANGE
V+ SUPPLY
o
T
= 25 C
A
TRANSMITTER OUTPUTS
OPEN CIRCUIT
3
4
5
6
0
1
2
3
4
5
6
7
8
9
10
INPUT SUPPLY VOLTAGE V
CC
(V)
|I
LOAD
| (mA)
FIGURE 3. V+, V- OUTPUT IMPEDANCES vs V
FIGURE 4. V+, V- OUTPUT VOLTAGES vs LOAD CURRENT
CC
Pin Descriptions
PDIP, CERDIP
SOIC
PIN NAME
C1+
V+
DESCRIPTION
1
2
1
2
External capacitor “+” for internal voltage doubler.
Internally generated +10V (typical) supply.
3
3
C1-
External capacitor “-” for internal voltage doubler.
External capacitor “+” internal voltage inverter.
External capacitor “-” internal voltage inverter.
Internally generated -10V (typical) supply.
4
4
C2+
C2-
5
5
6
6
V-
7
7
T2
OUT
RS-232 Transmitter 2 output 10V (typical).
8
8
R2
RS-232 Receiver 2 input, with internal 5K pulldown resistor to GND.
Receiver 2 TTL/CMOS output.
IN
R2out
T2
9
9
10
10
Transmitter 2 TTL/CMOS input, with internal 400K pullup resistor to V
.
CC
IN
3
ICL232
Pin Descriptions (Continued)
PDIP, CERDIP
SOIC
PIN NAME
T1
DESCRIPTION
11
12
13
14
15
16
11
Transmitter 1 TTL/CMOS input, with internal 400K pullup resistor to V
Receiver 1 TTL/CMOS output.
.
CC
IN
12
R1
OUT
13
R1
RS-232 Receiver 1 input, with internal 5K pulldown resistor to GND.
RS-232 Transmitter 1 output 10V (typical).
Supply Ground.
IN
14
T1
OUT
15
GND
16
V
Positive Power Supply +5V 10%
CC
VOLTAGE DOUBLER
VOLTAGE INVERTER
+
+
S2
S5
S1
S3
C2
C1
V+ = 2V
CC
S6
V
GND
CC
+
+
+
+
C3
C2
C4
C1
-
-
-
-
V
GND
CC
V- = -(V+)
GND
C1-
S4
C2-
S7
S8
RC
OSCILLATOR
FIGURE 5. DUAL CHARGE PUMP
Detailed Description
The ICL232 is a dual RS-232 transmitter/receiver powered by
a single +5V power supply which meets all ElA RS232C spec-
ifications and features low power consumption. The functional
diagram illustrates the major elements of the ICL232. The cir-
cuit is divided into three sections: a voltage doubler/inverter,
dual transmitters, and dual receivers Voltage Converter.
T1 , T2
IN
IN
90%
10%
V
V
OH
T1
, T2
OUT
OUT
OL
t
t
f
r
(0.8) (V
OH
- V
)
(0.8) (V - V
)
OH
Instantaneous
Slew Rate (SR)
OL
OL
An equivalent circuit of the dual charge pump is illustrated in
Figure 5.
=
or
t
t
f
r
FIGURE 6. SLEW RATE DEFINITION
The voltage quadrupler contains two charge pumps which use
two phases of an internally generated clock to generate +10V
and -10V. The nominal clock frequency is 16kHz. During
Transmitters
The transmitters are TTL/CMOS compatible inverters which
translate the inputs to RS-232 outputs. The input logic thresh-
phase one of the clock, capacitor C1 is charged to V
During phase two, the voltage on C1 is added to V
.
,
CC
CC
old is about 26% of V , or 1.3V for V
= 5V. A logic 1 at
CC
CC
producing a signal across C2 equal to twice V . At the same
CC
the input results in a voltage of between -5V and V- at the out-
put, and a logic 0 results in a voltage between +5V and (V+
- 0.6V). Each transmitter input has an internal 400kΩ pullup
resistor so any unused input can be left unconnected and its
output remains in its low state. The output voltage swing
meets the RS-232C specification of 5V minimum with the
worst case conditions of: both transmitters driving 3kΩ mini-
time, C3 is also charged to 2V , and then during phase one,
CC
it is inverted with respect to ground to produce a signal across
C4 equal to -2V . The voltage converter accepts input
CC
voltages up to 5.5V. The output impedance of the doubler (V+)
is approximately 200Ω, and the output impedance of the
inverter (V-) is approximately 450Ω. Typical graphs are
presented which show the voltage converters output vs input
voltage and output voltages vs load characteristics. The test
circuit (Figure 3) uses 1µF capacitors for C1-C4, however, the
value is not critical. Increasing the values of C1 and C2 will
lower the output impedance of the voltage doubler and
inverter, and increasing the values of the reservoir capacitors,
C3 and C4, lowers the ripple on the V+ and V- supplies.
mum load impedance, V
= 4.5V, and maximum allowable
CC
operating temperature. The transmitters have an internally
limited output slew rate which is less than 30V/µs. The outputs
are short circuit protected and can be shorted to ground indef-
initely. The powered down output impedance is a minimum of
4
ICL232
300Ω with 2V applied to the outputs and V
= 0V.
connected to V+.
CC
+5V
C3
1µF
5kΩ
-
+
V+
V
CC
2
6
16
CTR (20) DATA
TERMINAL READY
1
400kΩ
300Ω
+
C1
5kΩ
T
XIN
1µF
3
4
DSRS (24) DATA
SIGNALING RATE
SELECT
T
-
OUT
ICL232
GND < T
< V
CC
XIN
V-
V- < V
< V+
TOUT
+
-
C2
C4
1µF
RS-232
INPUTS AND OUTPUTS
5
1µF
+
-
FIGURE 7. TRANSMITTER
T1
11
14
TD
TD (2) TRANSMIT DATA
RTS (4) REQUEST TO SEND
RD (3) RECEIVE DATA
T2
Receivers
10
12
7
INPUTS
OUTPUTS
RTS
The receiver inputs accept up to 30V while presenting the
13
TTL/CMOS RD
required 3kΩ to 7kΩ input impedance even it the power is off
R2
R1
9
8
(V
= 0V). The receivers have a typical input threshold of
CC
CTS
CTS (5) CLEAR TO SEND
1.3V which is within the 3V limits, known as the transition
region, of the RS-232 specification. The receiver output is
15
SIGNAL GROUND (7)
0V to V . The output will be low whenever the input is
CC
greater than 2.4V and high whenever the input is floating or
driven between +0.8V and -30V. The receivers feature 0.5V
hysteresis to improve noise rejection.
FIGURE 10. SIMPLE DUPLEX RS-232 PORT WITH CTS/RTS
HANDSHAKING
In applications requiring four RS-232 inputs and outputs
(Figure 11), note that each circuit requires two charge pump
capacitors (C1 and C2) but can share common reservoir
capacitors (C3 and C4). The benefit of sharing common res-
ervoir capacitors is the elimination of two capacitors and the
reduction of the charge pump source impedance which
effectively increases the output swing of the transmitters.
V
CC
R
XIN
R
OUT
-30V < R
< +30V
XIN
GND < V
ROUT
< V
CC
5kΩ
GND
FIGURE 8. RECEIVER
T1 , T2
IN
IN
OR
R1 , R2
IN IN
T1
, T2
OUT
OR
, R2
OUT
OUT
V
V
OH
OL
R1
OUT
t
t
PLH
PHL
t
t
PHL + PLH
2
Average Propagation Delay =
FIGURE 9. PROPAGATION DELAY DEFINITION
Applications
The ICL232 may be used for all RS-232 data terminal and
communication links. It is particularly useful in applications
where 12V power supplies are not available for conven-
tional RS-232 interface circuits. The applications presented
represent typical interface configurations.
A simple duplex RS-232 port with CTS/RTS handshaking is
illustrated in Figure 10. Fixed output signals such as DTR
(data terminal ready) and DSRS (data signaling rate select)
is generated by driving them through
a 5kΩ resistor
5
1
4
+
+
C1
1µF
C2
1µF
ICL232
T1
5
3
-
-
11
14
TD
TD (2) TRANSMIT DATA
T2
10
12
7
INPUTS
OUTPUTS
TTL/CMOS
RTS (4) REQUEST TO SEND
RTS
13
RD (3) RECEIVE DATA
RD
R2
R1
9
8
CTS
CTS (5) CLEAR TO SEND
15
6
6
2
2
C4
C3
+5V
RS-232
-
-
V- V+
µF
2µF
2
INPUTS AND
OUTPUTS
16
ICL232
T1
1
4
5
+
+
C1
1µF
C2
1µF
3
-
-
11
14 DTR (20) DATA TERMINAL
READY
7
DTR
DSRS
DCD
R1
T2
10
12
DSRS (24) DATA SIGNALING
RATE SELECT
DCD (8) DATA CARRIER
DETECT
INPUTS
OUTPUTS
TTL/CMOS
13
R2
R1
9
8
R1 (22) RING INDICATOR
15
SIGNAL GROUND (7)
FIGURE 11. COMBINING TWO ICL232s FOR 4 PAIRS OF RS-232 INPUTS AND OUTPUTS
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Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reli-
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6
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