ICL232MJE [HARRIS]

+5V Powered, Dual RS-232 Transmitter/Receiver; + 5V供电,双路RS - 232发射器/接收器
ICL232MJE
型号: ICL232MJE
厂家: HARRIS CORPORATION    HARRIS CORPORATION
描述:

+5V Powered, Dual RS-232 Transmitter/Receiver
+ 5V供电,双路RS - 232发射器/接收器

驱动器
文件: 总5页 (文件大小:45K)
中文:  中文翻译
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S E M I C O N D U C T O R  
ICL232  
+5V Powered, Dual RS-232 Transmitter/Receiver  
August 1997  
Features  
Description  
• Meets All RS-232C and V.28 Specifications  
• Requires Only Single +5V Power Supply  
• Onboard Voltage Doubler/Inverter  
• Low Power Consumption  
The ICL232 is a dual RS-232 transmitter/receiver interface  
circuit that meets all ElA RS-232C and V.28 specifications. It  
requires a single +5V power supply, and features two  
onboard charge pump voltage converters which generate  
+10V and -10V supplies from the 5V supply.  
• 2 Drivers  
The drivers feature true TTL/CMOS input compatibility, slew-  
rate-limited output, and 300power-off source impedance.  
The receivers can handle up to +30V, and have a 3kto 7kΩ  
input impedance. The receivers also have hysteresis to  
improve noise rejection.  
- ±9V Output Swing for +5V lnput  
- 300Power-off Source Impedance  
- Output Current Limiting  
- TTL/CMOS Compatible  
- 30V/µs Maximum Slew Rate  
Ordering Information  
• 2 Receivers  
- ±30V Input Voltage Range  
- 3kto 7kInput Impedance  
- 0.5V Hysteresis to Improve Noise Rejection  
TEMP.  
PKG.  
NO.  
o
PART NUMBER RANGE ( C)  
PACKAGE  
16 Ld PDIP  
ICL232CPE  
ICL232CBE  
ICL232lPE  
ICL232lJE  
ICL232lBE  
ICL232MJE  
0 to 70  
0 to 70  
E16.3  
• All Critical Parameters are Guaranteed Over the Entire  
Commercial, Industrial and Military Temperature Ranges  
16 Ld SOIC  
16 Ld PDIP  
M16.3  
E16.3  
F16.3  
M16.3  
F16.3  
Applications  
-40 to 85  
-40 to 85  
-40 to 85  
-55 to 125  
• Any System Requiring RS-232 Communications Port  
- Computer - Portable and Mainframe  
- Peripheral - Printers and Terminals  
- Portable Instrumentation  
16 Ld CERDIP  
16 Ld SOIC  
16 Ld CERDIP  
- Modems  
• Dataloggers  
Pinout  
Functional Diagram  
+5V  
ICL232 (PDIP, CERDIP, SOIC)  
+
TOP VIEW  
1.0µF  
16  
V
1
C1+  
V+  
CC  
1
2
3
4
5
6
7
8
16  
15  
14  
V
1µF  
1µF  
CC  
C1+  
+
+
+
+
2
+5V TO 10V  
VOLTAGE INVERTER  
1µF  
1µF  
V+  
V-  
3
4
GND  
C1-  
C2+  
C1-  
C2+  
C2-  
V-  
T1  
OUT  
+10V TO -10V  
VOLTAGE INVERTER  
6
5
C2-  
13 R1  
12 R1  
IN  
+5V  
T1  
14  
400kΩ  
11  
OUT  
IN  
T1  
T1  
IN  
OUT  
T1  
T2  
11  
10  
9
+5V  
400kΩ  
T2  
10  
12  
7
T2  
T2  
IN  
OUT  
T2  
OUT  
IN  
13  
R1  
R1  
IN  
OUT  
R2  
IN  
R2  
OUT  
5kΩ  
5kΩ  
R1  
R2  
9
8
R2  
R2  
IN  
OUT  
15  
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.  
File Number 3020.5  
Copyright © Harris Corporation 1997  
8-49  
ICL232  
Absolute Maximum Ratings  
Thermal Information  
o
o
V
to Ground . . . . . . . . . . . . . . . . . . . . . .(GND -0.3V) < V  
< 6V Thermal Resistance (Typical, Note 1)  
θ
( C/W)  
θ
( C/W)  
CC  
V+ to Ground . . . . . . . . . . . . . . . . . . . . . . . (V  
CC  
-0.3V) < V+ < 12V  
JA  
JC  
CERDIP Package . . . . . . . . . . . . . . . .  
PDIP Package . . . . . . . . . . . . . . . . . . .  
SOIC Package. . . . . . . . . . . . . . . . . . .  
Maximum Junction Temperature  
80  
100  
100  
18  
N/A  
N/A  
CC  
V- to Ground . . . . . . . . . . . . . . . . . . . . . . . -12V < V- < (GND +0.3V)  
Input Voltages  
T1 , T2 . . . . . . . . . . . . . . . . . . . . (V- -0.3V) < V < (V+ +0.3V)  
IN IN IN  
o
R1 , R2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±30V  
Plastic Packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150 C  
Ceramic Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 175 C  
Maximum Storage Temperature Range . . . . . . . . . .-65 C to 150 C  
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . . 300 C  
IN IN  
o
Output Voltages  
T1 , T2  
o
o
. . . . . . . . . . . . (V- -0.3V) < V  
< (V+ +0.3V)  
< (V +0.3V)  
OUT OUT  
TXOUT  
o
R1  
, R2  
. . . . . . . . .(GND -0.3V) < V  
OUT OUT  
RXOUT  
CC  
Short Circuit Duration  
T1 , T2  
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Continuous  
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Continuous  
OUT  
OUT  
R1  
OUT  
, R2  
OUT  
Operating Conditions  
Temperature Ranges  
ICL232C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .0 C to 70 C  
ICL232I . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -40 C to 85 C  
ICL232M . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -55 C to 125 C  
o
o
o
o
o
o
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation  
of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.  
NOTE:  
1. θ is measured with the component mounted on an evaluation PC board in free air.  
JA  
Electrical Specifications Test Conditions: V = +5V ±10%, T = Operating Temperature Range. Test Circuit as in Figure 8  
CC  
A
Unless Otherwise Specified  
PARAMETER  
TEST CONDITIONS  
MIN  
TYP  
MAX  
UNITS  
Transmitter Output Voltage Swing, T  
T1  
and T2  
OUT  
Loaded with 3kΩ  
±5  
±9  
±10  
V
OUT  
OUT  
to Ground  
o
Power Supply Current, I  
Outputs Unloaded, T = 25 C  
-
-
5
-
10  
0.8  
-
mA  
V
CC  
A
T
T
, Input Logic Low, V  
IN  
IN  
lL  
, Input Logic High, V  
2.0  
-
-
V
lH  
Logic Pullup Current, I  
T1 , T2 = 0V  
IN IN  
15  
-
200  
+30  
7.0  
-
µA  
V
P
RS-232 Input Voltage Range, V  
-30  
3.0  
0.8  
-
IN  
Receiver Input Impedance, R  
IN  
V
V
V
= ±3V  
5.0  
1.2  
1.7  
0.5  
0.1  
4.6  
0.5  
-
kΩ  
V
IN  
o
Receiver Input Low Threshold, V (H-L)  
lN  
= 5V, T = 25 C  
A
CC  
CC  
o
Receiver Input High Threshold, V (L-H)  
IN  
= 5V, T = 25 C  
A
2.4  
1.0  
0.4  
-
V
Receiver Input Hysteresis, V  
HYST  
0.2  
-
V
TTL/CMOS Receiver Output Voltage Low, V  
OL  
I
= 3.2mA  
= -1.0mA  
V
OUT  
TTL/CMOS Receiver Output Voltage High, V  
I
3.5  
-
V
OH OUT  
Propagation Delay, t  
RS-232 to TTL  
= 10pF, R = 3k, T = 25 C  
-
µs  
V/µs  
PD  
o
Instantaneous Slew Rate, SR  
C
-
30  
L
L
A
(Notes 2, 3)  
Transition Region Slew Rate, SR  
R
= 3k, C = 2500pF Measured  
-
3
-
V/µs  
T
L
L
from +3V to -3V or -3V to +3V  
Output Resistance, R  
OUT  
V
= V+ = V- = 0V, V  
OUT  
= ±2V  
300  
-
-
-
-
CC  
RS-232 Output Short Circuit Current, I  
T1  
or T2  
OUT  
Shorted to GND  
±10  
mA  
SC  
OUT  
NOTES:  
2. Guaranteed by design.  
3. See Figure 4 for definition.  
8-50  
ICL232  
Test Circuits  
C1+  
V+  
1
2
3
4
5
6
7
8
16  
15  
14  
V
CC  
+4.5V TO  
+5.5V INPUT  
-
+
GND  
1µF  
C3  
C1+  
V+  
V
1
2
3
4
5
6
7
8
16  
CC  
C1-  
C2+  
C2-  
T1  
OUT  
+
1µF  
GND 15  
R1 13  
IN  
C1  
-
3kΩ  
T1  
OUT  
R1  
OUT  
12  
11  
10  
9
C1-  
C2+  
C2-  
V-  
14  
13  
12  
11  
10  
9
T1 OUTPUT  
RS-232  
±30V INPUT  
T1  
IN  
V-  
R1  
IN  
+
1µF  
C2  
T2  
T2  
IN  
-
OUT  
TTL/CMOS  
OUTPUT  
R1  
OUT  
1µF C4  
-
+
R2  
R2  
OUT  
IN  
TTL/CMOS  
INPUT  
T1  
T2  
IN  
IN  
3kΩ  
TTL/CMOS  
INPUT  
R
= V /I T2  
IN OUT  
T2  
OUT  
OUT  
T2 OUTPUT  
V
= ±2V  
A
IN  
RS-232  
±30V INPUT  
TTL/CMOS  
OUTPUT  
R2  
OUT  
R2  
IN  
T1  
OUT  
FIGURE 1. GENERAL TEST CIRCUIT  
FIGURE 2. POWER-OFF SOURCE RESISTANCE  
CONFIGURATION  
Typical Performance Curves  
550  
10  
9
500  
V+ (V  
= 5V)  
CC  
o
= 25 C  
V- SUPPLY  
T
A
450  
400  
350  
300  
250  
200  
150  
8
7
6
5
4
3
V+ (V  
CC  
= 4.5V)  
EXTERNAL SUPPLY LOAD  
1kBETWEEN V+ + GND  
OR V- + GND  
TRANSMITTER OUTPUT  
OPEN CIRCUIT  
V- (V  
= 5V)  
V- (V  
= 4.5V)  
CC  
CC  
GUARANTEED  
OPERATING  
RANGE  
V+ SUPPLY  
o
T
= 25 C  
A
TRANSMITTER OUTPUTS  
OPEN CIRCUIT  
3
4
5
6
0
1
2
3
4
5
6
7
8
9
10  
INPUT SUPPLY VOLTAGE V  
(V)  
|I  
| (mA)  
CC  
LOAD  
FIGURE 3. V+, V- OUTPUT IMPEDANCES vs V  
CC  
FIGURE 4. V+, V- OUTPUT VOLTAGES vs LOAD CURRENT  
Pin Descriptions  
PDIP, CERDIP  
SOIC  
PIN NAME  
C1+  
V+  
DESCRIPTION  
1
2
1
2
External capacitor “+” for internal voltage doubler.  
Internally generated +10V (typical) supply.  
3
3
C1-  
External capacitor “-” for internal voltage doubler.  
External capacitor “+” internal voltage inverter.  
External capacitor “-” internal voltage inverter.  
4
4
C2+  
C2-  
5
5
6
6
V-  
Internally generated -10V (typical) supply.  
7
7
T2  
RS-232 Transmitter 2 output ±10V (typical).  
OUT  
8
8
R2  
RS-232 Receiver 2 input, with internal 5K pulldown resistor to GND.  
Receiver 2 TTL/CMOS output.  
IN  
9
9
R2out  
10  
11  
10  
11  
T2  
T1  
Transmitter 2 TTL/CMOS input, with internal 400K pullup resistor to V  
.
.
IN  
CC  
CC  
Transmitter 1 TTL/CMOS input, with internal 400K pullup resistor to V  
IN  
8-51  
ICL232  
Pin Descriptions (Continued)  
PDIP, CERDIP  
SOIC  
PIN NAME  
DESCRIPTION  
12  
13  
14  
15  
16  
12  
R1  
Receiver 1 TTL/CMOS output.  
OUT  
13  
R1  
RS-232 Receiver 1 input, with internal 5K pulldown resistor to GND.  
RS-232 Transmitter 1 output ±10V (typical).  
Supply Ground.  
IN  
14  
T1  
OUT  
15  
GND  
16  
V
Positive Power Supply +5V ±10%  
CC  
VOLTAGE DOUBLER  
+
VOLTAGE INVERTER  
+
S5  
S1  
S3  
S2  
C2  
C1  
V+ = 2V  
S6  
CC  
V
GND  
CC  
+
+
+
+
C3  
C2  
C4  
C1  
-
-
-
-
V
GND  
CC  
V- = -(V+)  
GND  
C1-  
S4  
C2-  
S7  
S8  
RC  
OSCILLATOR  
FIGURE 5. DUAL CHARGE PUMP  
Detailed Description  
The ICL232 is a dual RS-232 transmitter/receiver powered by Transmitters  
a single +5V power supply which meets all ElA RS232C spec-  
The transmitters are TTL/CMOS compatible inverters which  
translate the inputs to RS-232 outputs. The input logic thresh-  
ifications and features low power consumption. The functional  
diagram illustrates the major elements of the ICL232. The cir-  
cuit is divided into three sections: a voltage doubler/inverter,  
dual transmitters, and dual receivers Voltage Converter.  
old is about 26% of V , or 1.3V for V  
= 5V. A logic 1 at  
CC CC  
the input results in a voltage of between -5V and V- at the out-  
put, and a logic 0 results in a voltage between +5V and (V+  
An equivalent circuit of the dual charge pump is illustrated in - 0.6V). Each transmitter input has an internal 400kpullup  
Figure 5.  
resistor so any unused input can be left unconnected and its  
output remains in its low state. The output voltage swing  
meets the RS-232C specification of ±5V minimum with the  
worst case conditions of: both transmitters driving 3kmini-  
The voltage quadrupler contains two charge pumps which use  
two phases of an internally generated clock to generate +10V  
and -10V. The nominal clock frequency is 16kHz. During  
phase one of the clock, capacitor C1 is charged to V  
During phase two, the voltage on C1 is added to V  
producing a signal across C2 equal to twice V . At the same  
time, C3 is also charged to 2V , and then during phase one,  
CC  
mum load impedance, V  
= 4.5V, and maximum allowable  
CC  
.
,
CC  
CC  
operating temperature. The transmitters have an internally  
limited output slew rate which is less than 30V/µs. The outputs  
are short circuit protected and can be shorted to ground indef-  
initely. The powered down output impedance is a minimum of  
CC  
it is inverted with respect to ground to produce a signal across  
C4 equal to -2V . The voltage converter accepts input  
300with ±2V applied to the outputs and V  
= 0V.  
CC  
CC  
voltages up to 5.5V. The output impedance of the doubler (V+)  
is approximately 200, and the output impedance of the  
inverter (V-) is approximately 450. Typical graphs are  
presented which show the voltage converters output vs input  
voltage and output voltages vs load characteristics. The test  
circuit (Figure 3) uses 1µF capacitors for C1-C4, however, the  
value is not critical. Increasing the values of C1 and C2 will  
lower the output impedance of the voltage doubler and  
inverter, and increasing the values of the reservoir capacitors,  
C3 and C4, lowers the ripple on the V+ and V- supplies.  
V+  
V
CC  
400kΩ  
300Ω  
T
XIN  
T
OUT  
GND < T  
< V  
CC  
XIN  
V-  
V- < V  
< V+  
TOUT  
FIGURE 7. TRANSMITTER  
Receivers  
The receiver inputs accept up to ±30V while presenting the  
required 3kto 7kinput impedance even it the power is off  
T1 , T2  
IN  
IN  
(V  
= 0V). The receivers have a typical input threshold of  
CC  
90%  
10%  
V
OH  
T1  
, T2  
1.3V which is within the ±3V limits, known as the transition  
region, of the RS-232 specification. The receiver output is  
0V to V . The output will be low whenever the input is  
greater than 2.4V and high whenever the input is floating or  
driven between +0.8V and -30V. The receivers feature 0.5V  
hysteresis to improve noise rejection.  
OUT  
OUT  
V
OL  
t
t
f
r
CC  
(0.8) (V  
OH  
- V  
OL  
)
(0.8) (V - V )  
OL OH  
Instantaneous  
Slew Rate (SR)  
=
or  
t
t
f
r
FIGURE 6. SLEW RATE DEFINITION  
8-52  
ICL232  
is generated by driving them through a 5kresistor  
connected to V+.  
V
CC  
R
XIN  
R
+5V  
OUT  
C3  
1µF  
-
+
-30V < R  
< +30V  
XIN  
GND < V  
< V  
CC  
5kΩ  
ROUT  
5kΩ  
2
6
16  
GND  
CTR (20) DATA  
TERMINAL READY  
1
+
C1  
1µF  
5kΩ  
FIGURE 8. RECEIVER  
3
4
DSRS (24) DATA  
SIGNALING RATE  
SELECT  
-
ICL232  
T1 , T2  
IN IN  
+
-
+
OR  
R1 , R2  
C2  
1µF  
C4  
RS-232  
1µF  
5
-
IN  
IN  
INPUTS AND OUTPUTS  
T1  
11  
14  
T1  
R1  
, T2  
OUT  
OUT  
V
TD  
OH  
TD (2) TRANSMIT DATA  
RTS (4) REQUEST TO SEND  
RD (3) RECEIVE DATA  
OR  
T2  
V
10  
12  
7
OL  
, R2  
INPUTS  
OUTPUTS  
OUT  
OUT  
RTS  
t
t
PLH  
PHL  
13  
TTL/CMOS RD  
R2  
R1  
9
8
t
t
PHL + PLH  
2
CTS  
CTS (5) CLEAR TO SEND  
Average Propagation Delay =  
FIGURE 9. PROPAGATION DELAY DEFINITION  
15  
SIGNAL GROUND (7)  
Applications  
FIGURE 10. SIMPLE DUPLEX RS-232 PORT WITH CTS/RTS  
HANDSHAKING  
The ICL232 may be used for all RS-232 data terminal and  
communication links. It is particularly useful in applications  
where ±12V power supplies are not available for conven-  
tional RS-232 interface circuits. The applications presented  
represent typical interface configurations.  
In applications requiring four RS-232 inputs and outputs  
(Figure 11), note that each circuit requires two charge pump  
capacitors (C1 and C2) but can share common reservoir  
capacitors (C3 and C4). The benefit of sharing common res-  
ervoir capacitors is the elimination of two capacitors and the  
reduction of the charge pump source impedance which  
effectively increases the output swing of the transmitters.  
A simple duplex RS-232 port with CTS/RTS handshaking is  
illustrated in Figure 10. Fixed output signals such as DTR  
(data terminal ready) and DSRS (data signaling rate select)  
1
4
+
+
C1  
C2  
ICL232  
T1  
5
1µF  
3
1µF  
-
-
11  
14  
TD  
RTS  
RD  
TD (2) TRANSMIT DATA  
RTS (4) REQUEST TO SEND  
RD (3) RECEIVE DATA  
T2  
10  
12  
7
INPUTS  
OUTPUTS  
TTL/CMOS  
13  
R2  
R1  
9
8
CTS  
CTS (5) CLEAR TO SEND  
15  
6
6
2
2
C4  
C3  
+5V  
RS-232  
-
-
V- V+  
2µF  
2 µF  
INPUTS AND  
OUTPUTS  
16  
ICL232  
T1  
1
4
5
+
+
C1  
1µF  
C2  
1µF  
3
-
-
11  
14 DTR (20) DATA TERMINAL  
READY  
7
DTR  
DSRS  
DCD  
R1  
T2  
10  
12  
DSRS (24) DATA SIGNALING  
RATE SELECT  
DCD (8) DATA CARRIER  
DETECT  
INPUTS  
OUTPUTS  
TTL/CMOS  
13  
R2  
R1  
9
8
R1 (22) RING INDICATOR  
15  
SIGNAL GROUND (7)  
FIGURE 11. COMBINING TWO ICL232s FOR 4 PAIRS OF RS-232 INPUTS AND OUTPUTS  
8-53  

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INTERSIL

ICL3207CA

TRIPLE LINE TRANSCEIVER, PDSO24, PLASTIC, MO-150AG, SSOP-24
RENESAS

ICL3207CA-T

TRIPLE LINE TRANSCEIVER, PDSO24, PLASTIC, MO-150AG, SSOP-24
RENESAS

ICL3207CAZ

Low Power, +3V to +5.5V, 250kbps, RS-232 Transmitters/Receivers
INTERSIL

ICL3207CAZ

Low Power, +3V To +5.5V, 250kbps, RS-232 Transmitters/Receivers; SOIC24, SSOP24; Temp Range: See Datasheet
RENESAS

ICL3207CB

Low Power, +3V to +5.5V, 250kbps, RS-232 Transmitters/Receivers
INTERSIL

ICL3207CB-T

TRIPLE LINE TRANSCEIVER, PDSO24, PLASTIC, MS-013AD, SOIC-24
RENESAS