HS9-508BRH/PROTO [INTERSIL]
Radiation Hardened 8 Channel CMOS Analog Multiplexer with Overvoltage Protection; 抗辐射8通道CMOS模拟多路复用器与过电压保护
| 型号： | HS9-508BRH/PROTO |
| 厂家： | 
Intersil |
| 描述： | Radiation Hardened 8 Channel CMOS Analog Multiplexer with Overvoltage Protection |
| 文件： | 总3页 (文件大小：157K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
HS-508BRH
®
Data Sheet
January 2001
FN4824.1
Radiation Hardened 8 Channel CMOS
Analog Multiplexer with Overvoltage
Protection
Features
• Electrically Screened to SMD # 5962-96742
• QML Qualified per MIL-PRF-38535 Requirements
• Radiation Environment
- Gamma Dose (γ) . . . . . . . . . . . . . . . . . 3 x 10 Rad (Si)
- Dielectrically Isolated Device Islands
The HS-508BRH is a dielectrically isolated, radiation
hardened, CMOS analog multiplexer incorporating an
important feature; it withstands analog input voltages much
greater than the supplies. This is essential in any system
where the analog inputs originate outside the equipment.
They can withstand a continuous input up to 10V greater than
either supply, which eliminates the possibility of damage when
supplies are off, but input signals are present. Equally
important, it can withstand brief input transient spikes of
several hundred volts; which otherwise would require complex
external protection networks. Necessarily, ON resistance is
somewhat higher than similar unprotected devices, but very
low leakage current combine to produce low errors.
5
2
- SEP >100 Mev-mg/cm
• Analog/Digital Overvoltage Protection
• ESD Rated to 3kV
• Fail Safe with Power Loss (No Latchup)
• Break-Before-Make Switching
• (Typ) DTL/TTL and CMOS Compatible Threshold
• Analog Signal Range. . . . . . . . . . . . . . . . . . . . . . . . . . . . ±15V
• Fast Access Time
Reference Application Notes 520 and 521 for further
information on the HS-508BRH multiplexer in general.
• Supply Current at 1MHz Address Toggle. . . . . .4mA (Typ)
• Standby Power. . . . . . . . . . . . . . . . . . . . . . . .7.5mW (Typ)
The HS-508BRH has been specifically designed to meet
o
exposure to radiation environments. Operation from -55 C to
o
125 C is guaranteed.
Specifications for Rad Hard QML devices are controlled
by the Defense Supply Center in Columbus (DSCC). The
SMD numbers listed here must be used when ordering.
Ordering Information
INTERNAL
TEMP. RANGE
o
ORDERING NUMBER
5962F9674202QEC
5962F9674202QXC
5962F9674202VEC
5962F9674202VXC
MKT. NUMBER
( C)
Detailed Electrical Specifications for these devices are
contained in SMD 5962-96742. A “hot-link” is provided
on our homepage for downloading.
HS1-508BRH-8
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
HS9-508BRH-8
HS1-508BRH-Q
HS9-508BRH-Q
www.intersil.com/spacedefense/newsafclasst.asp
HS1-508BRH/PROTO HS1-508BRH/PROTO
HS9-508BRH/PROTO HS9-508BRH/PROTO
Pinouts
HS1-508BRH 16 LEAD SIDEBRAZE DIP
MIL-STD-1835, CDIP2-T16
TOP VIEW
HS9-508BRH 16 LEAD FLATPACK
MIL-STD-1835, CDFP4-F16
TOP VIEW
AO
EN
1
2
3
4
5
6
7
8
16 A1
A0
EN
-VSUP
IN1
IN2
IN3
IN4
OUT
A1
A2
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
15 A2
GND
+VSUP
IN5
IN6
IN7
-VSUP
IN 1
14 GND
13 +VSUP
12 IN 5
11 IN 6
10 IN 7
IN 2
IN 3
IN8
IN 4
9
IN 8
OUT
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
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Copyright Intersil Americas Inc. 2001. All Rights Reserved
1
All other trademarks mentioned are the property of their respective owners.
HS-508BRH
Functional Diagram
IN 1
P
N
A0
A1
1
DIGITAL
ADDRESS
OUT
A2
EN
8
N
P
IN 8
ADDRESS INPUT
DECODERS
MULTIPLEX
SWITCHES
BUFFER AND
LEVEL SHIFTER
Truth Table
A2
X
L
A1
X
L
A0
X
L
EN
L
“ON” CHANNEL
NONE
H
H
H
H
H
H
H
H
1
2
3
4
5
6
7
8
L
L
H
L
L
H
H
L
L
H
L
H
H
H
H
L
H
L
H
H
H
FN4824.1
2
January 2001
HS-508BRH
Die Characteristics
DIE DIMENSIONS
Backside Finish
120 mils x 93 mils x 19 mils
INTERFACE MATERIALS
Silicon
ASSEMBLY RELATED INFORMATION
Glassivation
Substrate Potential
Type: Phosphorus Silicon Glass (PSG)
Thickness: 8kÅ ±1kÅ
Top Metallization
Type: AlSiCu
Thickness: 16kÅ ±2kÅ
Substrate
Unbiased (DI)
ADDITIONAL INFORMATION
Worst Case Current Density
2
6.68e04 A/cm
Transistor Count
506
Rad Hard Silicon Gate
Dielectric Isolation
Metallization Mask Layout
HS-508BRH
IN2
IN1
-V
IN3
EN
A0
A1
IN4
OUT
IN8
A2
IN7
IN6
IN5
+V
GND
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Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
FN4824.1
3
January 2001
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