HFA1110 [INTERSIL]

750MHz, Low Distortion Unity Gain, Closed Loop Buffer; 750MHz的低失真单位增益,闭环缓冲器
HFA1110
型号: HFA1110
厂家: Intersil    Intersil
描述:

750MHz, Low Distortion Unity Gain, Closed Loop Buffer
750MHz的低失真单位增益,闭环缓冲器

文件: 总9页 (文件大小:93K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
HFA1110  
Data Sheet  
February 1999  
File Number 2944.7  
750MHz, Low Distortion Unity Gain,  
Closed Loop Buffer  
Features  
• Wide -3dB Bandwidth. . . . . . . . . . . . . . . . . . . . . .750MHz  
• Very Fast Slew Rate. . . . . . . . . . . . . . . . . . . . . . 1300V/µs  
• Fast Settling Time (0.2%). . . . . . . . . . . . . . . . . . . . . . 7ns  
• High Output Current . . . . . . . . . . . . . . . . . . . . . . . . .60mA  
• Fixed Gain of +1  
The HFA1110 is a unity gain closed loop buffer that achieves  
-3dB bandwidth of 750MHz, while offering excellent video  
performance and low distortion. Manufactured on Intersil’s  
proprietary complementary bipolar UHF-1 process, the  
HFA1110 also offers very fast slew rate, and high output  
current. It is one more example of Intersil’s intent to enhance  
its leadership position in products for high speed signal  
processing applications.  
• Gain Flatness (100MHz) . . . . . . . . . . . . . . . . . . . . 0.03dB  
• Differential Phase . . . . . . . . . . . . . . . . . . . 0.025 Degrees  
• Differential Gain . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.04%  
• 3rd Harmonic Distortion (50MHz). . . . . . . . . . . . . . -80dBc  
• 3rd Order Intercept (100MHz) . . . . . . . . . . . . . . . . 30dBm  
The HFA1110’s settling time of 11ns to 0.1%, low distortion  
and ability to drive capacitive loads make it an ideal flash  
A/D driver.  
The HFA1110 is an enhanced, pin compatible upgrade for  
the AD9620, AD9630, CLC110, EL2072, BUF600 and  
BUF601.  
Applications  
• Video Switching and Routing  
• RF/IF Processors  
For buffer applications requiring a standard op amp pinout,  
or selectable gain (-1, +1, +2), see the HFA1112 data sheet.  
For output limiting see the HFA1113 data sheet.  
• Driving Flash A/D Converters  
• High-Speed Communications  
• Impedance Transformation  
• Line Driving  
For military grade product please refer to the HFA1110/883  
data sheet.  
Pinout  
HFA1110  
(SOIC)  
• Radar Systems  
TOP VIEW  
Ordering Information  
V+  
OPT V+  
NC  
1
2
3
4
8
7
6
5
OUT  
NC  
PART NUMBER  
(BRAND)  
TEMP.  
RANGE ( C)  
PKG.  
NO.  
o
PACKAGE  
8 Ld SOIC  
+
-
HFA1110IB  
(H1110I)  
-40 to 85  
M8.15  
OPT V-  
V-  
IN  
HFA1110EVAL  
High Speed Buffer DIP Evaluation Board  
Pin Descriptions  
PIN  
NAME  
V+  
NUMBER  
DESCRIPTION  
1
2
3
4
5
6
7
8
Positive Supply  
Optional Positive Supply  
No Connection  
Input  
Opt V+  
NC  
IN  
V-  
Negative Supply  
Optional Negative Supply  
No Connection  
Output  
Opt V-  
NC  
OUT  
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.  
1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999  
1
HFA1110  
Absolute Maximum Ratings  
Thermal Information  
o
Voltage Between V+ and V- . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12V  
DC Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V  
Output Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60mA  
Thermal Resistance (Typical, Note 1)  
θ
( C/W)  
JA  
SUPPLY  
SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  
158  
o
Maximum Junction Temperature (Plastic Package) . . . . . . . .150 C  
Maximum Storage Temperature Range. . . . . . . . . . -65 C to 150 C  
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300 C  
o
o
o
Operating Conditions  
(SOIC - Lead Tips Only)  
o
o
Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . . -40 C to 85 C  
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the  
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.  
NOTE:  
1. θ is measured with the component mounted on an evaluation PC board in free air.  
JA  
Electrical Specifications  
V
= ±5V, R = 100, Unless Otherwise Specified  
SUPPLY  
L
o
PARAMETER  
TEST CONDITIONS  
TEMP ( C)  
MIN  
TYP  
MAX  
UNITS  
INPUT CHARACTERISTICS  
Output Offset Voltage (Note 2)  
25  
Full  
Full  
25  
-
-
8
-
25  
35  
-
mV  
mV  
o
Output Offset Voltage Drift  
PSRR  
-
10  
45  
-
µV/ C  
39  
35  
-
-
dB  
dB  
Full  
25  
-
Input Noise Voltage (Note 2)  
Input Noise Current (Note 2)  
Input Bias Current (Note 2)  
100kHz  
100kHz  
14  
51  
10  
-
-
nV/Hz  
pA/Hz  
µA  
25  
-
-
25  
-
40  
65  
-
Full  
25  
-
µA  
Input Resistance  
25  
-
50  
2
kΩ  
Input Capacitance  
TRANSFER CHARACTERISTICS  
Gain  
25  
-
pF  
V
= 2V  
25  
Full  
25  
0.980  
0.975  
-
0.990  
-
1.02  
1.025  
-
V/V  
V/V  
%
OUT  
P-P  
DC Non-Linearity (Note 2)  
OUTPUT CHARACTERISTICS  
Output Voltage (Note 2)  
±2V Full Scale  
0.003  
25  
Full  
3.0  
2.5  
50  
3.3  
3.0  
60  
-
-
-
-
±V  
±V  
Output Current (Note 2)  
R
= 50Ω  
25, 85  
-40  
mA  
mA  
L
35  
50  
POWER SUPPLY CHARACTERISTICS  
Supply Voltage Range  
Full  
25  
4.5  
-
21  
-
5.5  
26  
33  
±V  
mA  
mA  
Supply Current (Note 2)  
-
-
Full  
AC CHARACTERISTICS  
-3dB Bandwidth (Note 2)  
Slew Rate  
V
= 0.2V  
25  
25  
25  
25  
25  
25  
25  
25  
25  
-
-
-
-
-
-
-
-
-
750  
1300  
150  
-
-
-
-
-
-
-
-
-
MHz  
V/µs  
MHz  
dB  
OUT  
P-P  
V
= 5V  
= 4V  
OUT  
P-P  
P-P  
Full Power Bandwidth (Note 2)  
Gain Flatness (Note 2)  
V
OUT  
To 100MHz  
To 30MHz  
±0.03  
±0.01  
±0.3  
-60  
dB  
Linear Phase Deviation (Note 2)  
2nd Harmonic Distortion (Note 2)  
3rd Harmonic Distortion (Note 2)  
3rd Order Intercept (Note 2)  
DC to 100MHz  
Degrees  
dBc  
50MHz, V  
50MHz, V  
100MHz  
= 2V  
= 2V  
OUT  
P-P  
-80  
dBc  
OUT  
P-P  
30  
dBm  
2
HFA1110  
Electrical Specifications  
V
= ±5V, R = 100, Unless Otherwise Specified (Continued)  
SUPPLY  
L
o
PARAMETER  
TEST CONDITIONS  
TEMP ( C)  
MIN  
TYP  
14  
MAX  
UNITS  
dBm  
dB  
-1dB Gain Compression  
100MHz  
25  
25  
-
-
-
-
Reverse Gain (S , Note 2)  
12  
100MHz, V  
= 1V  
-60  
OUT  
P-P  
TRANSIENT RESPONSE  
Rise Time  
V
= 0.5V Step  
25  
25  
-
-
0.5  
2.5  
-
-
ns  
%
OUT  
Overshoot (Note 2)  
V
= 1.0V Step, Input Signal  
OUT  
Rise/Fall = 1ns  
0.2% Settling Time (Note 2)  
0.1% Settling Time (Note 2)  
Overdrive Recovery Time  
Differential Gain  
V
= 1V to 0V  
= 1V to 0V  
25  
25  
25  
25  
25  
-
-
-
-
-
7
11  
-
-
-
-
-
ns  
ns  
OUT  
V
OUT  
15  
ns  
3.58MHz, R = 75Ω  
0.04  
0.025  
%
L
Differential Phase  
3.58MHz, R = 75Ω  
Degrees  
L
NOTE:  
2. See Typical Performance Curves for more information.  
50Ω  
Application Information  
1
2
3
4
8
+5V  
OUT  
R
S
0.1µF  
10µF  
50Ω  
PC Board Layout  
7
6
5
HFA1110  
The frequency performance of this amplifier depends a great  
deal on the amount of care taken in designing the PC board.  
The use of low inductance components such as chip  
resistors and chip capacitors is strongly recommended,  
while a solid ground plane is a must!  
-5V  
IN  
10µF  
0.1µF  
SCHEMATIC DIAGRAM  
BOTTOM LAYOUT  
Attention should be given to decoupling the power supplies.  
A large value (10µF) tantalum in parallel with a small value  
chip (0.1µF) capacitor works well in most cases.  
Terminated microstrip signal lines are recommended at the  
input and output of the device. Output capacitance, such as  
that resulting from an improperly terminated transmission  
line will degrade the frequency response of the amplifier and  
may cause oscillations. In most cases, the oscillation can be  
avoided by placing a resistor (R ) in series with the output.  
S
See the “Recommended R vs Load Capacitance” graph for  
S
specific recommendations.  
An example of a good high frequency layout is the  
Evaluation Board shown below.  
Evaluation Board  
An evaluation board is available for the HFA1110 (part  
number HFA1110EVAL). Please contact your local sales  
office for information.  
TOP LAYOUT  
The layout and schematic of the board are shown here:  
1
NOTE: The SOIC version may be evaluated in the DIP board by  
using a SOIC-to-DIP adapter such as Aries Electronics Part Number  
08-350000-10.  
3
HFA1110  
o
Typical Performance Curves  
V
= ±5V, T = 25 C, R = 100Ω, Unless Otherwise Specified  
SUPPLY  
A
L
120  
80  
1.2  
0.8  
0.4  
0
40  
0
-40  
-80  
-120  
-0.4  
-0.8  
-1.2  
TIME (5ns/DIV.)  
TIME (5ns/DIV.)  
FIGURE 1. SMALL SIGNAL PULSE RESPONSE  
FIGURE 2. LARGE SIGNAL PULSE RESPONSE  
2
1
0
GAIN  
R
= 1kΩ  
L
6
3
V
= 200mV  
OUT  
P-P  
R
= 100Ω  
V
= 1V  
L
OUT  
P-P  
0
0
-1  
-2  
-3  
-4  
-45  
R
= 50Ω  
L
-3  
-6  
-90  
-135  
-180  
0
PHASE  
= 200mV  
-90  
-180  
-5  
-6  
-225  
-270  
V
OUT  
P-P  
-270  
-360  
-7  
-8  
R
= 1kΩ  
L
1M  
10M  
100M  
1G  
0
200M  
400M  
600M  
800M  
1G  
FREQUENCY (Hz)  
FREQUENCY (Hz)  
FIGURE 3. FREQUENCY RESPONSE  
FIGURE 4. FREQUENCY RESPONSE FOR VARIOUS LOAD  
RESISTORS  
2
890  
870  
850  
830  
810  
790  
770  
750  
1
0
-1  
-2  
-3  
-4  
-5  
-6  
-7  
-8  
V
= 200mV  
P-P  
OUT  
V
= 2.5V  
P-P  
OUT  
V
= 4V  
P-P  
OUT  
730  
710  
-50 -30 -10  
10  
30  
50  
70  
90  
110 130  
1M  
10M  
FREQUENCY (Hz)  
100M  
1G  
o
TEMPERATURE ( C)  
FIGURE5. FREQUENCYRESPONSEFORVARIOUSOUTPUT  
VOLTAGES  
FIGURE 6. -3dB BANDWIDTH vs TEMPERATURE  
4
HFA1110  
o
Typical Performance Curves  
V
= ±5V, T = 25 C, R = 100Ω, Unless Otherwise Specified (Continued)  
SUPPLY  
A
L
0.25  
0.20  
0.15  
0.10  
0.05  
0
2.0  
1.5  
1.0  
0.5  
0
-0.5  
-1.0  
-1.5  
-2.0  
-0.05  
-0.10  
0
15M 30M 45M 60M 75M 90M 105M 120M 135M 150M  
FREQUENCY (Hz)  
1M  
10M  
100M 200M  
FREQUENCY (Hz)  
FIGURE 7. GAIN FLATNESS  
FIGURE 8. DEVIATION FROM LINEAR PHASE  
50  
40  
30  
20  
10  
+135  
+90  
+45  
0
-20  
-30  
-40  
-50  
-60  
PHASE  
GAIN  
V
= 1V  
P-P  
OUT  
0
0
0
200M  
400M  
600M  
800M  
1G  
50  
100  
150  
200  
250  
300  
350  
400  
FREQUENCY (Hz)  
FREQUENCY (MHz)  
FIGURE 9. REVERSE GAIN AND PHASE (S  
12  
)
FIGURE 10. TWO-TONE, THIRD ORDER INTERMODULATION  
INTERCEPT  
-30  
-40  
-50  
-60  
-70  
-80  
-90  
-100  
-30  
-40  
100 MHz  
100 MHz  
-50  
50 MHz  
30 MHz  
-60  
-70  
50 MHz  
-80  
-90  
30 MHz  
-100  
-5  
-3  
-1  
1
3
5
7
9
11  
13  
-5  
-3  
-1  
1
3
5
7
9
11  
13  
OUTPUT POWER (dBm)  
OUTPUT POWER (dBm)  
FIGURE 11. SECOND HARMONIC DISTORTION vs P  
FIGURE 12. THIRD HARMONIC DISTORTION vs P  
OUT  
OUT  
5
HFA1110  
o
Typical Performance Curves  
V
= ±5V, T = 25 C, R = 100Ω, Unless Otherwise Specified (Continued)  
SUPPLY  
A
L
V
= 1V  
OUT  
50  
45  
40  
35  
30  
25  
20  
15  
10  
5
0.8  
0.4  
0.2  
0
-0.2  
-0.4  
-0.8  
0
0
40  
80  
120 160 200 240 280 320 360  
(pF)  
-5  
0
5
10  
15  
20  
25  
30  
35  
40  
45  
C
L
TIME (ns)  
FIGURE 13. SETTLING RESPONSE  
FIGURE 14. RECOMMENDED SERIES OUTPUT RESISTOR vs  
C
LOAD  
21  
18  
15  
12  
9
0.04  
0.02  
0
R
= 200Ω  
L
R
= 100Ω  
= 1kΩ  
L
R
L
V
= 2.0V  
O
P-P  
V
= 1.0V  
O
P-P  
6
-0.02  
-0.04  
V
= 0.5V  
800  
O
P-P  
3
0
200  
300  
400  
500  
600  
700  
900  
1000  
-3.0  
-2.0  
-1.0  
0
1.0  
2.0  
3.0  
INPUT RISE TIME (ps)  
INPUT VOLTAGE (V)  
FIGURE 15. OVERSHOOT vs INPUT RISETIME  
FIGURE 16. INTEGRAL LINEARITY ERROR  
22  
21  
20  
19  
18  
17  
16  
15  
14  
13  
12  
11  
10  
9
25  
24  
23  
22  
21  
20  
19  
18  
8
7
6
5
17  
-60  
-40  
-20  
0
20  
40  
60  
80  
100 120  
5
6
7
8
9
10  
o
TOTAL SUPPLY VOLTAGE (V+ - V-, V)  
TEMPERATURE ( C)  
FIGURE 17. SUPPLY CURRENT vs SUPPLY VOLTAGE  
FIGURE 18. SUPPLY CURRENT vs TEMPERATURE  
6
HFA1110  
o
Typical Performance Curves  
V
= ±5V, T = 25 C, R = 100Ω, Unless Otherwise Specified (Continued)  
SUPPLY  
A
L
32  
30  
28  
26  
24  
22  
20  
18  
16  
14  
12  
10  
8
10  
9.8  
9.6  
9.4  
9.2  
9
8.8  
8.6  
8.4  
8.2  
8
6
4
-60  
7.8  
-60  
-40  
-20  
0
20  
40  
60  
o
80  
100 120  
-40  
-20  
0
20  
40  
60  
o
80  
100 120  
TEMPERATURE ( C)  
TEMPERATURE ( C)  
FIGURE 19. BIAS CURRENT vs TEMPERATURE  
FIGURE 20. OFFSET VOLTAGE vs TEMPERATURE  
3.8  
100  
80  
60  
40  
20  
0
200  
3.7  
3.6  
3.5  
3.4  
3.3  
3.2  
3.1  
3
160  
120  
80  
40  
0
+V  
OUT  
(R = 100)  
L
+V  
OUT  
(R = 50)  
L
|-V  
OUT  
|(R = 100)  
L
|-V  
OUT  
|(R = 50)  
L
I
NI  
2.9  
2.8  
E
NI  
-60  
-40  
-20  
0
20  
40  
60  
o
80  
100 120  
100  
1K  
10K  
100K  
TEMPERATURE ( C)  
FREQUENCY (Hz)  
FIGURE 21. OUTPUT VOLTAGE vs TEMPERATURE  
FIGURE 22. INPUT NOISE vs FREQUENCY  
7
HFA1110  
Die Characteristics  
DIE DIMENSIONS:  
PASSIVATION:  
63 mils x 44 mils x 19 mils  
Type: Nitride  
1600µm x 1130µm x 483µm  
Thickness: 4kÅ ±0.5kÅ  
METALLIZATION:  
TRANSISTOR COUNT:  
Type: Metal 1: AlCu(2%)/TiW  
Thickness: Metal 1: 8kÅ ±0.4kÅ  
Type: Metal 2: AlCu(2%)  
52  
SUBSTRATE POTENTIAL (POWERED UP):  
Floating (Recommend Connection to V-)  
Thickness: Metal 2: 16kÅ ±0.8kÅ  
Metallization Mask Layout  
HFA1110  
NC  
IN  
V-  
NC  
NC  
NC  
NC  
V+  
OUT  
8
HFA1110  
Small Outline Plastic Packages (SOIC)  
M8.15 (JEDEC MS-012-AA ISSUE C)  
8 LEAD NARROW BODY SMALL OUTLINE PLASTIC  
PACKAGE  
N
INDEX  
AREA  
0.25(0.010)  
M
B M  
H
E
INCHES  
MILLIMETERS  
-B-  
SYMBOL  
MIN  
MAX  
MIN  
1.35  
0.10  
0.33  
0.19  
4.80  
3.80  
MAX  
1.75  
0.25  
0.51  
0.25  
5.00  
4.00  
NOTES  
A
A1  
B
C
D
E
e
0.0532  
0.0040  
0.013  
0.0688  
0.0098  
0.020  
-
1
2
3
L
-
9
SEATING PLANE  
A
0.0075  
0.1890  
0.1497  
0.0098  
0.1968  
0.1574  
-
-A-  
o
h x 45  
D
3
4
-C-  
α
0.050 BSC  
1.27 BSC  
-
e
A1  
H
h
0.2284  
0.0099  
0.016  
0.2440  
0.0196  
0.050  
5.80  
0.25  
0.40  
6.20  
0.50  
1.27  
-
C
B
0.10(0.004)  
5
0.25(0.010) M  
C
A M B S  
L
6
N
α
8
8
7
NOTES:  
o
o
o
o
0
8
0
8
-
1. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of  
Publication Number 95.  
Rev. 0 12/93  
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.  
3. Dimension “D” does not include mold flash, protrusions or gate burrs.  
Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006  
inch) per side.  
4. Dimension “E” does not include interlead flash or protrusions. Inter-  
lead flash and protrusions shall not exceed 0.25mm (0.010 inch) per  
side.  
5. The chamfer on the body is optional. If it is not present, a visual index  
feature must be located within the crosshatched area.  
6. “L” is the length of terminal for soldering to a substrate.  
7. “N” is the number of terminal positions.  
8. Terminal numbers are shown for reference only.  
9. The lead width “B”, as measured 0.36mm (0.014 inch) or greater  
above the seating plane, shall not exceed a maximum value of  
0.61mm (0.024 inch).  
10. Controlling dimension: MILLIMETER. Converted inch dimensions  
are not necessarily exact.  
All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification.  
Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time with-  
out notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and  
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result  
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.  
For information regarding Intersil Corporation and its products, see web site www.intersil.com  
Sales Office Headquarters  
NORTH AMERICA  
EUROPE  
ASIA  
Intersil Corporation  
Intersil SA  
Mercure Center  
100, Rue de la Fusee  
1130 Brussels, Belgium  
TEL: (32) 2.724.2111  
FAX: (32) 2.724.22.05  
Intersil (Taiwan) Ltd.  
7F-6, No. 101 Fu Hsing North Road  
Taipei, Taiwan  
Republic of China  
TEL: (886) 2 2716 9310  
FAX: (886) 2 2715 3029  
P. O. Box 883, Mail Stop 53-204  
Melbourne, FL 32902  
TEL: (321) 724-7000  
FAX: (321) 724-7240  
9

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