TLE4946-2L [INFINEON]
High Precision Hall Effect Latch; 高精度霍尔效应锁存型号: | TLE4946-2L |
厂家: | Infineon |
描述: | High Precision Hall Effect Latch |
文件: | 总12页 (文件大小:1020K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
June 2008
TLE4946-2L
High Precision Hall Effect Latch
TLE4946-2L
Datasheet
Rev 1.0
Sensors
Edition 2008-06
Published by
Infineon Technologies AG
81726 München, Germany
© 2007 Infineon Technologies AG
All Rights Reserved.
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TLE4946-2L
TLE4946-2L High Precision Hall Effect Latch
Revision History: 2008-06, Rev 1.0
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Datasheet
3
Rev 1.0, 2008-06
TLE4946-2L
1
Product Description 5
Overview 5
1.1
1.2
1.3
Features 5
Target Applications 5
2
Functional Description 5
General 5
2.1
2.2
2.3
2.4
2.5
2.6
Pin Configuration 6
Pin Description 6
Block Diagram 6
Operating Modes and States 7
Functional Block Description 7
3
Specification 8
3.1
3.2
3.3
3.4
Application Circuit 8
Absolute Maximum Ratings 8
Operating Range 9
Characteristics 9
4
4.1
Package Information 10
Package Outline 10
Datasheet
4
Rev 1.0, 2008-06
High Precision Hall Effect Latch
TLE4946-2L
1
Product Description
1.1
Overview
The TLE4946-2L is a high precision Hall effect latch
with highly accurate switching thresholds for operating
temperatures up to 150°C.
1.2
Features
•
•
•
•
•
•
•
•
•
•
2.7 V to 18 V supply voltage operation
Operation from unregulated power supply
High sensitivity and high stability of the magnetic switching points
High resistance to mechanical stress by active error compensation
Reverse battery protection (Vs = -18V)
Superior temperature stability
Peak temperatures up to 195°C without damage
Low jitter (typ. 1µs)
High ESD performance (± 4 kV HBM)
Digital output signal
1.3
Target Applications
The TLE4946-2L is an integrated circuit Hall-effect sensor with low switching thresholds and low hysteresis. It is
specially designed for high sensitivity applications and is ideally suited to detect the rotor position in a BLDC motor.
Also for index counting with small pole wheels and large air gaps the sensor provides a reliable switching
information.
2
Functional Description
2.1
General
Precise magnetic switching thresholds and high temperature stability are achieved by active compensation circuits
and chopper techniques on chip. Offset voltages, generated by temperature induced stress or overmolding are
canceled and high accuracy is achieved. The IC has an open collector output stage with 20mA current sink
capability. A wide operating voltage range form 2.7V to 18V with reverse polarity protection up to -18V makes the
device suitable for a wide range of applications. A magnetic south pole with field strength above Bop turns the
output on and a magnetic north pole exceeding Brp turns it off.
Product Name
Product Type
Ordering Code
Package
Hall Effect Latch
TLE4946-2L
SP000398352
PG-SSO-3-2
Datasheet
5
Rev 1.0, 2008-06
TLE4946-2L
Functional Description
2.2
Pin Configuration
± 0.1
Center of
2.08
Sensitive Area
± 0.1
1.35
1
2
3
PG-SSO-3-2
Figure 1
2.3
Pin Configuration and sensitive area (Top View, Figure not to Scale)
Pin Description
Table 1
Pin Description
Pin or Ball Name
No.
Pin
Type
Function
Comments
1
2
3
Vs
GND
Q
I
O
O
Supply voltage
Ground
Output
2.4
Block Diagram
VS
Voltage Regulator
reverse polarity protected
Bias and
Compensation
Circuits
Oscillator
and
Sequencer
Q
Ref
GND
Low
Pass
Filter
Comparator
with
Amplifier
Chopped
Hysteresis
Hall Probe
Figure 2
TLE4946-2L Block Diagram
Datasheet
6
Rev 1.0, 2008-06
TLE4946-2L
Functional Description
2.5
Operating Modes and States
Field Direction Definition:
Positive magnetic fields are related with the south pole of the magnet to the branded side of package.
Applied
Magnetic
Field
BOP
BRP
td
td
tf
tr
VQ
90%
10%
Figure 3
Timing diagram
VQ
B
Brp
0
Bop
Figure 4
Output Signal
2.6
Functional Block Description
The chopped Hall IC switch comprises a Hall probe, bias generator, compensation circuits, oscillator and output
transistor.
The bias generator provides currents for the Hall probe and the active circuits. Compensation circuits stabilize the
temperature behavior and reduce technology variations.
The Active Error Compensation rejects offsets in signal stages and the influence of mechanical stress to the Hall
probe caused by molding and soldering processes and other thermal stresses in the package.
This chopper technique together with the threshold generator and the comparator ensure high accurate magnetic
switching points
Datasheet
7
Rev 1.0, 2008-06
TLE4946-2L
Specification
3
Specification
3.1
Application Circuit
Q
Q
GND
GND
VS
200Ω
VS
Figure 5
Application circuit
It is recommended to use a serial resistor of 200Ω in the supply line for current limitation in the case of a
overvoltage pulse. Two capacitors of 4.7nF enhance the EMC performance. The pull-up resistor of 1.2kΩ limits
the current through the output transistor.
3.2
Absolute Maximum Ratings
Table 2
Parameter
Absolute Maximum Ratings
Symbol
Values
Typ.
–
Unit
Note/Test Condition
Min.
-40
–
Max.
150
155
Max. junction temperature
Supply voltage
TJ
°C
–
for 2000 h (not
additive)
–
–
–
-18
-18
-18
–
–
–
–
–
–
165
175
195
18
24
26
for 1000 h (not additive
for 168 h (not additive)
for 3 x 1 h (additive)
VDD
V
for 1h, Rs ≥ 200Ω
for 5min, Rs ≥ 200Ω
Supply current through
protection device
Output voltage
IS
– 50
–
+ 50
mA
V
VQ
-0.7
-0.7
–
–
18
26
for 5min @ 1.2kΩ pull
up
Storage temperature
Magnetic flux density
ESD robustness
HBM: 1.5 kΩ, 100 pF
TS
B
VESD,HBM
– 40
4
–
–
150
unlimited mT
kV
°C
According to
EIA/JESD22-A114-B
Datasheet
8
Rev 1.0, 2008-06
TLE4946-2L
Specification
Attention: Stresses above the max. values listed here may cause permanent damage to the device.
Exposure to absolute maximum rating conditions for extended periods may affect device
reliability. Maximum ratings are absolute ratings; exceeding only one of these values may
cause irreversible damage to the integrated circuit.
3.3
Operating Range
The following operating conditions must not be exceeded in order to ensure correct operation of the TLE4946-2L.
All parameters specified in the following sections refer to these operating conditions unless otherwise mentioned.
Table 3
Operating Range
Parameter
Symbol
Values
Typ.
–
–
–
–
Unit
Note/ Test Condition
Min.
2.7
– 0.7
– 40
0
Max.
18
18
150
20
Supply voltage
Output voltage
Junction temperature
Output current
VS
VQ
Tj
V
V
°C
mA
IQ
3.4
Characteristics
Product characteristics involve the spread of values guaranteed within the specified voltage and ambient
temperature range. Typical characteristics are the median of the production (at Vs = 12V and TA= 25°C).
Table 4
Parameter
Electrical Characteristics
Symbol
Values
Typ.
4
0.2
0.3
0.05
0.02
0.4
320
–
Unit
Note/ Test Condition
Min.
2
0
–
–
–
–
–
0
Max.
6
1
0.6
10
1
Supply current
IS
mA
mA
V
µA
µs
VS = 2.7 V ... 18 V
VS = – 18 V
IQ = 20 mA
for VQ = 18 V
RL = 1.2 kΩ;
CL = 50 pF
Reverse current
Output saturation voltage
Output leakage current
Output fall time
ISR
VQSAT
IQLEAK
tf
Output rise time
Chopper frequency
Switching frequency
Delay time 2)
tr
1
–
µs
fOSC
fSW
td
kHz
kHz
µs
15 1)
–
–
13
Output jitter 3)
tQJ
–
1
–
µsRMS Typ. value for square
wave signal 1 kHz
Power-on time 4)
tPON
RthJA
–
–
13
–
190
µs
K/W
VS ≥ 2.7 V
PG-SSO-3-2
Thermal resistance 5)
1) To operate the sensor at the max. switching frequency, the value of the magnetic signal amplitude must be 1.4 times higher
than for static fields.
This is due to the - 3 dB corner frequency of the low pass filter in the signal path.
2) Systematic delay between magnetic threshold reached and output switching
3) Jitter is the unpredictable deviation of the output switching delay
4) Time from applying V ≥ 2.7 V to the sensor until the output state is valid
S
5) Thermal resistance from junction to ambient
Datasheet
9
Rev 1.0, 2008-06
TLE4946-2L
Package Information
Table 5
Parameter
Magnetic Characteristics
Symbol
Values
Typ.
2.0
-2.0
4
Unit
Note/ Test Condition
Min.
0.5
Max.
3.5
Operate point
Release point
Hysteresis
BOP
BRP
BHYS
mT
-3.5
1.0
-0.5
6.0
mT
mT
Magnetic Offset1)
BOFF
-1.5
0
1.5
mT
Temperature compensation of
magn. thresholds
TC
-350
ppm/°C
Repeatability of magnetic
BREP
20
µTRMS
thresholds 2)
1) Boff = (Bop + Brp)/2
2) BREP is equivalent to the noise constant
4
Package Information
4.1
Package Outline
d
Year (y) = 0...9
Branded Side
Calendar Week (ww) = 01...52
Hall-Probe
d : Distance chip to upper side of IC
±0.08
PG-SSO-3-2 : 0.57
mm
AEA03644
AEA02510-1
Figure 6
Marking of TLE4946-2L and Distance of chip to upper side of IC
Datasheet
10
Rev 1.0, 2008-06
TLE4946-2L
Package Information
±0.1
0.8
x 45˚
7˚
±0.05
±0.08
4.16
4.06
0.2
2
A
1.9 MAX.
±0.05
1.52
(0.79)
0.6 MAX.
0.2+0.1
±0.05
0.4
1
2
3
±0.25
±1
1.27
±0.25
1.27
12.7
Adhesive
Tape
A
Tape
±0.4
±0.3
4
0.25-0.15
6.35
±0.1
±0.3
0.39
12.7
Total tolerance at 10 pitches ±1
1) No solder function area
GPO05358
Figure 7
Package outline
Datasheet
11
Rev 1.0, 2008-06
w w w . i n f i n e o n . c o m
Published by Infineon Technologies AG
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