TLE4946H_05 [INFINEON]
High Precision Bipolar Hall-Effect Latch; 高精密双极霍尔效应锁存
| 型号： | TLE4946H_05 |
| 厂家： | 
Infineon |
| 描述： | High Precision Bipolar Hall-Effect Latch |
| 文件： | 总20页 (文件大小：907K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Data Sheet, V 1.1, October 2005
TLE4946H
TLE4946-1L
High Precision Bipolar Hall-Effect Latch
Sensors
Edition 2005-10
Published by Infineon Technologies AG,
St.-Martin-Strasse 53,
81669 München, Germany
© Infineon Technologies AG 2005.
All Rights Reserved.
Attention please!
The information given in this document shall in no event be regarded as a guarantee of conditions or
characteristics (“Beschaffenheitsgarantie”). With respect to any examples or hints given herein, any typical values
stated herein and/or any information regarding the application of the device, Infineon Technologies hereby
disclaims any and all warranties and liabilities of any kind, including without limitation warranties of non-
infringement of intellectual property rights of any third party.
Information
For further information on technology, delivery terms and conditions and prices please contact your nearest
Infineon Technologies Office (www.infineon.com).
Warnings
Due to technical requirements components may contain dangerous substances. For information on the types in
question please contact your nearest Infineon Technologies Office.
Infineon Technologies Components may only be used in life-support devices or systems with the express written
approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure
of that life-support device or system, or to affect the safety or effectiveness of that device or system. Life support
devices or systems are intended to be implanted in the human body, or to support and/or maintain and sustain
and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may
be endangered.
TLE4946H
TLE4946-1L
Revision History:
2005-10
V 1.1
Previous Version:
1.0
Page
6
14
Subjects (major changes since last revision)
Figure 1 Correction of dimensions for package PG-SSO-3-2
Figure 6 Correction of dimensions
16
Figure 10 Correction of dimensions
11
Table 7 New entry: Magnetic Offset for TLE4946-1L
We Listen to Your Comments
Any information within this document that you feel is wrong, unclear or missing at all?
Your feedback will help us to continuously improve the quality of this document.
Please send your proposal (including a reference to this document) to:
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Template: mc_a5_ds_tmplt.fm / 4 / 2004-09-15
TLE4946H
TLE4946-1L
1
Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Pin Configuration (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
1.1
1.2
1.3
2
General . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Circuit Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.1
2.2
3
4
5
Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Operating Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Electrical and Magnetic Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Field Direction Definion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
6
Timing Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
7
Package Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Package Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Distance between Chip and Package Surface . . . . . . . . . . . . . . . . . . . . . 14
Package Outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
PCB Footprint for SC59 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
7.1
7.2
7.3
Data Sheet
4
V 1.1, 2005-10
High Precision Bipolar Hall-Effect Latch
TLE4946H
TLE4946-1L
1
Overview
1.1
Features
•
•
•
2.7 V to 24 V supply voltage operation
Operation from unregulated power supply
High sensitivity and high stability of the magnetic
switching points
SC59
•
High resistance to mechanical stress by
Active Error Compensation
•
•
•
•
•
•
•
Reverse battery protection (– 18 V)
Superior temperature stability
Peak temperatures up to 195°C without damage
Low jitter (typ. 1 µs)
High ESD performance (± 6 kV HBM)
Digital output signal
SMD package SC59 (SOT23 compatible) -
(TLE4946H))
PG-SSO-3-2
•
Leaded package PG-SSO-3-2 - (TLE4946-1L)
1.2
Functional Description
The TLE4946H and the TLE4946-1L are integrated circuit Hall-effect sensors designed
specifically for highly accurate applications.
Precise magnetic switching points and high temperature stability are achieved by active
compensation circuits and chopper techniques on chip.
Type
TLE4946H
TLE4946-1L
Package
SC59
PG-SSO-3-2
Data Sheet
5
V 1.1, 2005-10
TLE4946H
TLE4946-1L
Overview
1.3
Pin Configuration (top view)
± 0.1
Center of
2.08
Sensitive Area
3
± 0.1
1.35
± 0.15
0.8
1
2
± 0.15
1.5
1
2
3
SC59
PG-SSO-3-2
Figure 1
Pin Definition and Center of Sensitive Area
Pin Definitions and Functions SC59
Table 1
Pin No.
Symbol
VS
Function
Supply voltage
Output
1
2
3
Q
GND
Ground
Table 2
Pin Definitions and Functions PG-SSO-3-2
Pin No.
Symbol
VS
Function
Supply voltage
Ground
1
2
3
GND
Q
Output
Data Sheet
6
V 1.1, 2005-10
TLE4946H
TLE4946-1L
General
2
General
2.1
Block Diagram
VS
Voltage Regulator
reverse polarity protected
Bias and
Compensation
Circuits
Oscillator
and
Sequencer
Q
Ref
GND
Amplifier
Low
Pass
Filter
Comparator
with
Chopped
Hysteresis
Hall Probe
Figure 2
2.2
Block Diagram
Circuit Description
The chopped Hall IC Switch comprises a Hall probe, bias generator, compensation
circuits, oscillator, and output transistor.
The bias generator provides currents for the Hall probe and the active circuits.
Compensation circuits stabilize the temperature behavior and reduce technology
variations.
The Active Error Compensation rejects offsets in signal stages and the influence of
mechanical stress to the Hall probe caused by molding and soldering processes and
other thermal stresses in the package.
This chopper technique together with the threshold generator and the comparator
ensure high accurate magnetic switching points.
Data Sheet
7
V 1.1, 2005-10
TLE4946H
TLE4946-1L
Maximum Ratings
3
Maximum Ratings
Table 3
Absolute Maximum Ratings
Tj = – 40°C to 150°C
Parameter
Symbol
Limit Values
min. max.
Unit Conditions
Supply voltage
VS
– 18
– 18
– 18
18
24
26
V
for 1 h, Rs ≥ 200 Ω
for 5 min, Rs ≥ 200 Ω
Supply current
through
protection device
IS
– 50
+ 50
mA
Output voltage
VQ
IQ
Tj
– 0.7
– 0.7
– 50
18
26
+ 50
V
for 5 min @ 1.2 kΩ pull up
Continuous
output current
Junction
temperature
mA
°C
–
–
–
–
155
165
175
195
for 2000 h (not additive)
for 1000 h (not additive)
for 168 h (not additive)
for 3 x 1 h (additive)
Storage
temperature
TS
– 40
150
°C
Magnetic flux
density
B
–
unlimited mT
Note: Stresses above those listed here may cause permanent damage to the device.
Exposure to absolute maximum rating conditions for extended periods may affect
device reliability.
Table 4
Parameter
ESD Protection 1)
Symbol
Limit Values
max.
Unit
Notes
min.
ESD voltage
VESD
–
± 6
kV
HBM, R = 1.5 kΩ,
C = 100 pF
TA = 25°C
1) Human Body Model (HBM) tests according to: EOS/ESD Association Standard S5.1-1993 and
Mil. Std. 883D method 3015.7
Data Sheet
8
V 1.1, 2005-10
TLE4946H
TLE4946-1L
Operating Range
4
Operating Range
Operating Range
Symbol
Table 5
Parameter
Limit Values
Unit
Conditions
min.
2.7
typ.
–
max.
18
Supply voltage
Output voltage
Junction
temperature
VS
VQ
Tj
V
V
°C
– 0.7
– 40
–
–
18
150
Output current
IQ
0
–
20
mA
Data Sheet
9
V 1.1, 2005-10
TLE4946H
TLE4946-1L
Electrical and Magnetic Parameters
5
Electrical and Magnetic Parameters
Table 6
Parameter
Electrical Characteristics 1)
.
Symbol
Limit Values
min. typ. max.
Unit Conditions
Supply current
Reverse current
Output saturation
voltage
IS
2
0
–
4
0.2
0.3
6
1
0.6
mA
mA
V
VS = 2.7 V ... 18 V
VS = – 18 V
IQ = 20 mA
ISR
VQSAT
Output leakage
current
IQLEAK
–
0.05
10
µA
for VQ = 18 V
Output fall time
Output rise time
tf
tr
–
–
0.02
0.4
1
1
µs
µs
RL = 1.2 kΩ; CL = 50 pF
see: Figure 3 “Timing
Definition” on Page 12
Chopper frequency fOSC
–
0
320
–
–
kHz
Switching
frequency
Delay time 3)
Output jitter 4)
fSW
15 2) kHz
td
–
–
13
1
–
–
µs
tQJ
µsRMS Typical value for square
wave signal 1 kHz
µs
K/W SC59
PG-SSO-3-2
Power-on time 5)
tPON
–
–
–
13
100
–
–
–
190
VS ≥ 2.7 V
Thermal resistance RthJA
6)
1) over operating range, unless otherwise specified. Typical values correspond to VS =12 V and TA = 25°C
2) To operate the sensor at the max. switching frequency, the value of the magnetic signal amplitude must be
1.4 times higher than for static fields.
This is due to the - 3 dB corner frequency of the low pass filter in the signal path.
3) Systematic delay between magnetic threshold reached and output switching
4) Jitter is the unpredictable deviation of the output switching delay
5) Time from applying VS ≥ 2.7 V to the sensor until the output state is valid
6) Thermal resistance from junction to ambient
Calculation of the ambient temperature (SC59 example)
e.g. for VS = 12.0 V, IStyp = 4 mA, VQSATtyp = 0.3 V and IQ = 20 mA :
Power Dissipation: PDIS = 54.0 mW.
In TA = Tj – (RthJA × PDIS) = 175°C – (100 K / W × 0.054 W)
Resulting max. ambient temperature: TA = 169.6°C
Data Sheet
10
V 1.1, 2005-10
TLE4946H
TLE4946-1L
Electrical and Magnetic Parameters
Table 7
Parameter
Magnetic Characteristics TLE4946H 1)
Symbol Tj [°C] Limit Values
min. typ. max.
Unit
Notes
Operate point
Release point
Hysteresis
BOP
– 40
11.8
11.0
6.1
11.3
11.0
10.5
15.8
14.0
9.6
15.4
15.0
14.3
19.2
17.0
13.7
19.5
19.0
18.1
mT
TLE4946H
25
150
– 40
25
150
– 40
25
150
– 40
25
150
– 40
25
150
– 40
25
150
– 40
25
150
TLE4946-1L
TLE4946H
TLE4946-1L
TLE4946H
TLE4946-1L
BRP
–
–
–
19.2
17.0
13.7
–
–
–
15.8 – 11.8 mT
14.0 – 11.0
9.6
– 6.1
–
–
–
19.5 – 15.4 – 11.3
19.0 – 15.0 – 11.0
18.1 – 14.3 – 10.5
BHYS
–
22.0
–
–
22.0
–
–
– 3.0
–
–
28.0
–
–
30.0
–
–
–
–
–
34.0
–
–
38.0
–
–
3.0
–
mT
mT
Magnetic Offset BOFF
TLE4946H
2)
– 40
25
150
–
– 2.0
–
–
–
–
–
2.0
–
TLE4946-1L
2)
Temperature
compensation of
magn. thresholds
TC
–
-
–
-
- 2000
- 350
–
-
ppm/°C TLE4946H
TLE4946-1L
Repeatability of BREP
magnetic
–
20
–
µTRMS Typ. value for
∆B / ∆t
thresholds 3)
> 12 mT/ms
1) over operating range, unless otherwise specified. Typical values correspond to VS = 12 V.
2)
3)
B
B
OFF = (BOP + BRP) / 2
REP is equivalent to the noise constant
Note: Typical characteristics specify mean values expected over the production spread.
Data Sheet
11
V 1.1, 2005-10
TLE4946H
TLE4946-1L
Timing Diagram
Field Direction Definion
Positive magnetic fields related with south pole of magnet to the branded side of
package.
6
Timing Diagram
Applied
Magnetic
Field
BOP
BRP
td
td
tf
tr
VQ
90%
10%
Figure 3
Timing Definition
Data Sheet
12
V 1.1, 2005-10
TLE4946H
TLE4946-1L
Package Information
7
Package Information
7.1
Package Marking
Year (y) = 0...9
Month (m) = 1...9,
O - October
N - November
D - December
46
AEA03643
Figure 4
Marking TLE4946H
Year (y) = 0 ... 9
Calendar Week (ww) = 01 ... 52
AEP03644
Figure 5
Marking TLE4946-1L
Data Sheet
13
V 1.1, 2005-10
TLE4946H
TLE4946-1L
Package Information
7.2
Distance between Chip and Package Surface
Branded Side
d: Distance chip to upper side of IC
±0.05
SC59: 0.545
mm
AEA03244
Figure 6
Distance Chip SC59 to Upper Side of IC
d
Branded Side
Hall-Probe
d : Distance chip to upper side of IC
±0.08
PG-SSO-3-2 : 0.57
mm
AEA02510-1
Figure 7
Distance Chip PG-SSO-3-2 to Upper Side of IC
Data Sheet
14
V 1.1, 2005-10
TLE4946H
TLE4946-1L
Package Information
7.3
Package Outlines
±0.1
1.1
±0.1
3
0.15 MAX.
0.2+0.1
0.1
+0.05
3x0.4
-0.1
M
0.1
3
±
0.15
0.45
1
2
+0.1
5
0.95
0.15
-0.0
0.95
(0.55)
0˚...8˚ MAX.
GPS09473
Figure 8
SC59
PCB Footprint for SC59
The following picture shows a recommendation for the PCB layout.
n
0.8
0.8
1.2
0.8
1.2
Wave Soldering
0.8
Reflow Soldering
Figure 9
Footprint SC59 (SOT23 compatible)
Data Sheet
15
V 1.1, 2005-10
TLE4946H
TLE4946-1L
Package Information
±0.1
0.8
x 45˚
7˚
±0.05
±0.08
4.16
4.06
0.2
2 A
1.9 MAX.
±0.05
1.52
(0.79)
0.6 MAX.
0.2+0.1
±0.05
0.4
1
2
3
±0.25
±1
1.27
±0.25
1.27
12.7
Adhesive
Tape
A
Tape
±0.4
±0.3
4
0.25-0.15
6.35
±0.1
0.39
±0.3
12.7
Total tolerance at 10 pitches ±1
1) No solder function area
GPO05358
Figure 10
PG-SSO-3-2
Note: You can find all of our packages, sorts of packing and
others in our Infineon Internet Page “Products”:
http://www.infineon.com/products.
Dimensions in mm
Data Sheet
16
V 1.1, 2005-10
TLE4946H
TLE4946-1L
Notes
Data Sheet
17
V 1.1, 2005-10
TLE4946H
TLE4946-1L
Notes
Data Sheet
18
V 1.1, 2005-10
TLE4946H
TLE4946-1L
Notes
Data Sheet
19
V 1.1, 2005-10
w w w . i n f i n e o n . c o m
Published by Infineon Technologies AG
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