PEB22622 [INFINEON]
SDSL One Chip Rate Adaptive Transceiver with Embedded Start-up; SDSL一个码片速率自适应收发器,嵌入式启动型号: | PEB22622 |
厂家: | Infineon |
描述: | SDSL One Chip Rate Adaptive Transceiver with Embedded Start-up |
文件: | 总2页 (文件大小:323K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
P R O D U C T B R I E F
SDSL One Chip Rate Adaptive
Transceiver with Embedded
Start-up
The one chip transceiver IC SOCRATESTM inte-
grates all functions of a SDSL transceiver accord-
ing to the emerging ETSI and ITU standards. It can
operate at all data rates from 144 kBit/s up to
2.3 MBit/s in 8 kBit/s granularity. Its small package
and low power consumption make it especially
useful in linecard and remote feed applications.
The integrated microcontroller and HDLC control-
ler make it easy to use in a variety of applications.
The built-in 2B1Q mode keeps it interoperable
with HDSL solutions. All features required for
operation in WLL/RITL systems are available. The
device is also interoperable with the MuBIC MDSL
chip. Infineon also supplies a wide range of other
telecom ICs to offer complete system solutions
for different applications.
SDSL
Central office (COT) and
Potential Applications
Features
Single chip SDSL transceiver
Plastic TQFP-144 package
remote (RT) operation (master/
slave)
High speed subscriber access
N-channel DAML systems
2 MBit/s and 4 MBit/s TDM
interface in RT mode
Extended range full and
fractional T1/E1
Lowest power consumption
TCPAM linecode with 2, 3 or 4
Bits/symbol
2 MBit/s to 10 MBit/s TDM inter-
face in COT mode
Internet connections
ISDN H0 transport
Synchronousor plesiochronous
operation
1544 kBits/s TDM interface (T1)
ISDN Primary rate access
replacement
DECT base station synchroni-
zation
8-Bit µC parallel interface of
Infineon/Intel and Motorola
multiplexed/demuliplexed type
Remote LAN Access (Home
office)
Delay measurement
2B1Q mode
Transparent transmission or
built-in Framer with MuBIC or
SDSL framing
Videoconferencing
Single 2.0 V, 3.3 V and +5 V
power supply
Cellular base stations
RITL and WLL systems
SDH and SONET termination
Leased line services
Frame Relay services
PBX trunk lines
Inputs and Outputs TTL level
Embedded µC also usable for
board control
Capable of transmitting on ETSI
and ANSI HDSL testloops
Two integrated HDLC control-
lers for payload and EOC
JTAG boundary scan
Warmstart capability
G. handshake start-up
Development and Support Tools
SMART 2000 Evaluation
package
S O C R A T E S
P E B 2 2 6 2 2
N e v e r s t o p t h i n k i n g .
P R O D U C T B R I E F
SOCRATES PEB 22622
Block Diagram
2B1Q Data Path not Shown
Timing
Recovery
OSC
20.48 MHz
Digital Part
PLL
LD
Scram-
bler
Tom-
Trellis
Filter
DAC
ADC
Filter
linson
PCM
i/f
Line
Framer
S/MDSL
EC
Hybrid
Descram-
bler
Viter-
by
+
EQ
Filter
µC
AGC
Filter
HDLC
Analog Part
RAM
ROM
µC i/f
Documentation
Type
Date of Issue/Version
PEB 22622 V1.1 Product Overview
07.99
PEB 22622 V1.1 Preliminary Data Sheet 03.00
Packing
Type
Ordering Code Package
Availability
ES
PEB 22622F
Q67233-H1202 P-TQFP-144
Socrates Demoboard Q67230-H1204
4/2000
Application Example
Fully Featured NT
PCM
SDRAM
(HYB39Sxxxx)
Flash
S
ISAC-SX
0
(PEB 3086)
Feature-
phones
SDSL Loop
Payload
Datarate:
144 kbit/s
to
SOCRATES
(PEB 22622)
t/r
SLIC-P
(PEB 4266)
SLICOFI-2
(PEB 3265)
Emergency Powering
DC
t/r
SSC
MII
SLIC-P
(PEB 4266)
2312 kbit/s
HARRIER-
VT
(PEB 4261)
POTS
IDCC
(PEB 2023)
10/100
Base-T-LAN
DC
Ethernet PHY
DC
PC
PC
USB
IDCC
Main Power
(PEB 2023)
(full speed)
AC
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Technologies Representatives worldwide.
Ordering No. B119-H7611-X-X-7600
Printed in Germany
Published by Infineon Technologies AG
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