JANTXV2N7218U_技术文档

INCH-POUND

The documentation and process conversion

measures necessary to comply with this revision

shall be completed by 1 June 2013.

MIL-PRF-19500/596K

17 April 2013

SUPERSEDING

MIL-PRF-19500/596J

14 April 2009

PERFORMANCE SPECIFICATION SHEET

SEMICONDUCTOR DEVICE, REPETITIVE AVALANCHE, FIELD EFFECT,

TRANSISTOR, N-CHANNEL, SILICON,

TYPES 2N7218, 2N7219, 2N7221, 2N7222, 2N7218U, 2N7219U,

2N7221U, AND 2N7222U, JAN, JANTX, JANTXV, JANS, JANHC, AND JANKC

This specification is approved for use by all Departments

and Agencies of the Department of Defense.

The requirements for acquiring the product described herein shall consist of

this specification sheet and MIL-PRF-19500.

1. SCOPE

1.1 Scope. This specification covers the performance requirements for a N-channel, enhancement mode,

MOSFET, power transistor intended for use in high density power switching applications. Four levels of product

assurance are provided for each device type as specified in MIL-PRF-19500, with avalanche energy maximum

ratings (E_ARand E_AS) and maximum avalanche current I_AR. Two levels of product assurance are provided for die

(element evaluation).

1.2 Physical dimensions. See figure 1 (TO-254AA), figure 2 for JANHC and JANKC (die) dimensions, and figure 3

for surface mount (TO-267AB).

1.3 Maximum ratings. Unless otherwise specified, T_C= +25°C.

Type

P_T(1)

P_T

V_(BR)DSSmin I_D1(3) (4) I_D2(3) (4)

I_S

I_DM

(5)

T_J

R_θ

JC

T_C=

+25°C

W

T_A=

+25°C

W

(2)

V_GS= 0

I_D= 1.0 mA dc

V dc

T_C=

+25°C

A dc

T_C=

+100°C

A dc

and

T_STG

°C

A dc A (pk)

°C/W

2N7218, 2N7218U

2N7219, 2N7219U

2N7221, 2N7221U

2N7222, 2N7222U

125

4

100

200

400

500

28

18

10

8

20

11

6

28

18

10

8

112

72

40

1.0

-55 to +150

5

32

See notes next page.

Comments, suggestions, or questions on this document should be addressed to Defense Supply Center,

Columbus, ATTN: DSCC-VAC, P.O. Box 3990, Columbus, OH 43218-3990, or emailed to

Semiconductor@dla.mil. Since contact information can change, you may want to verify the currency of this

address information using the ASSIST Online database at https://assist.dla.mil/.

*

AMSC N/A

FSC 5961

MIL-PRF-19500/596K

1.3 Maximum ratings - continued.

r_DS(on)max (6)

V_GS= 10 V dc

I_D= I_D2

Type

I_AR

E_AS

E_AR

V_(ISO)

at 70,000

feet

V_GS

T_J= +25°C

T_J= +150°C

A

mj

V dc

Ω

2N7218, 2N7218U

2N7219, 2N7219U

2N7221, 2N7221U

2N7222, 2N7222U

28

18

10

8

250

450

650

700

12.5

±20

0.077

0.18

0.55

0.85

0.154

0.387

1.32

400

500

2.04

(1) Derate linearly 1.0 W/°C for T_C> +25°C.

(2) See figure 4, thermal impedance curves.

(3) The following formula derives the maximum theoretical I_Dlimit. I_Dis limited by package and internal wires

and may be limited by pin diameter:

max-

T _J

)x(

T_C

at

=

I _D

(

)

R_ΘJC

R_{DS(ON )}T _Jmax

(4) See figure 5, maximum drain current graph.

(5) I_DM= 4 x I_D1as calculated in note 3.

(6) Pulsed (see 4.5.1).

1.4 Primary electrical characteristics. T_C= +25°C (unless otherwise specified).

Max I_DSS1

V_GS= 0

V_DS= 80 percent

of rated V_DS

Max r_DS(on)1

(1)

I_D= I_D2

Type

Min V_(BR)DSS

V_GS= 0

I_D= 1.0 mA dc

V_GS(th)1

V_DS≥ V_GS

I_D= 0.25 mA dc

V_GS= 10 V

V dc

Ohms

µA dc

Min

2.0

Max

2N7218, 2N7218U

2N7219, 2N7219U

2N7221, 2N7221U

2N7222, 2N7222U

100

200

400

500

4.0

25

0.077

0.18

0.55

0.85

(1) Pulsed (see 4.5.1).

2

MIL-PRF-19500/596K

Dimensions

Millimeters

Notes

Ltr

Inches

Min

Max

.545

.260

.045

.570

Min

13.59

6.32

Max

13.84

6.60

BL

CH

LD

.535

.249

.035

.510

0.89

1.14

LL

12.95

14.48

3

LO

.150 BSC

.139

3.81 BSC

LS

MHD

MHO

TL

.149

.685

.800

.050

.545

3.53

3.78

17.40

20.32

1.27

.665

.790

.040

.535

16.89

20.07

1.02

3, 4

TT

TW

13.59

13.84

Term

1

Drain

Term

2

Source

Gate

Term

3

NOTES:

1. Dimensions are in inches.

2. Millimeters are given for general information only.

3. Protrusion thickness of ceramic eyelets included in dimension LL.

4. All terminals are isolated from case.

5. In accordance with ASME Y14.5M, diameters are equivalent to φx symbology.

FIGURE 1. Physical dimensions for TO-254AA (2N7218, 2N7219, 2N7221, and 2N7222).

3

MIL-PRF-19500/596K

Dimensions

Inches

Symbol

Millimeters

Min

.620

.445

Max

.630

.455

.142

.020

.420

.162

Min

15.75

11.30

Max

16.00

11.56

3.60

0.50

10.67

4.11

BL

BW

CH

LH

LL₁

.010

.410

.152

0.26

10.41

3.86

LL₂

LS₁

LS₂

LW₁

LW₂

Q₁

.210 BSC

.105 BSC

.370

.135

.030

.035

5.33 BSC

2.67 BSC

.380

.145

9.40

3.43

0.76

0.89

9.65

3.68

Q₂

Term 1

Term 2

Term 3

Drain

Gate

Source

NOTES:

1. Dimensions are in inches.

2. Millimeters are given for information only.

3. The lid shall be electrically isolated from the drain, gate and source.

4. In accordance with ASME Y14.5M, diameters are equivalent to φx symbology.

FIGURE 2. Dimensions and configuration of surface mount package outline (TO-267AB), 2N7218U, 2N7219U,

2N7221U, and 2N7222U.

4

MIL-PRF-19500/596K

Inches

.018

.020

.025

.027

.029

mm

0.46

0.51

0.64

0.69

0.74

Inches

.037

.042

.049

.060

.063

mm

0.94

1.07

1.24

1.52

1.60

Inches

.162

.170

.192

.219

.227

mm

4.11

4.32

4.88

5.56

5.77

NOTES:

1. Dimensions are in inches.

2. Millimeters are given for general information only.

3. Unless otherwise specified, tolerance is ±.005 inch (0.13 mm).

4. The physical characteristics of the die thickness are .0187 inch (0.475 mm). The back metals

are chromium, nickel, and silver. The top metal is aluminum and the back contact is the drain.

5. In accordance with ASME Y14.5M, diameters are equivalent to φx symbology.

6. See 6.4 for ordering information.

FIGURE 3. JANHC and JANKC (A-version) die dimensions.

5

MIL-PRF-19500/596K

2. APPLICABLE DOCUMENTS

2.1 General. The documents listed in this section are specified in sections 3, 4, or 5 of this specification. This

section does not include documents cited in other sections of this specification or recommended for additional

information or as examples. While every effort has been made to ensure the completeness of this list, document

users are cautioned that they must meet all specified requirements of documents cited in sections 3, 4, or 5 of this

specification, whether or not they are listed.

2.2 Government documents.

2.2.1 Specifications, standards, and handbooks. The following specifications, standards, and handbooks form a

part of this document to the extent specified herein. Unless otherwise specified, the issues of these documents are

those cited in the solicitation or contract.

DEPARTMENT OF DEFENSE SPECIFICATIONS

MIL-PRF-19500

DEPARTMENT OF DEFENSE STANDARDS

MIL-STD-750 Test Methods for Semiconductor Devices.

-

Semiconductor Devices, General Specification for.

-

*

(Copies of these documents are available online at https://assist.dla.mil/quicksearch/ or https://assist.dla.mil/ or

from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.)

2.3 Order of precedence. Unless otherwise noted herein or in the contract, in the event of a conflict between the

text of this document and the references cited herein, the text of this document takes precedence. Nothing in this

document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained.

3. REQUIREMENTS

3.1 General. The individual item requirements shall be as specified in MIL-PRF-19500 and as modified herein.

3.2 Qualification. Devices furnished under this specification shall be products that are manufactured by a

manufacturer authorized by the qualifying activity for listing on the applicable qualified manufacturer's list before

contract award (see 4.2 and 6.3).

3.3 Abbreviations, symbols, and definitions. Abbreviations, symbols, and definitions used herein shall be as

specified in MIL-PRF-19500.

3.4 Interface and physical dimensions. Interface and physical dimensions shall be as specified in

MIL-PRF-19500, and on figures 1 (TO-254AA), 2 (TO-267AB, surface mount), and 3 (die) herein. Methods used for

electrical isolation of the terminal feedthroughs shall employ materials that contain a minimum of 90 percent AL₂O₃

(ceramic). Examples of such construction techniques are metallized ceramic eyelets or ceramic walled packages.

3.4.1 Lead formation and finish. Lead finish shall be solderable in accordance with MIL-PRF-19500,

MIL-STD-750, and herein. Where a choice of lead formation or finish is desired, it shall be specified in the acquisition

document (see 6.2). When lead formation is performed, as a minimum, the vendor shall perform 100 percent

hermetic seal in accordance with screen 14 of table E-IV of MIL-PRF-19500 and 100 percent dc testing in

accordance with table I, subgroup 2 herein.

6

MIL-PRF-19500/596K

3.4.2 Internal construction. Multiple chip construction shall not be permitted.

3.5 Electrostatic discharge protection. The devices covered by this specification require electrostatic protection.

3.5.1 Handling. MOS devices must be handled with certain precautions to avoid damage due to the accumulation

of static charge. The following handling procedures shall be followed:

a. Devices shall be handled on benches with conductive handling devices.

b. Ground test equipment, tools, and personnel handling devices.

c. Do not handle devices by the leads.

d. Store devices in conductive foam or carriers.

e. Avoid use of plastic, rubber, or silk in MOS areas.

f. Maintain relative humidity above 50 percent, if practical.

g. Care shall be exercised, during test and troubleshooting, to apply not more than maximum rated voltage to

any lead.

h. Gate must be terminated to source. R ≤ 100 kΩ, whenever bias voltage is to be applied drain to source.

3.6 Electrical performance characteristics. Unless otherwise specified herein, the electrical performance

characteristics are as specified in 1.3, 1.4, and table I.

3.7 Electrical test requirements. The electrical test requirements shall be as specified in table I.

3.8 Marking. Marking shall be in accordance with MIL-PRF-19500, except at the option of the manufacturer, the

country of origin and/or the manufacturers identification may be omitted from the body of the transistor.

3.9 Workmanship. Semiconductor devices shall be processed in such a manner as to be uniform in quality and

shall be free from other defects that will affect life, serviceability, or appearance.

4. VERIFICATION

4.1 Classification of inspections. The inspection requirements specified herein are classified as follows:

a. Qualification inspection (see 4.2).

b. Screening (see 4.3).

c. Conformance inspection (see 4.4 and tables I and II).

4.2 Qualification inspection. Qualification inspection shall be in accordance with MIL-PRF-19500, and as specified

herein.

4.2.1 JANHC and JANKC qualification. JANHC and JANKC qualification inspection shall be in accordance with

MIL-PRF-19500.

4.2.2 Group E qualification. Group E inspection shall be performed for qualification or re-qualification only. In

case qualification was awarded to a prior revision of the specification sheet that did not request the performance of

table II tests, the tests specified in table II herein that were not performed in the prior revision shall be performed on

the first inspection lot of this revision to maintain qualification.

7

MIL-PRF-19500/596K

4.3 Screening (JANS, JANTX, and JANTXV levels). Screening shall be in accordance with table E-IV of

MIL-PRF-19500, and as specified herein. The following measurements shall be made in accordance with table I

herein. Devices that exceed the limits of table I herein shall not be acceptable.

Screen (see

table E-IV of

MIL-PRF-19500)

(1) (2)

Measurement

JANS level

JANTX and JANTXV level

(3)

Gate stress test (see 4.3.2)

Method 3470 of MIL-STD-750. (see 4.3.3)

Method 3161 of MIL-STD-750 (see 4.3.4)

Method 3470 of MIL-STD-750. (see 4.3.3)

Method 3161 of MIL-STD-750 (see 4.3.4)

Subgroup 2 of table I herein

(3) 3c

9

I_GSSF1, I_GSSR1, I_DSS1, subgroup 2 of table I

herein;

10

11

Method 1042 of MIL-STD-750, test condition Method 1042 of MIL-STD-750, test condition

B

I_GSSF1, I_GSSR1, I_DSS1, r_DS(on)1, V_GS(th)1

Subgroup 2 of table I herein.

I_GSSF1, I_GSSR1, I_DSS1, r_DS(on)1, V_GS(th)1

Subgroup 2 of table I herein.

∆I_GSSF1= +20 nA dc or ±100 percent of initial

value, whichever is greater.

∆I_GSSR1= -20 nA dc or ±100 percent of initial

value, whichever is greater.

∆I_DSS1= ±25 µA dc or ±100 percent of initial

value, whichever is greater.

12

13

Method 1042 of MIL-STD-750, test condition Method 1042 of MIL-STD-750, test condition

A

A or T_A= +175°C and t = 48 hours

Subgroup 2 and 3 of table I herein.

Subgroup 2 of table I herein.

∆I_GSSF1= +20 nA dc or ±100 percent of initial ∆I_GSSF1= +20 nA dc or ±100 percent of initial

value, whichever is greater. value, whichever is greater.

∆I_GSSR1= -20 nA dc or ±100 percent of initial ∆I_GSSR1= -20 nA dc or ±100 percent of initial

value, whichever is greater.

∆I_DSS1= ±25 µA dc or ±100 percent of initial

value, whichever is greater.

∆I_DSS1= ±25 µA dc or ±100 percent of initial

value, whichever is greater.

∆r_DS(on)1= ±20 percent of initial value.

∆V_GS(th)1= ±20 percent of initial value.

∆r_DS(on)1= ±20 percent of initial value.

∆V_GS(th)1= ±20 percent of initial value.

*

17

Method 1081 of MIL-STD-750 (see 4.3.5)

Endpoints: Subgroup 2 of table I herein

Method 1081 of MIL-STD-750 (see 4.3.5)

Endpoints: Subgroup 2 of table I herein

(1) At the end of the test program, I_GSSF1, I_GSSR1, and I_DSS1are measured.

(2) An out-of-family program to characterize I_GSSF1, I_GSSR1, I_DSS1, and V_GS(th)1shall be invoked.

(3) Shall be performed anytime after temperature cycling, screen 3a; JANTX and JANTXV levels do not need to

be repeated in screening requirements.

8

MIL-PRF-19500/596K

4.3.1 Screening (JANHC and JANKC). Screening of die shall be in accordance with MIL-PRF-19500. As a

minimum die, shall be 100 percent probed in accordance with table I, subgroup 2 except test current shall not exceed

20 amperes.

4.3.2 Gate stress test. Apply V_GS= 30 V minimum for t = 250 µs minimum.

4.3.3 Single pulse avalanche energy (E_AS).

a. Peak current (I_AS)............................................I_D1.

b. Peak gate voltage (V_GS)..................................10 V.

c. Gate to source resistor (R_GS)..........................25 ≤ R_GS≤ 200 Ω.

d. Initial case temperature ..................................+25°C +10°C, -5°C.









V

− V

e. Inductance:.....................................................

mH minimum.



_DD

2E_AS

BR









²

V_BR

I



(

)

D1





f. Number of pulses to be applied.......................1 pulse minimum.

g. Supply voltage (V_DD).......................................50 V, 25 V for 100 V devices.

4.3.4 Thermal impedance. The thermal impedance measurements shall be performed in accordance with method

3161 of MIL-STD-750 using the guidelines in that method for determining I_M, I_H, t_H, t_SW, (and V_Hwhere appropriate).

Measurement delay time (t_MD) = 30 - 60 µs max. See table II, group E, subgroup 4 herein.

4.3.5 Dielectric withstanding voltage.

*

a. Magnitude of test voltage…………………………………900V DC

b. Duration of application of test voltage…………………..15 seconds (min)

c. Points of application of test voltage………………………All leads to case (bunch connection)

d. Method of connection………………………………………Mechanical

e. Kilovolt-ampere rating of high voltage source…………..1200V/1.0 mA (min)

f. Maximum leakage current………………………………….1.0 mA

g. Voltage ramp up time……………………………………….500V/second

4.4 Conformance inspection. Conformance inspection shall be in accordance with MIL-PRF-19500, and as

specified herein.

4.4.1 Group A inspection. Group A inspection shall be conducted in accordance with MIL-PRF-19500 and table I

herein. Electrical measurements (end-points) shall be in accordance with the inspections of table I, subgroup 2

herein.

4.4.2 Group B inspection. Group B inspection shall be conducted in accordance with the conditions specified for

subgroup testing in table E-VIA (JANS) and table E-VIB (JAN, JANTX, and JANTXV) of MIL-PRF-19500 and herein.

Electrical measurements (end-points) shall be in accordance with the inspections of table I, subgroup 2 herein.

9

MIL-PRF-19500/596K

*

4.4.2.1 Group B inspection, table E-VIA (JANS) of MIL-PRF-19500.

Subgroup

B3

Method

1051

Conditions

Test condition G.

*

B4

1042

Test condition D; the heating cycle shall be 1 minute minimum. No

heat sink or forced air cooling on the device shall be permitted during the cycle.

B5

1042

A separate sample may be pulled for each test. Accelerated steady-state reverse

bias, test condition A, V_DS= rated, T_A= +175°C, t = 120 hours, read and record

V_(BR)DSS(pre and post at 1 mA = I_D. Read and record I_DSS(pre and post). Deltas for

V

_(BR)DSSshall not exceed 10 percent and I_DSSshall not exceed 25 µA.

Accelerated steady-state gate bias, condition B, V_GS= rated, T_A= +175°C,

t = 24 hours.

B5

2037

Bond strength; test condition D.

4.4.2.2 Group B inspection, table E-VIB (JAN, JANTX, and JANTXV) of MIL-PRF-19500.

Subgroup

B2

Method

1051

Condition

Test condition G.

B3

1042

Test condition D, 2,000 cycles minimum. The heating cycle shall be 1 minute

minimum.

*

4.4.3 Group C inspection. Group C inspection shall be conducted in accordance with the conditions specified for

subgroup testing in table E-VII of MIL-PRF-19500 and as follows. Electrical measurements (end-points) shall be in

accordance with the inspections of table I, subgroup 2 herein.

Subgroup

C2

Method

2036

Condition

Tension: Test condition A; weight = 10 lbs, t = 10 s (not applicable to "U" suffix

version).

C5

3161

1042

See 4.3.4, R_θ_JC(max)shall be 1.0°C/W.

*

C6

Test condition D. The heating cycle shall be 1 minute minimum.

4.4.4 Group E inspection. Group E inspection shall be conducted in accordance with the conditions specified for

subgroup testing in table E-IX of MIL-PRF-19500 and as specified herein. Electrical measurements (end-points) shall

be in accordance with table I, subgroup 2.

4.5 Methods of inspection. Methods of inspection shall be as specified in appropriate tables and as follows.

4.5.1 Pulse measurements. Conditions for pulse measurements shall be as specified in MIL-STD-750.

10

MIL-PRF-19500/596K

TABLE I. Group A inspection.

MIL-STD-750

Inspection

1/

Limits

Symbol

Unit

Method

2071

Condition

Min

Max

Subgroup 1

Visual and mechanical

inspection

Subgroup 2

Thermal impedance 2/

3161

3407

See 4.3.4

Z _θ

°C/W

JC

Breakdown voltage,

drain to source

Bias condition C, V_GS= 0 V, I_D=

1 mA dc

V _(BR)DSS

2N7218, 2N7218U

100

200

400

500

V dc

2N7219, 2N7219U

2N7221, 2N7221U

2N7222, 2N7222U

Gate to source voltage

(threshold)

3403

3411

3413

3421

V_GS(th)1

I_GSSF1

I_GSSR1

I_DSS1

2.0

4.0

100

-100

25

V dc

nA dc

µA dc

V_DS≥ V_GS, I_D= .25 mA

Gate current

Drain current

Bias condition C, V_GS= 20 V dc,

V_DS= 0

Bias condition C, V_GS= -20 V dc,

V_DS= 0

Bias condition C, V_GS= 0, V_DS

80 percent of rated V_DS

=

Static drain to source

on-state resistance

2N7218, 2N7218U

2N7219, 2N7219U

2N7221, 2N7221U

2N7222, 2N7222U

V_GS= 10 V dc, condition A, pulsed

(see 4.5.1), I_D= rated I_D2(see 1.3)

r_DS(on)1

0.077

0.18

0.55

0.85

Ω

Static drain to source

on-state resistance

2N7218, 2N7218U

2N7219, 2N7219U

2N7221, 2N7221U

2N7222, 2N7222U

3421

V_GS= 10 V dc, condition A, pulsed

(see 4.5.1), I_D= rated I_D1(see 1.3)

r_DS(on)2

0.125

0.25

0.70

0.95

Ω

See footnotes at end of table.

11

MIL-PRF-19500/596K

TABLE I. Group A inspection - Continued.

MIL-STD-750

Inspection

1/

Limits

Symbol

Unit

Method

4011

Condition

Min

Max

Subgroup 2 - Continued

Forward voltage (source

drain diode)

V_GS= 0, I_D= rated I_D1, pulsed (see

4.5.1)

V_SD

1.5

V

Subgroup 3

High temperature

operation:

T_C= T_J= +125°C

Gate current

Drain current

3411

3413

3403

3421

Bias condition C,

V_GS= 20 V dc, V_DS= 0

I_GSSF2

I_GSSR2

I_DSS2

200

-200

1.0

nA dc

mA dc

V dc

Bias condition C,

V_GS= -20 V dc, V_DS= 0

Bias condition C, V_GS= 0, V_DS

100 percent of rated V_DS

=

Bias condition C, V_GS= 0, V_DS

80 percent of rated V_DS

I_DSS3

0.25

Gate to source voltage

(threshold)

V_GS(th)2

1.0

V_DS≥ V_GS, I_D= 0.25 mA

Static drain to source

on-state resistance

2N7218, 2N7218U

2N7219, 2N7219U

2N7221, 2N7221U

2N7222, 2N7222U

V_GS= 10 V dc, pulsed (see 4.5.1),

I_D= rated I_D2(see 1.3)

r_DS(on)3

0.24

0.48

1.44

2.04

Ω

Low temperature

operation:

T_C= T_J= -55°C

Gate to source voltage

(threshold)

3403

V_GS(th)3

5.0

V dc

V_DS≥ V_GS, I_D= 0.25 mA

See footnotes at end of table.

12

MIL-PRF-19500/596K

TABLE I. Group A inspection - Continued.

MIL-STD-750

Inspection

1/

Limits

Symbol

Unit

Method

3472

Condition

Min

Max

Subgroup 4

Switching time test

I_D= rated I_D2(see 1.3), V_GS= 10 V

dc, gate drive impedance = 9.1 Ω,

V_DD= 50 percent of V_BR(DSS)

Turn-on delay time

2N7218, 2N7218U

2N7219, 2N7219U

2N7221, 2N7221U

2N7222, 2N7222U

t_d(on)

21

20

25

21

ns

Rise time

t_r

2N7218, 2N7218U

105

92

ns

2N7219, 2N7219U

2N7221, 2N7221U

2N7222, 2N7222U

73

Turn-off delay time

2N7218, 2N7218U

2N7219, 2N7219U

2N7221, 2N7221U

2N7222, 2N7222U

t_d(off)

64

58

79

72

ns

Fall time

t_f

2N7218, 2N7218U

65

67

58

51

ns

2N7219, 2N7219U

2N7221, 2N7221U

2N7222, 2N7222U

Subgroup 5

Safe operating area test

(high voltage)

3474

See figure 6; t_p= 10 ms, V_DS= 80

percent of rated V_BR(DSS), V_DS

200 V maximum

=

Electrical

See table I, subgroup 2

measurements

Subgroup 6

Not applicable

See footnotes at end of table.

13

MIL-PRF-19500/596K

TABLE I. Group A inspection - Continued.

MIL-STD-750

Inspection

1/

Limits

Symbol

Unit

Method

3471

Condition

Min

Max

Subgroup 7

Gate charge

Condition B

On-state gate charge

2N7218, 2N7218U

2N7219, 2N7219U

2N7221, 2N7221U

2N7222, 2N7222U

Q_g(on)

59

60

65

nC

68.5

Gate to source charge

2N7218, 2N7218U

2N7219, 2N7219U

2N7221, 2N7221U

2N7222, 2N7222U

Q_gs

16

nC

14.6

14.0

12.5

Gate to drain charge

2N7218, 2N7218U

2N7219, 2N7219U

2N7221, 2N7221U

2N7222, 2N7222U

Q_gd

30.7

37.6

40.5

42.4

nC

Reverse recovery time

3473

t_rr

d_i/d_t≤ 100 A/µs, V_DD≤ 30 V,

I_D= I_D1, (see 1.3)

2N7218, 2N7218U

2N7219, 2N7219U

2N7221, 2N7221U

2N7222, 2N7222U

400

500

600

700

ns

1/ For sampling plan, see MIL-PRF-19500.

2/ This test required for the following end-point measurements only:

Group B, subgroups 3 and 4 (JANS).

Group B, subgroups 2 and 3 (JANTXV).

Group C, subgroups 2 and 6.

Group E, subgroup 1.

14

MIL-PRF-19500/596K

*

TABLE II. Group E inspection (all quality levels) for qualification or re-qualification only.

Inspection

MIL-STD-750

Conditions

Sample

plan

Method

Subgroup 1

45 devices

c = 0

Temperature cycling

1051

1071

-55 to 150°C, 500 cycles

Hermetic seal

Fine leak

As applicable.

*

Gross leak

Electrical measurements

Subgroup 2 1/

See table I, subgroup 2

45 devices

c = 0

Steady-state reverse bias

Electrical measurements

Steady-state gate bias

Electrical measurements

Subgroup 4

1042

Condition A, 1,000 hours

See table I, subgroup 2

Condition B, 1,000 hours

See table I, subgroup 2

Sample size

N/A

Thermal impedance curves

Subgroup 5 2/

See MIL-PRF-19500.

3 devices

c = 0

Barometric pressure test

2N7221, 2N7221U

1001

3476

Condition C, V_(ISO)= V_DS

V_DS= 400 V dc

V_DS= 500 V dc

2N7222, 2N7222U

Subgroup 10

22 devices

c = 0

Commutating diode for safe

operating area test procedure

for measuring dv/dt during

reverse recovery of power

MOSFET transistors or

insulated gate bipolar

transistors

Test conditions shall be derived by the

manufacturer.

See footnotes at end of table.

15

MIL-PRF-19500/596K

TABLE II. Group E inspection (all quality levels) for qualification or re-qualification only - Continued.

Inspection

MIL-STD-750

Conditions

Sample

plan

Method

3469

Subgroup 11

5 devices

c = 0

Repetitive avalanche energy

Peak current I_AR= I_D;

peak gate voltage V_GS= 10 V;

gate to source resistor, R_GS25 ≤ R_GS≤ 200

ohms

Temperature = T_J= +150°C +0, -10°C

Inductance =





V

− V



_DD mH minimum

2E_AR

BR









²

V_BR





I

(

)





D1



Number of pulses to be applied = 3.6 X 10⁸;

supply voltage (V_DD) = 50 V, time in

avalanche = 2 µs min., 20 µs max.

frequency = 500 Hz minimum.

Electrical measurements

See table I, subgroup 2

1/ A separate sample for each test may be pulled.

2/ Not required for 2N7218, 2N7218U, 2N7219, and 2N7219U.

16

MIL-PRF-19500/596K

FIGURE 4. Thermal impedance.

17

MIL-PRF-19500/596K

FIGURE 5. Maximum drain current versus case temperature graphs.

18

MIL-PRF-19500/596K

FIGURE 6. Safe operating area.

19

MIL-PRF-19500/596K

FIGURE 6. Safe operating area - Continued.

20

MIL-PRF-19500/596K

FIGURE 6. Safe operating area - Continued.

21

MIL-PRF-19500/596K

FIGURE 6. Safe operating area - Continued.

22

MIL-PRF-19500/596K

5. PACKAGING

5.1 Packaging. For acquisition purposes, the packaging requirements shall be as specified in the contract or order

(see 6.2). When packaging of materiel is to be performed by DoD or in-house contractor personnel, these personnel

need to contact the responsible packaging activity to ascertain packaging requirements. Packaging requirements are

maintained by the Inventory Control Point's packaging activities within the Military Service or Defense Agency, or

within the Military Service’s system commands. Packaging data retrieval is available from the managing Military

Department's or Defense Agency's automated packaging files, CD-ROM products, or by contacting the responsible

packaging activity.

6. NOTES

(This section contains information of a general or explanatory nature that may be helpful, but is not mandatory.

The notes specified in MIL-PRF-19500 are applicable to this specification.)

6.1 Intended use. Semiconductors conforming to this specification are intended for original equipment design

applications and logistic support of existing equipment.

6.2 Acquisition requirements. Acquisition documents should specify the following:

a. Title, number, and date of this specification.

b. Packaging requirements (see 5.1).

c. Lead formation and finish (see 3.4.1).

d. Product assurance level and type designator.

* 6.3 Qualification. With respect to products requiring qualification, awards will be made only for products which are,

at the time of award of contract, qualified for inclusion in Qualified Manufacturers List (QML 19500) whether or not

such products have actually been so listed by that date. The attention of the contractors is called to these

requirements, and manufacturers are urged to arrange to have the products that they propose to offer to the Federal

Government tested for qualification in order that they may be eligible to be awarded contracts or orders for the

products covered by this specification. Information pertaining to qualification of products may be obtained from

Defense Supply Center, Columbus, ATTN: DSCC/VQE, P.O. Box 3990, Columbus, OH 43218-3990 or e-mail

vqe.chief@dla.mil. An online listing of products qualified to this specification may be found in the Qualified Products

Database (QPD) at http://assist.dla.mil .

6.4 Suppliers of JANHC and JANKC die. The qualified die suppliers with the applicable letter version (example

JANHCA2N7218) will be identified on the QML.

JANC ordering information

Manufacturer

Military PIN

59993

2N7218

2N7219

2N7221

2N7222

JANHCA2N7218

JANHCA2N7219

JANHCA2N7221

JANHCA2N7222

JANKCA2N7218

JANKCA2N7219

JANKCA2N7221

JANKCA2N7222

23

MIL-PRF-19500/596K

6.5 Substitution information. Devices covered by this specification are substitutable for the manufacturer's and

user's Part or Identifying Number (PIN). This information in no way implies that manufacturer's PIN's are suitable as

a substitute for the military PIN.

Military PIN

2N7218

Manufacturer's CAGE

59993

Manufacturer's and user's PIN

IRFM 140

2N7219

59993

IRFM 240

2N7221

59993

IRFM 340

2N7222

59993

IRFM 440

2N7218U

2N7219U

2N7221U

2N7222U

59993

IRFN 140

59993

IRFN 240

59993

IRFN 340

59993

IRFN 440

6.6 Changes from previous issue. The margins of this specification are marked with asterisks to indicate where

changes from the previous issue were made. This was done as a convenience only and the Government assumes

no liability whatsoever for any inaccuracies in these notations. Bidders and contractors are cautioned to evaluate the

requirements of this document based on the entire content irrespective of the marginal notations and relationship to

the last previous issue.

Custodians:

Army - CR

Navy - EC

Air Force - 85

NASA - NA

DLA - CC

Preparing activity:

DLA - CC

(Project 5961-2013-005)

Review activities:

Army - MI, SM

Navy - AS, MC

Air Force - 19

NOTE: The activities listed above were interested in this document as of the date of this document. Since

organizations and responsibilities can change, you should verify the currency of the information above using the

ASSIST Online database at https://assist.dla.mil/ .

*

24


型号：	JANTXV2N7218U
厂家：	Infineon
描述：	100V Single N-Channel Hi-Rel MOSFET in a SMD-1 package - A JANTXV2N7218U with Hermetic Packaging 开关脉冲晶体管
文件：	总24页 (文件大小：349K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

JANTXV2N7218U [INFINEON]

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