IRU1075CM [INFINEON]
VOLT REGULATOR|ADJUSTABLE|+1.25 TO +5.5V|BIPOLAR|SIP|3PIN|PLASTIC ; VOLT稳压器|可调| 1.25至+ 5.5V |双极| SIP | 3PIN |塑料\n
| 型号： | IRU1075CM |
| 厂家： | 
Infineon |
| 描述： | VOLT REGULATOR|ADJUSTABLE|+1.25 TO +5.5V|BIPOLAR|SIP|3PIN|PLASTIC
|
| 文件： | 总6页 (文件大小：97K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Data Sheet No. PD94128
IRU1075
7.5A LOW DROPOUT POSITIVE
ADJUSTABLE REGULATOR
FEATURES
DESCRIPTION
1V Dropout at Full Load Current
Fast Transient Response
The IRU1075 is a low dropout three-terminal adjustable
regulator with minimum of 7.5A output current capabil-
ity. This product is specifically designed to provide well
regulated supply for low voltage IC applications such as
Pentium P54C , P55C as well as GTL+ termina-
tion for Pentium Pro and Klamath processor appli-
cations. The IRU1075 is also well suited for other pro-
cessors such as Cyrix , AMD and Power PC appli-
cations. The IRU1075 is guaranteed to have <1.2V drop-
out at full load current making it ideal to provide well
regulated outputs such as 3.3V with input supply volt-
age as low as 4.5V minimum.
1% Voltage Reference Initial Accuracy
Output Current Limiting
Built-In Thermal Shutdown
APPLICATIONS
Low Voltage Processor Applications such as:
P54C ,P55C , Cyrix M2 ,
POWER PC , AMD
GTL+ Termination
PENTIUM PRO , KLAMATH
Low Voltage Memory Termination Applications
Standard 3.3V Chip Set and Logic Applications
TYPICAL APPLICATION
5V
C1
1500uF
Vin
3
Vout 2
Adj 1
3.3V
IRU1075
R1
121
C2
2x 1500uF
R2
200
1075app1-1.0
Typical application of IRU1075 in a 5V to 3.3V regulator
Notes: Pentium P54C, P55C, Klamath, Pentium Pro, VRE are trademarks of Intel Corp. Cyrix M2 is trademark of Cyrix Corp.
Power PC is trademark of IBM Corp.
PACKAGE ORDER INFORMATION
Tj (°C)
3-PIN PLASTIC
3-PIN PLASTIC
3-PIN PLASTIC
Ultra Thin-Pak (P)
IRU1075CP
TO-220 (T)
TO-263 (M)
0 To 150
IRU1075CT
IRU1075CM
Rev. 1.1
06/29/01
1
IRU1075
ABSOLUTE MAXIMUM RATINGS
Input Voltage (Vin) .................................................... 7V
Power Dissipation ..................................................... Internally Limited
Storage Temperature Range ...................................... -65°C To 150°C
Operating Junction Temperature Range ..................... 0°C To 150°C
PACKAGE INFORMATION
3-PIN PLASTIC TO-220 (T)
3-PIN PLASTIC TO-263 (M)
3-PIN PLASTIC ULTRA THIN-PAK (P)
FRONT VIEW
FRONT VIEW
FRONT VIEW
3
3
Vin
Vout
Adj
3
Vin
Vin
Tab is
Vout
Tab is
Tab is
2
2
2
Vout
Vout
Vout
Vout
1
1
1
Adj
Adj
θJT=2.7°C/W θJA=60°C/W
θJA=35°C/W for 1" Square pad
θJA=35°C/W for 1" Square pad
ELECTRICAL SPECIFICATIONS
Unless otherwise specified, these specifications apply over Cin=1µF, Cout=10µF, and Tj=0 to 150ꢀC.
Typical values refer to Tj=25ꢀC.
PARAMETER
SYM
TEST CONDITION
MIN
TYP
MAX
UNITS
Reference Voltage
Vref
Io=10mA, Tj=25ꢀC, (Vin-Vo)=1.5V 1.238 1.250 1.262
V
Io=10mA, (Vin-Vo)=1.5V
Io=10mA, 1.3V<(Vin-Vo)<7V
Vin=3.3V, Vadj=0, 10mA<Io<7.5A
Io=7.5A
Io=4A
Vin=3.3V, dVo=100mV
Vin=3.3V, Vadj=0V
1.225 1.250 1.275
Line Regulation
Load Regulation (Note 1)
Dropout Voltage
(Note 2)
0.2
0.4
%
%
V
1.0
0.92
9
1.2
1.1
∆Vo
Current Limit
7.6
60
A
mA
Minimum Load Current
(Note 3)
5
10
Thermal Regulation
Ripple Rejection
30ms Pulse, Vin-Vo=3V, Io=7.5A
f=120Hz, Co=25µF Tantalum,
Io=7.5A, Vin-Vo=3V
0.02
70
%/W
dB
Adjust Pin Current
Iadj Io=10mA, Vin-Vo=1.5V, Tj=25ꢀC,
Io=10mA, Vin-Vo=1.5V
55
0.2
120
5
µA
µA
%
Adjust Pin Current Change
Temperature Stability
Long Term Stability
Io=10mA, Vin-Vo=1.5V, Tj=25ꢀC
Vin=3.3V, Vadj=0V, Io=10mA
Tj=125ꢀC, 1000Hrs
0.5
0.3
%
RMS Output Noise
Tj=25ꢀC, 10Hz<f<10KHz
0.003
%V
Note 1: Low duty cycle pulse testing with Kelvin con- Note 3: Minimum load current is defined as the mini-
nections is required in order to maintain accurate data. mum current required at the output in order for the out-
put voltage to maintain regulation. Typically the resistor
Note 2: Dropout voltage is defined as the minimum dif- dividers are selected such that it automatically main-
ferential voltage between Vin and Vout required to main- tains this current.
tain regulation at Vout. It is measured when the output
voltage drops 1% below its nominal value.
Rev. 1.1
2
06/29/01
IRU1075
PIN DESCRIPTIONS
PIN # PIN SYMBOL
PIN DESCRIPTION
A resistor divider from this pin to the Vout pin and ground sets the output voltage.
1
Adj
2
Vout
The output of the regulator. A minimum of 10µF capacitor must be connected from this pin
to ground to insure stability.
3
Vin
The input pin of the regulator. Typically a large storage capacitor is connected from this
pin to ground to insure that the input voltage does not sag below the minimum drop out
voltage during the load transient response. This pin must always be 1.3V higher than Vout
in order for the device to regulate properly.
BLOCK DIAGRAM
Vin 3
2 Vout
+
+
1.25V
CURRENT
LIMIT
THERMAL
SHUTDOWN
1 Adj
1075blk1-1.0
Figure 2 - Simplified block diagram of the IRU1075
APPLICATION INFORMATION
Introduction
The IRU1075 adjustable Low Dropout (LDO) regulator nanoseconds at the processor pins, which translates to
is a three-terminal device which can easily be pro- an approximately 300 to 500ns current step at the regu-
grammed with the addition of two external resistors to lator. In addition, the output voltage tolerances are also
any voltages within the range of 1.25 to 5.5 V. This regu- extremely tight and they include the transient response
lator unlike the first generation of the three-terminal regu- as part of the specification. For example Intel VRE
lators such as LM117 that required 3V differential be- specification calls for a total of ±100mV including initial
tween the input and the regulated output, only needs tolerance, load regulation and 0 to 4.6A load step.
1.3V differential to maintain output regulation. This is a
key requirement for today’s microprocessors that need The IRU1075 is specifically designed to meet the fast
typically 3.3V supply and are often generated from the current transient needs as well as providing an accurate
5V supply. Another major requirement of these micro- initial voltage, reducing the overall system cost with the
processors such as the Intel P54C is the need to switch need for fewer output capacitors.
the load current from zero to several amps in tens of
Rev. 1.1
3
06/29/01
IRU1075
Output Voltage Setting
regulator and the load is gained up by the factor of (1+R2/
R1), or the effective resistance will be, Rp(eff)=Rp*(1+R2/
R1). It is important to note that for high current applica-
tions, this can represent a significant percentage of the
overall load regulation and one must keep the path from
the regulator to the load as short as possible to mini-
mize this effect.
The IRU1075 can be programmed to any voltages in the
range of 1.25V to 5.5V with the addition of R1 and R2
external resistors according to the following formula:
R2
VOUT = VREF × o1 +
p + IADJ × R2
R1
Where:
VREF = 1.25V Typically
PARASITIC LINE
RESISTANCE
IADJ = 50µA Typically
Rp
R1 and R2 as shown in figure 3:
Vin
Vout
Vin
IRU1075
Vin
Vout
Vin
Vout
R
L
Adj
R1
R2
IRU1075
Adj
R1
R2
Vref
IAdj = 50uA
1075app3-1.0
1075app2-1.0
Figure 4 - Schematic showing connection
for best load regulation
Figure 3 - Typical application of the IRU1075
for programming the output voltage
Stability
The IRU1075 keeps a constant 1.25V between the out- The IRU1075 requires the use of an output capacitor as
put pin and the adjust pin. By placing a resistor R1 across part of the frequency compensation in order to make the
these two pins a constant current flows through R1, add- regulator stable. Typical designs for microprocessor ap-
ing to the Iadj current and into the R2 resistor producing plications use standard electrolytic capacitors with a
a voltage equal to the (1.25/R1)*R2 + Iadj*R2 which will typical ESR in the range of 50 to 100 mΩ and an output
be added to the 1.25V to set the output voltage. This is capacitance of 500 to 1000µF. Fortunately as the ca-
summarized in the above equation. Since the minimum pacitance increases, the ESR decreases resulting in a
load current requirement of the IRU1075 is 10mA, R1 is fixed RC time constant. The IRU1075 takes advantage
typically selected to be 121Ω resistor so that it auto- of this phenomena in making the overall regulator loop
matically satisfies the minimum current requirement. stable. For most applications a minimum of 100µF alu-
Notice that since Iadj is typically in the range of 50µA it minum electrolytic capacitor such as Sanyo MVGX se-
only adds a small error to the output voltage and should ries, Panasonic FA series as well as the Nichicon PL
only be considered when a very precise output voltage series insures both stability and good transient response.
setting is required. For example, in a typical 3.3V appli-
cation where R1=121Ω and R2=200Ω the error due to Thermal Design
Iadj is only 0.3% of the nominal set point.
The IRU1075 incorporates an internal thermal shutdown
that protects the device when the junction temperature
exceeds the maximum allowable junction temperature.
Load Regulation
Since the IRU1075 is only a three-terminal device, it is Although this device can operate with junction tempera-
not possible to provide true remote sensing of the output tures in the range of 150ꢀC, it is recommended that the
voltage at the load. Figure 4 shows that the best load selected heat sink be chosen such that during maxi-
regulation is achieved when the bottom side of R2 is mum continuous load operation the junction tempera-
connected to the load and the top side of R1 resistor is ture is kept below this number. The example below
connected directly to the case or the Vout pin of the shows the steps in selecting the proper regulator heat
regulator and not to the load. In fact, if R1 is connected sink for the worst case current consumption using Intel
to the load side, the effective resistance between the 200MHz microprocessor as the load.
Rev. 1.1
4
06/29/01
IRU1075
Assuming the following specifications:
4) With the maximum heat sink temperature calculated
in the previous step, the heat-sink-to-air thermal re-
sistance (θSA) is calculated by first calculating the
temperature rise above the ambient as follows:
VIN = 5V
VOUT = 3.5V
IOUT(MAX) = 4.6A
TA = 35ꢀC
∆T = TS - TA = 116 - 35 = 81ꢀC
The steps for selecting a proper heat sink to keep the
junction temperature below 135°C is given as:
∆T = Temperature Rise Above Ambient
∆T
81
θSA =
=
= 11.7ꢀC/W
PD
6.9
1) Calculate the maximum power dissipation using:
5) Next, a heat sink with lower θsa than the one calcu-
lated in Step 4 must be selected. One way to do this
is to simply look at the graphs of the “Heat Sink Temp
Rise Above the Ambient” vs. the “Power Dissipation”
and select a heat sink that results in lower tempera-
ture rise than the one calculated in previous step.
The following heat sinks from AAVID and Thermalloy
meet this criteria.
PD = IOUT × (VIN - VOUT)
PD = 4.6 × (5 - 3.5) = 6.9W
2) Select a package from the regulator data sheet and
record its junction to case (or tab) thermal resistance.
Selecting TO-220 package gives us:
θJC = 2.7ꢀC/W
Air Flow (LFM)
3) Assuming that the heat sink is black anodized, cal-
culate the maximum heat sink temperature allowed:
0
100
200
300
400
Thermalloy
AAVID
6021PB 6021PB 6073PB 6109PB 7141D
534202B 534202B 507302 575002 576802B
Assume, θcs = 0.05°C/W (heat-sink-to-case ther-
mal resistance for black anodized)
TS = TJ - PD × (θJC + θCS)
TS = 135 - 6.9 × (2.7 + 0.05) = 116ꢀC
Rev. 1.1
06/29/01
5
IRU1075
Notes
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TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information.
Data and specifications subject to change without notice. 02/01
Rev. 1.1
06/29/01
6
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