IRL3215 [INFINEON]
HEXFET Power MOSFET; HEXFET功率MOSFET型号: | IRL3215 |
厂家: | Infineon |
描述: | HEXFET Power MOSFET |
文件: | 总8页 (文件大小:137K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
PD- 91792
IRL3215
HEXFET® Power MOSFET
l Advanced Process Technology
l Ultra Low On-Resistance
l Dynamic dv/dt Rating
D
VDSS = 150V
l 175°C Operating Temperature
l Fast Switching
RDS(on) = 0.166 Ω
G
l Fully Avalanche Rated
ID = 12Aꢀ
S
Description
Fifth Generation HEXFETs from International Rectifier utilize advanced
processing techniques to achieve extremely low on-resistance per silicon area.
This benefit, combined with the fast switching speed and ruggedized device
design that HEXFET Power MOSFETs are well known for, provides the
designer with an extremely efficient and reliable device for use in a wide variety
of applications.
The TO-220 package is universally preferred for all commercial-industrial
applications at power dissipation levels to approximately 50 watts. The low
thermal resistance and low package cost of the TO-220 contribute to its wide
acceptance throughout the industry.
TO-220AB
Absolute Maximum Ratings
Parameter
Max.
12 ꢀ
8.5
Units
ID @ TC = 25°C
ID @ TC = 100°C
IDM
Continuous Drain Current, VGS @ 10V
Continuous Drain Current, VGS @ 10V
Pulsed Drain Current
A
48
PD @TC = 25°C
PowerDissipation
80
W
W/°C
V
LinearDeratingFactor
0.53
±16
VGS
EAS
IAR
Gate-to-SourceVoltage
Single Pulse Avalanche Energy
AvalancheCurrent
130
mJ
A
7.2
EAR
dv/dt
TJ
RepetitiveAvalancheEnergy
Peak Diode Recovery dv/dt
OperatingJunctionand
8.0
mJ
V/ns
5.0
-55 to + 175
TSTG
Storage Temperature Range
Soldering Temperature, for 10 seconds
Mounting torque, 6-32 or M3 srew
°C
300 (1.6mm from case )
10 lbf•in (1.1N•m)
Thermal Resistance
Parameter
Junction-to-Case
Typ.
–––
Max.
1.9
Units
RθJC
RθCS
RθJA
Case-to-Sink, Flat, Greased Surface
Junction-to-Ambient
0.50
–––
–––
62
°C/W
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1
3/23/99
IRL3215
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Parameter
Min. Typ. Max. Units
150 ––– –––
––– 0.20 ––– V/°C Reference to 25°C, ID = 1mA
Conditions
V(BR)DSS
Drain-to-SourceBreakdownVoltage
V
VGS = 0V, ID = 250µA
∆V(BR)DSS/∆TJ BreakdownVoltageTemp.Coefficient
––– ––– 0.166
––– ––– 0.184
––– ––– 0.208
VGS = 10V, ID = 7.2A
VGS = 5.0V, ID = 7.2A
VGS = 4.0V, ID = 6A
VDS = VGS, ID = 250µA
VDS = 25V, ID = 7.2A
VDS = 150V, VGS = 0V
VDS = 120V, VGS = 0V, TJ = 150°C
VGS = 16V
RDS(on)
StaticDrain-to-SourceOn-Resistance
Ω
VGS(th)
gfs
GateThresholdVoltage
1.0
8.3
––– 2.0
––– –––
V
S
ForwardTransconductance
––– ––– 25
––– ––– 250
––– ––– 100
––– ––– -100
––– ––– 35
––– ––– 4.1
––– ––– 21
IDSS
IGSS
Drain-to-SourceLeakageCurrent
µA
nA
Gate-to-SourceForwardLeakage
Gate-to-SourceReverseLeakage
Total Gate Charge
VGS = -16V
Qg
ID = 7.2A
Qgs
Qgd
td(on)
tr
Gate-to-SourceCharge
Gate-to-Drain("Miller")Charge
Turn-On Delay Time
Rise Time
nC VDS = 120V
VGS = 5.0V, See Fig. 6 and 13
–––
–––
–––
–––
7.4 –––
45 –––
38 –––
36 –––
VDD = 75V
ID = 7.2A
ns
td(off)
tf
Turn-Off Delay Time
FallTime
RG = 12Ω, VGS = 5.0V
RD = 10.2Ω, See Fig. 10
Betweenlead,
D
LD
LS
InternalDrainInductance
InternalSourceInductance
–––
4.5
–––
nH
6mm(0.25in.)
G
frompackage
––– 7.5 –––
and center of die contact
VGS = 0V
S
Ciss
Coss
Crss
InputCapacitance
––– 775 –––
––– 140 –––
OutputCapacitance
pF
VDS = 25V
ReverseTransferCapacitance
–––
70 –––
ƒ = 1.0MHz, See Fig. 5
Source-Drain Ratings and Characteristics
Parameter
Continuous Source Current
(Body Diode)
Min. Typ. Max. Units
Conditions
MOSFET symbol
showing the
D
IS
––– –––
––– –––
12ꢀ
A
G
ISM
Pulsed Source Current
(Body Diode)
integral reverse
48
S
p-n junction diode.
VSD
trr
DiodeForwardVoltage
Reverse Recovery Time
Reverse RecoveryCharge
Forward Turn-On Time
––– ––– 1.3
––– 160 240
V
TJ = 25°C, IS = 7.2A, VGS = 0V
TJ = 25°C, IF = 7.2A
ns
Qrr
ton
––– 810 1210 nC
di/dt = 100A/µs
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Notes:
Repetitive rating; pulse width limited by
Pulse width ≤ 300µs; duty cycle ≤ 2%.
max. junction temperature. ( See fig. 11 )
Starting TJ = 25°C, L = 4.9mH
RG = 25Ω, IAS = 7.2A. (See Figure 12)
ꢀCaculated continuous current based on maximum allowable
junction temperature;for recommended current-handling of the
package refer to Design Tip # 93-4
ISD ≤ 7.2A, di/dt ≤ 100A/µs, VDD ≤ V(BR)DSS
TJ ≤ 175°C
,
2
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IRL3215
10
10
VGS
VGS
TOP
15V
TOP
15V
10V
5V
10V
5V
4.5V
4.5V
3.5V
3.5V
3V
3V
2.75V
2.75V
BOTTOM 2.50V
BOTTOM 2.50V
1
1
2.5V
2.5V
0.1
0.01
0.1
20µs PULSE WIDTH
°
20µs PULSE WIDTH
°
T = 25 C
J
T = 175 C
J
0.01
0.1
1
10
100
0.1
1
10
100
V
, Drain-to-Source Voltage (V)
V
, Drain-to-Source Voltage (V)
DS
DS
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
3.0
10
12A
=
I
D
°
T = 25 C
J
2.5
2.0
1.5
1.0
0.5
0.0
°
T = 175 C
J
1
V
= 50V
DS
20µs PULSE WIDTH
V
= 10V
GS
0.1
2.0
3.0
4.0
5.0 6.0
7.0
-60 -40 -20
0
20 40 60 80 100 120 140 160 180
°
V
, Gate-to-Source Voltage (V)
T , Junction Temperature ( C)
J
GS
Fig 3. Typical Transfer Characteristics
Fig 4. Normalized On-Resistance
Vs. Temperature
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3
IRL3215
15
10
5
2500
I
D
= 7.2 A
V
= 0V,
f = 1MHz
C SHORTED
ds
GS
C
= C + C
iss
gs
gd
gd ,
V
V
V
= 120V
= 75V
= 30V
DS
DS
DS
C
= C
rss
C
= C + C
gd
2000
oss
ds
C
iss
1500
1000
500
0
C
oss
C
rss
FOR TEST CIRCUIT
SEE FIGURE 13
0
0
10
Q
20
30
40
50
1
10
100
, Total Gate Charge (nC)
V
, Drain-to-Source Voltage (V)
G
DS
Fig 6. Typical Gate Charge Vs.
Fig 5. Typical Capacitance Vs.
Gate-to-Source Voltage
Drain-to-Source Voltage
100
10
1
1000
100
10
OPERATION IN THIS AREA LIMITED
BY R
DS(on)
10us
100us
°
T = 175 C
J
1ms
1
10ms
°
°
T = 25 C
J
T = 25 C
C
°
T = 175 C
Single Pulse
J
V
= 0 V
GS
0.1
0.1
0.2
1
10
100
1000
0.4
0.6
0.8
1.0
1.2
V
, Drain-to-Source Voltage (V)
V
,Source-to-Drain Voltage (V)
DS
SD
Fig 8. Maximum Safe Operating Area
Fig 7. Typical Source-Drain Diode
Forward Voltage
4
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IRL3215
RD
12
9
VDS
VGS
10V
D.U.T.
RG
+VDD
-
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
6
Fig 10a. Switching Time Test Circuit
3
V
DS
90%
0
25
50
75
100
125
150
175
°
, Case Temperature ( C)
T
C
10%
V
GS
t
t
r
t
t
f
Fig 9. Maximum Drain Current Vs.
d(on)
d(off)
Case Temperature
Fig 10b. Switching Time Waveforms
10
D = 0.50
0.20
1
0.10
0.05
P
DM
0.1
0.02
0.01
SINGLE PULSE
(THERMAL RESPONSE)
t
1
t
2
Notes:
1. Duty factor D =
t / t
1 2
2. Peak T = P
x Z
+ T
C
J
DM
thJC
0.01
0.00001
0.0001
0.001
0.01
0.1
1
t , Rectangular Pulse Duration (sec)
1
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
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5
IRL3215
300
250
200
150
100
50
I
D
TOP
2.9A
5.1A
BOTTOM 7.2A
1 5V
DRIVER
L
V
G
DS
D.U.T
R
+
V
D D
-
I
A
AS
20V
0.01
Ω
t
p
Fig 12a. Unclamped Inductive Test Circuit
0
25
50
75
100
125
150
175
°
Starting T , Junction Temperature ( C)
J
V
(BR)DSS
t
p
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
I
AS
Current Regulator
Fig 12b. Unclamped Inductive Waveforms
Same Type as D.U.T.
50KΩ
.2µF
12V
Q
G
.3µF
+
10 V
V
DS
D.U.T.
-
Q
Q
GD
GS
V
GS
V
G
3mA
I
I
D
G
Charge
Current Sampling Resistors
Fig 13b. Gate Charge Test Circuit
Fig 13a. Basic Gate Charge Waveform
6
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IRL3215
Peak Diode Recovery dv/dt Test Circuit
+
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
D.U.T
-
+
-
-
+
RG
• dv/dt controlled by RG
+
-
• Driver same type as D.U.T.
• ISD controlled by Duty Factor "D"
• D.U.T. - Device Under Test
VDD
Driver Gate Drive
P.W.
P.W.
Period
Period
D =
V
=10V
*
GS
D.U.T. I Waveform
SD
Reverse
Recovery
Current
Body Diode Forward
Current
di/dt
D.U.T. V Waveform
DS
Diode Recovery
dv/dt
V
DD
Re-Applied
Voltage
Body Diode
Forward Drop
Inductor Curent
I
SD
Ripple ≤ 5%
* VGS = 5V for Logic Level Devices
Fig 14. For N-Channel HEXFETS
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7
IRL3215
Package Outline
TO-220AB Outline
Dimensions are shown in millimeters (inches)
10.54 (.415)
10.29 (.405)
- B
-
3.78 (.149)
3.54 (.139)
2.87 (.113)
2.62 (.103)
4.69 (.185)
4.20 (.165)
1.32 (.052)
1.22 (.048)
- A
-
6.47 (.255)
6.10 (.240)
4
15.24 (.600)
14.84 (.584)
1.15 (.045)
M IN
LEAD ASSIG NM ENTS
1
2
3
4
- GATE
1
2
3
- DRAIN
- SOU RC E
- DRAIN
14.09 (.555)
13.47 (.530)
4.06 (.160)
3.55 (.140)
0.93 (.037)
0.69 (.027)
0.55 (.022)
0.46 (.018)
3X
3X
1.40 (.055)
3X
1.15 (.045)
0.36 (.014)
M
B
A
M
2.92 (.115)
2.64 (.104)
2.54 (.100)
2X
N OTES:
1
2
D IM ENSIONING
&
TOLERANCING PER ANSI Y14.5M , 1982.
3
4
OUTLINE CONFORM S TO JEDEC OUTLINE TO-220AB.
HEATSINK LEAD M EASUREM ENTS DO NOT INCLU DE BURRS.
C ONTROLLING DIM ENSION : INCH
&
Part Marking Information
TO-220AB
EXAMPLE : THIS IS AN IR F1010
W ITH ASSEM BLY
A
INTERNATIONAL
RECTIFIER
LOGO
PART NU M BER
LOT C ODE 9B1M
IR F1010
9246
9B
1M
D ATE COD E
(YYW W )
ASSEMBLY
LOT
CO DE
YY
=
YEAR
= W EEK
W W
WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, Tel: (310) 322 3331
IR GREAT BRITAIN: Hurst Green, Oxted, Surrey RH8 9BB, UK Tel: ++ 44 1883 732020
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Data and specifications subject to change without notice. 3/99
8
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