IRFS7762PBF_15_技术文档

StrongIRFET™

IRFS7762PbF

IRFSL7762PbF

HEXFET^®Power MOSFET

Application

 Brushed motor drive applications

 BLDC motor drive applications

 Battery powered circuits

 Half-bridge and full-bridge topologies

 Synchronous rectifier applications

 Resonant mode power supplies

 OR-ing and redundant power switches

 DC/DC and AC/DC converters

 DC/AC inverters

D

V_DSS

75V

R_DS(on)typ.

5.6m

6.7m

85A

G

max

I_D

S

D

Benefits

S

D

 Improved gate, avalanche and dynamic dV/dt ruggedness

 Fully characterized capacitance and avalanche SOA

 Enhanced body diode dV/dt and dI/dt capability

 Lead-free, RoHS compliant

G

TO-262

IRFSL7762PbF

D2Pak

IRFS7762PbF

G

D

S

Gate

Drain

Source

Standard Pack

Form

Base part number

IRFSL7762PbF

IRFS7762PbF

Package Type

TO-262

Orderable Part Number

Quantity

Tube

50

IRFSL7762PbF

IRFS7762PbF

D²-Pak

Tape and Reel Left

800

IRFS7762TRLPbF

18

16

14

12

10

8

100

80

60

40

20

0

I

= 51A

D

T

= 125°C

J

T

= 25°C

J

6

4

6

8

10 12 14 16 18 20

25

50

75

100

125

150

175

T

, Case Temperature (°C)

C

V

Gate -to -Source Voltage (V)

GS,

Fig 2. Maximum Drain Current vs. Case Temperature

Fig 1. Typical On-Resistance vs. Gate Voltage

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IRFS/SL7762PbF

Absolute Maximum Rating

Symbol

Parameter

Max.

85

Units

I_D@ T_C= 25°C

Continuous Drain Current, V_GS@ 10V

I_D@ T_C= 100°C Continuous Drain Current, V_GS@ 10V

60

A

I_DM

Pulsed Drain Current 

Maximum Power Dissipation

Linear Derating Factor

335

140

P_D@T_C= 25°C

W

W/°C

V

0.95

± 20

V_GS

Gate-to-Source Voltage

T_J

T_STG

Operating Junction and

Storage Temperature Range

Soldering Temperature, for 10 seconds (1.6mm from case)

-55 to + 175

300

°C

Avalanche Characteristics

Symbol

E_{AS (Thermally limited)}

I_AR

Max.

160

243

Units

Parameter

Single Pulse Avalanche Energy 

Single Pulse Avalanche Energy 

Avalanche Current 

mJ

A

mJ

See Fig 15, 16, 23a, 23b

E_AR

Repetitive Avalanche Energy 

Thermal Resistance

Symbol

Parameter

Typ.

–––

Max.

1.05

40

Units

Junction-to-Case 

R_JC

R_JA

°C/W

Junction-to-Ambient (PCB Mount) 

Static @ T_J= 25°C (unless otherwise specified)

Symbol

Parameter

Min. Typ. Max. Units

Conditions

V_(BR)DSS

Drain-to-Source Breakdown Voltage

Breakdown Voltage Temp. Coefficient

Static Drain-to-Source On-Resistance

75

––– –––

V

V_GS= 0V, I_D= 250µA

–––

2.1 –––

––– –––

––– ––– 150

––– ––– 100

––– ––– -100

58

5.6

6.6

––– mV/°C Reference to 25°C, I_D= 1mA

V_(BR)DSS/T_J

R_DS(on)

6.7

–––

3.7

1.0

V

_GS= 10V, I_D= 51A 

_GS= 6.0V, I_D= 26A 

m

V

V_GS(th)

I_DSS

Gate Threshold Voltage

V_DS= V_GS, I_D= 100µA

_DS= 75V, V_GS= 0V

V_DS= 75V,V_GS= 0V,T_J= 125°C

V

Drain-to-Source Leakage Current

µA

Gate-to-Source Forward Leakage

Gate-to-Source Reverse Leakage

Gate Resistance

V

_GS= 20V

_GS= -20V

I_GSS

R_G

nA

–––

2.5

–––



Notes:

Repetitive rating; pulse width limited by max. junction temperature.

 Limited by T_Jmax, starting T_J= 25°C, L = 120µH, R_G= 50, I_AS= 51A, V_GS=10V.

I_SD 51A, di/dt  735A/µs, V_DD V_(BR)DSS, T_J175°C.

Pulse width  400µs; duty cycle  2%.

 C_osseff. (TR) is a fixed capacitance that gives the same charging time as C_osswhile V_DSis rising from 0 to 80% V_DSS

.

 C_osseff. (ER) is a fixed capacitance that gives the same energy as C_osswhile V_DSis rising from 0 to 80% V_DSS

.

 R_is measured at T_Japproximately 90°C.

 Limited by T_Jmax, starting T_J= 25°C, L = 1mH, R_G= 50, I_AS= 22A, V_GS=10V.

 When mounted on 1" square PCB (FR-4 or G-10 Material). For recommended footprint and soldering techniques

refer to application note #AN-994: http://www.irf.com/technical-info/appnotes/an-994.pdf

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IRFS/SL7762PbF

Dynamic Electrical Characteristics @ T_J= 25°C (unless otherwise specified)

Symbol

Parameter

Min.

Typ. Max. Units

Conditions

gfs

Q_g

Forward Transconductance

Total Gate Charge

180

–––

85

21

26

60

11

49

–––

130

–––

S

V_DS= 10V, I_D= 51A

I_D= 51A

Q_gs

Q_gd

Q_sync

t_d(on)

t_r

Gate-to-Source Charge

Gate-to-Drain Charge

Total Gate Charge Sync. (Qg – Qgd)

Turn-On Delay Time

V_DS= 38V

nC

V_GS= 10V

V_DD= 38V

I_D= 51A

Rise Time

ns

t_d(off)

t_f

Turn-Off Delay Time

Fall Time

–––

57

40

–––

R_G= 2.7

V_GS= 10V 

C_iss

C_oss

C_rss

Input Capacitance

Output Capacitance

Reverse Transfer Capacitance

4440

370

230

V_GS= 0V

V_DS= 25V

ƒ = 1.0MHz, See Fig.7

pF

Effective Output Capacitance

(Energy Related)

C_{oss eff.(ER)}

C_{oss eff.(TR)}

–––

330

430

–––

V_GS= 0V, V_DS= 0V to 60V

V_GS= 0V, V_DS= 0V to 60V

Output Capacitance (Time Related)

Diode Characteristics

Symbol

Parameter

Min.

Typ. Max. Units

Conditions

MOSFET symbol

showing the

integral reverse

p-n junction diode.

Continuous Source Current

(Body Diode)

D

I_S

–––

85

A

G

Pulsed Source Current

(Body Diode)

I_SM

–––

335

1.2

S

V_SD

Diode Forward Voltage

V

T_J= 25°C,I_S= 51A,V_GS= 0V 

dv/dt

Peak Diode Recovery dv/dt

–––

13

34

46

54

69

2.7

––– V/ns T_J= 175°C,I_S= 51A,V_DS= 75V

–––

T_J= 25°C

V_DD= 64V

I_F= 51A,

t_rr

Reverse Recovery Time

ns

T_J= 125°C

T_J= 25°C di/dt = 100A/µs 

Q_rr

Reverse Recovery Charge

Reverse Recovery Current

nC

A

T_J= 125°C

T_J= 25°C



I_RRM

3

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IRFS/SL7762PbF

1000

100

10

1000

100

10

VGS

15V

10V

8.0V

7.0V

6.0V

5.5V

5.0V

4.5V

VGS

15V

10V

8.0V

7.0V

6.0V

5.5V

5.0V

4.5V

TOP

BOTTOM

4.5V

60µs PULSE WIDTH

Tj = 25°C

60µs PULSE WIDTH



Tj = 175°C



1

0.1

1

10

100

0.1

1

10

100

V

, Drain-to-Source Voltage (V)

V

, Drain-to-Source Voltage (V)

DS

Fig 3. Typical Output Characteristics

Fig 4. Typical Output Characteristics

1000

100

10

3.0

2.5

2.0

1.5

1.0

0.5

I

= 51A

D

V

= 10V

GS

T = 175°C

J

T = 25°C

J

1

V

= 25V

DS

60µs PULSE WIDTH



0.1

2.0

3.0

4.0

5.0

6.0

7.0

-60 -40 -20

0 20 40 60 80 100120140160180

V

, Gate-to-Source Voltage (V)

T , Junction Temperature (°C)

GS

J

Fig 5. Typical Transfer Characteristics

Fig 6. Normalized On-Resistance vs. Temperature

100000

10000

1000

14.0

V

= 0V,

f = 1 MHZ

GS

I = 51A

D

C

= C + C , C

SHORTED

iss

gs

gd

ds

12.0

= C

rss

oss

gd

V

= 60V

DS

= 38V

DS

= 15V

DS

= C + C

ds

gd

10.0

8.0

6.0

4.0

2.0

0.0

C

iss

C

oss

C

rss

100

1

10

100

0

20

40

60

80

100

120

V

, Drain-to-Source Voltage (V)

DS

Q , Total Gate Charge (nC)

G

Fig 8. Typical Gate Charge vs.

Fig 7. Typical Capacitance vs. Drain-to-Source Voltage

Gate-to-Source Voltage

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IRFS/SL7762PbF

1000

100

10

100µsec

1msec

100

10

1

T = 175°C

J

OPERATION

IN THIS

AREA

LIMITED BY

T = 25°C

J

R

(on)

DS

10msec

DC

Tc = 25°C

Tj = 175°C

Single Pulse

V

= 0V

1.2

GS

1.0

0.1

0.2

0.4

V

0.6

0.8

1.0

1.4

0.1

1

10

, Source-to-Drain Voltage (V)

V

, Drain-toSource Voltage (V)

SD

DS

Fig 10. Maximum Safe Operating Area

Fig 9. Typical Source-Drain Diode Forward Voltage

0.9

95

Id = 1.0mA

0.8

0.7

0.6

0.5

0.4

0.3

0.2

0.1

0.0

90

85

80

75

-10

0

10 20 30 40 50 60 70 80

-60 -40 -20

0

20 40 60 80 100120140160180

, Temperature ( °C )

T

J

V

Drain-to-Source Voltage (V)

DS,

Fig 11. Drain-to-Source Breakdown Voltage

Fig 12. Typical C_ossStored Energy

18.0

16.0

14.0

Vgs = 5.5V

Vgs = 6.0V

Vgs = 7.0V

Vgs = 8.0V

Vgs = 10V

12.0

10.0

8.0

6.0

4.0

0

20 40 60 80 100 120 140 160 180 200

, Drain Current (A)

I

D

Fig 13. Typical On-Resistance vs. Drain Current

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IRFS/SL7762PbF

10

1

D = 0.50

0.20

0.10

0.1

0.05

0.02

0.01

Notes:

SINGLE PULSE

1. Duty Factor D = t1/t2

2. Peak Tj = P dm x Zthjc + Tc

( THERMAL RESPONSE )

0.001

1E-006

1E-005

0.0001

0.001

0.01

0.1

1

t

, Rectangular Pulse Duration (sec)

1

Fig 14. Maximum Effective Transient Thermal Impedance, Junction-to-Case

1000

100

10

Allowed avalanche Current vs avalanche

pulsewidth, tav, assuming Tj = 150°C and

Tstart = 25°C (Single Pulse)

Allowed avalanche Current vs avalanche

pulsewidth, tav, assuming j = 25°C and

Tstart = 150°C.

1

0.1

1.0E-06

1.0E-05

1.0E-04

tav (sec)

1.0E-03

1.0E-02

Fig 15. Avalanche Current vs. Pulse Width

200

160

120

80

TOP

BOTTOM 1.0% Duty Cycle

= 51A

Single Pulse

Notes on Repetitive Avalanche Curves , Figures 15, 16:

(For further info, see AN-1005 at www.irf.com)

1.Avalanche failures assumption:

I

D

Purely a thermal phenomenon and failure occurs at a

temperature far in excess of T_jmax. This is validated for every

part type.

2. Safe operation in Avalanche is allowed as long asT_jmaxis not

exceeded.

3. Equation below based on circuit and waveforms shown in Figures

23a, 23b.

4. P_{D (ave)}= Average power dissipation per single avalanche pulse.

5. BV = Rated breakdown voltage (1.3 factor accounts for voltage

increase during avalanche).

40

6. I_av= Allowable avalanche current.

7. T = Allowable rise in junction temperature, not to exceed T_jmax

(assumed as 25°C in Figure 15, 16).

0

t_av= Average time in avalanche.

D = Duty cycle in avalanche = tav ·f

Z_thJC(D, t_av) = Transient thermal resistance, see Figures 13)

25

50

75

100

125

150

175

Starting T , Junction Temperature (°C)

J

PD (ave) = 1/2 ( 1.3·BV·I_av) = T/ Z_thJC

I

_av= 2T/ [1.3·BV·Z_th]

Fig 16. Maximum Avalanche Energy vs. Temperature

E_{AS (AR)}= P_{D (ave)· av}

t

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IRFS/SL7762PbF

4.0

3.5

3.0

2.5

2.0

1.5

1.0

0.5

20

15

10

5

I = 34A

F

V

= 64V

R

T = 25°C

J

T = 125°C

J

I

= 100µA

= 250µA

= 1.0mA

= 1.0A

D

I

D

I

D

I

D

0

-75 -50 -25

0

25 50 75 100 125 150 175

0

200

400

600

800

1000

T , Temperature ( °C )

di /dt (A/µs)

J

F

Fig 18. Typical Recovery Current vs. dif/dt

Fig 17. Threshold Voltage vs. Temperature

400

20

I = 34A

I = 51A

F

V

= 64V

V

= 64V

R

T = 25°C

J

T = 125°C

J

T = 25°C

J

T = 125°C

J

300

200

100

0

15

10

5

0

200

400

600

800

1000

0

200

400

600

800

1000

di /dt (A/µs)

F

Fig 19. Typical Recovery Current vs. dif/dt

Fig 20. Typical Stored Charge vs. dif/dt

300

I = 51A

F

V

= 64V

R

250

200

150

100

50

T = 25°C

J

T = 125°C

J

0

200

400

600

800

1000

di /dt (A/µs)

F

Fig 21. Typical Stored Charge vs. dif/dt

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IRFS/SL7762PbF

Fig 22. Peak Diode Recovery dv/dt Test Circuit for N-Channel HEXFET^®Power MOSFETs

V

(BR)DSS

15V

t

p

DRIVER

+

L

V

DS

D.U.T

AS

R

G

V

DD

-

I

A

20V

0.01



t

p

I

AS

Fig 23a. Unclamped Inductive Test Circuit

Fig 23b. Unclamped Inductive Waveforms

Fig 24a. Switching Time Test Circuit

Fig 24b. Switching Time Waveforms

Id

Vds

Vgs

VDD

Vgs(th)

Qgs1

Qgs2

Qgd

Qgodr

Fig 25b. Gate Charge Waveform

Fig 25a. Gate Charge Test Circuit

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IRFS/SL7762PbF

TO-262 Package Outline (Dimensions are shown in millimeters (inches)

TO-262 Part Marking Information

EXAMPLE: THISIS AN IRL3103L

LOTCODE1789

PART NUMBER

INTERNATIONAL

ASSEMBLED ON WW19, 1997

RECTIFIER

INTHEASSEMBLYLINE"C"

LOGO

DATE CODE

YEAR7 = 1997

WEEK 19

ASSEMBLY

LOT CODE

LINEC

OR

PART NUMBER

INTERNATIONAL

RECTIFIER

LOGO

DATE CODE

P = DESIGNATES LEAD-FREE

PRODUCT (OPTIONAL)

YEAR7 = 1997

ASSEMBLY

LOT CODE

WEEK 19

A = ASSEMBLYSITE CODE

Note: For the most current drawing please refer to IR website at http://www.irf.com/package/

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IRFS/SL7762PbF

D²Pak (TO-263AB) Package Outline (Dimensions are shown in millimeters (inches))

D²Pak (TO-263AB) Part Marking Information

THIS IS AN IRF530S WITH

LOT CODE 8024

PART NUMBER

INTERNATIONAL

RECTIFIER

LOGO

ASSEMBLED ON WW 02, 2000

IN THE ASSEMBLY LINE "L"

F530S

DATE CODE

YEAR 0 = 2000

WEEK 02

ASSEMBLY

LOT CODE

LINE L

OR

PART NUMBER

INTERNATIONAL

RECTIFIER

LOGO

F530S

DATE CODE

P = DESIGNATES LEAD - FREE

PRODUCT (OPTIONAL)

ASSEMBLY

LOT CODE

YEAR 0 = 2000

WEEK 02

A = ASSEMBLY SITE CODE

Note: For the most current drawing please refer to IR website at http://www.irf.com/package/

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IRFS/SL7762PbF

D²Pak (TO-263AB) Tape & Reel Information (Dimensions are shown in millimeters (inches))

TRR

1.60 (.063)

1.50 (.059)

1.60 (.063)

1.50 (.059)

4.10 (.161)

3.90 (.153)

0.368 (.0145)

0.342 (.0135)

FEED DIRECTION

TRL

11.60 (.457)

11.40 (.449)

1.85 (.073)

1.65 (.065)

24.30 (.957)

23.90 (.941)

15.42 (.609)

15.22 (.601)

1.75 (.069)

1.25 (.049)

10.90 (.429)

10.70 (.421)

4.72 (.136)

4.52 (.178)

16.10 (.634)

15.90 (.626)

FEED DIRECTION

13.50 (.532)

12.80 (.504)

27.40 (1.079)

23.90 (.941)

4

330.00

(14.173)

MAX.

60.00 (2.362)

MIN.

30.40 (1.197)

MAX.

NOTES :

1. COMFORMS TO EIA-418.

2. CONTROLLING DIMENSION: MILLIMETER.

3. DIMENSION MEASURED @ HUB.

4. INCLUDES FLANGE DISTORTION @ OUTER EDGE.

26.40 (1.039)

24.40 (.961)

4

3

Note: For the most current drawing please refer to IR website at http://www.irf.com/package/

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IRFS/SL7762PbF

Qualification Information^†

Qualification Level

Industrial

(per JEDEC JESD47F) ^††

D²Pak

Moisture Sensitivity Level

RoHS Compliant

MSL1

TO-262

Yes

†

Qualification standards can be found at International Rectifier’s web site: http://www.irf.com/product-info/reliability/

†† Applicable version of JEDEC standard at the time of product release.

Revision History

Date

Comments

Updated E_{AS (L =1mH)}= 243mJ on page 2

Updated note 8 “Limited by T_Jmax, starting T_J= 25°C, L = 1mH, R_G= 50, I_AS= 22A, V_GS=10V” on page 2

2/19/2015

IR WORLD HEADQUARTERS: 101 N. Sepulveda Blvd., El Segundo, California 90245, USA

To contact International Rectifier, please visit http://www.irf.com/whoto-call/

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型号：	IRFS7762PBF_15
厂家：	Infineon
描述：	Brushed motor drive applications
文件：	总12页 (文件大小：618K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

IRFS7762PBF_15 [INFINEON]

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