IRFR3607TRLPBF [INFINEON]
Power Field-Effect Transistor, 80A I(D), 75V, 0.009ohm, 1-Element, N-Channel, Silicon, Metal-oxide Semiconductor FET, TO-252AA, LEAD FREE, PLASTIC, DPAK-3;型号: | IRFR3607TRLPBF |
厂家: | Infineon |
描述: | Power Field-Effect Transistor, 80A I(D), 75V, 0.009ohm, 1-Element, N-Channel, Silicon, Metal-oxide Semiconductor FET, TO-252AA, LEAD FREE, PLASTIC, DPAK-3 |
文件: | 总10页 (文件大小:369K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
PD - 97312
IRFR3607PbF
IRFU3607PbF
Applications
l High Efficiency Synchronous Rectification in
HEXFET® Power MOSFET
SMPS
l Uninterruptible Power Supply
l High Speed Power Switching
l Hard Switched and High Frequency Circuits
D
S
VDSS
RDS(on) typ.
max.
ID (Silicon Limited)
ID (Package Limited)
75V
7.34m
Ω
9.0m
Ω
G
80A
c
Benefits
l Improved Gate, Avalanche and Dynamic
56A
dv/dt Ruggedness
l Fully Characterized Capacitance and
Avalanche SOA
D
l Enhanced body diode dV/dt and dI/dt
Capability
S
S
D
G
G
D-Pak
IRFR3607PbF
I-Pak
IRFU3607PbF
G
D
S
Gate
Drain
Source
Absolute Maximum Ratings
Symbol
Parameter
Max.
Units
ID @ TC = 25°C
80c
Continuous Drain Current, VGS @ 10V (Silicon Limited)
ID @ TC = 100°C Continuous Drain Current, VGS @ 10V (Silicon Limited)
56c
A
ID @ TC = 25°C
IDM
Continuous Drain Current, VGS @ 10V (Wire Bond Limited)
Pulsed Drain Current d
56
310
PD @TC = 25°C
140
W
Maximum Power Dissipation
Linear Derating Factor
0.96
W/°C
V
VGS
20
Gate-to-Source Voltage
27
Peak Diode Recovery f
dv/dt
TJ
V/ns
°C
-55 to + 175
Operating Junction and
TSTG
Storage Temperature Range
Soldering Temperature, for 10 seconds
(1.6mm from case)
300
Avalanche Characteristics
Single Pulse Avalanche Energy e
EAS (Thermally limited)
120
46
mJ
A
Avalanche Currentꢀd
IAR
Repetitive Avalanche Energy g
EAR
14
mJ
Thermal Resistance
Symbol
Parameter
Junction-to-Case k
Junction-to-Ambient j
Junction-to-Ambient (PCB Mount)
Typ.
–––
–––
–––
Max.
1.045
50
Units
°C/W
RθJC
RθJA
RθJA
110
jk
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1
03/04/08
IRFR/U3607PbF
Static @ TJ = 25°C (unless otherwise specified)
Symbol
V(BR)DSS
Parameter
Drain-to-Source Breakdown Voltage
Breakdown Voltage Temp. Coefficient
Static Drain-to-Source On-Resistance
Gate Threshold Voltage
Min. Typ. Max. Units
75 ––– –––
––– 0.096 ––– V/°C Reference to 25°C, ID = 5mAd
Conditions
VGS = 0V, ID = 250µA
V
∆V(BR)DSS/∆TJ
RDS(on)
––– 7.34 9.0
VGS = 10V, ID = 46A g
mΩ
V
VGS(th)
2.0
–––
4.0
20
VDS = VGS, ID = 100µA
IDSS
Drain-to-Source Leakage Current
––– –––
µA
VDS = 75V, VGS = 0V
VDS = 60V, VGS = 0V, TJ = 125°C
VGS = 20V
V
––– ––– 250
––– ––– 100
––– ––– -100
IGSS
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
nA
GS = -20V
Dynamic @ TJ = 25°C (unless otherwise specified)
Symbol
gfs
Parameter
Forward Transconductance
Total Gate Charge
Min. Typ. Max. Units
170 ––– –––
Conditions
VDS = 50V, ID = 46A
S
Qg
–––
–––
–––
–––
–––
56
13
16
40
84
nC ID = 46A
VDS = 38V
Qgs
Qgd
Qsync
Gate-to-Source Charge
–––
–––
–––
Gate-to-Drain ("Miller") Charge
Total Gate Charge Sync. (Qg - Qgd)
V
GS = 10V g
ID = 46A, VDS =0V, VGS = 10V
RG(int)
td(on)
tr
Ω
Internal Gate Resistance
Turn-On Delay Time
Rise Time
0.55 –––
16 –––
–––
ns
VDD = 49V
––– 110 –––
ID = 46A
td(off)
tf
Turn-Off Delay Time
Fall Time
–––
–––
43
96
–––
–––
RG = 6.8Ω
VGS = 10V g
Ciss
Coss
Crss
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
––– 3070 –––
––– 280 –––
––– 130 –––
––– 380 –––
––– 610 –––
pF VGS = 0V
DS = 50V
ƒ = 1.0MHz
GS = 0V, VDS = 0V to 60V j
V
Coss eff. (ER)
Effective Output Capacitance (Energy Related)
V
j
Coss eff. (TR)
VGS = 0V, VDS = 0V to 60V h
Effective Output Capacitance (Time Related)
h
Diode Characteristics
Symbol
Parameter
Min. Typ. Max. Units
Conditions
D
S
IS
Continuous Source Current
––– –––
A
MOSFET symbol
80
c
(Body Diode)
Pulsed Source Current
(Body Diode)ꢁd
showing the
integral reverse
G
ISM
––– ––– 310
p-n junction diode.
VSD
trr
Diode Forward Voltage
Reverse Recovery Time
––– –––
1.3
50
V
TJ = 25°C, IS = 46A, VGS = 0V g
TJ = 25°C
TJ = 125°C
TJ = 25°C
TJ = 125°C
TJ = 25°C
VR = 64V,
–––
–––
–––
–––
–––
33
39
32
47
1.9
ns
IF = 46A
di/dt = 100A/µs g
59
Qrr
Reverse Recovery Charge
48
nC
71
IRRM
ton
Reverse Recovery Current
Forward Turn-On Time
–––
A
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Notes:
ISD ≤ 46A, di/dt ≤ 1920A/µs, VDD ≤ V(BR)DSS, TJ ≤ 175°C.
ꢀ Pulse width ≤ 400µs; duty cycle ≤ 2%.
Coss eff. (TR) is a fixed capacitance that gives the same charging time
Calculated continuous current based on maximum allowable junction
temperature. Bond wire current limit is 56A. Note that current
limitations arising from heating of the device leads may occur with
some lead mounting arrangements.
Repetitive rating; pulse width limited by max. junction
temperature.
Limited by TJmax, starting TJ = 25°C, L = 0.12mH
RG = 25Ω, IAS = 46A, VGS =10V. Part not recommended for use
above this value.
as Coss while VDS is rising from 0 to 80% VDSS
Coss eff. (ER) is a fixed capacitance that gives the same energy as
Coss while VDS is rising from 0 to 80% VDSS
.
.
When mounted on 1" square PCB (FR-4 or G-10 Material). For recom-
mended footprint and soldering techniques refer to application note #AN-994.
Rθ is measured at TJ approximately 90°C.
2
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IRFR/U3607PbF
1000
100
10
1000
100
10
VGS
15V
10V
8.0V
6.0V
5.5V
5.0V
4.8V
4.5V
VGS
15V
10V
8.0V
6.0V
5.5V
5.0V
4.8V
4.5V
TOP
TOP
BOTTOM
BOTTOM
4.5V
4.5V
60µs PULSE WIDTH
≤
60µs PULSE WIDTH
Tj = 25°C
≤
Tj = 175°C
1
0.1
1
10
100
0.1
1
10
100
V
, Drain-to-Source Voltage (V)
DS
V
, Drain-to-Source Voltage (V)
DS
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
1000
100
10
3.0
2.5
2.0
1.5
1.0
0.5
I
= 80A
D
V
= 10V
GS
T
= 175°C
J
T
= 25°C
J
1
V
= 25V
DS
60µs PULSE WIDTH
≤
0.1
2
3
4
5
6
7
8
-60 -40 -20
T
0
20 40 60 80 100120140160180
, Junction Temperature (°C)
J
V
, Gate-to-Source Voltage (V)
GS
Fig 4. Normalized On-Resistance vs. Temperature
Fig 3. Typical Transfer Characteristics
12.0
100000
10000
1000
V
C
= 0V,
f = 1 MHZ
GS
I
= 46A
D
= C + C , C SHORTED
iss
gs gd ds
C
= C
10.0
8.0
6.0
4.0
2.0
0.0
rss
gd
V
V
= 24V
= 15V
DS
DS
C
= C + C
ds gd
oss
C
C
iss
oss
C
rss
100
0
10
Q
20
30
40
50
60
1
10
, Drain-to-Source Voltage (V)
100
, Total Gate Charge (nC)
V
DS
G
Fig 5. Typical Capacitance vs. Drain-to-Source Voltage
Fig 6. Typical Gate Charge vs. Gate-to-Source Voltage
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3
IRFR/U3607PbF
1000
100
10
1000
OPERATION IN THIS AREA
LIMITED BY R (on)
DS
100
100µsec
1msec
T
= 175°C
J
10
1
T
= 25°C
J
10msec
Tc = 25°C
Tj = 175°C
Single Pulse
V
= 0V
DC
GS
1
0.1
1
10
, Drain-to-Source Voltage (V)
100
0.0
0.5
1.0
1.5
2.0
V
V
, Source-to-Drain Voltage (V)
DS
SD
Fig 8. Maximum Safe Operating Area
Fig 7. Typical Source-Drain Diode Forward Voltage
100
95
90
85
80
75
70
80
Id = 5mA
70
60
50
40
30
20
10
0
Limited By Package
-60 -40 -20
0
T
20 40 60 80 100120140160180
, Temperature ( °C )
25
50
75
100
125
150
175
T
, Case Temperature (°C)
J
C
Fig 10. Drain-to-Source Breakdown Voltage
Fig 9. Maximum Drain Current vs. Case Temperature
1.20
500
I
D
450
400
350
300
250
200
150
100
50
TOP
5.6A
11A
BOTTOM 46A
1.00
0.80
0.60
0.40
0.20
0.00
0
-10
0
10 20 30 40 50 60 70 80
Drain-to-Source Voltage (V)
25
50
75
100
125
150
175
Starting T , Junction Temperature (°C)
J
V
DS,
Fig 12. Maximum Avalanche Energy vs. DrainCurrent
Fig 11. Typical COSS Stored Energy
4
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IRFR/U3607PbF
10.00
1.00
0.10
0.01
0.00
D = 0.50
0.20
0.10
0.05
R1
R1
R2
R2
R3
R3
R4
R4
Ri (°C/W) τi (sec)
0.01109 0.000003
0.26925 0.000130
0.49731 0.001301
0.26766 0.008693
τ
τ
J τJ
τ
Cτ
τ
1τ1
0.02
0.01
τ
τ
2τ2
3τ3
4τ4
Ci= τi/Ri
Notes:
SINGLE PULSE
( THERMAL RESPONSE )
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthjc + Tc
1E-006
1E-005
0.0001
0.001
0.01
0.1
t
, Rectangular Pulse Duration (sec)
1
Fig 13. Maximum Effective Transient Thermal Impedance, Junction-to-Case
1000
100
10
Duty Cycle = Single Pulse
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming Tj = 150°C and
∆
Tstart =25°C (Single Pulse)
0.01
0.05
0.10
1
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming
Tstart = 150°C.
j = 25°C and
∆Τ
0.1
1.0E-06
1.0E-05
1.0E-04
1.0E-03
1.0E-02
1.0E-01
tav (sec)
Fig 14. Typical Avalanche Current vs.Pulsewidth
150
125
100
75
Notes on Repetitive Avalanche Curves , Figures 14, 15:
(For further info, see AN-1005 at www.irf.com)
1. Avalanche failures assumption:
Purely a thermal phenomenon and failure occurs at a temperature far in
excess of Tjmax. This is validated for every part type.
2. Safe operation in Avalanche is allowed as long asTjmax is not exceeded.
3. Equation below based on circuit and waveforms shown in Figures 16a, 16b.
4. PD (ave) = Average power dissipation per single avalanche pulse.
5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase
during avalanche).
TOP
BOTTOM 1.0% Duty Cycle
= 46A
Single Pulse
I
D
6. Iav = Allowable avalanche current.
7. ∆T = Allowable rise in junction temperature, not to exceed Tjmax (assumed as
25°C in Figure 14, 15).
50
tav = Average time in avalanche.
D = Duty cycle in avalanche = tav ·f
25
ZthJC(D, tav) = Transient thermal resistance, see Figures 13)
0
PD (ave) = 1/2 ( 1.3·BV·Iav) = DT/ ZthJC
25
50
75
100
125
150
175
Iav = 2DT/ [1.3·BV·Zth]
EAS (AR) = PD (ave)·tav
Starting T , Junction Temperature (°C)
J
Fig 15. Maximum Avalanche Energy vs. Temperature
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5
IRFR/U3607PbF
4.5
4.0
3.5
3.0
20
15
10
5
I
= 31A
= 64V
F
V
R
T = 25°C
J
T = 125°C
J
I
I
I
I
= 100µA
= 250µA
= 1.0mA
= 1.0A
2.5
2.0
1.5
1.0
D
D
D
D
0
-75 -50 -25
0
25 50 75 100 125 150 175 200
, Temperature ( °C )
0
200
400
600
800
1000
T
di /dt (A/µs)
J
F
Fig. 17 - Typical Recovery Current vs. dif/dt
Fig 16. Threshold Voltage vs. Temperature
20
15
10
5
560
480
400
320
240
160
80
I
= 46A
= 64V
I
= 31A
V = 64V
R
F
F
V
R
T = 25°C
T = 25°C
J
J
T = 125°C
J
T = 125°C
J
0
0
0
200
400
600
800
1000
0
200
400
600
800
1000
di /dt (A/µs)
di /dt (A/µs)
F
F
Fig. 18 - Typical Recovery Current vs. dif/dt
Fig. 19 - Typical Stored Charge vs. dif/dt
560
I
= 46A
= 64V
F
480
400
320
240
160
80
V
R
T = 25°C
J
T = 125°C
J
0
0
200
400
600
800
1000
di /dt (A/µs)
F
Fig. 20 - Typical Stored Charge vs. dif/dt
6
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IRFR/U3607PbF
Driver Gate Drive
P.W.
P.W.
Period
Period
D =
D.U.T
+
*
=10V
V
GS
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
-
D.U.T. I Waveform
SD
+
-
Reverse
Recovery
Current
Body Diode Forward
Current
di/dt
-
+
D.U.T. V Waveform
DS
Diode Recovery
dv/dt
V
DD
VDD
Re-Applied
Voltage
• dv/dt controlled by RG
RG
+
-
Body Diode
Forward Drop
• Driver same type as D.U.T.
• ISD controlled by Duty Factor "D"
• D.U.T. - Device Under Test
Inductor Current
I
SD
Ripple ≤ 5%
* VGS = 5V for Logic Level Devices
Fig 20. Peak Diode Recovery dv/dt Test Circuit for N-Channel
HEXFET® Power MOSFETs
V
(BR)DSS
15V
t
p
DRIVER
+
L
V
DS
D.U.T
R
G
V
DD
-
I
A
AS
V
2
GS
0.01Ω
t
p
I
AS
Fig 21b. Unclamped Inductive Waveforms
Fig 21a. Unclamped Inductive Test Circuit
LD
VDS
VDS
90%
+
-
VDD
10%
VGS
D.U.T
VGS
Pulse Width < 1µs
Duty Factor < 0.1%
td(on)
td(off)
tr
tf
Fig 22a. Switching Time Test Circuit
Fig 22b. Switching Time Waveforms
Id
Vds
Vgs
L
VCC
DUT
Vgs(th)
0
1K
Qgs1
Qgs2
Qgd
Qgodr
Fig 23a. Gate Charge Test Circuit
Fig 23b. Gate Charge Waveform
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IRFR/U3607PbF
D-Pak (TO-252AA) Package Outline
Dimensions are shown in millimeters (inches)
D-Pak (TO-252AA) Part Marking Information
25
Note: For the most current drawing please refer to IR website at http://www.irf.com/package/
8
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IRFR/U3607PbF
I-Pak (TO-251AA) Package Outline
Dimensions are shown in millimeters (inches)
I-Pak (TO-251AA) Part Marking Information
25
Note: For the most current drawing please refer to IR website at http://www.irf.com/package/
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9
IRFR/U3607PbF
D-Pak (TO-252AA) Tape & Reel Information
Dimensions are shown in millimeters (inches)
TR
TRL
TRR
16.3 ( .641 )
15.7 ( .619 )
16.3 ( .641 )
15.7 ( .619 )
12.1 ( .476 )
11.9 ( .469 )
8.1 ( .318 )
7.9 ( .312 )
FEED DIRECTION
FEED DIRECTION
NOTES :
1. CONTROLLING DIMENSION : MILLIMETER.
2. ALL DIMENSIONS ARE SHOWN IN MILLIMETERS ( INCHES ).
3. OUTLINE CONFORMS TO EIA-481 & EIA-541.
13 INCH
16 mm
NOTES :
1. OUTLINE CONFORMS TO EIA-481.
Note: For the most current drawing please refer to IR website at http://www.irf.com/package/
Data and specifications subject to change without notice.
This product has been designed and qualified for the Industrial market.
Qualification Standards can be found on IR’s Web site.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information. 03/08
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10
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