IFX91041EJVXT [INFINEON]
暂无描述;型号: | IFX91041EJVXT |
厂家: | Infineon |
描述: | 暂无描述 稳压器 |
文件: | 总17页 (文件大小:1288K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
IFX91041
1.8A DC/DC Step-Down Voltage Regulator
5.0V, 3.3V or Adjustable Output Voltage
IFX91041EJV50
IFX91041EJV33
IFX91041EJV
Data Sheet
Rev. 1.02, 2010-02-23
Standard Power
1.8A DC/DC Step-Down Voltage Regulator
IFX91041
1
Overview
•
•
•
•
•
•
•
•
•
•
•
•
•
1.8A step down voltage regulator
Output voltage versions: 5.0 V, 3.3 V and adjustable
± 2% output voltage tolerance (+-4% for full load current range)
Integrated power transistor
PWM regulation with feedforward
Input voltage range from 4.75V to 45V
370 kHz switching frequency
Synchronization input
Very low shutdown current consumption (<2uA)
Soft-start function
Input undervoltage lockout
Suited for industrial applications: Tj = -40 °C to +125 °C
Green Product (RoHS compliant)
PG-DSO-8-27
For automotive and transportation applications, please refer to the Infineon TLE and TLF voltage regulator series.
Description
The IFX91041 series are monolithic integrated circuits that provide all active functions for a step-down (buck)
switching voltage regulator, capable of driving up to 1.8A load current with excellent line and load regulation.
These devices are suited for use in industrial applications featuring protection functions such as current limitation
and overtemperature shutdown. Versions with a fixed 5.0V and 3.3V (IFX91041EJV50, IFX91041EJV33) output
voltage as well as an adjustable device (IFX91041EJV) with 0.60V reference feedback voltage are available. The
switching frequency of 370kHz allows to use small and inexpensive passive components. The IFX91041 features
an enable function reducing the shut-down current consumption to <2uA. The voltage mode regulation scheme of
this device provides a stable regulation loop maintained by small external compensation components. Besides
the feedforward control path offers an excellent line transient rejection. The integrated soft-start feature limits the
current peak as well as voltage overshot at start-up.
Type
Package
Marking
I9104150
I9104133
I91041V
IFX91041EJV50
IFX91041EJV33
IFX91041EJV
PG-DSO-8-27
PG-DSO-8-27
PG-DSO-8-27
Data Sheet
2
Rev. 1.02, 2010-02-23
IFX91041
Block Diagram
2
Block Diagram
EN
VS
7
8
Enable
Charge Pump
Over
Temperature
Shutdown
BDS
BUO
FB
5
Feedforward
COMP
Buck
Converter
3
6
4
SYNC
Oscillator
1
Bandgap
Reference
Soft start ramp
generator
IFX91041
2
GND
Figure 1
Block Diagram
Data Sheet
3
Rev. 1.02, 2010-02-23
IFX91041
Pin Configuration
3
Pin Configuration
3.1
Pin Assignment
IFX91041
SYNC
GND
COMP
FB
1
8
7
6
5
VS
2
3
4
EN
BUO
BDS
S08_PIN.vsd
Figure 2
Pin Configuration
3.2
Pin Definitions and Functions
Pin Symbol Function
1
SYNC
Synchronization Input.
Connect to an external clock signal in order to synchronize/adjust the switching frequency.
If not used connect to GND.
2
3
GND
Ground.
Compensation Input.
COMP
Frequency compensation for regulation loop stability.
Connect to compensation RC-network.
4
FB
Feedback Input.
For the adjustable output voltage versions (IFX91041EJV) connect via voltage divider to output
capacitor.
For the fixed voltage version (IFX91041EJV50, IFX91041EJV33) connect this pin directly to the
output capacitor.
5
6
BDS
BUO
Buck Driver Supply Input.
Connect the bootstrap capacitor between this pin and pin BUO.
Buck Switch Output.
Source of the integrated power-DMOS transistor. Connect directly to the cathode of the catch
diode and the buck circuit inductance.
7
8
EN
VS
Enable Input.
Active-high enable input with integrated pull down resistor.
Supply Voltage Input.
Connect to supply voltage source.
Exposed Pad Connect to heatsink area and GND by low inductance wiring.
Data Sheet
4
Rev. 1.02, 2010-02-23
IFX91041
General Product Characteristics
4
General Product Characteristics
4.1
Absolute Maximum Ratings
Absolute Maximum Ratings1)
Tj = -40 °C to +125 °C; all voltages with respect to ground (unless otherwise specified)
Pos.
Parameter
Symbol
Limit Values
Max.
Unit Conditions
Min.
-0.3
-0.3
Voltages
4.1.1
Synchronization Input
Compensation Input
Feedback Input
VSYNC
VCOMP
VFB
5.5
6.2
5.5
6.2
10
V
V
V
V
V
–
t < 10s2)
4.1.2
4.1.3
4.1.4
–
t < 10s1)
-0.3
-0.3
IFX91041EJV50;
IFX91041EJV33
4.1.5
4.1.6
5.5
V
V
IFX91041EJV
Buck Driver Supply Input
VBDS
VBUO
VBUO
- 0.3
+ 5.5
4.1.7
4.1.8
4.1.9
Buck Switch Output
Enable Input
VBUO
VEN
-2.0
-40
V
VS + 0.3
V
V
V
45
45
Supply Voltage Input
VVS
-0.3
Temperatures
4.1.10
4.1.11
Junction Temperature
Storage Temperature
Tj
-40
-55
150
150
°C
°C
–
–
Tstg
ESD Susceptibility
4.1.12
ESD Resistivity
VESD
-2
2
kV
HBM 3)
1) Not subject to production test, specified by design.
2) Exposure to those absolute maximum ratings for extended periods of time (t > 10s) may affect device reliability
3) ESD susceptibility HBM according to EIA/JESD 22-A 114B (1.5kΩ,100pF).
Note:Stresses above the ones listed here may cause permanent damage to the device. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
Note:Integrated protection functions are designed to prevent IC destruction under fault conditions described in the
data sheet. Fault conditions are considered as “outside” normal operating range. Protection functions are
not designed for continuous repetitive operation.
Data Sheet
5
Rev. 1.02, 2010-02-23
IFX91041
General Product Characteristics
4.2
Functional Range
Pos.
Parameter
Symbol
Limit Values
Unit
Conditions
Min.
4.75
0.60
18
Max.
45
4.2.1
4.2.2
4.2.3
4.2.4
4.2.5
4.2.6
Supply Voltage
VS
V
–
Output Voltage adjust range
Buck inductor
VCC
LBU
16
V
IFX91041EJV
56
µH
µF
Ω
–
–
Buck capacitor
CBU1
ESRBU1
Tj
33
120
0.3
150
1)
Buck capacitor ESR
Junction Temperature
–
–
-40
°C
–
1) See section ““Application Information” on Page 12” for loop compensation requirements.
Note:Within the functional range the IC operates as described in the circuit description. The electrical
characteristics are specified within the conditions given in the related electrical characteristics table.
4.3
Thermal Resistance
Pos.
Parameter
Symbol
Limit Values
Unit
Conditions
Min.
Typ.
–
Max.
4.3.1
4.3.2
Junction to Case1)
Junction to ambient1)
RthJC
RthJA
–
–
12
–
K/W
K/W
–
2)
52
1) Not subject to production test, specified by design.
2) According to Jedec JESD52-1,-5,-7 at natural convection on 2s2p FR4 PCB for 1W power dissipation. PCB
76.2x114.3x1.5mm3 with 2 inner copper layers of 70µm thickness. Thermal via array conected to the first inner copper layer
under the exposed pad.
Data Sheet
6
Rev. 1.02, 2010-02-23
IFX91041
Buck Regulator
5
Buck Regulator
5.1
Description
The gate of the power switch is driven by the external capacitor connected to pin BDS (Buck Driver Supply) using
the bootstrap principle. An integrated under voltage lockout function supervising the ’bootstrap’ capacitor voltage
ensures that the device is always driven with a sufficient bootstrap voltage in order to prevent from extensive heat
up of the power transistor. An integrated charge pump supports the gate drive in case of low input supply voltage,
small differential voltage between input supply and output voltage at low current and during startup. In order to
minimize emission, the charge pump is switched off if the input voltage is sufficient for supplying the bootstrap.
The soft start function generates a defined ramp of the output voltage during the first 0.5 ms (typ.) after device
initialization. The device initialization is triggered either by the EN voltage level crossing the turn-on threshold,
rising supply voltage (during EN=H), and also when the device restarts a after thermal shutdown. The ramp starts
after the BDS external capacitor is charged.
The regulation scheme uses a voltage controlled pulse width modulation with feed forward path (the feed forward
operates for supply voltages from 8.0V to 36V) which provides a fast line transient reaction.
In order to maintain the output voltage regulation even under low duty cycle conditions (light load conditions down
to ICC=0mA, high input voltage) a pulse skipping operation mode is implemented. Pulse skipping is also used for
operation with low supply voltages, related to high duty cycles >92%
In case of a lost connection to the pin FB , an internal pull-up current prevents from a uncontrolled rise of the output
voltage (version IFX91041EJV only).
OC
Comp.
VS
COMP
L when Overcurrent
=
BDS
Error
Amp.
Charge
Pump
Gate Driver
Supply
PWM
Comp.
NOR1
FB
H when
Error-Signal <
Error-Ramp
Output Stage
OFF when H
_
>1
Error-Signal
Error-Ramp
INV
1
Soft start
H =
OFF
H =
ON
R
S
&
&
Q
Power
D-MOS
OFF
when H
L when
Gate
Driver
VRef
0.6 V
R
Tj > 175 °C
=
&
&
Q
BUO
Ramp
Generator
L when
Output
overvoltage
Q
Feedforward
ΔV=k VS
PWM-FF
X
Oscillator
Schmitt-Trigger 1
Vhigh
NAND 2
&
S
Q
Vmax
Vmin
Ramp
Clock Error-FF
BDS
UV Comp.
SYNC
Vlow
H when
UV at VBDS
tr tf tr
tr tf tr
t
t
=
Figure 3
Block Diagram Buck Regulator
Data Sheet
7
Rev. 1.02, 2010-02-23
IFX91041
Buck Regulator
5.2
Electrical Characteristics
Electrical Characteristics: Buck Regulator
VS = 6.0 V to 40 V, Tj = -40 °C to +125 °C, all voltages with respect to ground (unless otherwise specified)
Pos.
Parameter
Symbol
Limit Values
Unit Conditions
Min. Typ. Max.
IFX91041EJV50;
VEN = VS
5.2.1
Output voltage
VFB
4.90 5.00
5.10
V
V
0.1A < ICC < 1.0A
5.2.2
5.2.3
VFB
4.80 5.00
3.23 3.30
5.20
3.37
V
V
IFX91041EJV50;
V
VEN = VS;
1mA < ICC < 1.8A
IFX91041EJV33;
Output voltage
Output voltage
VFB
V
VEN = VS;
0.1A < ICC < 1.0A
IFX91041EJV33;
5.2.4
5.2.5
VFB
VFB
3.17 3.30
0.588 0.60
3.43
V
V
V
VEN = VS;
1mA < ICC < 1.8A
IFX91041EJV;
0.612
V
VEN = VS;
FB connected to VCC;
VS = 12V
0.1A < ICC < 1.0A
IFX91041EJV;
5.2.6
VFB
0.576 0.60
0.624
V
V
VEN = VS;
FB connected to VCC;
VS = 12V
1mA < ICC < 1.8A
5.2.7
5.2.8
5.2.9
Minimum output load requirement ICC,MIN
0
–
–
–
–
mA IFX91041EJV501)
IFX91041EJV331)
1
mA
1.5
mA IFX91041EJV
VCC > 3V1)
5.2.10
5.2.11
5
mA IFX91041EJV
VCC > 1.5V1)
10
-1
–
–
–
mA IFX91041EJV
VCC > =0.6V1)
5.2.12 FB input current
5.2.13 FB input current
IFB
IFB
-0.1
–
0
µA
µA
IFX91041EJV
FB = 0.6V
V
900
IFX91041EJV50,
IFX91041EJV33
5.2.14 Power stage on-resistance
5.2.15 Current transition rise/fall time
5.2.16 Buck peak over current limit
Ron
–
–
500
–
mΩ tested at 300 mA
tr
–
50
–
ns
A
ICC=1 A 2)
IBUOC
VBDS,off
2.2
3.6
–
–
5.2.17 Bootstrap under voltage lockout,
turn-off threshold
VBUO
+3.3
–
V
Bootstrap voltage
decreasing
5.2.18 Charge pump current
ICP
2
–
–
mA VS = 12V;
BUO = VBDS = GND
V
Data Sheet
8
Rev. 1.02, 2010-02-23
IFX91041
Buck Regulator
Electrical Characteristics: Buck Regulator
VS = 6.0 V to 40 V, Tj = -40 °C to +125 °C, all voltages with respect to ground (unless otherwise specified)
Pos.
Parameter
Symbol
Limit Values
Unit Conditions
Min. Typ. Max.
5.2.19 Charge pump switch-off threshold VBDS
-
–
–
5
V
(VBDS - VBUO) increasing
VBUO
3)
5.2.20 Maximum duty cycle
5.2.21 Soft start ramp
Dmax
tstart
–
–
100
750
%
350 500
µs
V
FB rising from 5% to
95% of VFB,nom
5.2.22 Input under voltage shutdown
threshold
VS,off
3.75
–
–
V
VS decreasing
5.2.23 Input voltage startup threshold
VS,on
VS,hyst
–
–
–
4.75
–
V
VS increasing
5.2.24 Input under voltage shutdown
hysteresis
150
mV
–
1) Not subject to production test, application related parameter
2) Not subject to production test; specified by design.
3) Consider “Chapter 4.2, Functional Range”
Data Sheet
9
Rev. 1.02, 2010-02-23
IFX91041
Module Enable and Thermal Shutdown
6
Module Enable and Thermal Shutdown
6.1
Description
With the enable pin the device can be set in off-state reducing the current consumption to less than 2µA.
The enable function features an integrated pull down resistor which ensures that the IC is shut down and the power
switch is off in case the pin EN is left open.
The integrated thermal shutdown function turns the power switch off in case of overtemperature. The typ. junction
shutdown temperature is 175°C, with a min. of 160°C. After cooling down the IC will automatically restart
operation. The thermal shutdown is an integrated protection function designed to prevent IC destruction when
operating under fault conditions. It should not be used for normal operation.
6.2
Electrical Characteristics Module Enable, Bias and Thermal Shutdown
Electrical Characteristics: Enable, Bias and Thermal Shutdown
VS = 6.0 V to 40 V, Tj = -40 °C to +125 °C, all voltages with respect to ground (unless otherwise specified)
Pos.
Parameter
Symbol
Limit Values
Unit
Conditions
Min.
Typ.
Max.
6.2.1
6.2.2
Current Consumption,
shut down mode
Iq,OFF
Iq,ON
–
0.1
2
µA
V
EN = 0.8V;
Tj < 105°C; VS = 16V
VEN = 5.0V; ICC = 0mA;
Current Consumption,
active mode
–
–
–
–
7
mA
VS = 16V
FB connected to VOUT
6.2.3
Current Consumption,
active mode
Iq,ON
10
mA
VEN = 5.0V; ICC = 1.8A;
VS = 16V
FB connected to VOUT
1)
6.2.4
6.2.5
6.2.6
6.2.7
6.2.8
6.2.9
Enable high signal valid
Enable low signal valid
Enable hysteresis
VEN,lo
VEN,hi
VEN,HY
IEN,hi
3.0
–
–
–
V
–
–
0.8
400
30
1
V
–
1)
50
–
200
–
mV
µA
µA
°C
K
Enable high input current
Enable low input current
V
EN = 16V
IEN,lo
–
0.1
175
15
V
1)
EN = 0.5V
Over temperature shutdown Tj,sd
160
–
190
–
1)
6.2.10 Overtemperatureshutdown Tj,sd_hyst
hysteresis
1) Specified by design. Not subject to production test.
Data Sheet
10
Rev. 1.02, 2010-02-23
IFX91041
Module Oscillator
7
Module Oscillator
7.1
Description
The oscillator turns on the power switch with a constant frequency while the buck regulating circuit turns the power
transistor off in every cycle with an appropriate time gap depending on the output and input voltage.
The internal sawtooth signal used for the PWM generation has an amplitude proportional to the input supply
voltage (feedforward).
The turn-on frequency can optionally be set externally via the ’SYNC’ pin using a TTL compatible input signal. In
this case the synchronization of the PWM-on signal refers to the falling edge of the ’SYNC’-pin input signal. In case
the synchronization to an external clock signal is not needed the ’SYNC’ pin should be connected to GND.
Leaving pin SYNC open or short-circuiting it to GND leads to normal operation with the internal switching
frequency.
7.2
Electrical Characteristics Module Oscillator
Electrical Characteristics: Buck Regulator
VS = 6.0 V to 40 V, Tj = -40 °C to +125 °C, all voltages with respect to ground (unless otherwise specified)
Pos.
Parameter
Symbol
Limit Values
Unit
Conditions
Min.
330
200
Typ.
Max.
7.2.1
7.2.2
7.2.3
7.2.4
7.2.5
Oscillator frequency
fosc
370
420
530
kHz
kHz
V
V
SYNC = 0V
Synchronization capture range
SYNC signal high level valid
SYNC signal low level valid
SYNC input internal pull-down
fsync
1)
1)
VSYNC,hi 2.9
VSYNC,lo
0.8
1.4
V
RSYNC
0.60
1.0
MΩ
V
SYNC = 5V
1) Synchronization of PWM-on signal to falling edge.
Data Sheet
11
Rev. 1.02, 2010-02-23
IFX91041
Application Information
8
Application Information
Note:The following information is given as a hint for the implementation of the device only and shall not be
regarded as a description or warranty of a certain functionality, condition or quality of the device.
8.1
Frequency Compensation
The stability of the output voltage can be achieved with a simple RC connected between pin COMP and GND. The
standard configuration using the swiching frequency of the internal oscillator is a ceramic capacitor CCOMP = 22nF
and RCOMP = 22kΩ. By slight modifications to the compensation network the stability can be optimized for different
application needs, such as varying switching frequency (using the sychronizing function), different types of buck
capacitor (ceramic or tantalum) etc.
The compensation network is essential for control loop stability. Leaving pin COMP open might lead to instable
operation.
8.2
Compensating a tantalum buck capacitor CBU1
The TLE control loop is optimized for ceramic buck capacitors CBU. In order to maintain stability also for tantalum
capacitors with ESR up to 300mΩ, an additional compensation capacitance CCOMP2 at pin COMP to GND is
required. It’s value calculates:
CCOMP2 = CBU * ESR(CBU) / RCOMP ,
whereas CCOMP2 needs to stay below 5nF.
Application_C-COMP2.vsd
COMP
3
IFX91041
CCOMP
CCOMP2
2
RCOMP
GND
Figure 4
High-ESR buck capacitor compensation
8.3
Catch Diode
In order to minimize losses and for fast recovery, a schottky catch diode is required. Disconnecting the catch diode
during operation might lead to destruction of the IC.
Data Sheet
12
Rev. 1.02, 2010-02-23
IFX91041
Application Information
8.4
IFX91041EJV50, IFX91041EJV33 with fixed Output Voltage
LI
D1
22…47µH
VBatt
Ignition Key
Terminal 15
EN
VS
7
8
Enable
Charge Pump
Over
Temperature
Shutdown
BDS
BUO
5
Feedforward
CBOT
220nF
LBU
COMP
SYNC
Buck
Converter
3
6
4
VOUT
47µH
DBU
CCOMP
CBU1
Oscillator
CBU2
1
FB
100µF
220nF
RCOMP
Bandgap
Reference
Soft start ramp
generator
IFX91041EJV50
IFX91041EJV33
2
GND
Figure 5
Application Diagram IFX91041EJV50 or IFX91041EJV33
Note:This is a very simplified example of an application circuit. The function must be verified in the real application
Data Sheet
13
Rev. 1.02, 2010-02-23
IFX91041
Application Information
8.5
Adjustable Output Voltage Device
LI
D1
22…47µH
VBatt
Ignition Key
Terminal 15
EN
VS
7
8
Biasing &
Enable
Charge Pump
Over
Temperature
Shutdown
BDS
5
Feedforward
CBOT
220nF
LBU
COMP
SYNC
Buck
Converter
3
BUO
DBU
6
4
VOUT
47µH
CCOMP
CBU1
100µF
Oscillator
CBU2
R1
R2
1
FB
220nF
RCOMP
Bandgap
Reference
Soft start ramp
generator
CFB
IFX91041EJV
2
GND
Figure 6
Application Diagram IFX91041EJV
Note:This is a very simplified example of an application circuit. The function must be verified in the real application
The output voltage of the IFX91041EJV can be programmed by a voltage divider connected to the feedback pin
FB. The divider cross current should be 300 µA at minimum, therefore the maximum R2 calculates:
R2 ≤ VFB / IR2 --> R2 ≤ 0.6V / 300 µA = 2 kΩ
For the desired output voltage level VCC, R1 calculates then (neglecting the small FB input current):
V
CC
⎛
⎞
R
= R ---------- – 1 .
1
2
⎝
⎠
V
FB
Add a 0.5 nF capacitor close to FB pin.
Data Sheet
14
Rev. 1.02, 2010-02-23
IFX91041
Package Outlines
9
Package Outlines
0.35 x 45˚
1)
0.1
3.ꢀ
0.1 C D 2x
8˚ MAX.
8˚ MAX.
0˚...8˚
+0.06
0.1ꢀ
0.08
Seating Plane
C
C
0˚...8˚
1.27
0.64
0.25
2)
0.0ꢀ
0.2
0.41
6
M
M
0.2
D 8x
0.2
C A-B D 8x
D
Bottom View
0.1
3
A
1
4
8
5
1
4
8
5
B
0.1 C A-B 2x
1)
0.1
4.ꢀ
Index Marking
1) Does not include plastic or metal protrusion of 0.15 max. per side
2) Lead width can be 0.61 max. in dambar area
3) JEDEC reference MS-012 variation BA
GPS01206
Figure 7
Outline PG-DSO-8-27
Green Product (RoHS compliant)
To meet the world-wide customer requirements for environmentally friendly products and to be compliant with
government regulations the device is available as a green product. Green products are RoHS-Compliant (i.e
Pb-free finish on leads and suitable for Pb-free soldering according to IPC/JEDEC J-STD-020).
For further package information, please visit our website:
Dimensions in mm
http://www.infineon.com/packages.
Data Sheet
15
Rev. 1.02, 2010-02-23
IFX91041
Revision History
10
Revision History
Rev.1.02 2010-02-23 Editorial change
Rev.1.01 2009-10-19 Overview page: Inserted reference statement to TLE/TLF series.
Rev.1.0 2009-05-04 Final data sheet
Data Sheet
16
Rev. 1.02, 2010-02-23
Edition 2010-02-23
Published by
Infineon Technologies AG
81726 Munich, Germany
© 2010 Infineon Technologies AG
All Rights Reserved.
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of any third party.
Information
For further information on technology, delivery terms and conditions and prices, please contact the nearest
Infineon Technologies Office (www.infineon.com).
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Due to technical requirements, components may contain dangerous substances. For information on the types in
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of that life-support device or system or to affect the safety or effectiveness of that device or system. Life support
devices or systems are intended to be implanted in the human body or to support and/or maintain and sustain
and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may
be endangered.
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