CHL8102_15 [INFINEON]
Digital Multi-Phase Buck Controller;
| 型号： | CHL8102_15 |
| 厂家： | 
Infineon |
| 描述： | Digital Multi-Phase Buck Controller 多相元件 |
| 文件： | 总2页 (文件大小：303K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Digital Multi-Phase Buck Controller
CHL8102/03/04/13
FEATURES
DESCRIPTION
Dual output 2/3/4+1-phase PWM Controller
The CHL8102/03/04 are dual-loop, digital multi-phase
buck controllers designed for CPU voltage regulation.
The CHL8113 is a single-loop, digital multiphase buck
controller ideal for Server DDR memory voltage regulation.
They are fully compliant with the Intel® VR12 and AMD®
SVI (CHL8103/04) specifications.
(CHL8102/03/04) and single output 3-phase PWM
Controller (CHL8113)
Easiest layout and fewest pins in the industry
Footprint compatible with CHL8325A/B (CHL8103/4)
Fully supports Intel® VR12 (CHL8103/04/13) and
AMD® SVI with dual OCP & programmable
addressing (CHL8103/04)
The CHL8102/03/04/13 includes IR Efficiency Shaping
Technology to deliver exceptional efficiency at minimum
cost across the entire load range. IR Dynamic Phase Control
adds/drops active phases based upon load current and can
be configured to enter 1-phase operation and diode
emulation mode automatically or by command.
I2C interface for configuration & telemetry
Pin programmable I2C address (CHL8103/04/13)
Overclocking support with I2C voltage override and
Vmax setting
IR’s unique Adaptive Transient Algorithm (ATA), based on
proprietary non-linear digital PWM algorithms, minimizes
output bulk capacitors and Multiple Time Programmable
(MTP) storage saves pins and enables a small package size.
Device configuration and fault parameters are easily
defined using the IR Digital Power Design Center (DPDC)
GUI and stored in on-chip MTP.
Flexible I2C bus security features
I2C security enable pin (CHL8103/04/13)
Independent loop switching frequencies from
200kHz to 1.2MHz per phase
IR Efficiency Shaping with Dynamic Phase Control
(DPC)
1-phase & Active Diode Emulation modes for light
load efficiency
The CHL8102/03/04/13 provides extensive OVP, UVP, OCP
and OTP fault protection and the CHL8103/04/13 includes
thermistor based temperature sensing with VRHOT signal.
IR Adaptive Transient Algorithm (ATA) on both loops
minimizes output bulk capacitors and system cost
The CHL8102/03/04/13 includes numerous features like
register diagnostics for fast design cycles and platform
differentiation, truly simplifying VRD design and enabling
fastest time-to-market (TTM) with “set-and-forget”
methodology.
Per-Loop Fault Protection: OVP, UVP, OCP
Thermal Protection (OTP) and VRHOT# flag
(CHL8103/04/13)
Multiple time programmable (MTP) memory for
custom configuration
PIN DIAGRAM
Compatible with IR ATL and 3.3V tri-state Drivers
3.3V +10%/-15% supply voltage; 0ºC to 85ºC
operation
40
39
38
37
36
35
34
33
32
31
Pb-Free, RoHS, QFN packages
1
2
30
29
RCSP_L2
RCSM_L2
RCSP
RCSM
VPGM2
VSEN
VRTN
RRES
TSEN1
V18A
3
28 VCC
APPLICATIONS
4
27 VSEN_L2
26 VRTN_L2
25 PWM_L2
CHL8103/4
40 Pin 6x6 QFN
Top View
5
6
Intel® VR12 & AMD® SVI based systems
PWM4 (CHL8104)/
NC (CHL8103)
7
24
High Performance Desktops CPU VRs
Value Servers CPU & DDR Memory VRs
8
23 PWM3
22 PWM2
VR_READY1
PWRGD2
/
1 Intel Mode
2 AMD Mode
9
41 GND
VR_READY_L21
/
PWM1
10
21
PWROK2
11
12
13
14
15
16
17
18
19
20
Figure 1: CHL8103/04 Package Top View
1
August 28, 2013 | FINAL | V1.09
Digital Multi-Phase Buck Controller
CHL8102/03/04/13
PIN DIAGRAM ENLARGED
40
39
38
37
36
35
34
33
32
31
1
2
30
29
28
27
RCSP_L2
RCSM_L2
VCC
RCSP
RCSM
VPGM2
VSEN
VRTN
RRES
TSEN1
V18A
3
4
VSEN_L2
CHL8103/4
40 Pin 6x6 QFN
Top View
5
26 VRTN_L2
25 PWM_L2
6
PWM4 (CHL8104)/
NC (CHL8103)
7
24
23
22
21
PWM3
8
VR_READY1/
PWRGD2
1 Intel Mode
2 AMD Mode
PWM2
PWM1
9
41 GND
VR_READY_L21/
10
PWROK2
11
12
13
14
15
16
17
18
19
20
2
August 28, 2013 | FINAL | V1.09
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