BSC117N08NS5 [INFINEON]
OptiMOS™ 5 80 V power MOSFET, especially designed for Synchronous Rectification for telecom and server power supplies. In addition, the device can also be utilized in other industrial applications such as solar, low voltage drives and adapter. Within seven different packages, the OptiMOS™ 5 80 V MOSFETs offer the industry’s lowest RDS(on). Additionally, compared to the previous generation, OptiMOS™ 5 80 V has an RDS(on) reduction of up to 43%.;型号: | BSC117N08NS5 |
厂家: | Infineon |
描述: | OptiMOS™ 5 80 V power MOSFET, especially designed for Synchronous Rectification for telecom and server power supplies. In addition, the device can also be utilized in other industrial applications such as solar, low voltage drives and adapter. Within seven different packages, the OptiMOS™ 5 80 V MOSFETs offer the industry’s lowest RDS(on). Additionally, compared to the previous generation, OptiMOS™ 5 80 V has an RDS(on) reduction of up to 43%. |
文件: | 总13页 (文件大小:1311K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
BSC117N08NS5
MOSFET
OptiMOSTM5ꢀPower-Transistor,ꢀ80ꢀV
SuperSO8
5
8
6
7
7
Features
6
5
8
•ꢀOptimizedꢀforꢀhighꢀperformanceꢀSMPS,ꢀe.g.ꢀsync.ꢀrec.
•ꢀ100%ꢀavalancheꢀtested
•ꢀSuperiorꢀthermalꢀresistance
•ꢀN-channel
•ꢀQualifiedꢀaccordingꢀtoꢀJEDEC1)ꢀꢀforꢀtargetꢀapplications
•ꢀPb-freeꢀleadꢀplating;ꢀRoHSꢀcompliant
•ꢀHalogen-freeꢀaccordingꢀtoꢀIEC61249-2-21
4
3
1
2
2
3
1
4
Tableꢀ1ꢀꢀꢀꢀꢀKeyꢀPerformanceꢀParameters
S 1
8 D
7 D
Parameter
Value
Unit
S 2
S 3
G 4
VDS
80
V
RDS(on),max
ID
11.7
49
mΩ
A
6 D
5 D
Qoss
19
nC
nC
QG(0V..10V)
15
Typeꢀ/ꢀOrderingꢀCode
Package
Marking
RelatedꢀLinks
BSC117N08NS5
PG-TDSON-8
117N08NS
-
1) J-STD20 and JESD22
Final Data Sheet
1
Rev.ꢀ2.1,ꢀꢀ2020-02-07
OptiMOSTM5ꢀPower-Transistor,ꢀ80ꢀV
BSC117N08NS5
TableꢀofꢀContents
Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Thermal characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Electrical characteristics diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Package Outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Disclaimer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Final Data Sheet
2
Rev.ꢀ2.1,ꢀꢀ2020-02-07
OptiMOSTM5ꢀPower-Transistor,ꢀ80ꢀV
BSC117N08NS5
1ꢀꢀꢀꢀꢀMaximumꢀratings
atꢀTjꢀ=ꢀ25ꢀ°C,ꢀunlessꢀotherwiseꢀspecified
Tableꢀ2ꢀꢀꢀꢀꢀMaximumꢀratings
Values
Typ.
Parameter
Symbol
Unit Noteꢀ/ꢀTestꢀCondition
Min.
Max.
-
-
-
-
-
-
49
31
19
VGS=10ꢀV,ꢀTC=25ꢀ°C
Continuous drain current
ID
A
VGS=10ꢀV,ꢀTC=100ꢀ°C
VGS=10ꢀV,ꢀTC=25ꢀ°C,ꢀRthJAꢀ=50K/W1)
Pulsed drain current2)
Avalanche energy, single pulse3)
ID,pulse
EAS
-
-
-
-
196
14
A
TC=25ꢀ°C
-
mJ
V
ID=50ꢀA,ꢀRGS=25ꢀΩ
Gate source voltage
VGS
-20
20
-
-
-
-
-
50
2.5
TC=25ꢀ°C
Power dissipation
Ptot
W
TA=25ꢀ°C,ꢀRthJA=50ꢀK/W1)
IEC climatic category;
DIN IEC 68-1: 55/150/56
Operating and storage temperature
Tj,ꢀTstg
-55
-
150
°C
2ꢀꢀꢀꢀꢀThermalꢀcharacteristics
Tableꢀ3ꢀꢀꢀꢀꢀThermalꢀcharacteristics
Values
Typ.
Parameter
Symbol
Unit Noteꢀ/ꢀTestꢀCondition
Min.
Max.
Thermal resistance, junction - case,
bottom
RthJC
RthJC
RthJA
-
1.5
2.5
K/W
K/W
K/W
-
-
-
Thermal resistance, junction - case,
top
-
-
-
-
20
50
Device on PCB,
6 cm2 cooling area1)
1) Device on 40 mm x 40 mm x 1.5 mm epoxy PCB FR4 with 6 cm2 (one layer, 70 µm thick) copper area for drain
connection. PCB is vertical in still air.
2) See figure 3 for more detailed information
3) See figure 13 for more detailed information
Final Data Sheet
3
Rev.ꢀ2.1,ꢀꢀ2020-02-07
OptiMOSTM5ꢀPower-Transistor,ꢀ80ꢀV
BSC117N08NS5
3ꢀꢀꢀꢀꢀElectricalꢀcharacteristics
Tableꢀ4ꢀꢀꢀꢀꢀStaticꢀcharacteristics
Values
Parameter
Symbol
Unit Noteꢀ/ꢀTestꢀCondition
Min.
80
Typ.
Max.
-
Drain-source breakdown voltage
Gate threshold voltage
V(BR)DSS
VGS(th)
-
V
V
VGS=0ꢀV,ꢀID=1ꢀmA
VDS=VGS,ꢀID=22ꢀµA
2.2
3
3.8
-
-
0.1
10
1
100
VDS=80ꢀV,ꢀVGS=0ꢀV,ꢀTj=25ꢀ°C
VDS=80ꢀV,ꢀVGS=0ꢀV,ꢀTj=125ꢀ°C
Zero gate voltage drain current
Gate-source leakage current
Drain-source on-state resistance
IDSS
µA
nA
IGSS
-
10
100
VGS=20ꢀV,ꢀVDS=0ꢀV
-
-
9.6
13.7
11.7
16.3
VGS=10ꢀV,ꢀID=25ꢀA
VGS=6ꢀV,ꢀID=12.5ꢀA
RDS(on)
mΩ
Gate resistance1)
Transconductance
RG
gfs
-
1.1
38
1.7
-
Ω
-
19
S
|VDS|>2|ID|RDS(on)max,ꢀID=25ꢀA
Tableꢀ5ꢀꢀꢀꢀꢀDynamicꢀcharacteristics
Values
Typ.
Parameter
Symbol
Unit Noteꢀ/ꢀTestꢀCondition
Min.
Max.
Input capacitance1)
Output capacitance1)
Reverse transfer capacitance1)
Ciss
Coss
Crss
-
-
-
1000 1300 pF
VGS=0ꢀV,ꢀVDS=40ꢀV,ꢀf=1ꢀMHz
VGS=0ꢀV,ꢀVDS=40ꢀV,ꢀf=1ꢀMHz
VGS=0ꢀV,ꢀVDS=40ꢀV,ꢀf=1ꢀMHz
180
11
230
19
pF
pF
VDD=40ꢀV,ꢀVGS=10ꢀV,ꢀID=25ꢀA,
RG,ext=3ꢀΩ
Turn-on delay time
Rise time
td(on)
tr
td(off)
tf
-
-
-
-
10
4
-
-
-
-
ns
ns
ns
ns
VDD=40ꢀV,ꢀVGS=10ꢀV,ꢀID=25ꢀA,
RG,ext=3ꢀΩ
VDD=40ꢀV,ꢀVGS=10ꢀV,ꢀID=25ꢀA,
RG,ext=3ꢀΩ
Turn-off delay time
Fall time
16
3
VDD=40ꢀV,ꢀVGS=10ꢀV,ꢀID=25ꢀA,
RG,ext=3ꢀΩ
Tableꢀ6ꢀꢀꢀꢀꢀGateꢀchargeꢀcharacteristics2)ꢀ
Values
Parameter
Symbol
Unit Noteꢀ/ꢀTestꢀCondition
Min.
Typ.
5
Max.
Gate to source charge
Gate charge at threshold
Gate to drain charge1)
Switching charge
Qgs
-
-
-
-
-
-
-
-
-
nC
nC
nC
nC
nC
V
VDD=40ꢀV,ꢀID=25ꢀA,ꢀVGS=0ꢀtoꢀ10ꢀV
VDD=40ꢀV,ꢀID=25ꢀA,ꢀVGS=0ꢀtoꢀ10ꢀV
VDD=40ꢀV,ꢀID=25ꢀA,ꢀVGS=0ꢀtoꢀ10ꢀV
VDD=40ꢀV,ꢀID=25ꢀA,ꢀVGS=0ꢀtoꢀ10ꢀV
VDD=40ꢀV,ꢀID=25ꢀA,ꢀVGS=0ꢀtoꢀ10ꢀV
VDD=40ꢀV,ꢀID=25ꢀA,ꢀVGS=0ꢀtoꢀ10ꢀV
VDS=0.1ꢀV,ꢀVGS=0ꢀtoꢀ10ꢀV
Qg(th)
Qgd
3
-
3
5
-
Qsw
6
Gate charge total1)
Qg
15
5.0
13
19
18
-
Gate plateau voltage
Gate charge total, sync. FET
Output charge1)
Vplateau
Qg(sync)
Qoss
-
nC
nC
25
VDD=40ꢀV,ꢀVGS=0ꢀV
1) Defined by design. Not subject to production test.
2) See ″Gate charge waveforms″ for parameter definition
Final Data Sheet
4
Rev.ꢀ2.1,ꢀꢀ2020-02-07
OptiMOSTM5ꢀPower-Transistor,ꢀ80ꢀV
BSC117N08NS5
Tableꢀ7ꢀꢀꢀꢀꢀReverseꢀdiode
Values
Parameter
Symbol
Unit Noteꢀ/ꢀTestꢀCondition
Min.
Typ.
-
Max.
45
Diode continuous forward current
Diode pulse current
IS
-
-
-
-
-
A
TC=25ꢀ°C
IS,pulse
VSD
trr
-
196
1.1
73
A
TC=25ꢀ°C
Diode forward voltage
0.9
37
45
V
VGS=0ꢀV,ꢀIF=25ꢀA,ꢀTj=25ꢀ°C
VR=40ꢀV,ꢀIF=25A,ꢀdiF/dt=100ꢀA/µs
VR=40ꢀV,ꢀIF=25A,ꢀdiF/dt=100ꢀA/µs
Reverse recovery time1)
Reverse recovery charge1)
ns
nC
Qrr
90
1) Defined by design. Not subject to production test.
Final Data Sheet
5
Rev.ꢀ2.1,ꢀꢀ2020-02-07
OptiMOSTM5ꢀPower-Transistor,ꢀ80ꢀV
BSC117N08NS5
4ꢀꢀꢀꢀꢀElectricalꢀcharacteristicsꢀdiagrams
Diagramꢀ1:ꢀPowerꢀdissipation
Diagramꢀ2:ꢀDrainꢀcurrent
60
60
50
40
30
20
10
0
50
40
30
20
10
0
0
25
50
75
100
125
150
175
0
25
50
75
100
125
150
175
TCꢀ[°C]
TCꢀ[°C]
Ptot=f(TC)
ID=f(TC);ꢀVGS≥10ꢀV
Diagramꢀ3:ꢀSafeꢀoperatingꢀarea
Diagramꢀ4:ꢀMax.ꢀtransientꢀthermalꢀimpedance
103
101
1 µs
102
101
100
10-1
0.5
100
10 µs
0.2
0.1
100 µs
1 ms
0.05
0.02
10 ms
DC
10-1
0.01
single pulse
10-2
10-1
100
101
102
10-6
10-5
10-4
10-3
10-2
10-1
VDSꢀ[V]
tpꢀ[s]
ID=f(VDS);ꢀTC=25ꢀ°C;ꢀD=0;ꢀparameter:ꢀtp
ZthJC=f(tp);ꢀparameter:ꢀD=tp/T
Final Data Sheet
6
Rev.ꢀ2.1,ꢀꢀ2020-02-07
OptiMOSTM5ꢀPower-Transistor,ꢀ80ꢀV
BSC117N08NS5
Diagramꢀ5:ꢀTyp.ꢀoutputꢀcharacteristics
Diagramꢀ6:ꢀTyp.ꢀdrain-sourceꢀonꢀresistance
320
22
5 V 5.5 V
6 V
7 V
20
18
16
14
12
10
8
280
240
200
160
120
80
10 V
10 V
7 V
6
6 V
4
5.5 V
5 V
40
2
0
0
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
0
50
100
150
200
250
VDSꢀ[V]
IDꢀ[A]
ID=f(VDS);ꢀTj=25ꢀ°C;ꢀparameter:ꢀVGS
RDS(on)=f(ID);ꢀTj=25ꢀ°C;ꢀparameter:ꢀVGS
Diagramꢀ7:ꢀTyp.ꢀtransferꢀcharacteristics
Diagramꢀ8:ꢀTyp.ꢀforwardꢀtransconductance
120
100
100
80
60
40
20
80
60
40
20
0
150 °C
25 °C
0
0
2
4
6
8
10
0
20
40
60
80
100
120
140
VGSꢀ[V]
IDꢀ[A]
ID=f(VGS);ꢀ|VDS|>2|ID|RDS(on)max;ꢀparameter:ꢀTj
gfs=f(ID);ꢀTj=25ꢀ°C
Final Data Sheet
7
Rev.ꢀ2.1,ꢀꢀ2020-02-07
OptiMOSTM5ꢀPower-Transistor,ꢀ80ꢀV
BSC117N08NS5
Diagramꢀ9:ꢀDrain-sourceꢀon-stateꢀresistance
Diagramꢀ10:ꢀTyp.ꢀgateꢀthresholdꢀvoltage
20
4
18
16
220 µA
3
max
22 µA
14
12
typ
10
2
1
0
8
6
4
2
0
-60
-20
20
60
100
140
180
-60
-20
20
60
100
140
180
Tjꢀ[°C]
Tjꢀ[°C]
RDS(on)=f(Tj);ꢀID=25ꢀA;ꢀVGS=10ꢀV
VGS(th)=f(Tj);ꢀVGS=VDS
Diagramꢀ11:ꢀTyp.ꢀcapacitances
Diagramꢀ12:ꢀForwardꢀcharacteristicsꢀofꢀreverseꢀdiode
104
103
25 °C
150 °C
25 °C, max
150 °C, max
103
Ciss
102
101
100
Coss
102
101
Crss
100
0
20
40
60
80
0.0
0.5
1.0
1.5
2.0
VDSꢀ[V]
VSDꢀ[V]
C=f(VDS);ꢀVGS=0ꢀV;ꢀf=1ꢀMHz
IF=f(VSD);ꢀparameter:ꢀTj
Final Data Sheet
8
Rev.ꢀ2.1,ꢀꢀ2020-02-07
OptiMOSTM5ꢀPower-Transistor,ꢀ80ꢀV
BSC117N08NS5
Diagramꢀ13:ꢀAvalancheꢀcharacteristics
Diagramꢀ14:ꢀTyp.ꢀgateꢀcharge
102
10
9
8
7
6
5
4
3
2
1
0
40 V
64 V
16 V
101
25 °C
100 °C
125 °C
100
100
101
102
103
0
5
10
15
tAVꢀ[µs]
Qgateꢀ[nC]
IAS=f(tAV);ꢀRGS=25ꢀΩ;ꢀparameter:ꢀTj(start)
VGS=f(Qgate);ꢀID=25ꢀAꢀpulsed;ꢀparameter:ꢀVDD
Diagramꢀ15:ꢀDrain-sourceꢀbreakdownꢀvoltage
Diagram Gate charge waveforms
86
84
82
80
78
76
-60
-20
20
60
100
140
180
Tjꢀ[°C]
VBR(DSS)=f(Tj);ꢀID=1ꢀmA
Final Data Sheet
9
Rev.ꢀ2.1,ꢀꢀ2020-02-07
OptiMOSTM5ꢀPower-Transistor,ꢀ80ꢀV
BSC117N08NS5
5ꢀꢀꢀꢀꢀPackageꢀOutlines
DOCUMENT NO.
Z8B00003332
REVISION
07
MILLIMETERS
DIMENSION
MIN.
0.90
0.15
0.34
4.80
3.90
0.03
5.70
5.90
3.88
MAX.
1.20
0.35
0.54
5.35
4.40
0.23
6.10
6.42
4.31
SCALE 10:1
A
A1
b
3mm
0
1
2
D
D1
D2
E
EUROPEAN PROJECTION
E1
E2
e
1.27
L
0.45
0.45
0.71
0.69
ISSUE DATE
06.06.2019
M
Figureꢀ1ꢀꢀꢀꢀꢀOutlineꢀPG-TDSON-8,ꢀdimensionsꢀinꢀmm
Final Data Sheet
10
Rev.ꢀ2.1,ꢀꢀ2020-02-07
OptiMOSTM5ꢀPower-Transistor,ꢀ80ꢀV
BSC117N08NS5
PG-TDSON-8: Recommended Boardpads & Apertures
1.905
1.905
1.27
3x
0.6
1.27
3x
0.5
1.6
0.2
1.5
0.5
1.27
3x
1.27
3x
0.4
1.905
1.905
copper
solder mask
stencil apertures
all dimensions in mm
Figure 2 Outline Boardpads (TDSON-8), dimensions in mm
Final Data Sheet
11
Rev.ꢀ2.1,ꢀꢀ2020-02-07
OptiMOSTM5 Power-Transistor , 80 V
BSC117N08NS5
Dimension in mm
Figure 3 Outline Tape (TDSON-8)
Final Data Sheet
12
Rev. 2.1, 2020-02-07
OptiMOSTM5 Power-Transistor , 80 V
BSC117N08NS5
Revision History
BSC117N08NS5
Revision: 2020-02-07, Rev. 2.1
Previous Revision
Revision Date
Subjects (major changes since last revision)
2.0
2.1
Release of final version
2014-12-17
2020-02-07
Update package drawings
Trademarks
All referenced product or service names and trademarks are the property of their respective owners.
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81726 München, Germany
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Final Data Sheet
13
Rev. 2.1, 2020-02-07
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INFINEON
BSC119N03MSCG
Power Field-Effect Transistor, 11A I(D), 30V, 0.0119ohm, 1-Element, N-Channel, Silicon, Metal-oxide Semiconductor FET, GREEN, PLASTIC, TDSON-8
INFINEON
BSC119N03MSCGATMA1
Power Field-Effect Transistor, 11A I(D), 30V, 0.0119ohm, 1-Element, N-Channel, Silicon, Metal-oxide Semiconductor FET, GREEN, PLASTIC, TDSON-8
INFINEON
BSC119N03SGAUMA1
Power Field-Effect Transistor, 11.9A I(D), 30V, 0.0119ohm, 1-Element, N-Channel, Silicon, Metal-oxide Semiconductor FET, GREEN, PLASTIC, TDSON-8
INFINEON
BSC120N03LS G
极低的栅极和输出电荷,结合极低的导通状态电阻和小体积封装,使 OptiMOS™ 25V 成为要求较高的服务器、数据通信和通信电压调节器解决方案的最佳选择。OptiMOS™ 30V 产品专为满足笔记本电脑的电源管理需求而量身定制,可改善电磁干扰行为,以及延长电池寿命。可用于半桥配置(功率级 5x6)
INFINEON
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