BGS14M8U9 [INFINEON]
射频开关;BGS14M8U9
High Power SP4T MIPI RF Switch
Features
• 39 dBm power handling capability
• Fast switching speed of 1.3 µs
• Operating up to 7.125 GHz to support latest 5G requirements
• Fully compatible with MIPI 2.1 RFFE standard with 2 USIDs
• Single VIO supply supporting both 1.2 V and 1.8 V
• High port-to-port-isolation
• No power supply decoupling required
• No blocking capacitors required if no DC applied on RF lines
• High EMI robustness
•
Ultra low profile lead-less plastic package (MSL-3, 260 ◦C per IPC/JEDEC J-STD-20)
Potential Applications
5G and 4G Cellular handsets and cellular modems
Product Validation
Qualified for industrial applications according to the relevant tests of JEDEC47/20/22.
Product Description
The BGS14M8U9 is a Single Pole Four Throw (SP4T) high power switch in a compact 9-pin package ( 1.1 x 1.1
mm2).
The device is optimized for 5G and other cellular applications up to 7.125 GHz. With a low insertion loss, high
isolation, high linearity and high power handling, BGS14M8U9 is perfect for 5G and LTE 4G applications, such
as 5G SRS, Uplink-Carrier Aggregation, High Power User Equipment (HPUE Class 2).
Table 1: Ordering Information
Type
Package
Marking
Ordering Information
BGS14M8U9
PG-ULGA-9-1
K
BGS14M8U9 E6327
Final Data Sheet
www.infineon.com
Please read the Important Notice and Warnings at the end of this document
Revision 2.0
2022-08-30
BGS14M8U9
High Power SP4T MIPI RF Switch
Block diagram
Final Data Sheet
Revision 2.0
2022-08-30
BGS14M8U9
High Power SP4T MIPI RF Switch
Table of Contents
Table of Contents
Table of Contents
1
2
1
Absolute maximum ratings
Operation ranges
2
3
4
5
3
RF characteristics
4
MIPI RFFE specification
Package information
9
14
Final Data Sheet
1
Revision 2.0
2022-08-30
BGS14M8U9
High Power SP4T MIPI RF Switch
Absolute maximum ratings
1 Absolute maximum ratings
Table 2: Absolute maximum ratings at TA = 25 ◦C, unless otherwise specified
Parameter
Symbol
Values
Unit
Note / Test Condition
Min.
-0.5
–
Typ.
–
–
Max.
2.2
Supply voltage
VIO
V
–
39
dBm
Pulsed CW with 25% duty cycle and
Tperiod = 4.615 ms / Switched through-
path / VSWR 1:1 / 0.4 - 7.125 GHz
CW with 100% duty cycle / Switched
through-path / VSWR 1:1 / 0.4 - 7.125
GHz / TA = 85◦C
RF input power
PRF_max
–
–
35
dBm
ESD robustness, CDM 1)
ESD robustness, HBM 2)
Junction temperature
Storage temperature range
VESD,CDM -1
VESD,HBM -2
–
–
–
–
–
+1
kV
kV
◦C
◦C
V
+2
125
150
0
Tj
–
–
TSTG
-55
0
–
Maximum DC-voltage on RF ports and VRFDC
ThereisalsoaDCconnectionbetween
switched paths. The DC voltage at RF
ports VRFDC has to be 0 V
–
RF-ground
RFFE control voltage levels
VSCLK
,
-0.7
–
VIO + 0.7
V
VSDATA
(max.2.2)
1) Field-Induced Charged-Device Model ANSI/ESDA/JEDEC JS-002. Simulates charging/discharging events that occur in production equipment and processes.
Potential for CDM ESD events occurs whenever there is metal-to-metal contact in manufacturing.
2) Human Body Model ANSI/ESDA/JEDEC JS-001 (R = 1.5 kΩ, C = 100 pF).
Warning: Stresses above the max. values listed here may cause permanent damage to the device. Maximum ratings
are absolute ratings; exceeding only one of these values may cause irreversible damage to the integrated circuit. Expo-
sure to conditions at or below absolute maximum rating but above the specified maximum operation conditions may
aꢀect device reliability and life time. Functionality of the device might not be given under these conditions.
Final Data Sheet
2
Revision 2.0
2022-08-30
BGS14M8U9
High Power SP4T MIPI RF Switch
Operation ranges
2 Operation ranges
Table 3: Operation ranges
Parameter
Symbol
Values
Typ.
1.8
Unit
Note / Test Condition
Min.
1.65
1.1
Max.
1.95
1.3
V
V
MIPI 1.8 V Bus
MIPI 1.2 V Bus
RFFE supply voltage
VIO
1.2
–
22
50
µA
MIPI 1.8 V operation
Active mode (PRF = 0 dBm)
Supply current
IIO
–
21
50
µA
MIPI 1.2 V operation
Active mode (PRF = 0 dBm)
–
2
–
–
–
–
2
–
µA
V
Low-power mode
RFFE High-Level Input Voltage1)
RFFE Low-Level Input Voltage1)
RFFE High-Level Output Voltage1) VOH
RFFE Low-Level Output Voltage1) VOL
VIH
VIL
0.7*VIO
VIO
–
–
–
–
–
0
0.3*VIO
VIO
V
0.8*VIO
V
0
–
0.2*VIO
3
V
RFFE Ctrl Input Capacitance
CSCLK_I
,
CSDATA_I
CSDATA_L
pF
RFFE Ctrl Load Capacitance
–
50
80
pF
Programmable through MIPI
register; default value 50 pF
RFFE SCLK Write Frequency
RFFE SCLK Read Frequency
fSCLK_W
fSCLK_R
TA
0.032
0.032
-40
–
–
–
52
26
85
MHz
MHz
◦C
Ambient temperature range
–
1)SCLK and SDATA
Table 4: Maximum peak power at TA = −40 ◦C...85 ◦C, unless otherwise specified
Parameter
Symbol
Values
Typ.
–
Unit
Note / Test Condition
Min.
–
Max.
39
dBm
5G NR signal peak power / 9
dB PAPR / Switched through-
path / VSWR 1:1 / 0.4 - 7.125
GHz
–
–
–
–
37
32
dBm
dBm
Pulsed CW with 25% duty cy-
cle and Tperiod = 4.615 ms
/ Switched through-path /
VSWR 1:1 / 0.4 - 7.125 GHz
RMS power of CW with
100% duty cycle / Switched
through-path / VSWR 1:1 / 0.4
- 7.125 GHz
RF input power
PRF_operating
Final Data Sheet
3
Revision 2.0
2022-08-30
BGS14M8U9
High Power SP4T MIPI RF Switch
RF characteristics
3 RF characteristics
Table 5: RF characteristics at TA = −40 ◦C...85 ◦C, PIN = 0 dBm, Supply Voltage VIO = 1.65...1.95 V / 1.1...1.3 V , unless specified
Parameter
Symbol
Values
Typ.
Unit
Note / Test Condition
Min.
Max.
Insertion loss at 25◦C
–
–
–
–
–
–
–
–
0.27
0.28
0.31
0.34
0.37
0.40
0.44
0.52
0.35
0.36
0.47
0.49
0.55
0.63
0.69
0.87
dB
dB
dB
dB
dB
dB
dB
dB
400–698 MHz
699–960 MHz
1200–2170 MHz
2171–2690 MHz
3300–4200 MHz
4400–5000 MHz
5150–5925 MHz
5925–7125 MHz
All RF Ports
IL
Insertion loss
–
–
–
–
–
–
–
–
0.27
0.28
0.32
0.34
0.37
0.40
0.44
0.52
0.38
0.40
0.51
0.53
0.59
0.68
0.77
0.94
dB
dB
dB
dB
dB
dB
dB
dB
400–698 MHz
699–960 MHz
1200–2170 MHz
2171–2690 MHz
3300–4200 MHz
4400–5000 MHz
5150–5925 MHz
5925–7125 MHz
All RF Ports
IL
Return loss
32
31
26
23
21
22
18
17
35
34
33
30
28
28
25
23
–
–
–
–
–
–
–
–
dB
dB
dB
dB
dB
dB
dB
dB
400–698 MHz
699–960 MHz
1200–2170 MHz
2171–2690 MHz
3300–4200 MHz
4400–5000 MHz
5150–5925 MHz
5925–7125 MHz
All RF Ports
RL
Isolation
43
40
33
31
26
23
20
18
49
46
38
35
30
27
25
22
–
–
–
–
–
–
–
–
dB
dB
dB
dB
dB
dB
dB
dB
400–698 MHz
699–960 MHz
1200–2170 MHz
2171–2690 MHz
3300–4200 MHz
4400–5000 MHz
5150–5925 MHz
5925–7125 MHz
Input-output isolation
(ANT port vs. RFx ports)
ISO
Final Data Sheet
4
Revision 2.0
2022-08-30
BGS14M8U9
High Power SP4T MIPI RF Switch
RF characteristics
Table 6: RF characteristics at TA = −40 ◦C...85 ◦C, PIN = 0 dBm, Supply Voltage VIO = 1.65...1.95 V / 1.1...1.3 V , unless specified
Parameter
Symbol
Values
Typ.
Unit
Note / Test Condition
Min.
Max.
Harmonic generation: ANT-RF1/2 at VSWR 1:1, 25 % duty cycle
H2LTE,LB
H2LTE,MB
H2LTE,HB
H2NR,n77
H2NR,n79
H2GSM,LB
H2GSM,HB
H3LTE,LB
H3LTE,MB
H3LTE,HB
H3NR,n77
H3NR,n79
H3GSM,LB
H3GSM,HB
–
–
–
–
–
–
–
–
–
–
–
–
–
–
-85
-78
-70
-65
-62
-67
-65
-87
-85
-74
-71
-80
-74
-66
-62
-58
-62
-62
-82
-81
dBm
dBm
dBm
dBm
dBm
dBm
dBm
dBm
dBm
dBm
dBm
dBm
dBm
dBm
26 dBm, 50 Ω, 663 - 915 MHz
26 dBm, 50 Ω, 1447 - 2020 MHz
29 dBm, 50 Ω, 2300 - 2690 MHz
29 dBm, 50 Ω, 3300 - 4200 MHz
29 dBm, 50 Ω, 4400 - 5000 MHz
35 dBm, 50 Ω, 824 - 915 MHz
33 dBm, 50 Ω, 1710 - 1910 MHz
26 dBm, 50 Ω, 663 - 915 MHz
26 dBm, 50 Ω, 1447 - 2020 MHz
29 dBm, 50 Ω, 2300 - 2690 MHz
29 dBm, 50 Ω, 3300 - 4200 MHz
29 dBm, 50 Ω, 4400 - 5000 MHz
35 dBm, 50 Ω, 824 - 915 MHz
33 dBm, 50 Ω, 1710 - 1910 MHz
2nd Harmonic distortions
-71
3rd Harmonic distortions
-67
-62
-57
-60
-67
-60
-63
Harmonic generation: ANT-RF3/4 at VSWR 1:1, 25 % duty cycle
H2LTE,LB
H2LTE,MB
H2LTE,HB
H2NR,n77
H2NR,n79
H2GSM,LB
H2GSM,HB
H3LTE,LB
H3LTE,MB
H3LTE,HB
H3NR,n77
H3NR,n79
H3GSM,LB
H3GSM,HB
–
–
–
–
–
–
–
–
–
–
–
–
–
–
-87
-84
-79
-74
-72
-68
-72
-87
-85
-75
-72
-68
-60
-64
-82
-80
-74
-70
-68
-63
-67
-83
-83
-71
dBm
dBm
dBm
dBm
dBm
dBm
dBm
dBm
dBm
dBm
dBm
dBm
dBm
dBm
26 dBm, 50 Ω, 663 - 915 MHz
26 dBm, 50 Ω, 1447 - 2020 MHz
29 dBm, 50 Ω, 2300 - 2690 MHz
29 dBm, 50 Ω, 3300 - 4200 MHz
29 dBm, 50 Ω, 4400 - 5000 MHz
35 dBm, 50 Ω, 824 - 915 MHz
33 dBm, 50 Ω, 1710 - 1910 MHz
26 dBm, 50 Ω, 663 - 915 MHz
26 dBm, 50 Ω, 1447 - 2020 MHz
29 dBm, 50 Ω, 2300 - 2690 MHz
29 dBm, 50 Ω, 3300 - 4200 MHz
29 dBm, 50 Ω, 4400 - 5000 MHz
35 dBm, 50 Ω, 824 - 915 MHz
33 dBm, 50 Ω, 1710 - 1910 MHz
2nd Harmonic distortions
3rd Harmonic distortions
-68
-65
-57
-61
Final Data Sheet
5
Revision 2.0
2022-08-30
BGS14M8U9
High Power SP4T MIPI RF Switch
RF characteristics
Table 7: RF characteristics at TA = −40 ◦C...85 ◦C, PIN = 0 dBm, Supply Voltage VIO = 1.65...1.95 V / 1.1...1.3 V , unless specified
Parameter
Symbol
Values
Typ.
Unit
Note / Test Condition
Min.
Max.
Intermodulation distortion IMD2
Band 1 IMD2 high
Band 1 IMD2 low
–
–
–
–
–
–
–
–
-122
-120
-124
-110
-119
-116
-96
-115
-112
-118
-101
-112
-108
-90
dBm
dBm
dBm
dBm
dBm
dBm
dBm
dBm
Band 5 IMD2 high
Band 5 IMD2 low
Band 7 IMD2 high
IMD2
Test conditions, see Table 8
Band 7 IMD2 low
Band 3 + 5 IMD2 ULCA
Band 3 + N77 IMD2 ENDC
Intermodulation distortion IMD3
Band 1 IMD3 half duplex
Band 1 IMD3 double duplex
Band 5 IMD3 half duplex
Band 5 IMD3 double duplex
-95
-88
–
–
–
–
–
–
–
–
-123
-134
-127
-130
-128
-130
-104
-93
-118
-125
-120
-124
-122
-118
-94
dBm
dBm
dBm
dBm
dBm
dBm
dBm
dBm
IMD3
Test conditions, see Table 9
Band 7 IMD3 half duplex
Band 7 IMD3 double duplex
Band 1 + 3 IMD3 ULCA
Band 5 + N78 IMD3 ENDC
-87
Final Data Sheet
6
Revision 2.0
2022-08-30
BGS14M8U9
High Power SP4T MIPI RF Switch
RF characteristics
Table 8: IMD2 testcases1)
Band
Symbol
In-band
frequency
(MHz)
2140
Blocker
frequency 1
(MHz)
1950
Blocker
power 1
(dBm)
20
Blocker
frequency 2 power 2
(MHz)
4090
190
Blocker
(dBm)
-15
-15
-15
-15
-15
-15
10
B1IMD2,high
B1IMD2,low
Band 1
Band 5
Band 7
2140
1950
20
B5IMD2,high
B5IMD2,low
881.5
881.5
836.5
836.5
2535
20
20
1718
45
B7IMD2,high
B7IMD2,low
2655
2655
20
20
5190
120
2535
Band 3 + Band 5 ULCA
Band 3 + N77 ENDC
1)Both blockers applied to same RF path.
B3B5IMD2,ULCA
B3N77IMD2,ENDC
881.5
836.5
1747.5
23
1718
3590
1842.5
23
10
Table 9: IMD3 testcases1)
Band
Symbol
In-band
Frequency
(MHz)
2140
Blocker
Frequency 1 Power 1
Blocker
Blocker
Frequency 2 Power 2
Blocker
(MHz)
1950
1950
836.5
836.5
2535
2535
1950
836.5
(dBm)
20
20
(MHz)
2045
1760
859
791.5
2595
2415
1760
3813
(dBm)
-15
-15
-15
-15
-15
-15
10
B1IMD3,half duplex
B1IMD3,double duplex
B5IMD3,half duplex
B5IMD3,double duplex
B7IMD3,half duplex
B7IMD3,double duplex
B1B3IMD3,ULCA
Band 1
Band 5
Band 7
2140
881.5
881.5
20
20
2655
2655
20
20
Band 1 + band 3 ULCA
Band 5 + N78 ENDC
1)Both blockers applied to same RF path.
2140
23
B5N78IMD3,ENDC
2140
26
10
Final Data Sheet
7
Revision 2.0
2022-08-30
BGS14M8U9
High Power SP4T MIPI RF Switch
RF characteristics
Table 10: RF characteristics at TA = , PIN = 0 dBm, Supply Voltage VIO = 1.65...1.95 V / 1.1...1.3 V , unless specified
−40 ◦C...85 ◦C
Parameter
Symbol
Values
Typ.
Unit
Note / Test Condition
Min.
Max.
Switching Time
Power up settling time
RF rise time
tpup
tRT
–
–
–
7
20
µs
µs
µs
Aꢀer power down mode
0.6
1
0.8
1.8
Time from 10% to 90% RF power
RF switching time - ON
tST,on
50% last SCLK falling edge for Register Write
Command to 90% of final voltage amplitude
ofthesignal; switchingbetweentwoRFpaths
and from isolation mode
RF switching time - OFF
tST,oꢁ
–
0.9
1.8
µs
50% last SCLK falling edge for Register Write
Command to 10% initial voltage amplitude of
the signal; switching between two RF paths
and to isolation mode
VIO
1)
>120ns
tPUP
tST
SCLK
SDATA
Power Up
Command
Switch A
Command
Switch B
Command
50%
50%
1)
timing starts @ VIO > VIOmin (1.65V) and ends @ SDATA /SCLK < VILmax (0.3 x VIO
)
90%
RF Path A
90%
RF Path B
Figure 1: MIPI Timing Diagram
Final Data Sheet
8
Revision 2.0
2022-08-30
BGS14M8U9
High Power SP4T MIPI RF Switch
MIPI RFFE specification
4 MIPI RFFE specification
The MIPI RFFE interface is implemented according to the following specifications and documents:
• MIPI Alliance Specification for RF Front-End Control Interface version 2.1 - 18 December 2017
• MIPI Alliance Errata 01 for MIPI RFFE Specification Version v2.1 - 24 February 2019
• Qualcomm RFFE Vendor specification 80-N7876-1 Rev. Y (December 3, 2018)
Table 11: MIPI features
Feature
Supported
Comment
MIPI RFFE 2.1 standard
Yes
Yes
Yes
Backward compatible to MIPI 2.0 standard
RFFE Bus length of up to 15 cm (standard)
Longer reach allows for longer RFFE bus lengths. This
requires a limitation to the standard frequency range of
RFFE plus additional timing requirements for all devices
on the bus
Standard reach RFFE bus length
Longer reach RFFE bus length feature (MIPI RFFE
2.1 optional feature)
Programmable driver strength (MIPI RFFE 2.x fea-
ture)
Yes
Allows to program MIPI device bus driver strength (rel-
evant for read back messages) up to 80 pF via BUS_LD-
register (0x2B); Default value: 50 pF
Register 0 write command sequence
Yes
Yes
Yes
Yes
Shortened write sequence for register 0
Caution: only 7 LSBs in Reg 0 can be addressed
Standard register read/write procedure addressing stan-
dard register space of 0x00 – 0x1F
Register read and write command sequence
Extended register read and write command se-
quence
Register read/write procedure addressing extended reg-
ister space of 0x00 – 0xFF
Masked write command sequence (MIPI 2.1 op-
tional feature)
Allow only certain bits in a register to be updated during
a write command. Relevant registers marked "MW" in
below register mapping tables
Support for standard frequency range operations
for SCLK
Yes
Yes
Yes
Yes
Yes
Yes
Yes
SCLK range 32 kHz
mands
– 26 MHz for read and write com-
Support for extended frequency range operations
for SCLK
SCLK range 26 MHz – 52 MHz for write commands
sRead (synchronous Read) full speed or half
speed up to 26 MHz (MIPI 2.x feature)
Regular read full speed or half speed up to 13 MHz
(MIPI RFFE 1.10-2.x feature)
Relaxed slave setup time requirements as master sam-
ples data on rising edge of SCLK signal
Stricter slave setup time requirements as master sam-
ples data on falling edge of SCLK signal
Product ID + extended product ID register
PRODUCT_ID (address 0x1D) and EXT_PRODUCT_ID (ad-
dress 0x20) registers
Extended manufacturer ID (10->12 bit) (MIPI 2.1
optional feature)
The new 2 bits In MIPI 2.1 are placed in RFFE USID register
at address 0x1F; value is 0 in IFX products
Revision ID register
This register contains the device revision (address 0x21)
Final Data Sheet
9
Revision 2.0
2022-08-30
BGS14M8U9
High Power SP4T MIPI RF Switch
MIPI RFFE specification
Table 11: MIPI features (continued)
Feature
Supported
Comment
Programmable GSID (group slave identifier)
Yes
RFFE 2.x GROUP_SID register (at address 0x22); Only
in case RFFE 1.1 backwards compatibility is supported:
GROUP_SID0 bit-field access at address 0x1B (copy of
GROUP_SID0)
Programmable USID (unique slave identifier)
Yes
Device can be also explicitly addressed via combination
of (old) USID, Manufacturer ID, and (extended) product
ID to reprogram USID via (extended) register write se-
quence (see MIPI RFFE Spec v2.1 Chapter 6.2.1)
3 "standard" triggers via PM_TRIG[5:0] consisting of 3
Mask- and 3 trigger bits
Trigger functionality
Yes
Yes
Ignored trigger handling in low power mode
When device is and stays in low power mode, write to
trigger registers will be ignored (Note: when changing
power mode, writing to trigger registers are not ignored)
additional eight triggers and the associated trigger
masks, have been added in MIPI 2.1 (registers at ad-
dresses 0x2D and 0x2E)
Extended triggers and trigger masks (MIPI 2.1 op-
tional feature)
Yes
Yes
Broadcast / GSID write to PM TRIG register
The above mentioned trigger register (and extended trig-
ger register) can be accessed via Broadcast/GSID writes
to trigger several MIPI devices snychronously. NOTE:
Trigger Mask bits are nor changed with Broadcast/GSID
writes
Reset
Yes
Yes
Reset is possible via VIO, PM TRIG or register SW_RST
(0x23); NOTE: SW_RST only resets user defined registers,
it does not reset the values of any reserved registers
RFFE 2.x ERR_SUM register (address 0x24); only in
case RFFE 1.1 backwards compatibility is supported:
RFFE_STATUS register access at address 0x1A (copy of
ERR_SUM)
Status / error sum register
USID select via SDATA/SCLK swap feature
Yes
An alternate set of USIDs can be obtained by swapping
SDATA/SCLK, see Tab. 12
Table 12: USID table
# USID
1
SCLK/SDATA swapping
No
USID value (bin)
1010
1011
USID value (hex)
0xA
0xB
2
Yes
Final Data Sheet
10
Revision 2.0
2022-08-30
BGS14M8U9
High Power SP4T MIPI RF Switch
MIPI RFFE specification
Table 13: Register mapping, Table I
Register
Address
Register Name
Data Function
Bits
Description
Default
Broadcast_ID Trigger
R/W
Support
Support
0x00
0x1C
SW_CTRL0
7:4
SW_CTRL
Reserved for future use.
0x00
No
All
Triggers
(0 - 10)
R/W
MW
3:0
7
SW_CTRL
SW_CTRL
Refer to Tab. 16
PM_TRIG
PWR_MODE[1], Operation Mode
0: Normal operation (ACTIVE)
1
Yes
No
N/A
R/W
MW
1: Low Power Mode (LOW POWER)
0: No action (ACTIVE)
6
5
PWR_MODE[0], State Bit Vector
TRIGGER_MASK_2
0
0
1: Powered Reset (STARTUP to ACTIVE
to LOW POWER)
0: Data writes to registers tied to TRIG-
GER_2 are masked.
1: Data writes to registers tied to TRIG-
GER_2 are not masked.
4
3
2
TRIGGER_MASK_1
TRIGGER_MASK_0
TRIGGER_2
0: Data writes to registers tied to TRIG-
GER_1 are masked.
1: Data writes to registers tied to TRIG-
GER_1 are not masked.
0x1C
PM_TRIG
0: Data writes to registers tied to TRIG-
GER_0 are masked.
0
0
No
N/A
R/W
MW
1: Data writes to registers tied to TRIG-
GER_0 are not masked.
0: No action. Data is held in shadow reg-
isters.
Yes
1: Data is transferred from shadow regis-
ters to active registers for registers tied
to TRIGGER_2.
0x1C
0x1C
0x1D
PM_TRIG
1
0
TRIGGER_1
0: No action. Data is held in shadow reg-
isters
0
Yes
Yes
No
N/A
N/A
N/A
R/W
MW
1: Data is transferred from shadow regis-
ters to active registers for registers tied
to TRIGGER_1.
PM_TRIG
TRIGGER_0
0: No action. Data is held in shadow reg-
isters.
0
R/W
MW
1: Data is transferred from shadow regis-
ters to active registers for registers tied
to TRIGGER_0.
PRODUCT_ID
7:0
PRODUCT_ID[7:0]
Product ID.
0x5E
R
0x1E
0x1F
MANUFACTURER_ID
USID
7:0
7:6
5:4
3:0
MANUFACTURER_ID[7:0]
MANUFACTURER_ID[11:10]
MANUFACTURER_ID[9:8]
USID[3:0]
Manufacturer ID.
0x1A
00
No
No
N/A
N/A
R
R
Manufacturer ID.
Manufacturer ID.
01
These bits store the USID of the device.
See
No
N/A
R/W
Tab. 12
0x20
0x21
EXT_PRODUCT_ID
REV_ID
7:0
7:4
3:0
7:4
3:0
7
EXT_PRODUCT_ID[7:0]
MAIN_REVISION
SUB_REVISION
GSID0[3:0]
Extension to PRODUCT_ID
Chip Main Revision
0x00
0x0
No
No
N/A
N/A
R
R
Chip Sub Revision
0x22
0x23
GSID
Primary Group Slave ID
Secondary Group Slave ID
0x0
0
No
N/A
N/A
R/W
R/W
GSID1[3:0]
UDR_RST
UDR_RST
Reset all configurable non−RFFE Re-
Yes
served registers to default values.
0: Normal Operation
1: Soꢀware Reset
6:0
RESERVED
Reserved for future use. Set to all 0
0000
000
Final Data Sheet
11
Revision 2.0
2022-08-30
BGS14M8U9
High Power SP4T MIPI RF Switch
MIPI RFFE specification
Table 14: Register mapping, Table II
Register
Address
Register Name
Data Function
Bits
Description
Default
Broadcast_ID Trigger
R/W
Support
Support
0x24
ERR_SUM
7
6
RESERVED
Reserved for future error codes.
0
No
N/A
R
COMMAND_FRAME_PARITY_ERR
Command Sequence received with par-
ity error−discard command.
Command length error.
5
4
3
2
1
COMMAND_LENGTH_ERR
ADDRESS_FRAME_PARITY_ERR
DATA_FRAME_PARITY_ERR
READ_UNUSED_REG
Address frame with parity error.
Data frame with parity error.
Read command to an invalid address.
Write command to an invalid address.
WRITE_UNUSED_REG
BID_GID_ERR
0
Read command with a BROADCAST_ID
or GROUP_ID.
0x2B
BUS_LD
7:4
3:0
RESERVED
Reserved
0x0
No
No
N/A
N/A
R
BUS_LD[3:0]
Set approximate bus load
0x0: 10 pF
0x04
R/W
0x1: 20 pF
0x2: 30 pF
0x3: 40 pF
0x4: 50 pF
0x5: 60 pF
0x6: 70 pF
0x7: 80 pF
0x8-0xF: Spare
0x2D
EXT_TRIG_MASK
7
6
5
4
3
2
1
EXT_TRIGGER_MASK_10
EXT_TRIGGER_MASK_9
EXT_TRIGGER_MASK_8
EXT_TRIGGER_MASK_7
EXT_TRIGGER_MASK_6
EXT_TRIGGER_MASK_5
EXT_TRIGGER_MASK_4
EXT_TRIGGER_MASK_3
0: Data masked (held in shadow regis-
ters)
1: Datanotmasked(godirectlytotheac-
tive registers)
1
No
N/A
R/W,
MW
0: Data masked (held in shadow regis-
ters)
1: Datanotmasked(godirectlytotheac-
tive registers)
0: Data masked (held in shadow regis-
ters)
1: Datanotmasked(godirectlytotheac-
tive registers)
0: Data masked (held in shadow regis-
ters)
1: Datanotmasked(godirectlytotheac-
tive registers)
0: Data masked (held in shadow regis-
ters)
1: Datanotmasked(godirectlytotheac-
tive registers)
0: Data masked (held in shadow regis-
ters)
1: Datanotmasked(godirectlytotheac-
tive registers)
0x2D
EXT_TRIG_MASK
0: Data masked (held in shadow regis-
ters)
1: Datanotmasked(godirectlytotheac-
tive registers)
1
No
N/A
R/W,
MW
0
0: Data masked (held in shadow regis-
ters)
1: Datanotmasked(godirectlytotheac-
tive registers)
Final Data Sheet
12
Revision 2.0
2022-08-30
BGS14M8U9
High Power SP4T MIPI RF Switch
MIPI RFFE specification
Table 15: Register mapping, Table III
Register
Address
Register Name
Data Function
Bits
Description
Default
Broadcast_ID Trigger
R/W
Support
Support
0x2E
0x2E
0x2E
0x2E
EXT_TRIG_REG
7
6
5
4
3
2
1
EXT_TRIGGER_10
0: No action. Data is held in shadow reg-
isters
1: Data is transferred to active registers
0
Yes
N/A
R/W,
MW
EXT_TRIGGER_9
EXT_TRIGGER_8
EXT_TRIGGER_7
EXT_TRIGGER_6
EXT_TRIGGER_5
EXT_TRIGGER_4
EXT_TRIGGER_3
0: No action. Data is held in shadow reg-
isters
1: Data is transferred to active registers
EXT_TRIG_REG
EXT_TRIG_REG
EXT_TRIG_REG
0: No action. Data is held in shadow reg-
isters
1: Data is transferred to active registers
0
0
0
Yes
Yes
Yes
N/A
N/A
N/A
R/W,
MW
0: No action. Data is held in shadow reg-
isters
1: Data is transferred to active registers
0: No action. Data is held in shadow reg-
isters
1: Data is transferred to active registers
R/W,
MW
0: No action. Data is held in shadow reg-
isters
1: Data is transferred to active registers
0: No action. Data is held in shadow reg-
isters
1: Data is transferred to active registers
R/W,
MW
0
0: No action. Data is held in shadow reg-
isters
1: Data is transferred to active registers
Table 16: Modes of operation (truth table)
State
Mode
SW_CTRL
D7
D6
D5
D4
D3
D2
D1
D0
1
ALL OFF
(Isolation)
RF1 on
Reserved Reserved Reserved Reserved
0
0
0
0
2
3
4
5
Reserved Reserved Reserved Reserved
Reserved Reserved Reserved Reserved
Reserved Reserved Reserved Reserved
Reserved Reserved Reserved Reserved
0
0
0
1
0
0
1
0
1
1
RF2 on
0
0
0
RF3 on
0
0
RF4 on
0
Final Data Sheet
13
Revision 2.0
2022-08-30
BGS14M8U9
High Power SP4T MIPI RF Switch
Package information
5 Package information
The switch has a package size of 1100 µm in X-dimension and 1100 µm in Y-dimension with a maximum deviation of ±50 µm in
each dimension. Fig. 2 shows the footprint from top view. The pin definitions are listed in Tab. 18.
Table 17: Mechanical data
Parameter
Symbol
X
Y
Value
Unit
µm
µm
µm
Package X-dimension
Package Y-dimension
Package height
1100 ± 50
1100 ± 50
530 ± 50
H
Figure 2: Pin configuration (top view)
Table 18: Pin definition and function
Pin No.
1
Name
VIO
Function
(MIPI) Power supply
Rx Port
2
3
4
5
6
7
8
9
RF4
RF2
Rx Port
ANT
RF1
RF Input
Rx Port
RF3
Rx Port
SDATA
SCLK
GND
MIPI Control
MIPI Control
GND
Final Data Sheet
14
Revision 2.0
2022-08-30
BGS14M8U9
High Power SP4T MIPI RF Switch
Package information
Table 19: ESD robustness, System Level Test (SLT)
Parameter
Symbol
Values
Typ.
–
Unit
kV
Note / Test Condition
Min.
-6
Max.
+6
IEC61000-4-2; withshunt56nH,
all RF ports
ESD capability, SLT1)
VESD,SLT
-8
–
+8
kV
IEC61000-4-2; with shunt 27nH,
all RF ports
1) IEC 61000-4-2 (R = 330 Ω, C = 150 pF), contact discharge.
Figure 3: Marking specification (top view): Date code (YW) digits Y and W defined in Table 20/21
Table 20: Year date code marking - digit "Y"
Year
"Y"
0
1
2
3
4
5
6
7
8
9
Year
"Y"
0
1
2
3
4
5
6
7
8
9
2020
2021
2022
2023
2024
2025
2026
2027
2028
2029
2030
2031
2032
2033
2034
2035
2036
2037
2038
2039
Final Data Sheet
15
Revision 2.0
2022-08-30
BGS14M8U9
High Power SP4T MIPI RF Switch
Package information
Table 21: Week date code marking - digit "W"
Week
"W"
A
B
C
D
E
Week
12
13
14
15
16
17
18
19
"W"
N
P
Q
R
S
T
U
V
W
Y
Week
23
24
25
26
27
28
29
30
31
32
33
"W"
4
5
6
7
a
b
c
d
e
f
Week
34
35
36
37
38
39
40
41
42
43
"W"
h
j
k
l
n
p
q
r
Week
45
46
47
48
49
50
"W"
v
x
y
z
8
9
2
3
1
2
3
4
5
6
7
8
9
10
11
F
G
H
J
K
L
51
52
20
21
22
s
t
u
Z
g
44
Final Data Sheet
16
Revision 2.0
2022-08-30
BGS14M8U9
High Power SP4T MIPI RF Switch
Package information
Figure 4: Package outline drawing (top, side and bottom views)
Figure 5: Footprint recommendation
Final Data Sheet
17
Revision 2.0
2022-08-30
BGS14M8U9
High Power SP4T MIPI RF Switch
Package information
Figure 6: Carrier tape drawing (top and side views)
Final Data Sheet
18
Revision 2.0
2022-08-30
BGS14M8U9
High Power SP4T MIPI RF Switch
Revision History
Page or Item
Subjects (major changes since previous revision)
Revision 2.0, 2022-08-30
Revision 2.0
Final Data Sheet Creation
Final Data Sheet
19
Revision 2.0
2022-08-30
Trademarks
All referenced product or service names and trademarks are the property of their respective owners.
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