AUIRS2184STR_技术文档

July 27^th, 2010

Automotive Grade

AUIRS2184(4)S

HALF-BRIDGE DRIVER

Features

Product Summary

•

Floating channel designed for bootstrap operation

Topology

V_OFFSET

Half-Bridge

600 V

Fully operational to + 600 V

Tolerant to negative transient voltage, dV/dt

immune

V_OUT

10 V – 20 V

1.9 A & 2.3 A

•

Gate drive supply range from 10 V to 20 V

Undervoltage lockout for both channels

3.3 V and 5 V input logic compatible

Matched propagation delay for both channels

Logic and power ground +/- 5 V offset

Lower di/dt gate driver for better noise immunity

Output source/sink current capability

(typical) 1.9 A/2.3 A

I_o+& I _o-(typical)

600 ns & 230 ns

t_on& t_off(typical)

400 ns (R_DT= 0 Ω)

5 µs (R_DT= 200 kΩ)

Deadtime (typical)

Package Options

•

Lead free, RoHS compliant

Automotive Qualified*

Typical Applications

DC/DC converter

pump and compressor

piezo injection

•

Starter/ alternator

8-Lead SOIC

AUIRS2184S

14-Lead SOIC

Narrow Body

AUIRS21844S

Typical Connection

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AUIRS2184(4)(S)

Table of Contents

Page

3

Description

Feature Comparison

3

Qualification Information

Absolute Maximum Ratings

Recommended Operating Conditions

Dynamic Electrical Characteristics

Static Electrical Characteristics

Functional Block Diagram

Input/Output Pin Equivalent Circuit Diagram

Lead Definitions

4

5

6

7

8

9-10

11

12

13-17

18

19-20

21

22

23

Lead Assignments

Application Information and Additional Details

Parameter Temperature Trends

Package Details

Tape and Reel Details

Part Marking Information

Ordering Information

Important Notice

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2

AUIRS2184(4)(S)

Description

The AUIRS2184(4)S are high voltage, high speed power MOSFET and IGBT drivers with dependent high

and low-side referenced output channels. Proprietary HVIC and latch immune CMOS technologies enable

ruggedized monolithic construction. The logic input is compatible with standard CMOS or LSTTL output,

down to 3.3 V logic. The output drivers feature a high pulse current buffer stage designed for minimum driver

cross-conduction. The floating channel can be used to drive an N-channel power MOSFET or IGBT in the

high-side configuration which operates up to 600 V.

Feature Comparison: AUIRS2181(4)/AUIRS2183(4)/AUIRS2184(4)

Cross-

Part

Input

Logic

Conduction

Prevention

logic

Dead-Time

Ground

Pins

Ton/Toff

2181

21814

2183

21834

2184

21844

COM

V_SS/COM

COM

V_SS/COM

COM

V_SS/COM

160/200 ns

600/230 ns

HIN/LIN

IN/SD

no

yes

none

Internal 500ns

Programmable 0.4 – 5 us

Internal 500ns

Programmable 0.4 – 5 us

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3

AUIRS2184(4)(S)

Qualification Information^†

Automotive

(per AEC-Q100^††)

Comments: This family of ICs has passed an

Automotive qualification. IR’s Industrial and Consumer

qualification level is granted by extension of the higher

Automotive level.

Qualification Level

SOIC8

MSL3^†††260°C

Moisture Sensitivity Level

(per IPC/JEDEC J-STD-020)

SOIC14N

Class M1 (Pass +/-100V)

(per AEC-Q100-003)

Machine Model

Class H1C (Pass +/-1500V)

ESD

Human Body Model

(

)

per AEC-Q100-002

Class C4 (Pass +/-1000V)

(per AEC-Q100-011)

Class II, Level A^††††

(per AEC-Q100-004)

Yes

Charged Device Model

IC Latch-Up Test

RoHS Compliant

†

††

Qualification standards can be found at International Rectifier’s web site http://www.irf.com/

Exceptions to AEC-Q100 requirements are noted in the qualification report.

††† Higher MSL ratings may be available for the specific package types listed here. Please contact your

International Rectifier sales representative for further information.

†††† IN, SD, DT Class II Level B at 40mA per JESD78.

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4

AUIRS2184(4)(S)

Absolute Maximum Ratings

Absolute Maximum Ratings indicate sustained limits beyond which damage to the device may occur. All

voltage parameters are absolute voltages referenced to COM lead. Stresses beyond those listed under "

Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only; and

functional operation of the device at these or any other condition beyond those indicated in the

“Recommended Operating Conditions” is not implied. Exposure to absolute-maximum-rated conditions for

extended periods may affect device reliability. The thermal resistance and power dissipation ratings are

measured under board mounted and still air conditions. Ambient temperature (T_A) is 25°C, unless otherwise

specified.

Symbol

V_B

Definition

High-side floating absolute voltage

High-side floating supply offset voltage

High-side floating output voltage

Low-side and logic fixed supply voltage

Low-side output voltage

Min

-0.3

Max

620

Units

V_S

V_B- 25

V_S- 0.3

-0.3

V_B+ 0.3

20^†

V_HO

V_CC

V_LO

V

-0.3

V_CC+ 0.3

50

DT

Programmable deadtime pin voltage

V_SS-0.3

V_CC- 20

—

V_IN

Logic input voltage (IN & SD)

Logic ground

V_SS

dV_S/dt

Allowable offset supply voltage transient

V/ns

W

(8-lead SOIC)

(14-lead SOIC)

(8-lead SOIC)

(14-lead SOIC)

—

0.625

1.0

P_D

Package power dissipation @ TA ≤ 25°C

200

120

Rth_JA

Thermal resistance, junction to ambient

°C/W

°C

T_J

T_S

T_L

Junction temperature

—

-50

—

150

300

Storage temperature

Lead temperature (soldering, 10 seconds)

†

All supplies are fully tested at 25 V and an internal 20 V clamp exists for each supply.

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5

AUIRS2184(4)(S)

Recommended Operating Conditions

The input/output logic timing diagram is shown in Figure 1. For proper operation the device should be used

within the recommended conditions. The V_Sand V_SSoffset rating are tested with all supplies biased at a 15 V

differential.

Symbol

V_B

Definition

High-side floating supply absolute voltage

High-side floating supply offset voltage

High-side floating output voltage

Low-side and logic fixed supply voltage

Low-side output voltage

Logic input voltage (IN & SD) ⁽

Programmable deadtime pin voltage

Logic ground

Min

V_S+ 10

(††)

V_S

Max

V_S+ 20

600

V_B

Units

V_S

V_HO

V_CC

V_LO

V_IN

10

20

V

0

V_CC

5

†††)

V_SS

-5

DT

V_SS

T_A

Ambient temperature

-40

125

°C

††

Logic operational for V_Sof -5 V to +600 V. Logic state held for V_Sof -5 V to –V_BS. (Please refer to Design

Tip DT97-3 for more details).

†††

HIN and LIN are internally clamped with a 5.2 V zener diode.

Dynamic Electrical Characteristics

Unless otherwise noted, these specifications apply for an operating junction temperature range of -40°C ≤ Tj

≤ 125°C with bias conditions of V_BIAS(V_CC, V_BS) = 15 V, V_SS= COM, C_L= 1000 pF.

Symbol

t_on

Definition

Turn-on propagation delay

Min Typ Max Units Test Conditions

—

600 900

230 400

220 350

V_S= 0 V

t_off

Turn-off propagation delay

V_S= 0 V or 600 V

t_sd

Shut-down propagation delay

Delay matching, HS & LS turn-on

Delay matching , HS & LS turn-off

Turn-on rise time

MT_on

MT_off

t _r

3

90

ns

15 40

15 60

12 35

V_S= 0 V

t _f

Turn-off fall time

280 375 520

R_DT= 0 Ω

Deadtime: LO turn-off to HO turn-on (DT_LO-HO) &

DT

HO turn-off to LO turn-on (DT_HO-LO

)

3.9

—

5

0

6

µs

ns

R

_DT= 200 kΩ

R_DT= 0 Ω

50

MDT

Deadtime matching DT_LO-HO- DT_HO-LO

—

600

R_DT= 200 kΩ

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6

AUIRS2184(4)(S)

Static Electrical Characteristics

Unless otherwise noted, these specifications apply for an operating junction temperature range of -40°C ≤ Tj

≤ 125°C with bias conditions of V_BIAS(V_CC, V_BS) = 15 V, V_SS= COM. The V_IL,V_IHand I_INparameters are

referenced to V_SS/COM and are applicable to the respective input leads: IN andSD. The V_O,I_Oand R_on

parameters are referenced to COM and are applicable to the respective output leads: HO and LO.

Test Conditions

Min Typ Max Units

Symbol

V_IH

Definition

Logic “1” input voltage for HO & logic “0” for LO

Logic “0” input voltage for HO & logic “1” for LO

2.5

—

0.8

—

V_IL

V

_CC= 10 V to 20 V

V_SD,TH+

V_SD,TH-

V_OH

2.5

—

SDinput positive going threshold

V

0.8

1.5

0.2

50

SDinput negative going threshold

High level output voltage, V_BIAS- V_O

—

I_O= 0 A

I_O= 20 mA

V_OL

Low level output voltage, V_O

Offset supply leakage current

Quiescent V_BSsupply current

Quiescent V_CCsupply current

Logic “1” input bias current

Logic “0” input bias current

—

I_LK

—

V_B= V_S= 600 V

µA

I_QBS

10 50 130

V_IN= 0 V or 5 V

I_QCC

I_IN+

0.4 1.0 1.3 mA

—

25 60

5.0

IN = 5 V, SD = 0 V

IN = 0 V,SD= 5 V

µA

V

I_IN-

—

V_CCUV+

V_BSUV+

V_CCUV-

V_BSUV-

V_CCand V_BSsupply undervoltage positive going

threshold

V_CCand V_BSsupply undervoltage negative going

threshold

8.0 8.9 9.8

7.4 8.2 9.0

V_CCUVH

V_BSUVH

Hysteresis

0.3 0.7

1.4 1.9

—

V_O= 0V,

PW ≤ 10us,

T_J= 25°C

†)

(

Output high short circuit pulsed current

I_O25+

V_O= 15V,

PW ≤ 10us,

T_J= 25°C

†)

(

Output low short circuit pulsed current

1.8 2.3

—

I_O25-

A

V_O= 0 V,

PW ≤ 10 µs

V_O= 15 V,

PW ≤ 10 µs

†) ††)

(

Output high short circuit pulsed current

Output low short circuit pulsed current

1.2

1.5

—

I_O+

†) ††)

(

I_O-

†) Guaranteed

(

by design

††)

I_O+and I_O-decrease with rising temperature

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7

AUIRS2184(4)(S)

Functional Block Diagram: AUIRS2184, AUIRS21844

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8

AUIRS2184(4)(S)

Input/Output Pin Equivalent Circuit Diagrams: AUIRS2184S

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9

AUIRS2184(4)(S)

Input/Output Pin Equivalent Circuit Diagrams: AUIRS21844S

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10

AUIRS2184(4)(S)

Lead Definitions

Symbol

Description

Logic input for high-side and low-side gate driver outputs (HO and LO), in phase with HO

(referenced to COM for AUIRS2184 and V_SSfor AUIRS21844)

IN

Logic input for shutdown (referenced to COM for AUIRS2184 and V_SSfor AUIRS21844)

Programmable deadtime lead, referenced to V_SS(AUIRS21844 only)

Logic ground (AUIRS21844 only)

SD

DT

V_SS

V_B

High-side floating supply

HO

V_S

High-side gate drive output

High-side floating supply return

V_CC

LO

Low-side and logic fixed supply

Low-side gate drive output

COM

Low-side return

Lead Assignments: AUIRS2184(4)S

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11

AUIRS2184(4)(S)

Application Information and Additional Details

SD

Figure 1: Input/Output Timing Diagram

Figure 2: Switching Time Waveform Definitions

SD

Figure 3: Shutdown Waveform Definitions

Figure 4: Deadtime Waveform Definitions

Figure 5: Delay Matching Waveform Definitions

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12

AUIRS2184(4)(S)

Parameter Trends vs. Temperature and vs. Supply Voltage

Figures of this chapter provide information on the experimental performance of the AUIRS2184(4)S HVIC.

The line plotted in each figure is generated from actual lab data.

A large number of individual samples were tested at three temperatures (-40 ºC, 25 ºC, and 125 ºC) in order

to generate the experimental curve. The line consists of three data points (one data point at each of the

tested temperatures) that have been connected together to illustrate the understood trend. The individual

data points on the Typ. curve were determined by calculating the averaged experimental value of the

parameter (for a given temperature).

A different set of individual samples was used to generate curves of parameter trends vs. supply voltage.

1400

700

1200

650

Max.

M ax.

1000

600

Typ.

800

M in.

550

600

400

500

-50

-25

0

25

50

75

100

125

10

12

14

16

18

20

Temperature (^oC)

Supply Voltage (V)

Figure 6A. Turn-on Propagation Delay vs.

Temperature

Figure 6B. Turn-on Propagation Delay vs.

Supply Voltage

600

500

400

300

200

100

0

350

300

250

200

150

Max.

Typ.

M ax.

Typ.

M in.

10

12

14

16

18

20

-50

-25

0

25

50

75

100

125

Supply Voltage (V)

Temperature (^oC)

Figure 7B. Turn-off Propagation Delay vs.

Figure 7B. Turn-off Propagation Delay

Figure 7A. Turn-off Propagation Delay vs.

Temperature

Supply Voltage

vs. Supply Voltage

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13

AUIRS2184(4)(S)

500

400

300

200

100

0

350

300

250

200

150

Max.

Typ.

M ax.

Typ.

M in.

-50

-25

0

25

50

75

100

125

10

12

14

16

18

20

Temperature (^oC)

Supply Voltage (V)

Figure 8A. SD Propagation Delay vs. Temperature

Figure 8B. SD Propagation Delay vs. Supply

Voltage

18

16

M ax.

14

Typ.

12

M in.

10

8

6

4

-50

-25

0

25

50

75

100

125

Temperature (^oC)

Figure 9A. Turn-off Fall Time vs. Temperature

20

18

16

14

12

10

Max.

Typ.

Min.

-50

-25

0

25

50

75

100

125

Temperature (^oC)

Figure 10. Turn-on Rise Time vs. Temperature

Figure 11. Deadtime vs R_DT

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14

AUIRS2184(4)(S)

450

400

350

300

250

1100

900

700

500

300

100

M ax.

Typ.

M in.

Max.

Typ.

Min.

-50

-25

0

25

50

75

100

125

10

12

14

16

18

20

Temperature (^oC)

Supply Voltage (v)

Figure 12B. Deadtime vs. Supply Voltage

Figure 12A. Deadtime vs Temperature

2.0

140

Max.

1.5

1.0

0.5

0.0

120

100

80

Typ.

Min.

M ax.

Typ.

M in.

60

-50

-25

0

25

50

75

100

125

-50

-25

0

25

50

75

100

125

Temperature (^oC)

Figure 13. High Level Output vs. Temperature

(I_O= 0 mA)

Figure 14. Low Level Output vs. Temperature

120

100

40

30

Max.

80

20

Max.

60

Typ.

10

40

M in.

Min.

Typ.

20

0

-50

-25

0

25

50

75

100

125

-50

-25

0

25

50

75

100

125

Temperature (^oC)

Figure 16. V_BSSupply Current vs. Temperature

Figure 15. Offset Supply Leakage Current vs.

Temperature

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15

AUIRS2184(4)(S)

1100

1050

1000

950

M ax.

Typ.

M in.

900

-50

-25

0

25

50

75

100

125

Temperature (^oC)

Figure 17A. V_ccSupply Current vs. Temperature

Figure 17B. V_CCSupply Current vs. V_CCSupply

Voltage (V)

40

0.00

-0.02

30

20

10

M ax.

-0.04

Max.

Typ.

M in.

-0.06

Typ.

Min.

-0.08

-0.10

-50

-25

0

25

50

75

100

125

-50

-25

0

25

50

75

100

125

Temperature (^oC)

Figure 18. Logic “1” Input Bias Current vs. Temperature

Figure 19. Logic “0” Input Bias Current vs.

Temperature

10.0

9.5

9.0

8.5

8.0

7.5

7.0

M ax

M ax.

9.0

Typ.

M in.

Typ.

M in.

8.5

8.0

-50

-25

0

25

50

75

100

125

-50

-25

0

25

50

75

100

125

Temperature (^oC)

Figure 21. V_CCand V_BSUndervoltage Threshold (-) vs.

Temperature

Figure 20. V_CCand V_BSUndervoltage Threshold (+) vs.

Temperature

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16

AUIRS2184(4)(S)

5

4

3

2

1

0

Typ.

Min.

10

12

14

16

18

20

Supply Voltage (V)

Figure 22. Output Source Current (A) vs. Temperature

Figure 22A. Output Source Current (A) vs. Supply

Voltage (V)

5

4

3

2

Typ.

1

Min.

0

10

12

14

16

18

20

Supply Voltage (V)

Figure 23. Output Sink Current (A) vs. Temperature

Figure 23A. Output Sink Current (A) vs. Supply

Voltage (V)

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17

AUIRS2184(4)(S)

Package Details: SOIC8

Package Details: SOIC14N

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18

AUIRS2184(4)(S)

Tape and Reel Details: SOIC8

LOADED TAPE FEED DIRECTION

A

B

H

D

F

C

NOTE : CONTROLLING

DIMENSION IN MM

E

G

CARRIER TAPE DIMENSION FOR 8SOICN

Metric Imperial

Code

A

B

C

D

E

F

G

H

Min

7.90

3.90

11.70

5.45

6.30

5.10

1.50

Max

8.10

4.10

12.30

5.55

6.50

5.30

n/a

Min

Max

0.318

0.161

0.484

0.218

0.255

0.208

n/a

0.311

0.153

0.46

0.214

0.248

0.200

0.059

1.60

0.062

F

D

B

C

A

E

G

H

REEL DIMENSIONS FOR 8SOICN

Metric

Imperial

Code

A

B

C

D

E

F

G

H

Min

329.60

20.95

12.80

1.95

98.00

n/a

14.50

12.40

Max

330.25

21.45

13.20

2.45

102.00

18.40

17.10

14.40

Min

12.976

0.824

0.503

0.767

3.858

n/a

Max

13.001

0.844

0.519

0.096

4.015

0.724

0.673

0.566

0.570

0.488

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19

AUIRS2184(4)(S)

Tape and Reel Details: SOIC14N

LOADED TAPE FEED DIRECTION

A

B

H

D

F

C

NOTE : CONTROLLING

DIMENSION IN MM

E

G

CARRIER TAPE DIMENSION FOR 14SOICN

Metric Imperial

Code

A

B

C

D

E

F

G

H

Min

7.90

3.90

15.70

7.40

6.40

9.40

1.50

Max

8.10

4.10

16.30

7.60

6.60

9.60

n/a

Min

Max

0.318

0.161

0.641

0.299

0.260

0.378

n/a

0.311

0.153

0.618

0.291

0.252

0.370

0.059

1.60

0.062

F

D

B

C

A

E

G

H

REEL DIMENSIONS FOR 14SOICN

Metric

Imperial

Code

A

B

C

D

E

F

G

H

Min

329.60

20.95

12.80

1.95

98.00

n/a

18.50

16.40

Max

330.25

21.45

13.20

2.45

102.00

22.40

21.10

18.40

Min

12.976

0.824

0.503

0.767

3.858

n/a

Max

13.001

0.844

0.519

0.096

4.015

0.881

0.830

0.724

0.728

0.645

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20

AUIRS2184(4)(S)

Part Marking Information

SOIC8:

SOIC14N:

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21

AUIRS2184(4)(S)

Ordering Information

Standard Pack

Base Part Number

Package Type

Complete Part Number

Form

Quantity

Tube/Bulk

55

AUIRS2184S

SOIC8

AUIRS2184S

AUIRS2184STR

Tape and Reel

2500

Tube/Bulk

55

AUIRS21844S

SOIC14N

AUIRS21844S

Tape and Reel

2500

AUIRS21844STR

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22

AUIRS2184(4)(S)

IMPORTANT NOTICE

Unless specifically designated for the automotive market, International Rectifier Corporation and its subsidiaries

(IR) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its

products and services at any time and to discontinue any product or services without notice. Part numbers

designated with the “AU” prefix follow automotive industry and / or customer specific requirements with regards

to product discontinuance and process change notification. All products are sold subject to IR’s terms and

conditions of sale supplied at the time of order acknowledgment.

IR warrants performance of its hardware products to the specifications applicable at the time of sale in

accordance with IR’s standard warranty. Testing and other quality control techniques are used to the extent IR

deems necessary to support this warranty. Except where mandated by government requirements, testing of all

parameters of each product is not necessarily performed.

IR assumes no liability for applications assistance or customer product design. Customers are responsible for

their products and applications using IR components. To minimize the risks with customer products and

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For technical support, please contact IR’s Technical Assistance Center

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AUIRS2184(4)(S)

Revision History

Date

Comment

04/29/08

Draft

5/6/08

Converted to automotive format

Corrected various formatting issues and typos (e.g. /SD)

Corrected typical application dwg

5/13/08

5/16/08

5/22/08

5/26/08

5/28/08

Inserted figures 1-5

Added graphs for parameter temperature trends

Added missing graphs, added note on PbF and auto qualification on features list

Added date

Reviewed and updated various missing information

9/30/08

Input/Output Pin Equivalent Circuit Diagram

Inserted

10/01/08

Feb13^th, 2009

6/04/09

Typ application changes

Updated package information, qualification information, and tri-temp waveforms

Updated qualification information; graphs 27-42 changed 2181(4) to 2184(4)

Removed characterization graphs 27-42.

8/4/09

8/6/09

Updated package type and marking info

8/11/09

Corrected chapter with Parameter Trends

SD max propagation delay changed from 270ns to 300ns

Turn on rise time typ value changed from 40nsec to 20nsec

9/15/09

9/19/09

Rearranged temperature characteristic graphs and added actual part number on marking

drawings

Added ESD passing voltages, updated table of contents.

Typ application section updated

9/21/09

9/22/09

9/23/09

Added note 1 for Vcc under Abs Max rating

Front page: changed ton/toff typ. to 600ns/230ns, Page6: changed Ton typ.=600ns; toff

typ.=230ns; tsd typ.=220ns, max=350ns; MTon typ.=3ns; MToff typ.=15ns; tr typ=15ns; tf

typ=12ns, DT (R_DT@200Kohms) min=3.9uS; DT (0-ohm) typ=375ns; VOH max.=1.5V; iqbs

min.=10uA, typ=50uA, max=130uA; Iqcc max.=1.3mA; added Important Notice page

12/17/09

Corrected MSL level on qual info page to MSL3 and updated MM ESD passing voltage to

+/-100V instead of +/-150V.

12/22/09

Updated disclaimer under Abs. Max. Rating

Page 6: Added I_O25+and I_O25-specification and the note

02/24/2010

Jul. 27, 2010 clamp diode values changed from 25V into 20V (in-out pin eq. circ. diagrams)

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24

AUIRS2184(4)(S)

www.irf.com

25


型号：	AUIRS2184STR
厂家：	Infineon
描述：	HALF-BRIDGE DRIVER 半桥驱动器外围驱动器驱动程序和接口接口集成电路光电二极管
文件：	总25页 (文件大小：686K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

AUIRS2184STR [INFINEON]

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