AUIRFS4410ZTRR [INFINEON]
Power Field-Effect Transistor, 97A I(D), 100V, 0.009ohm, 1-Element, N-Channel, Silicon, Metal-oxide Semiconductor FET, TO-263AB, ROHS COMPLIANT, PLASTIC, D2PAK-3;![AUIRFS4410ZTRR](http://pdffile.icpdf.com/pdf2/p00229/img/icpdf/AUIRFS4410ZT_1343154_icpdf.jpg)
型号: | AUIRFS4410ZTRR |
厂家: | ![]() |
描述: | Power Field-Effect Transistor, 97A I(D), 100V, 0.009ohm, 1-Element, N-Channel, Silicon, Metal-oxide Semiconductor FET, TO-263AB, ROHS COMPLIANT, PLASTIC, D2PAK-3 |
文件: | 总13页 (文件大小:289K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
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PD - 96405A
AUTOMOTIVE GRADE
AUIRFS4410Z
AUIRFSL4410Z
Features
HEXFET® Power MOSFET
l
Advanced Process Technology
UltraLowOn-Resistance
175°COperatingTemperature
Fast Switching
Repetitive Avalanche Allowed up to Tjmax
Lead-Free,RoHSCompliant
Automotive Qualified *
l
l
l
l
l
l
D
S
VDSS
RDS(on) typ.
max.
100V
7.2m
9.0m
Ω
Ω
G
ID
97A
Description
Specifically designed for Automotive applications, this
HEXFET® Power MOSFET utilizes the latest processing
techniques to achieve extremely low on-resistance per
siliconarea. Additionalfeaturesofthisdesign area175°C
junctionoperatingtemperature, fastswitchingspeedand
improved repetitive avalanche rating . These features
combine to make this design an extremely efficient and
reliable device for use in Automotive applications and a
wide variety of other applications.
D
D
S
S
D
D
G
G
D2Pak
AUIRFS4410Z
TO-262
AUIRFSL4410Z
G
D
S
Gate
Drain
Source
Absolute Maximum Ratings
StressesbeyondthoselistedunderAbsoluteMaximumRatingsmaycausepermanentdamagetothedevice.Thesearestress
ratings only; and functional operation of the device at these or any other condition beyond those indicated in the specifications
is not implied.Exposuretoabsolute-maximum-ratedconditionsforextendedperiodsmayaffectdevicereliability. Thethermal
resistanceandpowerdissipationratingsaremeasuredunderboardmountedandstillairconditions.Ambienttemperature(TA)
is 25°C, unless otherwise specified.
Parameter
Continuous Drain Current, VGS @ 10V
Continuous Drain Current, VGS @ 10V
Pulsed Drain Current
Max.
97
Units
A
ID @ TC = 25°C
ID @ TC = 100°C
IDM
69
390
PD @TC = 25°C
W
230
Maximum Power Dissipation
Linear Derating Factor
1.5
W/°C
V
VGS
± 20
Gate-to-Source Voltage
16
242
Peak Diode Recovery
Single Pulse Avalanche Energy
dv/dt
EAS (Thermally limited)
V/ns
mJ
A
Avalanche Current
IAR
See Fig. 14, 15, 22a, 22b,
Repetitive Avalanche Energy
EAR
TJ
mJ
-55 to + 175
300
Operating Junction and
TSTG
Storage Temperature Range
Soldering Temperature, for 10 seconds
(1.6mm from case)
°C
Thermal Resistance
Parameter
Typ.
–––
Max.
0.65
40
Units
Rθ
Junction-to-Case
JC
°C/W
Junction-to-Ambient (PCB Mount) , D2Pak
RθJA
–––
HEXFET® is a registered trademark of International Rectifier.
*Qualification standards can be found at http://www.irf.com/
www.irf.com
1
10/4/11
AUIRFS/SL4410Z
Static Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Parameter
Drain-to-Source Breakdown Voltage
Breakdown Voltage Temp. Coefficient
Static Drain-to-Source On-Resistance
Gate Threshold Voltage
Min. Typ. Max. Units
100 ––– –––
––– 0.12 ––– V/°C Reference to 25°C, ID = 5mA
Conditions
VGS = 0V, ID = 250μA
V(BR)DSS
ΔV(BR)DSS/ΔTJ
RDS(on)
VGS(th)
V
–––
2.0
7.2
9.0
4.0
VGS = 10V, ID = 58A
VDS = VGS, ID = 150μA
VDS = 10V, ID = 58A
VDS = 100V, VGS = 0V
mΩ
V
–––
gfs
IDSS
Forward Transconductance
140 ––– –––
––– ––– 20
S
Drain-to-Source Leakage Current
μA
––– ––– 250
––– ––– 100
––– ––– -100
––– 0.70 –––
V
V
V
DS = 80V, VGS = 0V, TJ = 125°C
IGSS
RG
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Internal Gate Resistance
GS = 20V
nA
GS = -20V
Ω
Dynamic Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Parameter
Total Gate Charge
Gate-to-Source Charge
Min. Typ. Max. Units
Conditions
Qg
–––
–––
–––
–––
–––
–––
–––
–––
83
19
27
56
16
52
43
57
120
ID = 58A
Qgs
–––
VDS =50V
nC
ns
Qgd
Gate-to-Drain ("Miller") Charge
Total Gate Charge Sync. (Qg - Qgd)
VGS = 10V
Qsync
–––
–––
–––
–––
–––
ID = 58A, VDS =0V, VGS = 10V
VDD = 65V
td(on)
Turn-On Delay Time
tr
Rise Time
ID = 58A
td(off)
Turn-Off Delay Time
R =2.7
Ω
G
VGS = 10V
tf
Fall Time
Ciss
Input Capacitance
––– 4820 –––
––– 340 –––
––– 170 –––
––– 420 –––
––– 690 –––
VGS = 0V
Coss
Output Capacitance
VDS = 50V
Crss
Reverse Transfer Capacitance
Effective Output Capacitance (Energy Related)
Effective Output Capacitance (Time Related)
ƒ = 1.0MHz, See Fig.5
pF
Coss eff. (ER)
Coss eff. (TR)
V
GS = 0V, VDS = 0V to 80V , See Fig.11
GS = 0V, VDS = 0V to 80V
V
Diode Characteristics
Parameter
Min. Typ. Max. Units
Conditions
D
IS
Continuous Source Current
MOSFET symbol
––– –––
97
(Body Diode)
Pulsed Source Current
(Body Diode)
showing the
integral reverse
A
G
ISM
––– ––– 390
S
p-n junction diode.
VSD
trr
Diode Forward Voltage
Reverse Recovery Time
––– –––
1.3
57
V
TJ = 25°C, IS = 58A, VGS = 0V
TJ = 25°C
TJ = 125°C
TJ = 25°C
TJ = 125°C
TJ = 25°C
VR = 85V,
–––
–––
–––
–––
–––
38
46
53
82
2.5
ns
IF = 58A
di/dt = 100A/μs
69
Qrr
Reverse Recovery Charge
80
nC
A
120
–––
IRRM
ton
Reverse Recovery Current
Forward Turn-On Time
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Notes:
Repetitive rating; pulse width limited by max. junction
temperature.
Limited by TJmax, starting TJ = 25°C, L = 0.143mH
RG = 25Ω, IAS = 58A, VGS =10V. Part not recommended for use
above this value.
ISD ≤ 58A, di/dt ≤ 610A/μs, VDD ≤ V(BR)DSS, TJ ≤ 175°C.
Pulse width ≤ 400μs; duty cycle ≤ 2%.
ꢀ Coss eff. (TR) is a fixed capacitance that gives the same charging time
as Coss while VDS is rising from 0 to 80% VDSS
Coss eff. (ER) is a fixed capacitance that gives the same energy as
Coss while VDS is rising from 0 to 80% VDSS
When mounted on 1" square PCB (FR-4 or G-10 Material). For
recommended footprint and soldering techniques refer to application
note #AN-994.
.
.
Rθ is measured at TJ approximately 90°C.
2
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AUIRFS/SL4410Z
Qualification Information†
Automotive
††
(per AEC-Q101)
Comments:
This part
number(s) passed
Qualification Level
Automotive qualification. IR’s Industrial and
Consumer qualification level is granted by
extension of the higher Automotive level.
MSL1
N/A
3L-D2 PAK
3L-TO-262
Moisture Sensitivity Level
Class M4(+/- 800V )†††
Machine Model
AEC-Q101-002
Class H2(+/- 3000V )†††
AEC-Q101-001
ESD
Human Body Model
Class C5(+/- 2000V )†††
AEC-Q101-005
Charged Device Model
Yes
RoHS Compliant
†
Qualification standards can be found at International Rectifier’s web site: http//www.irf.com/
Exceptions (if any) to AEC-Q101 requirements are noted in the qualification report.
††
††† Highest passing voltage
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3
AUIRFS/SL4410Z
1000
100
10
1000
VGS
15V
10V
8.0V
6.0V
5.5V
5.0V
4.8V
4.5V
VGS
15V
10V
8.0V
6.0V
5.5V
5.0V
4.8V
4.5V
TOP
TOP
100
10
1
BOTTOM
BOTTOM
4.5V
4.5V
60μs PULSE WIDTH
≤
60μs PULSE WIDTH
Tj = 25°C
≤
Tj = 175°C
1
0.1
1
10
100
0.1
1
10
100
V
, Drain-to-Source Voltage (V)
V
, Drain-to-Source Voltage (V)
DS
DS
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
1000
100
10
2.5
2.0
1.5
1.0
0.5
I
= 58A
V
= 50V
D
DS
≤60μs PULSE WIDTH
V
= 10V
GS
T
= 25°C
J
T
= 175°C
J
1
0.1
2
3
4
5
6
7
-60 -40 -20 0 20 40 60 80 100120140160180
, Junction Temperature (°C)
T
J
V
, Gate-to-Source Voltage (V)
GS
Fig 4. Normalized On-Resistance vs. Temperature
Fig 3. Typical Transfer Characteristics
12.0
100000
10000
1000
V
= 0V,
= C
f = 1 MHZ
GS
I = 58A
D
C
C
C
+ C , C
SHORTED
ds
iss
gs
gd
V
V
V
= 80V
= 40V
= 20V
DS
DS
DS
= C
10.0
8.0
6.0
4.0
2.0
0.0
rss
oss
gd
= C + C
ds
gd
C
iss
C
C
oss
rss
100
0
20
40
60
80
100
1
10
100
Q , Total Gate Charge (nC)
V
, Drain-to-Source Voltage (V)
G
DS
Fig 5. Typical Capacitance vs. Drain-to-Source Voltage
Fig 6. Typical Gate Charge vs. Gate-to-Source Voltage
4
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AUIRFS/SL4410Z
1000
100
10
1000
100
10
OPERATION IN THIS AREA
LIMITED BY R
(on)
DS
100μsec
1msec
T
= 175°C
J
10msec
DC
T
= 25°C
J
1
Tc = 25°C
Tj = 175°C
Single Pulse
V
= 0V
GS
0.1
1
0.0
0.5
1.0
1.5
2.0
2.5
0
1
10
100
V
, Source-to-Drain Voltage (V)
V
, Drain-to-Source Voltage (V)
SD
DS
Fig 8. Maximum Safe Operating Area
Fig 7. Typical Source-Drain Diode
Forward Voltage
100
80
60
40
20
0
125
120
115
110
105
100
95
Id = 5mA
90
25
50
T
75
100
125
150
-60 -40 -20 0 20 40 60 80 100120140160180
, Case Temperature (°C)
T
, Temperature ( °C )
C
J
Fig 9. Maximum Drain Current vs.
Fig 10. Drain-to-Source Breakdown Voltage
Case Temperature
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0.0
1000
I
D
900
800
700
600
500
400
300
200
100
0
TOP
6.4A
9.4A
BOTTOM 58A
-10
0
10 20 30 40 50 60 70 80 90 100
Drain-to-Source Voltage (V)
25
50
75
100
125
150
175
Starting T , Junction Temperature (°C)
V
J
DS,
Fig 11. Typical COSS Stored Energy
Fig 12. Maximum Avalanche Energy vs. DrainCurrent
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5
AUIRFS/SL4410Z
1
D = 0.50
0.20
0.1
0.10
R1
R2
R2
R1
Ri (°C/W) τi (sec)
0.05
τ
J τJ
0.237
0.000178
τ
Cτ
τ
τ
1 τ1
Ci= τi/Ri
2τ2
0.02
0.413
0.003772
0.01
0.01
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthjc + Tc
SINGLE PULSE
( THERMAL RESPONSE )
0.001
1E-006
1E-005
0.0001
0.001
0.01
0.1
t
, Rectangular Pulse Duration (sec)
1
Fig 13. Maximum Effective Transient Thermal Impedance, Junction-to-Case
100
10
1
Allowed avalanche Current vs avalanche
Duty Cycle = Single Pulse
pulsewidth, tav, assuming Δ Tj = 150°C and
Tstart =25°C (Single Pulse)
0.01
0.05
0.10
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming ΔΤ j = 25°C and
Tstart = 150°C.
0.1
1.0E-06
1.0E-05
1.0E-04
1.0E-03
1.0E-02
1.0E-01
tav (sec)
Fig 14. Typical Avalanche Current vs.Pulsewidth
150
100
50
Notes on Repetitive Avalanche Curves , Figures 14, 15:
(For further info, see AN-1005 at www.irf.com)
1. Avalanche failures assumption:
Purely a thermal phenomenon and failure occurs at a temperature far in
excess of Tjmax. This is validated for every part type.
2. Safe operation in Avalanche is allowed as long asTjmax is not exceeded.
3. Equation below based on circuit and waveforms shown in Figures 22a, 22b.
4. PD (ave) = Average power dissipation per single avalanche pulse.
5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase
during avalanche).
TOP
BOTTOM 1.0% Duty Cycle
= 58A
Single Pulse
I
D
6. Iav = Allowable avalanche current.
7. ΔT = Allowable rise in junction temperature, not to exceed Tjmax (assumed as
25°C in Figure 14, 15).
tav = Average time in avalanche.
D = Duty cycle in avalanche = tav ·f
ZthJC(D, tav) = Transient thermal resistance, see Figures 13)
0
PD (ave) = 1/2 ( 1.3·BV·Iav) = DT/ ZthJC
25
50
75
100
125
150
175
Iav = 2DT/ [1.3·BV·Zth]
EAS (AR) = PD (ave)·tav
Starting T , Junction Temperature (°C)
J
Fig 15. Maximum Avalanche Energy vs. Temperature
6
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AUIRFS/SL4410Z
20
15
10
5
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
I
= 39A
= 85V
F
V
R
T
= 25°C _____
= 125°C ----------
J
T
J
I
I
I
I
= 150μA
= 250μA
= 1.0mA
= 1.0A
D
D
D
D
0
100
200
300
400
500
600
700
-75 -50 -25
0
25 50 75 100 125 150175 200
di /dt (A/μs)
T , Temperature ( °C )
f
J
Fig. 17 - Typical Recovery Current vs. dif/dt
Fig 16. Threshold Voltage vs. Temperature
400
350
300
250
200
150
100
50
20
I
= 39A
= 85V
I
= 58A
= 85V
F
F
V
V
T
R
R
T
= 25°C _____
= 125°C ----------
= 25°C _____
= 125°C ----------
J
J
T
T
J
15
10
5
J
0
0
100
200
300
400
500
600
700
100
200
300
400
500
600
700
di /dt (A/μs)
di /dt (A/μs)
f
f
Fig. 18 - Typical Recovery Current vs. dif/dt
Fig. 19 - Typical Stored Charge vs. dif/dt
450
I
= 58A
= 85V
F
V
400
350
300
250
200
150
100
50
R
T
= 25°C _____
= 125°C
J
T
J
----------
0
100
200
300
400
500
600
700
di /dt (A/μs)
f
Fig. 20 - Typical Stored Charge vs. dif/dt
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7
AUIRFS/SL4410Z
Driver Gate Drive
P.W.
P.W.
Period
D.U.T
Period
D =
+
*
=10V
V
GS
CircuitLayoutConsiderations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
-
D.U.T. I Waveform
SD
+
-
Reverse
Recovery
Current
Body Diode Forward
Current
di/dt
-
+
D.U.T. V Waveform
DS
Diode Recovery
dv/dt
V
DD
VDD
Re-Applied
Voltage
• dv/dtcontrolledbyRG
RG
+
-
Body Diode
Forward Drop
• Driver same type as D.U.T.
• ISD controlled by Duty Factor "D"
• D.U.T. - Device Under Test
InductorCurrent
I
SD
Ripple
≤ 5%
* VGS = 5V for Logic Level Devices
Fig 21. Peak Diode Recovery dv/dt Test Circuit for N-Channel
HEXFET® Power MOSFETs
V
(BR)DSS
t
15V
p
DRIVER
+
L
V
DS
D.U.T
AS
R
G
V
DD
-
I
A
20V
Ω
0.01
t
p
I
AS
Fig 22b. Unclamped Inductive Waveforms
Fig 22a. Unclamped Inductive Test Circuit
LD
VDS
VDS
90%
+
-
VDD
D.U.T
10%
VGS
VGS
Second Pulse Width < 1μs
Duty Factor < 0.1%
td(on)
td(off)
tr
tf
Fig 23a. Switching Time Test Circuit
Fig 23b. Switching Time Waveforms
Id
Vds
Vgs
L
VCC
DUT
0
Vgs(th)
20K
Qgs1
Qgs2
Qgodr
Qgd
Fig 24a. Gate Charge Test Circuit
Fig 24b. Gate Charge Waveform
8
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AUIRFS/SL4410Z
D2Pak (TO-263AB) Package Outline
Dimensions are shown in millimeters (inches)
D2Pak Part Marking Information
PartNumber
AUFS4410Z
DateCode
Y= Year
WW= Work Week
A= Automotive, Lead Free
IRLogo
YWWA
XX or XX
LotCode
Note: For the most current drawing please refer to IR website at http://www.irf.com/package/
www.irf.com
9
AUIRFS/SL4410Z
TO-262 Package Outline
Dimensions are shown in millimeters (inches)
TO-262 Part Marking Information
PartNumber
AUFSL4410Z
DateCode
Y= Year
WW= Work Week
A= Automotive, Lead Free
IRLogo
YWWA
XX or XX
LotCode
Note: For the most current drawing please refer to IR website at http://www.irf.com/package/
10
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AUIRFS/SL4410Z
D2Pak (TO-263AB) Tape & Reel Information
Dimensions are shown in millimeters (inches)
TRR
1.60 (.063)
1.50 (.059)
1.60 (.063)
1.50 (.059)
4.10 (.161)
3.90 (.153)
0.368 (.0145)
0.342 (.0135)
FEED DIRECTION
TRL
11.60 (.457)
11.40 (.449)
1.85 (.073)
1.65 (.065)
24.30 (.957)
23.90 (.941)
15.42 (.609)
15.22 (.601)
1.75 (.069)
1.25 (.049)
10.90 (.429)
10.70 (.421)
4.72 (.136)
4.52 (.178)
16.10 (.634)
15.90 (.626)
FEED DIRECTION
13.50 (.532)
12.80 (.504)
27.40 (1.079)
23.90 (.941)
4
330.00
(14.173)
MAX.
60.00 (2.362)
MIN.
30.40 (1.197)
MAX.
NOTES :
1. COMFORMS TO EIA-418.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION MEASURED @ HUB.
4. INCLUDES FLANGE DISTORTION @ OUTER EDGE.
26.40 (1.039)
24.40 (.961)
4
3
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11
AUIRFS/SL4410Z
Ordering Information
Base part
Package Type
Standard Pack
Form
Complete Part Number
Quantity
AUIRFSL4410Z
AUIRFS4410Z
TO-262
D2Pak
Tube
Tube
50
50
AUIRFSL4410Z
AUIRFS4410Z
Tape and Reel Left
Tape and Reel Right
800
800
AUIRFS4410ZTRL
AUIRFS4410ZTRR
12
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AUIRFS/SL4410Z
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requirements in connection with such use.
IR products are neither designed nor intended for use in automotive applications or environments unless the specific IR
productsaredesignatedbyIRascompliantwithISO/TS16949requirementsandbearapartnumberincludingthedesignation
“AU”. Buyers acknowledge and agree that, if they use any non-designated products in automotive applications, IR will not be
responsible for any failure to meet such requirements.
For technical support, please contact IR’s Technical Assistance Center
http://www.irf.com/technical-info/
WORLDHEADQUARTERS:
101 N. Sepulveda Blvd., El Segundo, California 90245
Tel:(310)252-7105
www.irf.com
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