AUIRFS4010-7TRR [INFINEON]
Power Field-Effect Transistor, 190A I(D), 100V, 0.004ohm, 1-Element, N-Channel, Silicon, Metal-oxide Semiconductor FET, ROHS COMPLIANT, D2PAK-7;
| 型号： | AUIRFS4010-7TRR |
| 厂家： | 
Infineon |
| 描述： | Power Field-Effect Transistor, 190A I(D), 100V, 0.004ohm, 1-Element, N-Channel, Silicon, Metal-oxide Semiconductor FET, ROHS COMPLIANT, D2PAK-7 局域网 开关 脉冲 晶体管 |
| 文件： | 总12页 (文件大小：267K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
AUTOMOTIVE GRADE
AUIRFS4010-7P
HEXFET® Power MOSFET
Features
D
S
VDSS
RDS(on) typ.
max. 4.0m
100V
Advanced Process Technology
Ultra Low On-Resistance
3.3m
Ω
EnhanceddV/dTanddI/dTcapability
175°COperatingTemperature
Fast Switching
Repetitive Avalanche Allowed up to Tjmax
Lead-Free,RoHSCompliant
AutomotiveQualified*
G
Ω
ID
190A
D
Description
Specifically designed for Automotive applications, this HEXFET®
PowerMOSFETutilizesthelatestprocessingtechniquestoachieve
extremely low on-resistance per silicon area. Additional features of
thisdesign area175°Cjunctionoperatingtemperature,fastswitching
speed and improved repetitive avalanche rating . These features
combinetomakethisdesignanextremelyefficientandreliabledevice
for use in Automotive applications and a wide variety of other
applications.
S
S
S
S
S
G
D2Pak 7 Pin
AUIRFS4010-7P
G
D
S
Gate
Drain
Source
Standard Pack
Form
Tube
Base Part Number
AUIRFS4010-7P
Package Type
Orderable Part Number
Quantity
50
800
800
AUIRFS4010-7P
AUIRFS4010-7TRL
AUIRFS4010-7TRR
D2Pak- 7 Pin
Tape and Reel Left
Tape and Reel Right
Absolute Maximum Ratings
StressesbeyondthoselistedunderAbsoluteMaximumRatingsmaycausepermanentdamagetothedevice.Thesearestressratingsonly;
andfunctionaloperationofthedeviceattheseoranyotherconditionbeyondthoseindicatedinthespecificationsisnotimplied.Exposureto
absolute-maximum-ratedconditionsforextendedperiodsmayaffectdevicereliability.Thethermalresistanceandpowerdissipationratings
are measured under board mounted and still air conditions. Ambient temperature (TA) is 25°C, unless otherwise specified.
Parameter
Continuous Drain Current, VGS @ 10V
Continuous Drain Current, VGS @ 10V
Pulsed Drain Current
Max.
190
Units
ID @ TC = 25°C
ID @ TC = 100°C
IDM
130
A
740
PD @TC = 25°C
W
380
Maximum Power Dissipation
Linear Derating Factor
2.5
W/°C
V
VGS
EAS
IAR
± 20
330
Gate-to-Source Voltage
mJ
A
Single Pulse Avalanche Energy (Thermally Limited)
Avalanche Current
See Fig. 14, 15, 22a, 22b
EAR
mJ
Repetitive Avalanche Energy
Peak Diode Recovery
26
dv/dt
TJ
V/ns
-55 to + 175
Operating Junction and
TSTG
°C
Storage Temperature Range
Soldering Temperature, for 10 seconds (1.6mm from case)
300
Thermal Resistance
Parameter
Typ.
–––
Max.
0.40
40
Units
Rθ
Junction-to-Case
JC
JA
°C/W
Rθ
–––
Junction-to-Ambient (PCB Mount)
HEXFET® is a registered trademark of International Rectifier.
*Qualification standards can be found at http://www.irf.com/
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AUIRFS4010-7P
Static Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Parameter
Drain-to-Source Breakdown Voltage
Breakdown Voltage Temp. Coefficient
Static Drain-to-Source On-Resistance
Gate Threshold Voltage
Min. Typ. Max. Units
100 ––– –––
––– 0.11 ––– V/°C Reference to 25°C, ID = 5mA
Conditions
VGS = 0V, ID = 250μA
V(BR)DSS
V
V
/ T
(BR)DSS Δ
Δ
J
RDS(on)
VGS(th)
gfs
–––
2.0
3.3
4.0
4.0
VGS = 10V, ID = 110A
VDS = VGS, ID = 250μA
VDS = 25V, ID = 110A
m
V
Ω
–––
Forward Transconductance
210 ––– –––
S
RG
IDSS
–––
––– –––
Internal Gate Resistance
Drain-to-Source Leakage Current
2.1
–––
20
Ω
V
V
V
V
DS = 100V, VGS = 0V
DS = 100V, VGS = 0V, TJ = 125°C
GS = 20V
μA
––– ––– 250
––– ––– 100
––– ––– -100
IGSS
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
nA
GS = -20V
Dynamic Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Parameter
Total Gate Charge
Min. Typ. Max. Units
––– 150 230
Conditions
Qg
ID = 110A
DS = 50V
Qgs
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Total Gate Charge Sync. (Qg - Qgd)
Turn-On Delay Time
Rise Time
–––
–––
36
48
–––
–––
V
nC
ns
Qgd
VGS = 10V
Qsync
––– 102 –––
ID = 110A, VDS =0V, VGS = 10V
VDD = 65V
td(on)
–––
–––
19
56
–––
–––
tr
ID = 110A
td(off)
tf
Turn-Off Delay Time
Fall Time
––– 100 –––
––– 48 –––
R = 2.7
Ω
G
VGS = 10V
Ciss
Input Capacitance
––– 9830 –––
––– 650 –––
––– 260 –––
––– 730 –––
––– 740 –––
VGS = 0V
Coss
Output Capacitance
Reverse Transfer Capacitance
V
DS = 50V
ƒ = 1.0MHz
GS = 0V, VDS = 0V to 80V
Crss
pF
Coss eff. (ER)
Coss eff. (TR)
V
Effective Output Capacitance (Energy Related)
Effective Output Capacitance (Time Related)
VGS = 0V, VDS = 0V to 80V
Diode Characteristics
Parameter
Min. Typ. Max. Units
Conditions
D
S
IS
Continuous Source Current
MOSFET symbol
––– ––– 186
A
(Body Diode)
Pulsed Source Current
(Body Diode)
showing the
integral reverse
G
ISM
––– ––– 740
p-n junction diode.
VSD
trr
Diode Forward Voltage
Reverse Recovery Time
––– –––
1.3
–––
–––
V
TJ = 25°C, IS = 110A, VGS = 0V
TJ = 25°C
TJ = 125°C
TJ = 25°C
TJ = 125°C
TJ = 25°C
VR = 85V,
IF = 110A
di/dt = 100A/μs
–––
–––
60
67
ns
Qrr
Reverse Recovery Charge
––– 150 –––
––– 180 –––
nC
A
IRRM
ton
Reverse Recovery Current
Forward Turn-On Time
–––
4.7
–––
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Notes:
Repetitive rating; pulse width limited by max. junction temperature.
Limited by TJmax, starting TJ = 25°C, L = 0.052mH
RG = 25Ω, IAS = 110A, VGS =10V. Part not recommended for use
above this value .
ꢀ Coss eff. (TR) is a fixed capacitance that gives the same charging time
as Coss while VDS is rising from 0 to 80% VDSS
Coss eff. (ER) is a fixed capacitance that gives the same energy as
Coss while VDS is rising from 0 to 80% VDSS
.
.
ISD ≤ 110A, di/dt ≤ 1310A/μs, VDD ≤ V(BR)DSS, TJ ≤ 175°C.
Pulse width ≤ 400μs; duty cycle ≤ 2%.
When mounted on 1" square PCB (FR-4 or G-10 Material). For recom-
mended footprint and soldering techniques refer to application note #AN-994.
Rθ is measured at TJ approximately 90°C.
RθJC value shown is at time zero.
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AUIRFS4010-7P
1000
100
10
1000
100
10
VGS
15V
10V
8.0V
7.0V
5.0V
4.5V
4.3V
4.0V
VGS
15V
10V
8.0V
7.0V
5.0V
4.5V
4.3V
4.0V
TOP
TOP
BOTTOM
BOTTOM
1
60μs PULSE WIDTH
Tj = 25°C
≤
4.0V
V
4.0V
60μs PULSE WIDTH
Tj = 175°C
≤
0.1
0.1
1
10
100
0.1
1
10
100
, Drain-to-Source Voltage (V)
V
, Drain-to-Source Voltage (V)
DS
DS
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
1000
100
10
2.5
2.0
1.5
1.0
0.5
I
= 110A
= 10V
D
V
GS
T
= 175°C
J
T
= 25°C
= 50V
J
1
V
DS
60μs PULSE WIDTH
≤
0.1
2
3
4
5
6
7
-60 -40 -20 0 20 40 60 80 100120140160180
, Junction Temperature (°C)
T
J
V
, Gate-to-Source Voltage (V)
GS
Fig 4. Normalized On-Resistance vs. Temperature
Fig 3. Typical Transfer Characteristics
14.0
100000
10000
1000
V
C
= 0V,
f = 1 MHZ
GS
I = 110A
D
= C + C , C SHORTED
iss
gs gd ds
12.0
C
= C
V
V
= 80V
= 50V
rss
gd
DS
DS
C
= C + C
oss
ds
gd
10.0
8.0
6.0
4.0
2.0
0.0
C
iss
C
C
oss
rss
100
1
10
100
1000
0
25 50 75 100 125 150 175 200 225
V
, Drain-to-Source Voltage (V)
Q , Total Gate Charge (nC)
G
DS
Fig 5. Typical Capacitance vs. Drain-to-Source Voltage
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Fig 6. Typical Gate Charge vs. Gate-to-Source Voltage
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AUIRFS4010-7P
1000
100
10
1000
100
10
100μsec
1msec
10msec
T
= 175°C
J
OPERATION IN THIS AREA
LIMITED BY R
(on)
DS
1
T
= 25°C
J
DC
0.1
0.01
Tc = 25°C
Tj = 175°C
Single Pulse
1
V
= 0V
GS
0.1
1
10
100
0.1
0.0
0.5
1.0
1.5
V
, Drain-to-Source Voltage (V)
DS
V
, Source-to-Drain Voltage (V)
SD
Fig 8. Maximum Safe Operating Area
Fig 7. Typical Source-Drain Diode
Forward Voltage
200
180
160
140
120
100
80
125
120
115
110
105
100
95
Id = 5mA
60
40
20
0
25
50
75
100
125
150
175
-60 -40 -20 0 20 40 60 80 100120140160180
T
, Case Temperature (°C)
T
, Temperature ( °C )
C
J
Fig 9. Maximum Drain Current vs.
Fig 10. Drain-to-Source Breakdown Voltage
Case Temperature
6.0
5.0
4.0
3.0
2.0
1.0
0.0
1400
I
D
1200
1000
800
600
400
200
0
TOP
21A
38A
BOTTOM 110A
0
10 20 30 40 50 60 70 80 90 100 110
Drain-to-Source Voltage (V)
25
50
75
100
125
150
175
Starting T , Junction Temperature (°C)
J
V
DS,
Fig 11. Typical COSS Stored Energy
Fig 12. Maximum Avalanche Energy vs. DrainCurrent
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AUIRFS4010-7P
1
0.1
D = 0.50
0.20
0.10
0.05
R1
R1
R2
R2
R3
R3
R4
R4
Ri (°C/W) τi (sec)
0.02
0.01
0.01
0.02001
0.05145
0.19436
0.13433
0.000025
0.000094
0.002047
0.012818
τ
τ
J τJ
τ
Cτ
1τ1
Ci= τi/Ri
τ
τ
τ
2 τ2
3τ3
4τ4
0.001
0.0001
SINGLE PULSE
( THERMAL RESPONSE )
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthjc + Tc
1E-006
1E-005
0.0001
0.001
0.01
0.1
t
, Rectangular Pulse Duration (sec)
1
Fig 13. Maximum Effective Transient Thermal Impedance, Junction-to-Case
1000
100
10
Duty Cycle = Single Pulse
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming ΔTj = 150°C and
Tstart =25°C (Single Pulse)
0.01
0.05
0.10
1
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming ΔΤ j = 25°C and
Tstart = 150°C.
0.1
1.0E-06
1.0E-05
1.0E-04
1.0E-03
1.0E-02
1.0E-01
tav (sec)
Fig 14. Typical Avalanche Current vs.Pulsewidth
400
Notes on Repetitive Avalanche Curves , Figures 14, 15:
(For further info, see AN-1005 at www.irf.com)
1. Avalanche failures assumption:
Purely a thermal phenomenon and failure occurs at a temperature far in
excess of Tjmax. This is validated for every part type.
2. Safe operation in Avalanche is allowed as long asTjmax is not exceeded.
3. Equation below based on circuit and waveforms shown in Figures 22a,22b.
4. PD (ave) = Average power dissipation per single avalanche pulse.
5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase
during avalanche).
6. Iav = Allowable avalanche current.
7. ΔT = Allowable rise in junction temperature, not to exceed Tjmax (assumed as
25°C in Figure 14, 15).
tav = Average time in avalanche.
D = Duty cycle in avalanche = tav ·f
TOP
BOTTOM 1.0% Duty Cycle
= 110A
Single Pulse
350
300
250
200
150
100
50
I
D
ZthJC(D, tav) = Transient thermal resistance, see Figures 13)
0
PD (ave) = 1/2 ( 1.3·BV·Iav) = DT/ ZthJC
25
50
75
100
125
150
175
Iav = 2DT/ [1.3·BV·Zth]
EAS (AR) = PD (ave)·tav
Starting T , Junction Temperature (°C)
J
Fig 15. Maximum Avalanche Energy vs. Temperature
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AUIRFS4010-7P
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
30
25
20
15
10
5
I
= 74A
= 85V
F
V
R
T = 25°C
J
T = 125°C
J
I
I
I
= 250μA
= 1.0mA
= 1.0A
D
D
D
0
-75 -50 -25
0
25 50 75 100 125 150 175
, Temperature ( °C )
0
200
400
600
800
1000
T
di /dt (A/μs)
J
F
Fig. 17 - Typical Recovery Current vs. dif/dt
Fig 16. Threshold Voltage vs. Temperature
30
25
20
15
10
5
1000
900
800
700
600
500
400
300
200
100
I
= 110A
= 85V
I = 74A
F
F
V
V
= 85V
R
R
T = 25°C
T = 25°C
J
J
T = 125°C
J
T = 125°C
J
0
0
200
400
600
800
1000
0
200
400
600
800
1000
di /dt (A/μs)
di /dt (A/μs)
F
F
Fig. 18 - Typical Recovery Current vs. dif/dt
Fig. 19 - Typical Stored Charge vs. dif/dt
1000
I
= 110A
= 85V
F
900
800
700
600
500
400
300
200
V
R
T = 25°C
J
T = 125°C
J
0
200
400
600
800
1000
di /dt (A/μs)
F
Fig. 20 - Typical Stored Charge vs. dif/dt
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AUIRFS4010-7P
Driver Gate Drive
P.W.
P.W.
Period
D.U.T
Period
D =
+
*
=10V
V
GS
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
-
D.U.T. I Waveform
SD
+
-
Reverse
Recovery
Current
Body Diode Forward
Current
di/dt
-
+
D.U.T. V Waveform
DS
Diode Recovery
dv/dt
V
DD
VDD
Re-Applied
Voltage
•
dv/dt controlled by RG
• Driver same type as D.U.T.
RG
+
-
Body Diode
Inductor Current
Forward Drop
• ISD controlled by Duty Factor "D"
• D.U.T. - Device Under Test
I
SD
Ripple
≤ 5%
* VGS = 5V for Logic Level Devices
Fig 21. Peak Diode Recovery dv/dt Test Circuit for N-Channel
HEXFET® Power MOSFETs
V
(BR)DSS
15V
t
p
DRIVER
+
L
V
DS
D.U.T
AS
R
G
V
DD
-
I
A
V
2
GS
Ω
0.01
t
p
I
AS
Fig 22b. Unclamped Inductive Waveforms
Fig 22a. Unclamped Inductive Test Circuit
RD
VDS
V
DS
90%
VGS
D.U.T.
RG
+
VDD
-
VGS
10%
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
V
GS
t
t
r
t
t
f
d(on)
d(off)
Fig 23a. Switching Time Test Circuit
Fig 23b. Switching Time Waveforms
Id
Current Regulator
Same Type as D.U.T.
Vds
Vgs
50KΩ
.2μF
12V
.3μF
+
V
DS
D.U.T.
-
Vgs(th)
V
GS
3mA
I
I
D
G
Qgs1
Qgs2
Qgd
Qgodr
Current Sampling Resistors
Fig 24a. Gate Charge Test Circuit
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Fig 24b. Gate Charge Waveform
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AUIRFS4010-7P
D2Pak - 7 Pin Package Outline
Dimensions are shown in millimeters (inches)
Note: For the most current drawing please refer to IR website at: http://www.irf.com/package/
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AUIRFS4010-7P
D2Pak - 7 Pin Part Marking Information
PartNumber
AUFS4010-7P
Date Code
Y= Year
WW= Work Week
A= Automotive, Lead Free
IR Logo
YWWA
XX or XX
Lot Code
D2Pak - 7 Pin Tape and Reel
Note: For the most current drawing please refer to IR website at: http://www.irf.com/package/
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AUIRFS4010-7P
Qualification Information†
Automotive
††
(per AEC-Q101)
Comments:
This part
number(s) passed
Qualification Level
Automotive qualification. IR’s Industrial and
Consumer qualification level is granted by
extension of the higher Automotive level.
Moisture Sensitivity Level
MSL1
Class M4(+/- 800V )†††
7L-D2 PAK
Machine Model
(per AEC-Q101-002)
Class H3A(+/- 6000V )†††
(per AEC-Q101-001)
ESD
Human Body Model
Class C5(+/- 2000V )†††
(per AEC-Q101-005)
Charged Device Model
Yes
RoHS Compliant
†
Qualification standards can be found at International Rectifier’s web site: http://www.irf.com/product-info/reliability
†† Exceptions (if any) to AEC-Q101 requirements are noted in the qualification report.
††† Highest passing voltage
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AUIRFS4010-7P
IMPORTANTNOTICE
Unless specifically designated for the automotive market, International Rectifier Corporation and its subsidiaries (IR)
reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products
and services at any time and to discontinue any product or services without notice. Part numbers designated with the “AU”
prefix follow automotive industry and / or customer specific requirements with regards to product discontinuance and
process change notification. All products are sold subject to IR’s terms and conditions of sale supplied at the time of order
acknowledgment.
IR warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with
IR’s standard warranty. Testing and other quality control techniques are used to the extent IR deems necessary to support
this warranty. Except where mandated by government requirements, testing of all parameters of each product is not
necessarily performed.
IR assumes no liability for applications assistance or customer product design. Customers are responsible for their
products and applications using IR components. To minimize the risks with customer products and applications, customers
should provide adequate design and operating safeguards.
Reproduction of IR information in IR data books or data sheets is permissible only if reproduction is without alteration and
is accompanied by all associated warranties, conditions, limitations, and notices. Reproduction of this information with
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Resale of IR products or serviced with statements different from or beyond the parameters stated by IR for that product
or service voids all express and any implied warranties for the associated IR product or service and is an unfair and
deceptive business practice. IR is not responsible or liable for any such statements.
IR products are not designed, intended, or authorized for use as components in systems intended for surgical implant into
the body, or in other applications intended to support or sustain life, or in any other application in which the failure of the
IR product could create a situation where personal injury or death may occur. Should Buyer purchase or use IR products
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employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and
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applications requiring military grade products, is solely at the Buyer’s own risk and that they are solely responsible for
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IR products are neither designed nor intended for use in automotive applications or environments unless the specific IR
products are designated by IR as compliant with ISO/TS 16949 requirements and bear a part number including the
designation “AU”. Buyers acknowledge and agree that, if they use any non-designated products in automotive applications,
IR will not be responsible for any failure to meet such requirements.
For technical support, please contact IR’s Technical Assistance Center
http://www.irf.com/technical-info/
WORLD HEADQUARTERS:
101 N. Sepulveda Blvd., El Segundo, California 90245
Tel: (310) 252-7105
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Revision History
Date
Comments
• Updated fig.8 SOA curve on page 5
3/10/2014
•
Updated data sheet with new IR corporate template
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相关型号：
AUIRFS4010TRL
Power Field-Effect Transistor, 180A I(D), 100V, 0.0047ohm, 1-Element, N-Channel, Silicon, Metal-oxide Semiconductor FET, TO-263AB, ROHS COMPLIANT, PLASTIC, D2PAK-3
INFINEON
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