1ED44175N01B [INFINEON]
EiceDRIVER™ 25 V单通道、低边、非反相栅极驱动器,适用于IGBT，拥有典型的2.6 A源漏电流，采用极小的6引脚PG-SOT23封装。;
| 型号： | 1ED44175N01B |
| 厂家： | 
Infineon |
| 描述： | EiceDRIVER™ 25 V单通道、低边、非反相栅极驱动器,适用于IGBT，拥有典型的2.6 A源漏电流，采用极小的6引脚PG-SOT23封装。 栅极驱动 双极性晶体管 驱动器 |
| 文件： | 总19页 (文件大小：1194K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
1ED44175N01B
Single-channel low-side IGBT gate driver IC with over-current protection
Features
Potential applications
Over-current detection with negative voltage input
Digitally controlled PFC
Home appliances
-0.246 V over-current threshold with accurate ±5% tolerance
Single pin for fault output and enable
Programmable fault clear time
Under voltage lockout for IGBTs
CMOS Schmitt-triggered inputs
3.3 V, 5 V and 15 V input logic compatible
25 V VCC voltage supply support (max)
Output in phase with input
Air conditioner
Industrial applications
General purpose low-side gate driver for
single-ended topologies
-10 Vdc negative Input capability of OCP pin
3 kV ESD HBM
RoHS compliant
Description
The 1ED44175N01B is a low-voltage, power IGBT, non-inverting gate driver. Proprietary latch-up immune CMOS
technologies enable ruggedized monolithic construction. The logic input is compatible with standard CMOS or LSTTL
output. The output driver features a current buffer stage. The 1ED44175N01B has OCP pin for over current protection sense
and a FAULT status output (when activivated, EN/FLT pin is internally pulled down). The EN/FLT needs to be externally
pulled up to provide normal operation, pulling EN/FLT low disable the driver. Internal circuitry on VCC pin provides an under
voltage lockout protection that holds output low until Vcc supply voltage is within operating range.
Vin+
Vcc
1ED44175N01B
Vdd
(Refer to lead assignments for correct
OUT
COM
OCP
3
2
1
4
5
6
Vcc
RFLTC
CFLTC
pin configuration). This diagram show
electrical connections only. Please refer
to our application notes and design tips
for proper circuit board layout.
EN/FLT
I/O2
µC I/O1
IN
Rcs
Gnd
Vin-
Figure 1
Typical application
Ordering information
Product type
Package
Standard pack
Form
Orderable part number
Quantity
1ED44175N01B
PG-SOT23-6-3
Tape and Reel
3000
1ED44175N01BXTSA1
Product validation
Qualified for industrial applications according to the relevant tests of JEDEC JESD47/22 and J-STD-020.
Datasheet
www.infineon.com/gdLowSide
Please read the Important Notice and Warnings at the end of this document
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Single-channel low-side gate driver IC with over-current protection
Table of contents
1
Block diagram........................................................................................................................ 3
2
2.1
2.2
Pin configuration and functionality.......................................................................................... 4
Pin configuration.....................................................................................................................................4
Input/output logic truth table ................................................................................................................5
3
Qualification information........................................................................................................ 6
4
Electrical parameters ............................................................................................................. 7
Absolute maximum ratings.....................................................................................................................7
Recommended operating conditions.....................................................................................................7
Static electrical characteristics...............................................................................................................8
Dynamic electrical characteristics..........................................................................................................8
4.1
4.2
4.3
4.4
5
Application information and additional details.......................................................................... 9
IGBT gate driver.......................................................................................................................................9
Switching and timing relationships........................................................................................................9
Input logic compatibility.......................................................................................................................10
Undervoltage lockout (Vcc)...................................................................................................................10
Over current protection (OCP)..............................................................................................................11
Fault reporting and programmable fault clear timer ..........................................................................12
Enable input ..........................................................................................................................................12
5.1
5.2
5.3
5.4
5.5
5.6
5.7
6
Package outline: PG-SOT23-6-3..............................................................................................13
Tape and reel details .............................................................................................................14
Part marking information ......................................................................................................15
Similar products ...................................................................................................................16
Related documents ...............................................................................................................17
7
8
9
10
Revision history.............................................................................................................................18
Datasheet
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1ED44175N01B
Single-channel low-side IGBT gate driver IC with over-current protection
1
Block diagram
Vcc
UVLO &
Vcc
4
5
Filter
3.3 V
PWM
disable
logic
3
OUT
2.15 M
EN/FLT
Fault
output
2
COM
UVLO
QFLT
VOCTH
OCP
Filter
6
IN
1
OCP
Figure 2
Block diagram
Datasheet
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Single-channel low-side IGBT gate driver IC with over-current protection
2
Pin configuration and functionality
2.1
Pin configuration
Table 1
Pin configuration
Pin no. Name
Function
OCP
COM
OUT
Vcc
Current sense input
Ground
1
2
3
4
Gate drive output
Supply Voltage
Enable, fault reporting and fault clear time program pin, three functions:
1. Logic input to enable I/O functionality. I/O logic functions when ENABLE is high.
2. Fault reporting function like over-current or undervoltage lockout, this pin has
negative logic and an open-drain output.
3. Fault clear time program with external resistor and capacitor.
Logic input for gate driver output (OUT), in phase
EN/FLT
5
6
IN
OUT 3
4
5
6
Vcc
EN/FLT
2
1
COM
OCP
IN
Figure 3
PG-SOT23-6-3 (top view)
Datasheet
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1ED44175N01B
Single-channel low-side IGBT gate driver IC with over-current protection
2.2
Input/output logic truth table
Table 2
Input/output logic truth table
IN
L
H
UVLO1)
OCP2)
L
L
퐄퐍/퐅퐋퐓 3)
OUT
L
H
Note
OUT = L
OUT = H
H
H
H
H
OUT = L, EN/FLT= L, (UVLO protection will disable input
signals until EN/FLT returns to high level.)
X
X
X
L
H
H
X
H
X
L
L
L
L
L
L
OUT = L, EN/FLT= L, (Over current protection will disable
input signals until EN/FLT returns to high level.)
OUT = L (Externally pull down EN/FLT pin will disable I/O
logic until EN/FLT returns to high level.)
1) UVLO “L” state is under-voltage protection.
2) OCP “H” state is over-current protection.
3) EN/FLT “H” state is EN/FLT pin externally pulling up and internally pull down MOSFET (QFLT) is off.
(See Block Diagram.)
Datasheet
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3
Qualification information
Industrial 1)
Comments: This family of ICs has passed JEDEC’s Industrial
qualification. Consumer qualification level is granted by
Qualification level
extension of the higher Industrial level.
MSL1 2) 260°C
(per JEDEC standard J-STD-020)
Moisture sensitivity level
ESD
1.5 kV
Charged device model
Human body model
(per ANSI/ESDA/JEDEC standard JS-002)
3 kV
(per ANSI/ESDA/JEDEC standard JS-001)
Class II, Level A
(per JESD78)
Yes
IC latch-up test
RoHS compliant
1)
Higher qualification ratings may be available should the user have such requirements. Please contact your Infineon
sales representative for further information.
2)
Higher MSL ratings may be available for the specific package types listed here. Please contact your Infineon sales
representative for further information.
Datasheet
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4
Electrical parameters
4.1
Absolute maximum ratings
Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. The device may not
function or not be operable above the recommended operating conditions and stressing the parts to these levels is not
recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device
reliability. All voltage parameters are absolute voltages referenced to COM. The thermal resistance and power dissipation
ratings are measured under board mounted and still air conditions.
Table 3
Absolute maximum ratings
Definition
Symbol
VCC
Min
– 0.3
- 0.3
– 10
– 0.3
– 10
—
Max
25
VCC + 0.3
VCC +0.3
VCC + 0.3
VCC + 0.3
0.5
250
150
150
260
Units
Fixed supply voltage
VO
Output voltage (OUT)
VOCP
VEN/FLT
VIN
PD
RthJA
TJ
Voltage at current sense pin (OCP)
Voltage at enable and fault reporting pin (EN/FLT)
Logic input voltage ( IN )
Package power dissipation @ TA ≤ 25°C
Thermal resistance, junction to ambient
Junction temperature
V
W
°C/W
PG-SOT23-6
—
– 40
– 55
—
TS
TL
Storage temperature
Lead temperature (soldering, 10 seconds)
°C
4.2
Recommended operating conditions
For proper operation, the device should be used within the recommended conditions. All voltage parameters are absolute
voltages referenced to COM unless otherwise stated in the table.
Table 4
Recommended operating conditions
Definition
Symbol
VCC
Min
12.7
COM
-5
0
– 5
Max
20
VCC
VCC
VCC
VCC
125
Units
Fixed supply voltage
VO
Output voltage
VOCP
VEN/FLT
VIN
Voltage at current sense pin (OCP)
Voltage at enable and fault reporting pin (EN/FLT)
Logic input voltage ( IN )
V
TA
Ambient temperature
– 40
°C
Datasheet
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Single-channel low-side IGBT gate driver IC with over-current protection
4.3
Static electrical characteristics
VCC = 15V, TA = 25°C unless otherwise specified. The VINL, VINH, VENL, VENH, VOCTH, and IIN, IFLT parameters are referenced to COM and
are applicable to input leads: IN, OCP and EN/FLT. The VO and IO parameters are referenced to COM and are applicable to the
output lead: OUT.
Table 5
Static electrical characteristics
Symbol Definition
Min
11.2
10.3
—
0.8
1.9
0.8
1.9
—
—
-259
35
-10
—
2
Typ
11.9
11
Max
12.7
11.8
—
1.2
2.3
1.2
2.3
0.1
0.1
-233
70
—
1200
—
—
—
Units Test Conditions
VCCUV+ Vcc supply undervoltage positive going threshold
VCCUV- Vcc supply undervoltage negative going threshold
VCCUVH Vcc supply undervoltage lockout hysteresis
0.9
1.0
2.1
1.0
2.1
0.02
0.02
-246
50
VINL
VINH
VENL
Logic “0” input voltage (OUT = LO)
Logic “1” input voltage (OUT = HI)
Logic “0” disable voltage
V
VENH Logic “1” enable voltage
VOH High level output voltage, VCC -VOUT
VOL Low level output voltage, VOUT
VOCTH Current limit threshold voltage
IO = 2 mA
IO = 2 mA
mV
IIN+
IIN-
IQCC
IO+
IO-
IFLT
Logic “1” input bias current IN pin
Logic “0” input bias current IN pin
Quiescent VCC supply current
Output sourcing short circuit pulsed current
Output sinking short circuit pulsed current
EN/FLT pull down sinking current
VIN = 5 V
µA
- 6
VIN = 0 V
VIN = 0 V or 5 V
VO = 0 V, PW ≤ 2 µs
VO = 15 V, PW ≤ 2 µs
VEN/FLT = 0.4 V
VCC = open,
700
2.6
2.6
—
A
mA
V
2
18
VACTSD Active shut down voltage
—
2.0
2.3
IOUT-/IO- = 0.1
4.4
Dynamic electrical characteristics
VCC = 15 V, TA = 25°C, and CL = 1000 pF unless otherwise specified.
Table 6
Dynamic electrical characteristics
Symbol Definition
Min
—
—
Typ
50
50
5
Max
Units
Test Conditions
ton
toff
tr
Turn-on propagation delay
Turn-off propagation delay
Turn-on rise time
75
75
—
Figure 6
VIN pulse = 5 V
—
tf
Turn-off fall time
—
5
—
ns
Figure 12
VEN pulse = 5 V
tDISA Disable propagation delay
—
50
75
Figure 9, Figure 10
REN = 10 kΩ to VCC
VOCP pulse = - 0.5 V
Figure 9, Figure 10
VCC = 3.3 V
RFLTC = 1MΩ to Vdd,
CFLTC = 150pF to COM
RFLT = 0 Ω, CFLT = NC
VOCP pulse = - 0.5 V
Figure 8
tOCPDEL Over current protection propagation delay
—
—
230
200
350
320
tOCPFLT OCP to low level EN/FLT signal delay
tFLTC FAULT clear time
80
103
130
µs
tBLK
Over current protection blanking time
100
180
2
250
ns
µs
*
tvCCUV
—
—
VCC supply UVLO filter time
*Parameter verified by design, not tested in production.
Datasheet
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5
Application information and additional details
Information regarding the following topics is included as subsections within this section of the datasheet.
•
•
•
•
•
•
•
IGBT gate driver
Switching and timing relationships
Input logic compatibility
Undervoltage lockout protection
Over current protection (OCP)
Fault reporting and programmable fault clear timer
Enable input
See the 1ED44175N01B application note AN2019-37 Low - side driver with over current protection and fault/enable
(negative current sense) for interface circuit examples and recommended layout guidelines.
5.1
IGBT gate driver
The 1ED44175N01B is designed to drive IGBT power devices. Figure 4 and Figure 5 illustrate several parameters associated with
the gate driver functionality of the driver. The output current of the driver, used to drive the gate of the power switch, is defined
as IO. The voltage that drives the gate of the external power switch is defined as VOUT
.
Figure 4
Gate output sourcing current
Figure 5
Gate output sinking current
5.2
Switching and timing relationships
The relationships between the input and output signals of the 1ED44175N01B are illustrated below Figure 6. From the figure,
we can see the definitions of several timing parameters (i.e. ton, toff, tr, and tf) associated with this device.
50%
50%
IN
tf
ton
tr
toff
90%
90%
OUT
10%
10%
Figure 6
Switching time waveforms
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5.3
Input logic compatibility
The input of this IC is compatible with standard CMOS and TTL outputs. The 1ED44175N01B has been designed to be
compatible with 3.3 V, 5 V and 15 V logic-level signals. The input high threshold (VINH) is typ. 2.1 V and low threshold (VINL) is typ.
1 V. Input hysteresis offers enhanced noise immunity. The 1ED44175N01B includes an important feature: wherein, whenever
the input pin is in a floating condition, the output is held in the low state. This is achieved using GND pull-down resistors on the
input pin. Figure 7 illustrates an input signal to the 1ED44175N01B, its input threshold values, and the logic state of the IC as a
result of the input signal.
Figure 7
IN input thresholds
5.4
Undervoltage lockout (VCC)
The 1ED44175N01B has internal UVLO protection feature on the VCC pin supply circuit blocks. When VCC bias voltage keeps lower
than the VCCUV- threshold more than UVLO filter time (tVCCUV), the VCC UVLO feature holds the output low, regardless of the status
of the IN input.
At the same time, the internal MOSFET QFLT turns on and the EN/FLT pin is internally pulled down to COM. The EN/FLT output
stays in the low state until the UVLO has been removed; once the UVLO is removed, the internal MOSFET QFLT turns off, and the
voltage on the EN/FLT pin is charged up by external voltage Vdd. The length of the fault clear time period (tFLTC) is determined
by exponential charging characteristics of the capacitor where the time constant is set by RFLTC and CFLTC
.
And when VCC is higher than VCCUV+ and longer than fault clear time (tFLTC), the OUT still keeps low until next input signal IN is high.
(See Figure 8)
The filter time (tVCCUV) of about 2 μs helps to suppress noise from the UVLO circuit, so that negative going voltage spikes at the
supply pin will avoid parasitic UVLO events.
Vcc
VCCUV+
VCCUV-
IN
tVCCUV
OUT
tFLTC
QFLT off
EN/FLT
VENH
QFLT off
QFLT on
Figure 8
VCC under voltage protection waveform definitions
Datasheet
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Single-channel low-side IGBT gate driver IC with over-current protection
5.5
Over current protection (OCP)
The 1ED44175N01B has a function of over current protection with a threshold VCSTH at the OCP pin input. The voltage at this pin is
the negative voltage drop sensed across the system current sense resistor. It is up to minus 10 VDC negative input capability of
OCP pin. To avoid false tripping due to the fast high current switch on transient that occurs at the switch on of IGBT resulting from
the circuit parasitic capacitors, there is a blanking interval which disables over current detection for the period of tBLK (Additional
RC filter is recommended, if internal tBLK is not enough in the very noisy circuit.). After tBLK and the voltage of OCP pin is over VCSTH
,
the 1ED44175N01B causes fault logic to initiate a fault shutdown sequence. This sequence starts with the generation of a fault
signal and internal MOSFET QFLT is turned on and EN/FLT pin is pulled down.
At the same time the 1ED44175N01B terminates the present cycle, and the gate output is immediately pulled down with internal
propagation delay (tOCPDEL), see the Figure 9 and Figure 10.
Figure 9 is the diagram of 1ED44175N01B in boost application. And Figure 10 is the typical waveforms of the application. If the
OCP fault condition is removed, the internal pull down NMOS of EN/FLT is released and EN/FLT will be pull up again with Vdd, but
the output still keeps low until the next input signal IN is high.
Vout
AC
RCS
Vcc
1ED44175N01B
Vdd
OUT
Vcc
3
2
1
4
5
6
RFLTC
CFLTC
EN/FLT
IN
COM
OCP
I/O2
RFLT
CFLT
µC
I/O1
Gnd
Figure 9
1ED44175N01B in Boost application
IN
50%
OUT
OCP
tOCPDEL
vOCTH
tFLTC
tOCPFLT
EN/FLT
QFLT off
vENH
50%
QFLT on
Figure 10 OCP fault detection and fault clear waveforms one
Datasheet
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1ED44175N01B
Single-channel low-side IGBT gate driver IC with over-current protection
5.6
Fault reporting and programmable fault clear timer
The 1ED44175N01B provides an integrated fault reporting output and an adjustable fault clear timer. There are two situations
that would cause the driver to report a fault via the EN/FLT pin. The first is an under voltage condition of VCC and the second is if
the OCP pin recognizes a fault. Once the fault condition occurs, the EN/FLT pin is internally pulled to COM. The EN/FLT output
stays in the low state until the fault condition has been removed and the internal pull down NMOS QFLT turns off, the voltage on
the EN/FLT pin is charged up with external pull-up voltage.
The length of the fault clear time period (tFLTC) is determined by exponential charging characteristics of the capacitor where the
time constant is set by RFLTC and CFLTC. Figure 9 shows that RFLTC is connected between the external supply (Vdd) and the EN/FLT
pin, while CFLTC is placed between the EN/FLT and COM pins. EN/FLT is weakly pulled up to 3.3 V reference voltage with 2.15 M
resistor internally. So the length of the fault clear time period can be determined by using the formula below (If Vdd = 3.3 V).
RFLTC x 2.15M
RFLTC + 2.15M
VENH
Vdd
tFLTC = -
x CFLTC x In(1-
)
)
(
5.7
Enable input
1ED44175N01B provides an enable functionality that allows to shutdown or to enable the output. When EN/FLT is pulled up
(the enable voltage is higher than VENH) the output is able to operate normally, pulling EN/FLT low (the enable voltage is lower
than VENL) the output is disable. The relationships between the input, output and enable signals of the 1ED44175N01B are
illustrated below in Figure 11~13. From these figures, we can see the definitions of several timing parameters and threshold
voltages (i.e. tDISA, VENH and VENL) associated with this device.
High
IN
IN
V
EN
50%
EN/FLT
OUT
tDISA
OUT
90%
Figure 11 Input/output/enable pins timing diagram Figure 12 EN pin switching time waveform
Figure 13 EN input thresholds
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Single-channel low-side IGBT gate driver IC with over-current protection
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Package outline: PG-SOT23-6-3
Outline dimensions
Footprint dimensions
Figure 14 Package outline
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Tape and reel details
Figure 15 Tape and reel dimensions
Notes: For further details, please visit www.infineon.com/packages
Datasheet
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Part marking information
TOP MARKING
Note: New part marking implementation beginning in 2021. Refer to Information Note 001/21 for details.
Figure 16 Part marking information
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Similar products
Channels Typ. gate
Part
Max
UVLO
Typ.
prop.
delay
Logic and features
Package
options
drive
(Io+/Io-)
number supply (on/off)
voltage
(on/off)
A
V
V
ns
Single non-inverting channel
Dual OUT pins
Single positive current sense
OCP, fault out and ENABLE
Single negative current sense
OCP, fault out and ENABLE
1.5/1.5
IR44273L
20
5 / 4.15
50 / 50
SOT23-5L
PG-DSO-8
SOT23-6-3
SOIC-8L
1
2
0.8/1.75 1ED44176
25
25
25
20
25
25
24
11.9/11.4 50 / 50
8/7.3 34 / 34
2.6/2.6
2.3 / 3.3
10/10
1ED44173
IRS4426S
IRS44262S
IRS4427S
IRS4428S
2ED24427
50 / 50 Dual inverting channels
10.2 / 9.2 50 / 50 Dual inverting channels
SOIC-8L
50 / 50 Dual non-inverting channels SOIC-8L
Single inverting channel
50 / 50
SOIC-8L
Single non-inverting channel
Dual non-inverting channels Power Pad
with ENABLE DSO-8
11.5/10
40 / 55
Datasheet
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Related documents
1. AN2019-37 Low – side IGBT driver with over current protection and fault/enable (negative current sense)
2. Datasheet of 1ED44173N01B and 1ED44176N01B
Datasheet
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Single-channel low-side IGBT gate driver IC with over-current protection
Revision history
Document
version
1.0
1.1
1.2
Date of release
Description of changes
Oct. 15, 2019
Apr. 15, 2020
Jul. 22, 2021
Final Datasheet
Modified the formula of tFLTC on page 12 (Added negative sign)
Updated the marking, adding a line for lot code to improve traceability.
Updated the table of similar products (Deleted Gen.7 parts and added
2ED24427).
Datasheet
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Trademarks
All referenced product or service names and trademarks are the property of their respective owners.
IMPORTANT NOTICE
Edition 2021-07-22
The information given in this document shall in no For further information on the product, technology,
event be regarded as a guarantee of conditions or delivery terms and conditions and prices please
Published by
characteristics (“Beschaffenheitsgarantie”) .
contact your nearest Infineon Technologies office
(www.infineon.com).
Infineon Technologies AG
81726 Munich, Germany
With respect to any examples, hints or any typical
values stated herein and/or any information
regarding the application of the product, Infineon
Technologies hereby disclaims any and all
warranties and liabilities of any kind, including
without limitation warranties of non-infringement of
intellectual property rights of any third party.
WARNINGS
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相关型号：
1ED44176N01F
EiceDRIVERTM 25V 单通道低边非反向栅极驱动器，适用于 MOSFET 和 IGBT，采用小型 8 引脚 PG-DSO8 封装，典型拉电流为0.8 A，灌电流为1.75 A。
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