ILC7080AIM5-285 [IMPALA]
50/100M SOT-23 CMOS RF LDO REGULATORS; 50 / 100M SOT -23 CMOS射频LDO稳压器
| 型号： | ILC7080AIM5-285 |
| 厂家： | 
Impala Linear Corporation |
| 描述： | 50/100M SOT-23 CMOS RF LDO REGULATORS |
| 文件： | 总16页 (文件大小：426K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Impala Linear Corporation
ILC7080/81
50/100mA SOT-23 CMOS RF LDO™ Regulators
General Description
Features
The ILC7080/81 are 50 or 100mA low dropout (LDO) volt- • Ultra low 1mV dropout per 1mA load
age regulators designed to provide a high performance • 1% output voltage accuracy
• Uses low ESR ceramic output capacitor to minimize
solution to low power systems.
noise and output ripple
The devices offer a typical combination of low dropout
and low quiescent current expected of CMOS parts,
while uniquely providing the low noise and high ripple
rejection characteristics usually only associated with
bipolar LDO regulators.
• Only 100µA ground current at 100mA load
• Ripple rejection up to 85dB at 1kHz, 60dB at 1MHz
• Less than 80µVRMS noise at BW = 100Hz to 100kHz
• Excellent line and load transient response
• Over current / over temperature protection
• Guaranteed up to 80/150mA output current
• Industry standard five lead SOT-23 package
• Fixed 2.85V, 3.0V, 3.3V, 3.6V, 4.7V, 5.0V and adjustable
output voltage options
The devices have been optimized to meet the needs of
modern wireless communications design; Low noise, low
dropout, small size, high peak current, high noise immuni-
ty. The ILC7080/81 are designed to make use of low cost
ceramic capacitors while outperforming other devices that
require tantalum capacitors.
• Metal mask option available for custom voltages between
2.5 to 10V
Applications
• Cellular phones
• Wireless communicators
• PDAs / palmtops / organizers
• Battery powered portable electronics
Typical Circuit
VOUT
SOT23-5
5
1
4
3
Ordering Information (TA = -40°C to +85°C)
ILC7080AIM5-xx
ILC7080AIM5-ADJ
ILC7081AIM5-xx
ILC7081AIM5-ADJ
50mA, fixed voltage
ILC7080
ILC7081
50mA adjustable voltage
100mA, fixed voltage
100mA, adjustable voltage
COUT
VIN
CNOISE
2
Note: Fixed voltage options are defined by 2-digit code as shown in the
package markings information section of the datasheet.
ON
OFF
Impala Linear Corporation
ILC7080/81 1.1
www.impalalinear.com
(408) 574-3939
Sept. 1998
1
50/100mA SOT-23 CMOS RF LDO™ Regulators
Pin Description ILC7081/81-xx (fixed voltage version)
Pin
Pin Name
Pin Description
Number
1
2
3
4
VIN
Connect direct to supply
Ground pin. Local ground for CNOISE and COUT
GND
.
ON/OFF
CNOISE
By applying less than 0.4V to this pin the device will be turned off.
Optional noise bypass capacitor may be connected between this
pin and GND (pin 2). Do not connect CNOISE directly to the main
power ground plane.
5
VOUT
Output Voltage. Connect COUT between this pin and GND (pin 2)
Pin Description ILC7081/81-ADJ (adjustable voltage version)
Pin
Pin Name
Pin Description
Number
1
2
3
4
VIN
GND
Connect direct to supply
Ground pin. Local ground for CNOISE and COUT
.
ON/OFF
VADJ
By applying less than 0.4V to this pin the device will be turned off.
Voltage feedback pin to set the adjustable output voltage. Do not
connect a capacitor to this pin.
5
VOUT
Output Voltage. Connect COUT between this pin and GND (pin 2)
Pin Package Configurations
VOUT
VADJ
4
VOUT
CNOISE
5
SOT23-5
5
4
SOT23-5
ILC7080-ADJ
ILC7081-ADJ
ILC7080-xx
ILC7081-xx
1
2
3
1
2
3
VIN
VIN
GND
ON
GND
ON
OFF
OFF
Impala Linear Corporation
ILC7080/81 1.1
www.impalalinear.com
(408) 574-3939
Sept. 1998
2
50/100mA SOT-23 CMOS RF LDO™ Regulators
Absolute Maximum Ratings (Note 1)
Parameter
Input voltage
On/Off Input voltage
Symbol
VIN
VON/OFF
IOUT
Ratings
-0.3 to +13.5
-0.3 to VIN
Units
V
Output Current
Short circuit protected
-0.3 to VIN+0.3
250
(Internally Limited)
-40~+150
mA
V
Output voltage
VOUT
PD
Package Power Dissipation
(SOT-23-5)
mW
Maximum Junction Temp Range
Storage Temperature
Operating Ambient Temperature
Package Thermal Resistance
TJ(max)
TSTG
TA
°C
°C
-40~+125
-40 to +85
°C
333
°C/W
θJA
Absolute Maximum Ratings (Note 1)
Unless otherwise specified, all limits are at TA = 25°C; VIN = VOUT(NOM) + 1V, IOUT = 1mA, COUT = 1µF, VON/OFF = 2V.
Boldface limits apply over the operating temperature range. (Note 2)
Parameter
Input Voltage Range
Output voltage
Symbol
VIN
Conditions
Min
2
Typ
Max
13
Units
V
VOUT
IOUT = 1mA
-1
VOUT(NOM)
+1
%
1mA < IOUT < 100mA
1mA < IOUT < 100mA
-1.5
-3.5
1.215
1.202
1.5
+3.5
1.265
1.278
0.014
0.032
Feedback Voltage
(ADJ version)
VADJ
1.240
0.007
V
Line Regulation
VOUT(NOM) + 1V < VIN < 12V
IOUT = 0mA
%/V
∆VOUT
/
(VOUT*∆VIN)
Dropout voltage
(Note 3)
0.1
10
1
2
IOUT = 10mA
IOUT = 50mA
IOUT = 100mA
IOUT = 150mA
25
35
7080/81
VIN – VOUT
mV
50
75
100
150
200
225
300
100
150
7081 only
Impala Linear Corporation
ILC7080/81 1.1
www.impalalinear.com
(408) 574-3939
Sept. 1998
3
50/100mA SOT-23 CMOS RF LDO™ Regulators
Electrical Characteristics ILC7080/81AIM5 (cont.)
Unless otherwise specified, all limits are TA = 25°C; VIN = VOUT(NOM) + 1V, IOUT = 1mA, COUT = 1µF, VON/OFF = 2V.
Boldface limits apply over the operating temperature range. (Note 2)
Parameter
Symbol
Conditions
Min
Typ
Max
200
220
220
240
220
240
240
260
260
280
2
Units
IOUT = 0mA
95
IOUT = 10mA
IOUT = 50mA
IOUT = 100mA
IOUT = 150mA
100
100
100
115
0.1
7080/81
Ground Pin Current
IGND
µA
7081
only
Shutdown (OFF) Current
ON/OFF Input Voltage
ION/OFF
VON/OFF = 0V
µA
V
VON/OFF
High = Regulator On
Low = Regulator Off
VON/OFF = 0.6V, regulator OFF
2.0
13
0.6
ON/OFF Pin Input Current
IIN(ON/OFF)
IOUT(PEAK)
eN
0.3
1
µA
mA
(Note 5)
V
ON/OFF = 2V, regulator ON
Peak Output Current
(Note 4)
VOUT > 0.95VOUT(NOM)
tpw = 2ms
,
400
500
Output Noise Voltage
BW = 300Hz to 50kHz,
CNOISE = 0.01µF
80
µVRMS
COUT = 4.7µF,
IOUT = 100mA
freq = 1kHz
85
70
60
4
Ripple Rejection
dB
∆VOUT/∆VIN
∆VOUT(line)
freq = 10kHz
freq = 1MHz
VIN: VOUT(NOM) + 1V to
VOUT(NOM) + 2V,
mV
Dynamic Line Regulation
tr/tf = 2µs; IOUT = 100mA
IOUT: 0 to 100mA;
d(IOUT)/dt = 100mA/µs
with COUT = 0.47µF
with COUT = 2.2µF
VOUT = 0V
50
25
Dynamic Load Regulation
Short Circuit Current
mV
∆VOUT(load)
ISC
600
mA
Note 1: Absolute maximum ratings indicate limits which when exceeded may result in damage to the component. Electrical specifications do not apply when operating the
device outside of its rated operating conditions.
Note 2: Specified Min/Max limits are production tested or guaranteed through correlation based on statistical control methods. Measurements are taken at constant junction
temperature as close to ambient as possible using low duty pulse testing.
Note 3: Dropout voltage is defined as the input to output differential voltage at which the output voltage drops 2% below the nominal value measured with a 1V differential.
Note 4: Guaranteed by design
Note 5: The device’s shutdown pin includes a 2MW internal pull down resistor connected to ground.
Impala Linear Corporation
ILC7080/81 1.1
www.impalalinear.com
(408) 574-3939
Sept. 1998
4
50/100mA SOT-23 CMOS RF LDO™ Regulators
Operation
The ILC7080/81 LDO design is based on an advanced cir- the regulator to have gain out to the frequency where the
cuit configuration for which patent protection has been output pole continues to reduce the gain to unity. The con-
applied. Typically it is very difficult to drive a capacitive out- figuration of the poles and zero are shown in figure 1.
put with an amplifier. The output capacitance produces a Instead of powering the critical circuits from the unregulat-
pole in the feedback path, which upsets the carefully tai- ed input voltage, the CMOS RF LDO powers the internal
lored dominant pole of the internal amplifier. Traditionally circuits such as the bandgap, the error amplifier and most
the pole of the output capacitor has been “eliminated” by of the transconductance amplifier from the boot strapped
reducing the output impedance of the regulator such that regulated output voltage of the regulator. This technique
the pole of the output capacitor is moved well beyond the offers extremely high ripple rejection and excellent line tran-
gain bandwidth product of the regulator. In practice, this is sient response.
difficult to do and still maintain high frequency operation. A block diagram of the regulator circuit used in the
Typically the output impedance of the regulator is not sim- ILC7080/81 is shown in figure 2, which shows the input-to-
ply resistive, such that the reactive output impedance inter- output isolation and the cascaded sequence of amplifiers
acts with the reactive impedance of the load resistance and that implement the pole-zero scheme outlined above.
capacitance. In addition, it is necessary to place the domi- The ILC7080/81 were designed in a CMOS process with
nant pole of the circuit at a sufficiently low frequency such some minor additions, which allow the circuit to be used at
that the gain of the regulator has fallen below unity before input voltages up to 13V. The resulting circuit exceeds the
any of the complex interactions between the output and the frequency response of traditional bipolar circuits. The
load occur. The ILC7080/81 does not try to eliminate the ILC7080/81 is very tolerant of output load conditions with
output pole, but incorporates it into the stability scheme. the inclusion of both short circuit and thermal overload pro-
The load and output capacitor forms a pole, which rolls off tection. The device has a very low dropout voltage, typical-
the gain of the regulator below unity. In order to do this the ly a linear response of 1mV per milliamp of load current,
output impedance of the regulator must be high, looking like and none of the quasi-saturation characteristics of a bipolar
a current source. The output stage of the regulator output device. All the good features of the frequency
becomes a transconductance amplifier, which converts a response and regulation are valid right to the point where
voltage to a current with a substantial output impedance. the regulator goes out of regulation in a 4mV transition
The circuit which drives the transconductance amplifier is region. Because there is no base drive, the regulator is
the error amplifier, which compares the regulator output to capable of providing high current surges while remaining in
the band gap reference and produces an error voltage as regulation. This is shown in the high peak current of 500mA
the input to the transconductance amplifier. The error ampli- which allows for the ILC7080/81 to be used in systems that
fier has a dominant pole at low frequency and a “zero” require short burst mode operation.
which cancels out the effects of the pole. The zero allows
DOMINANT POLE
85 dB
OUTPUT POLE
COMPENSATING
ZERO
UNITY GAIN
FREQUENCY
Figure 1: ILC7080/81 RF LDO frequency response
Impala Linear Corporation
ILC7080/81 1.1
www.impalalinear.com
(408) 574-3939
Sept. 1998
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50/100mA SOT-23 CMOS RF LDO™ Regulators
INTERNAL VDD
VIN
CNOISE
BANDGAP
REFERENCE
VREF
TRANS-
CONDUCTANCE
AMPLIFIER
ERROR
AMPLIFIER
VOUT
FEEDBACK
GND
ON/OFF
Figure 2: ILC7080/81 RF LDO regulator block digram
Shutdown (ON/OFF) Operation
Adjustable Output Voltage
The ILC7080/81 output can be turned off by applying 0.4V Figure 3 shows how an adjustable output voltage can be
or less to the device’s ON/OFF pin (pin 3). In shutdown easily achieved using ILC7080/81-ADJ. The output voltage,
mode, the ILC7080/81 draws less than 1mA quiescent cur- VOUT is given by the following equation:
rent. The output of the ILC7081 is enabled by applying 2V
to 13V at the ON/OFF pin. In applications where the
ILC7080/81 output will always remain enabled, the ON/OFF
pin may be connected to VIN (pin 1). The ILC7080/81’s
VOUT = 1.24V x (R1/R2 + 1)
R1
R2
VOUT
shutdown circuitry includes hysteresis, as such the device
will operate properly even if a slow moving signal is applied
to the ON/OFF pin. The device’s shutdown pin includes a
2MΩ internal pull down resistor connected to ground.
SOT23-5
VADJ
4
5
ILC7080-ADJ
ILC7081-ADJ
COUT
VIN
Short Circuit Protection
1
2
3
The ILC7080/81 output can withstand momentary short cir-
cuit to ground. Moreover, the regulator can deliver very high
output peak current due to its 1A instantaneous short circuit
current capability.
CIN
ON
OFF
Figure 3: Application circuit for adjustable output voltage
Thermal Protection
The ILC7080/81 also includes a thermal protection circuit
which shuts down the regulator when die temperature
exceeds 170°C due to overheating. In thermal shutdown,
once the die temperature cools to below 160°C, the regula-
tor is enabled. If the die temperature is excessive due to
high package power dissipation, the regulator’s thermal cir-
cuit will continue to pulse the regulator on and off. This is
called thermal cycling.
For best results, a resistor value of 470kΩ or less may be
used for R2. The output voltage can be programmed from
2.5V to 12V.
Note: An external capacitor should not be connected to the
adjustable feedback pin (pin 4). Connecting an external capacitor
to pin 4 may cause regulator instability and lead to oscillations.
Excessively high die temperature may occur due to high dif-
ferential voltage across the regulator or high load current or
high ambient temperature or a combination of all three.
Thermal protection protects the regulator from such fault
conditions and is a necessary requirement in today’s
designs. In normal operation, the die temperature should be
limited to under 150°C.
Impala Linear Corporation
(408) 574-3939
ILC7080/81 1.1
www.impalalinear.com
Sept. 1998
6
50/100mA SOT-23 CMOS RF LDO™ Regulators
Maximum Output Current
CIN, will hold VIN higher than VOUT and decay slower than
VOUT when the LDO is powered off.
The maximum output current available from the ILC7080/81
is limited by the maximum package power dissipation as
well as the device’s internal current limit. For a given ambi-
ent temperature, TA, the maximum package power dissipa-
Output Capacitor Selection
Impala strongly recommends the use of low ESR (equiva-
lent series resistance) ceramic capacitors for COUT and
tion is given by:
CNOISE. The ILC7080/81 is stable with low ESR capacitor
PD(max) = (TJ(max) - TA) / θJA
(as low as zero Ω). The value of the output capacitor should
be 1µF or higher. Either ceramic chip or a tantalum capaci-
tor may be used at the output.
where TJ(max) = 150°C is the maximum junction temperature
and θJA = 333°C/W is the package thermal resistance. For
example at TA = 85°C ambient temperature, the maximum
package power dissipation is;
Use of ceramic chip capacitors offer significant advantages
over tantalum capacitors. A ceramic capacitor is typically
considerably cheaper than a tantalum capacitor, it usually
has a smaller footprint, lower height, and lighter weight than
a tantalum capacitor. Furthermore, unlike tantalum capaci-
tors which are polarized and can be damaged if connected
incorrectly, ceramic capacitors are non-polarized. Low
value ceramic chip capacitors with X7R dielectric are avail-
able in the 100pF to 4.7µF range, while high value capaci-
tors with Y5V dielectric are available in the 2200pF to 22µF
range. Evaluate carefully before using capacitors with Y5V
dielectric because their ESR increases significantly at cold
temperatures. Figure 10 shows a list of recommended
ceramic capacitors for use at the output of ILC7080/81.
PD(max) = 195mW.
The maximum output current can be calculated from the fol-
lowing equation:
IOUT(max) < PD(max) / (VIN - VOUT
)
For example at VIN = 6V, VOUT = 5V and TA = 85°C, the
maximum output current is IOUT(max) < 195mA. At higher
output current, the die temperature will rise and cause the
thermal protection circuit to be enabled.
APPLICATION HINTS
Figure 4 shows the typical application circuit for the
ILC7080/81.
Note: If a tantalum output capacitor is used then for stable opera-
tion Impala recommends a low ESR tantalum capacitor with max-
imum rated ESR at or below 0.4Ω. Low ESR tantalum capacitors,
such as the TPS series from AVX Corporation (www.avxcorp.com)
or the T495 series from Kemet (www.kemet.com) may be used.
In applications where a high output surge current can be
expected, use a high value but low ESR output capacitor for
superior load transient response. The ILC7080/81 is stable
with no load.
VOUT
SOT23-5
5
1
4
ILC7080
ILC7081
COUT
VIN
CNOISE
2
3
ON
Noise Bypass Capacitor
OFF
In low noise applications, the self noise of the ILC7080/81
can be decreased further by connecting a capacitor from
the noise bypass pin (pin 4) to ground (pin 2). The noise
bypass pin is a high impedance node as such, care should
be taken in printed circuit board layout to avoid noise pick-
up from external sources. Moreover, the noise bypass
capacitor should have low leakage.
Figure 4: Basic application circuit for fixed output voltage versions
Input Capacitor
An input capacitor CIN of value 1mF or larger should be con-
nected from VIN to the main ground plane. This will help to
filter supply noise from entering the LDO. The input capac-
itor should be connected as close to the LDO regulator
input pin as is practical. Using a high-value input capacitor
will offer superior line transient response as well as better
power supply ripple rejection. A ceramic or tantalum capac-
itor may be used at the input of the LDO regulator.
Noise bypass capacitors with a value as low as 470pF
may be used. However, for optimum performance, use a
0.01µF or larger, ceramic chip capacitor. Note that the turn
on and turn off response of the ILC7080/81 is inversely
proportional to the value of the noise bypass capacitor.
For fast turn on and turn off, use a small value noise
bypass capacitor. In applications were exceptionally low
output noise is not required, consider omitting the noise
bypass capacitor altogether.
Note that there is a parasitic diode from the LDO regulator
output to the input. If the input voltage swings below the
regulator’s output voltage by a couple of hundred milivolts
then the regulator may be damaged. This condition must be
avoided. In many applications a large value input capacitor,
Impala Linear Corporation
(408) 574-3939
ILC7080/81 1.1
www.impalalinear.com
Sept. 1998
7
50/100mA SOT-23 CMOS RF LDO™ Regulators
The Effects of ESR (Equivalent Series Resistance)
Printed Circuit Board Layout Guidelines
The ESR of a capacitor is a measure of the resistance due As was mentioned in the previous section, to take full
to the leads and the internal connections of the component. advantage of any high performance LDO regulator requires
Typically measured in mΩ (milli-ohms) it can increase to paying careful attention to grounding and printed circuit
ohms in some cases.
board (PCB) layout.
Wherever there is a combination of resistance and current,
voltages will be present. The control functions of LDOs use
two voltages in order to maintain the output precisely; VOUT
IOUT
VOUT
R
I2
R
PCB
PCB
ESR
R
5
PSCBOT23-5
I1
COUT
4
3
and VREF
.
CNOISE
ILC7080
ILC7081
With reference to the block diagram in figure 2, VOUT is fed
back to the error amplifier and is used as the supply volt-
age for the internal components of the 7080/81. So any
change in VOUT will cause the error amplifier to try to com-
1
2
VIN
VIN
R
PCB
R
PCB
ON
pensate to maintain VOUT at the set level and noise on
VOUT will be reflected into the supply of each internal cir-
cuit. The reference voltage, VREF, is influenced by the
CNOISE pin. Noise into this pin will add to the reference volt-
OFF
Figure 6: Inherent PCB resistance
Figure 7 shows the effects of poor grounding and PCB lay-
out caused by the ESR and PCB resistances and the accu-
mulation of current flows.
age and be fed through the circuit. These factors will not
cause a problem if some simple steps are taken. Figure 5
shows where these added ESR resistances are present in
the typical LDO circuit.
Note particularly that during high output load current, the
LDO regulator’s ground pin and the ground return for COUT
VOUT
IOUT
and CNOISE are not at the same potential as the system
IC
ground. This is due to high frequency impedance caused by
PCB’s trace inductance and DC resistance. The current
loop between COUT, CNOISE and the LDO regulator’s ground
RC
SOT23-5
R*
5
1
4
3
ILC7080
ILC7081
CNOISE
COUT
VIN
pin will degrade performance of the LDO.
2
R*
RF LDOTM
Regulator
ON
CIN
OFF
5
1
4
3
Figure 5: ESR in COUT and CNOISE
2
With this in mind low ESR components will offer better per-
formance as LDOs may be exposed to large transients of
output voltage, and current flows through the capacitors in
order to filter these transient swings. ESR is less of a prob-
lem with CIN as the voltage fluctuations at the input will be
filtered by the LDO.
However, being aware of these current flows, there is also
another potential source of induced voltage noise from the
resistance inherent in the PCB trace. Figure 6 shows where
the additive resistance of the PCB can manifest itself. Again
these resistances may be very small, but a summation of
several currents can develop detectable voltage ripple and
will be amplified by the LDO. Particularly the accumulation
of current flows in the ground plane can develop significant
voltages unless care is taken.
Figure 7: Effects of poor circuit layout
Figure 8 shows an optimum schematic. In this schematic,
high output surge current has little effect on the ground cur-
rent and noise bypass current return of the LDO regulator.
Note that the key difference here is that COUT and CNOISE
are directly connected to the LDO regulator’s ground pin.
The LDO is then separately connected to the main ground
plane and returned to a single point system ground.
With a degree of care, the ILC7080/81 will yield outstanding
performance.
The layout of the LDO and its external components are also
based on some simple rules to minimize EMI and output
voltage ripple.
Impala Linear Corporation
(408) 574-3939
ILC7080/81 1.1
www.impalalinear.com
Sept. 1998
8
50/100mA SOT-23 CMOS RF LDO™ Regulators
5
1
4
3
2
Figure 9: Recommended application circuit layout
(not drawn to scale). Note: ground plane is bottom layer
of PCB and connects to top layer ground connections
through vias
Figure 8: Recommended application circuit schematic
Evaluation Board Parts List For Printed Circuit Board Shown Above
Label
U1
Part Number
ILC7081AIM5-30
69190-405
Manufacturer
Impala Linear
Berg
Description
100mA RF LDO™
J1
Connector, four position header
CIN
GRM40 Y5V 105Z16
muRata
Ceramic capacitor, 1µF, 16V, SMT
(size 0805)
CNOISE
COUT
ECU-V1H103KBV
Panasonic
muRata
Ceramic Capacitor, 0.01µF, 16V,
SMT (size 0603)
GRM42-
6X5R475K10
Ceramic Capacitor, 4.7µF, 16V, SMT
(size 1206)
Grounding Recommendations
Layout Considerations
1. Connect CIN between VIN of the ILC7080/81 and the 1. Place all RF LDO related components; ILC7080/81,
input capacitor CIN, noise bypass capacitor CNOISE and
output capacitor COUT as close together as possible.
“GROUND PLANE”.
2.
Keep the ground side of COUT and CNOISE connected to
Keep the output capacitor COUT as close to the
2.
3.
the “LOCAL GROUND” and not directly to the
“GROUND PLANE”.
ILC7080/81 as possible with very short traces to the
VOUT and GND pins.
3. On multilayer boards use component side copper for
grounding around the ILC7080/81 and connect back to a
“GROUND PLANE” using vias.
The traces for the related components; ILC7080/81,
input capacitor CIN, noise bypass capacitor CNOISE and
output capacitor COUT can be run with minimum trace
widths close to the LDO.
4. If using a DC-DC converter in your design, use a star
grounding system with separate traces for the power
ground and the control signals. The star should radiate
from where the power supply enters the PCB.
4. Maintain a separate “LOCAL GROUND” remote from
the “GROUND PLANE” to ensure a quiet ground near
the LDO.
Figure 9 shows how this circuit can be translated into a
PCB layout.
Impala Linear Corporation
(408) 574-3939
ILC7080/81 1.1
www.impalalinear.com
Sept. 1998
9
50/100mA SOT-23 CMOS RF LDO™ Regulators
Recommended Ceramic Output Capacitors
COUT
1µF
1µF
1µF
1µF
1µF
1µF
Capacitor Size
0805
IOUT
Dielectric
X5R
Part Number
C2012X5R1A105KT
GRM40X7R105K010
LMK212BJ105KG
GRM42-6X7R105K016
EMK316BJ105KL
TMK316BJ105KL
Capacitor Vendor
TDK
0 to 100mA
0 to 100mA
0 to 100mA
0 to 100mA
0 to 100mA
0 to 100mA
0805
X7R
muRata
0805
X7R
Talyo-Yuden
muRata
1206
X7R
1206
X7R
Talyo-Yuden
Talyo-Yuden
1206
X5R
2.2µF
2.2µF
2.2µF
0805
0805
1206
0 to 150mA
0 to 150mA
0 to 150mA
X5R
X5R
X5R
GRM40X5R225K 6.3
C2012X5R0J225KT
EMK316BJ225ML
muRata
TDK
Talyo-Yuden
4.7µF
4.7µF
1206
1206
0 to 150mA
0 to 150mA
X5R
X7R
GRM42-6X5R475K010
LMK316BJ475ML
muRata
Talyo-Yuden
Impala Linear Corporation
ILC7080/81 1.1
www.impalalinear.com
(408) 574-3939
Sept. 1998
10
50/100mA SOT-23 CMOS RF LDO™ Regulators
TYPICAL PERFORMANCE CHARACTERISTICS
Unless otherwise specified TA T=25°C, VIN =VOUT(NOM), + 1V, ON/OFF pin tied to VIN
Characterization at output currents above 50mA applies to ILC7081
Output Voltage vs Temperature
Dropout Characteristics
3.015
3.4
VOUT = 3.0V
VOUT = 3.3V
0.47µF (Ceramic)
COUT =
0.47µF (Ceramic)
COUT =
3.01
3.005
3
IOUT = 0mA
IOUT = 10mA
IOUT = 50mA
3.3
3.2
3.1
7081 only
2.995
2.99
IOUT = 100mA
IOUT = 150mA
2.985
3
-50
0
50
Temperature (°C)
100
150
3
3.2
3.4
3.6
VIN (V)
Dropout Voltage vs IOU T
Dropout Voltage vs Temperature
IOUT = 150mA
250
200
150
100
50
250
200
150
100
VOUT = 3.0V
VOUT = 3.0V
TA = 85°C
TA = 25°C
IOUT = 100mA
IOUT = 50mA
TA = –40°C
50
0
IOUT = 0mA
0
0
50
100
150
–40
25
85
Output Current (mA)
Temperature (°C)
Ground Current vs Input Voltage
Line Transient Response
150
6
5
VOUT = 3.0 V
0.47µF (Ceramic)
VIN: tr/tf < 1 µs
VOUT = 3.0V
COUT = 2.2 µF (Ceramic)
IOUT = 10mA
COUT =
IOUT = 50mA
125
100
75
IOUT = 150mA
IOUT = 100 mA
IOUT = 0mA
4
3.01
3.00
2.99
2.98
IOUT = 100mA
50
2
4
6
8
10
12
14
5µs/div
VIN (V)
Impala Linear Corporation
ILC7080/81 1.1
www.impalalinear.com
(408) 574-3939
Sept. 1998
11
50/100mA SOT-23 CMOS RF LDO™ Regulators
TYPICAL PERFORMANCE CHARACTERISTICS
Unless otherwise specified TA T=25°C, VIN =VOUT(NOM), + 1V, ON/OFF pin tied to VIN
Characterization at output currents above 50mA applies to ILC7081
5µs/div
Impala Linear Corporation
ILC7080/81 1.1
www.impalalinear.com
(408) 574-3939
Sept. 1998
12
50/100mA SOT-23 CMOS RF LDO™ Regulators
TYPICAL PERFORMANCE CHARACTERISTICS
Unless otherwise specified TA T=25°C, VIN =VOUT(NOM), + 1V, ON/OFF pin tied to VIN
Characterization at output currents above 50mA applies to ILC7081
Impala Linear Corporation
ILC7080/81 1.1
www.impalalinear.com
(408) 574-3939
Sept. 1998
13
50/100mA SOT-23 CMOS RF LDO™ Regulators
TYPICAL PERFORMANCE CHARACTERISTICS
Unless otherwise specified TA T=25°C, VIN =VOUT(NOM), + 1V, ON/OFF pin tied to VIN
Characterization at output currents above 50mA applies to ILC7081
Impala Linear Corporation
ILC7080/81 1.1
www.impalalinear.com
(408) 574-3939
Sept. 1998
14
50/100mA SOT-23 CMOS RF LDO™ Regulators
SOT-23 Package Markings
ILC7080AIM5-xx
Output voltage (V) Grade
Order Information
ILC7080AIM5-285
ILC7080AIM5-30
ILC7080AIM5-33
ILC7080AIM5-36
ILC7080AIM5-50
ILC7080AIM5-ADJ
*Package Marking
CFXX
Supplied as:
2.85
3.0
A
A
A
A
A
A
3k Units on Tape and Reel
3k Units on Tape and Reel
3k Units on Tape and Reel
3k Units on Tape and Reel
3k Units on Tape and Reel
3k Units on Tape and Reel
CAXX
3.3
CBXX
3.6
CDXX
5.0
CCXX
ADJ
CEXX
*Note: First two characters identify the product and the last two characters identify the date code.
ILC7081AIM5-xx
Output voltage (V) Grade
Order Information
ILC7081AIM5-285
ILC7081AIM5-30
ILC7081AIM5-33
ILC7081AIM5-36
ILC7081AIM5-47
ILC7081AIM5-50
ILC7081AIM5-ADJ
*Package Marking
CVXX
Supplied as:
2.85
3.0
A
A
A
A
A
A
A
3k Units on Tape and Reel
3k Units on Tape and Reel
3k Units on Tape and Reel
3k Units on Tape and Reel
3k Units on Tape and Reel
3k Units on Tape and Reel
3k Units on Tape and Reel
CQXX
3.3
CRXX
3.6
CTXX
4.7
CWXX
5.0
CSXX
ADJ
CUXX
*Note: First two characters identify the product and the last two characters identify the date code.
Impala Linear Corporation
ILC7080/81 1.1
www.impalalinear.com
(408) 574-3939
Sept. 1998
15
50/100mA SOT-23 CMOS RF LDO™ Regulators
Package Outline Dimensions
Dimensions shown in inches and (mm).
5-Lead plastic surface mount (SOT-23-5)
Devices sold by Impala Linear Corporation are covered by the warranty and patent indemnification provisions appearing
Life Support Policy
in its Terms of Sale only. Impala Linear Corporation makes no warranty, express, statutory, implied, or by description
regarding the information set forth herein or regarding the freedom of the described devices from patent infringement.
Impala Linear Corporation makes no warranty of merchantability or fitness for any purpose. Impala Linear Corporation
reserves the right to discontinue production and change specifications and prices at any time and without notice.
Impala Linear Corporation’s products are not authorized for use as critical components in life support devices or systems.
1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or
(b) support or sustain life, and whose failure to perform, when properly used in accordance with instructions for use pro-
vided in the labeling, can be reasonably expected to result in a significant injury to the user.
This product is intended for use in normal commercial applications. Applications requiring an extended temperature
range, unusual environmental requirements, or high reliability applications, such as military and aerospace, are specif-
ically not recommended without additional processing by Impala Linear Corporation.
2. A critical component is any component of a life support device or system whose failure to perform can be reason-
ably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness.
Impala Linear Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in an
Impala Linear Corporation product. No other circuits, patents, licenses are implied.
Impala Linear Corporation
(408) 574-3939
ILC7080/81 1.1
www.impalalinear.com
Sept. 1998
16
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