ILC7080AIM5285X_技术文档

www.fairchildsemi.com

ILC7080/81

50/100mA SOT-23 CMOS RF LDO™ Regulators

Features

Description

• Ultra low 1mV dropout per 1mA load

• 1% output voltage accuracy

• Uses low ESR ceramic output capacitor to minimize noise

and output ripple

The ILC7080/81 are 50 or 100mA low dropout (LDO)

voltage regulators designed to provide a high performance

solution to low power systems.

• Only 100µA ground current at 100mA load

• Ripple rejection up to 85dB at 1kHz, 60dB at 1MHz

• Less than 80µV_RMSnoise at BW = 100Hz to 100kHz

• Excellent line and load transient response

• Over current / over temperature protection

• Guaranteed up to 80/150mA output current

• Industry standard ﬁve lead SOT-23 package

• Fixed 2.5V, 2.6V, 2.7V, 2.8V, 2.85V, 2.9V, 3.0, 3.1V, 3.3V,

3.6V, 4.7V, 5.0V and adjustable output (ILC7081 only)

voltage options

The devices offer a typical combination of low dropout and

low quiescent current expected of CMOS parts, while

uniquely providing the low noise and high ripple rejection

characteristics usually only associated with bipolar LDO

regulators.

The devices have been optimized to meet the needs of

modern wireless communications design; Low noise, low

dropout, small size, high peak current, high noise immunity.

• Metal mask option available for custom voltages between

2.5 to 5.1V

The ILC7080/81 are designed to make use of low cost

ceramic capacitors while outperforming other devices that

require tantalum capacitors.

Applications

• Cellular phones

• Wireless communicators

• PDAs / palmtops / organizers

• Battery powered portable electronics

Typical Applications

V_OUT

5

1

4

3

SOT-23-5

C_OUT

C_NOISE

ILC7080

ILC7081

2

V_IN

ON

OFF

REV. 1.0.7 4/3/03

ILC7080/81

Pin Assignments

C_NOISE

4

V_ADJ

4

V_OUT

5

SOT23-5

ILC7080-xx

ILC7081-xx

ILC7081-ADJ

1

2

3

1

2

3

V_IN

GND

ON

GND

ON

OFF

Adjustable Voltage Option

Fixed Voltage Option

Pin Description ILC7080/81-xx (ﬁxed voltage version)

Pin Number Pin Name

Pin Description

1

2

3

4

V_IN

Connect direct to supply

GND

Ground pin. Local ground for C_NOISEand C_OUT.

ON/OFF

C_NOISE

By applying less than 0.4V to this pin the device will be turned off.

Optional noise bypass capacitor may be connected between this pin and GND (pin

2). Do not connect C_NOISEdirectly to the main power ground plane.

5

V_OUT

Output Voltage. Connect C_OUTbetween this pin and GND (pin 2).

Pin Description ILC7081-ADJ (adjustable voltage version)

Pin Number Pin Name

Pin Description

1

2

3

4

V_IN

GND

Connect direct to supply

Ground pin. Local ground for C_NOISEand C_OUT

.

ON/OFF

V_ADJ

By applying less than 0.4V to this pin the device will be turned off.

Voltage feedback pin to set the adjustable output voltage. Do not connect a

capacitor to this pin.

5

V_OUT

Output Voltage. Connect C_OUTbetween this pin and GND (pin 2).

Absolute Maximum Ratings (Note 1)

Parameter

Symbol

Ratings

Units

Input voltage

On/Off Input voltage

V_IN

V_ON/OFF

-0.3 to +13.5

-0.3 to V_IN

V

Output Current

Output voltage

I_OUT

V_OUT

P_D

Short circuit protected

-0.3 to V_IN+0.3

mA

V

Package Power Dissipation

(SOT-23-5)

250

mW

(Internally Limited)

Maximum Junction Temp Range

Storage Temperature

T_J(max)

T_STG

T_A

-40 to +150

-40 to +125

-40 to +85

333

°C

Operating Ambient Temperature

Package Thermal Resistance

°C

q_JA

°C/W

Recommended Operating Conditions

Parameter

Min.

Typ.

Max.

13

Units

Input Voltage

V_OUT+V_DO

-40

V_OUT+1

V

Operating Ambient Temperature

+85

°C

2

REV. 1.0.7 4/3/03

ILC7080/81

Electrical Characteristics ILC7080/81AIM5

Unless otherwise specified, all limits are at T_A=25°C; V_IN= V_OUT(NOM)+1V, I_OUT= 1mA, C_OUT= 1µF, V_ON/OFF= 2V.

Boldface type denotes speciﬁcations which apply over the speciﬁed operating temperature range.

Parameter

Symbol

Conditions

Min.

Typ.

Max. Units

Input voltage Range

V_IN

2

13

V

Output voltage

I_OUT= 1mA

1mA < I_OUT< 100mA

-1

-1.5

-3.5

V_OUT(NOM)

+1

1.5

+3.5

%

V_OUT

Feedback Voltage

(ADJ version)

1.215

1.202

1.240

0.007

1.265

1.278

0.014

0.032

V

V_ADJ

∆V_OUT

Line Regulation

/

V_OUT(NOM)+1V < V_IN< 12V

%/V

(V_OUT*∆V_IN)

Dropout voltage

(Note 3)

7080/81

I_OUT= 0mA

(Note 4)

_OUT= 10mA

0.1

10

1

2

25

mV

I

35

7080 only

7081 only

I_OUT= 50mA

I_OUT= 100mA

I_OUT= 150mA

I_OUT= 0mA

110

50

125

150

75

100

150

200

225

300

V_IN- V_OUT

100

150

95

Ground Pin Current

7080/81

200

µA

220

I

_OUT= 10mA

100

115

0.1

220

240

220

240

I_OUT= 50mA

I_OUT= 100mA

I_OUT= 150mA

I_GND

7081 only

240

260

280

Shutdown (OFF)

Current

V_ON/OFF= 0V

2

µA

V

I_ON/OFF

V_ON/OFF

I_{IN( ON/OFF)}

I_OUT(peak)

e_N

ON/OFF Input

Voltage

High = Regulator On

Low = Regulator Off

2.0

0.6

ON/OFF Pin Input

Current

V_ON/OFF= 0.6V, regulator OFF

V_ON/OFF= 2V, regulator ON

0.3

1

µA

Peak Output

Current (Note 4)

V_OUT> 0.95V_OUT(NOM), tpw=2ms

400

500

mA

µV_RMS

dB

Output Noise

Voltage (RMS)

BW=300Hz to 50kHz, C_NOISE=0.01µF

80

Ripple Rejection

C_OUT= 4.7µF,

I_OUT= 100mA

Freq. = 1kHz

Freq. = 10kHz

Freq. = 1MHz

85

70

60

4

∆V_OUT/∆V_IN

∆V_OUT(line)

Dynamic Line

Regulation

V_IN: V_OUT(NOM)+1V to V_OUT(NOM)+2V,

tr/tf = 2µs; I_OUT= 100mA

mV

Dynamic Load

Regulation

I_OUT: 0 to 100mA;

d(I_OUT)/dt = 100mA/µs with

C_OUT= 0.47µF with

C_OUT= 2.2µF

50

∆V_OUT(load)

mV

mA

25

Short Circuit Current

REV. 1.0.7 4/3/03

I_SC

VOUT = 0V

600

3

ILC7080/81

Notes:

1. Absolute maximum ratings indicate limits which when exceeded may result in damage to the component. Electrical

specifications do not apply when operating the device outside of its rated operating conditions.

2. Specified Min/Max limits are production tested or guaranteed through correlation based on statistical control methods.

Measurements are taken at constant junction temperature as close to ambient as possible using low duty pulse testing.

3. Dropout voltage is defined as the input to output differential voltage at which the output voltage drops 2% below the nominal

value measured with a 1V differential.

4. Guaranteed by design.

Operations

The ILC7080/81 LDO design is based on an advanced cir-

cuit conﬁguration for which patent protection has been

applied. Typically it is very difﬁcult to drive a capacitive out-

put with an ampliﬁer. The output capacitance produces a

pole in the feedback path, which upsets the carefully tailored

dominant pole of the internal ampliﬁer. Traditionally the

pole of the output capacitor has been “eliminated” by reduc-

ing the output impedance of the regulator such that the pole

of the output capacitor is moved well beyond the gain band-

width product of the regulator. In practice, this is difﬁcult to

do and still maintain high frequency operation. Typically the

output impedance of the regulator is not simply resistive,

such that the reactive output impedance interacts with the

reactive impedance of the load resistance and capacitance.

In addition, it is necessary to place the dominant pole of the

circuit at a sufﬁciently low frequency such that the gain of

the regulator has fallen below unity before any of the com-

plex interactions between the output and the load occur. The

ILC7080/81 does not try to eliminate the output pole, but

incorporates it into the stability scheme. The load and output

capacitor forms a pole, which rolls off the gain of the regula-

tor below unity. In order to do this the output impedance of

the regulator must be high, looking like a current source.

The output stage of the regulator becomes a transconduc-

tance ampliﬁer, which converts a voltage to a current with a

substantial output impedance. The circuit which drives the

transconductance ampliﬁer is the error ampliﬁer, which

compares the regulator output to the band gap reference and

produces an error voltage as the input to the transconduc-

tance ampliﬁer. The error ampliﬁer has a dominant pole at

low frequency and a “zero” which cancels out the effects of

the pole. The zero allows the regulator to have gain out to the

frequency where the output pole continues to reduce the gain

to unity. The conﬁguration of the poles and zero are shown in

ﬁgure 1.

A block diagram of the regulator circuit used in the

ILC7080/81 is shown in ﬁgure 2, which shows the input-to-

output isolation and the cascaded sequence of ampliﬁers that

implement the pole-zero scheme outlined above.

The ILC7080/81 were designed in a CMOS process with

some minor additions, which allow the circuit to be used at

input voltages up to 13V. The resulting circuit exceeds the

frequency response of traditional bipolar circuits. The

ILC7080/81 is very tolerant of output load conditions with

the inclusion of both short circuit and thermal overload

protection. The device has a very low dropout voltage,

typically a linear response of 1mV per milliamp of load

current, and none of the quasi-saturation characteristics of a

bipolar output device. All the good features of the frequency

response and regulation are valid right to the point where the

regulator goes out of regulation in a 4mV transition region.

Because there is no base drive, the regulator is capable of

providing high current surges while remaining in regulation.

This is shown in the high peak current of 500mA which

allows for the ILC7080/81 to be used in systems that require

short burst mode operation.

DOMINANT POLE

85 dB

OUTPUT POLE

COMPENSATING

ZERO

UNITY GAIN

Instead of powering the critical circuits from the unregulated

input voltage, the CMOS RF LDO powers the internal

circuits such as the bandgap, the error ampliﬁer and most of

the transconductance ampliﬁer from the boot strapped regu-

lated output voltage of the regulator. This technique offers

extremely high ripple rejection and excellent line transient

response.

FREQUENCY

Figure 1. LC7080/81 RF LDO frequency response

4

REV. 1.0.7 4/3/03

ILC7080/81

INTERNAL V_DD

V_IN

C_NOISE

BANDGAP

REFERENCE

V_REF

ERROR

AMPLIFIER

TRANS-

CONDUCTANCE

AMPLIFIER

V_OUT

FEEDBACK

GND

ON/OFF

Figure 2. ILC7080/81 RF LDO regulator block diagram

Shutdown (ON/OFF) Operation

Adjustable Output Voltage

The ILC7080/81 output can be turned off by applying 0.4V

or less to the device’s ON/OFF pin (pin 3). In shutdown

mode, the ILC7080/81 draws less than 1µA quiescent cur-

rent. The output of the ILC7081 is enabled by applying 2V to

13V at the ON/OFF pin. In applications where the ILC7080/

81 output will always remain enabled, the ON/OFF pin may

be connected to V_IN(pin 1). The ILC7080/81’s shutdown

circuitry includes hysteresis, as such the device will operate

properly even if a slow moving signal is applied to the ON/

OFF pin.

Figure 3 shows how an adjustable output voltage can be

easily achieved using ILC7081-ADJ. The output voltage,

V_OUTis given by the following equation:

V_OUT= 1.24V x (R1/R2 + 1)

R₂

R₁

V_OUT

V_ADJ

SOT23-5

ILC7081-ADJ

2

5

1

4

3

Short Circuit Protection

C_OUT

V_IN

C_IN

The ILC7080/81 output can withstand momentary short

circuit to ground. Moreover, the regulator can deliver very

high output peak current due to its 1A instantaneous short

circuit current capability.

ON

Thermal Protection

OFF

The ILC7080/81 also includes a thermal protection circuit

which shuts down the regulator when die temperature

exceeds 150˚C due to overheating. In thermal shutdown,

once the die temperature cools to below 140˚C, the regulator

is enabled. If the die temperature is excessive due to high

package power dissipation, the regulator’s thermal circuit

will continue to pulse the regulator on and off. This is called

thermal cycling.

Figure 3. Application circuit for adjustable output voltage

For best results, a resistor value of 470kΩ or less may be

used for R2. The output voltage can be programmed from

2.5V to 12V.

Note: An external capacitor should not be connected to the

adjustable feedback pin (pin 4). Connecting an external

capacitor to pin 4 may cause regulator instability and lead to

oscillations.

Excessively high die temperature may occur due to high

differential voltage across the regulator or high load current

or high ambient temperature or a combination of all three.

Thermal protection protects the regulator from such fault

conditions and is a necessary requirement in today’s designs.

In normal operation, the die temperature should be limited to

under 150˚C.

REV. 1.0.7 4/3/03

5

ILC7080/81

output voltage by a couple of hundred milivolts then the regula-

tor may be damaged. This condition must be avoided. In many

applications a large value input capacitor, C_IN, will hold V_IN

higher thanV_OUTand decay slower thanV_OUTwhen the LDO is

powered off.

Maximum Output Current

The maximum output current available from the ILC7080/81

is limited by the maximum package power dissipation as

well as the device’s internal current limit. For a given ambi-

ent temperature, T_A, the maximum package power dissipa-

tion is given by:

Output Capacitor Selection

P_D(max)= (T_J(max)- T_A) / θ_JA

Fairchild strongly recommends the use of low ESR (equivalent

series resistance) ceramic capacitors for C_OUTand C_NOISE. The

ILC7080/81 is stable with low ESR capacitor (as low as zero

Ω). The value of the output capacitor should be 1µF or higher.

Either ceramic chip or a tantalum capacitor may be used at the

output.

where T_J(max)= 150˚C is the maximum junction temperature

and θ_JA= 333˚C/W is the package thermal resistance. For

example at T_A= 85˚C ambient temperature, the maximum

package power dissipation is;

PD(max) = 195mW.

Use of ceramic chip capacitors offer signiﬁcant advantages over

tantalum capacitors. A ceramic capacitor is typically consider-

ably cheaper than a tantalum capacitor, it usually has a smaller

footprint, lower height, and lighter weight than a tantalum

capacitor. Furthermore, unlike tantalum capacitors which are

polarized and can be damaged if connected incorrectly, ceramic

capacitors are non-polarized. Low value ceramic chip capacitors

with X7R dielectric are available in the 100pF to 4.7µF range,

while high value capacitors withY5V dielectric are available in

the 2200pF to 22µF range. Evaluate carefully before using

capacitors withY5V dielectric because their ESR increases sig-

niﬁcantly at cold temperatures. Figure 10 shows a list of recom-

mended ceramic capacitors for use at the output of ILC7080/81.

The maximum output current can be calculated from the fol-

lowing equation:

I_OUT(max)< P_D(max)/ (V_IN- V_OUT)

For example at V_IN= 6V, V_OUT= 5V and T_A= 85˚C, the

maximum output current is I_OUT(max)< 195mA. At higher

output current, the die temperature will rise and cause the

thermal protection circuit to be enabled.

Application Hints

Figure 4 shows the typical application circuit for the

ILC7080/81.

Note: If a tantalum output capacitor is used then for stable

operation we recommend a low ESR tantalum capacitor with

maximum rated ESR at or below 0.4Ω. Low ESR tantalum

capacitors, such as the TPS series from AVX Corporation

(www.avxcorp.com) or the T495 series from Kemet

(www.kemet.com) may be used.

V_OUT

SOT23-5

5

1

4

3

C_NOISE

In applications where a high output surge current can be

expected, use a high value but low ESR output capacitor for

superior load transient response. The ILC7080/81 is stable with

no load.

ILC7080

ILC7081

C_OUT

V_IN

2

Noise Bypass Capacitor

ON

In low noise applications, the self noise of the ILC7080/81 can

be decreased further by connecting a capacitor from the noise

bypass pin (pin 4) to ground (pin 2). The noise bypass pin is a

high impedance node as such, care should be taken in printed

circuit board layout to avoid noise pick-up from external

sources. Moreover, the noise bypass capacitor should have low

leakage.

OFF

Figure 4. Basic application circuit for fixed output voltage

Input Capacitor

An input capacitor C_INof value 1µF or larger should be con-

nected from V_INto the main ground plane. This will help to ﬁl-

ter supply noise from entering the LDO. The input capacitor

should be connected as close to the LDO regulator input pin as

is practical. Using a high-value input capacitor will offer supe-

rior line transient response as well as better power supply ripple

rejection. A ceramic or tantalum capacitor may be used at the

input of the LDO regulator.

Noise bypass capacitors with a value as low as 470pF may be

used. However, for optimum performance, use a 0.01µF or

larger, ceramic chip capacitor. Note that the turn on and turn off

response of the ILC7080/81 is inversely proportional to the

value of the noise bypass capacitor. For fast turn on and turn off,

use a small value noise bypass capacitor. In applications were

exceptionally low output noise is not required, consider omit-

ting the noise bypass capacitor altogether.

Note that there is a parasitic diode from the LDO regulator out-

put to the input. If the input voltage swings below the regulator’s

6

REV. 1.0.7 4/3/03

ILC7080/81

The Effects of ESR (Equivalent

Series Resistance)

Printed Circuit Board Layout

Guidelines

The ESR of a capacitor is a measure of the resistance due to the

leads and the internal connections of the component. Typically

measured in mΩ (milli-ohms) it can increase to ohms in some

cases.

As was mentioned in the previous section, to take full advan-

tage of any high performance LDO regulator requires paying

careful attention to grounding and printed circuit board

(PCB) layout.

Wherever there is a combination of resistance and current, volt-

ages will be present. The control functions of LDOs use two

voltages in order to maintain the output precisely; V_OUTand

I_OUT

V_OUT

I₂

R_PCB

ESR

R_PCB

SOT-23-5

V_REF

.

I₁

5

1

4

3

C_NOISE

C_OUT

With reference to the block diagram in ﬁgure 2, V_OUTis fed

back to the error ampliﬁer and is used as the supply voltage for

the internal components of the 7080/81. So any change in V_OUT

will cause the error ampliﬁer to try to compensate to maintain

V_OUTat the set level and noise on V_OUTwill be reﬂected into

ILC7080

ILC7081

V_IN

2

R_PCB

the supply of each internal circuit. The reference voltage, V_REF

,

R_PCB

ON

is inﬂuenced by the C_NOISEpin. Noise into this pin will add to

the reference voltage and be fed through the circuit. These fac-

tors will not cause a problem if some simple steps are taken.

Figure 5 shows where these added ESR resistances are present

in the typical LDO circuit.

OFF

Figure 6. Inherent PCB resistance

Figure 7 shows the effects of poor grounding and PCB

layout caused by the ESR and PCB resistances and the

accumulation of current ﬂows.

I_OUT

V_OUT

R*

Note particularly that during high output load current, the

LDO regulator’s ground pin and the ground return for C_OUT

and C_NOISEare not at the same potential as the system

ground. This is due to high frequency impedance caused by

PCB’s trace inductance and DC resistance. The current loop

between C_OUT, C_NOISEand the LDO regulator’s ground pin

will degrade performance of the LDO.

I_C

R_C

SOT-23-5

5

1

4

3

C_OUT

C_NOISE

ILC7080

ILC7081

V_IN

2

RF LDO^TM

Regulator

ON

R*

V_OUT

C_IN

OFF

5

4

ILC7080/81

Figure 5. ESR in C_OUTand C_NOISE

SOT23-5

C_OUT

1

2

3

With this in mind low ESR components will offer better perfor-

mance as LDOs may be exposed to large transients of output

voltage, and current ﬂows through the capacitors in order to ﬁl-

ter these transient swings. ESR is less of a problem with CIN as

the voltage ﬂuctuations at the input will be ﬁltered by the LDO.

V_IN

C_IN

ON/OFF

GND2

GND1

GND3

I_LOAD

True GND

(0V)

+I

C

OUT

However, being aware of these current ﬂows, there is also

another potential source of induced voltage noise from the resis-

tance inherent in the PCB trace. Figure 6 shows where the addi-

tive resistance of the PCB can manifest itself. Again these

resistances may be very small, but a summation of several cur-

rents can develop detectable voltage ripple and will be ampliﬁed

by the LDO. Particularly the accumulation of current ﬂows in

the ground plane can develop signiﬁcant voltages unless care is

taken.

+I

C

NOISE

GND

Figure 7. Effects of poor circuit layout

Figure 8 shows an optimum schematic. In this schematic,

high output surge current has little effect on the ground cur-

rent and noise bypass current return of the LDO regulator.

Note that the key difference here is that C_OUTand C_NOISEare

directly connected to the LDO regulator’s ground pin. The

LDO is then separately connected to the main ground plane

and returned to a single point system ground.

With a degree of care, the ILC7080/81 will yield outstanding

performance.

REV. 1.0.7 4/3/03

7

ILC7080/81

The layout of the LDO and its external components are also

based on some simple rules to minimize EMI and output

voltage ripple.

V_OUT

C_NOISE

0.01µF

C_OUT

4.7µF

5

1

4

3

L

O

A

D

ILC7080

SOT23-5

ESR<0.5Ω

2

V_IN

ON/OFF

DC/DC

Converter

V_BATT

C_IN

+

1µF

GND

Ground Plane

Ground Plane Ground Plane

Ground Plane

Figure 9. Recommended application circuit layout

(not drawn to scale).

Figure 8. Recommended application circuit schematic

Note: ground plane is bottom layer of PCB and connects to

top layer ground connections through vias.

Evaluation Board Parts List For Printed Circuit Board Shown Above

Label

U1

Part Number

ILC7081AIM5-30

69190-405

Manufacturer

Fairchild Semi.

Berg

Description

100mA RF LDO^TMregulator

J1

Connector, four position header

CIN

GRM40 Y5V 105Z16

ECU-V1H103KBV

GRM42-6X5R475K10

muRata

Ceramic capacitor, 1µF,16V, SMT (size 0805)

Ceramic capacitor, 0.01µF,16V, SMT (size 0603)

Ceramic capacitor, 4.7µF,16V, SMT (size 1206)

CNOISE

COUT

Panasonic

muRata

Grounding Recommendations

1. Connect C_INbetween V_INof the ILC7080/81 and the “GROUND PLANE”.

2. Keep the ground side of C_OUTand C_NOISEconnected to the “LOCAL GROUND” and not directly to the “GROUND

PLANE”.

3. On multilayer boards use component side copper for grounding around the ILC7080/81 and connect back to a “GROUND

PLANE” using vias.

4. If using a DC-DC converter in your design, use a star grounding system with separate traces for the power ground and the

control signals. The star should radiate from where the power supply enters the PCB.

Layout Considerations

1. Place all RF LDO related components; ILC7080/81, input capacitor C_IN, noise bypass capacitor C_NOISEand output capac-

itor C_OUTas close together as possible.

2. Keep the output capacitor C_OUTas close to the ILC7080/81 as possible with very short traces to the V_OUTand GND pins.

3. The traces for the related components; ILC7080/81, input capacitor C_IN, noise bypass capacitor C_NOISEand output capac-

itor C_OUTcan be run with minimum trace widths close to the LDO.

4. Maintain a separate “LOCAL GROUND” remote from the “GROUND PLANE” to ensure a quiet ground near the LDO.

Figure 9 shows how this circuit can be translated into a PCB layout.

8

REV. 1.0.7 4/3/03

ILC7080/81

Recommended Ceramic Output Capacitors

C_OUT

Capacitor Size

0805

I_OUT

Dielectric

X5R

Part Number

C2012X5R1A105KT

GRM40X7R105K010

LMK212BJ105KG

GRM42-6X7R105K016

EMK316BJ105KL

TMK316BJ105KL

Capacitor Vendor

1µF

0 to 100mA

TDK

“

0805

“

X7R

muRata

0805

X7R

Taiyo-Yuden

muRata

1206

X7R

1206

X7R

Taiyo-Yuden

1206

X5R

2.2µF

0805

1206

0 to 150mA

X5R

GRM40X5R225K 6.3

C2012X5R0J225KT

EMK316BJ225ML

muRata

TDK

“

Taiyo-Yuden

4.7µF

1206

0 to 150mA

“

X5R

X7R

GRM42-6X5R475K010

LMK316BJ475ML

muRata

“

Taiyo-Yuden

REV. 1.0.7 4/3/03

9

ILC7080/81

Typical Performance Characteristics

Unless otherwise speciﬁed T_A=25˚C, V_IN=V_OUT(NOM), + 1V, ON/OFF pin tied to V_IN.

Characterization at output currents above 50mA applies to ILC7081.

Dropout Characteristics

Output voltage vsTemperature

3.4

3.015

V_OUT= 3.3V

V_OUT= 3.0V

C_OUT= 0.47 µF (Ceramic)

3.01

3.005

3

I_OUT= 0mA

I_OUT= 10mA

I_OUT= 50mA

3.3

3.2

3.1

7081 only

2.995

2.99

I_OUT= 100mA

I_OUT= 150mA

3

2.985

3

3.2

3.4

3.6

-50

0

50

100

150

V_IN(V)

Temperature (°C)

Dropout voltage vsTemperature

Dropout voltage vs I_OUT

250

200

250

200

I_OUT= 150mA

V_OUT= 3.0V

T_A= 85°C

T_A= 25°C

I_OUT= 100mA

I_OUT= 50mA

150

100

50

150

100

50

T_A= –40°C

I_OUT= 0mA

0

–40

25

85

0

50

100

150

Temperature (°C)

Output Current (mA)

Line Transient Response

Ground Current vs Input voltage

6

5

150

V_IN: tr/tf < 1 µs

V_OUT= 3.0 V

C_OUT= 0.47 µF (Ceramic)

I_OUT= 50mA

I_OUT= 10mA

V_OUT= 3.0V

C_OUT= 2.2 µF (Ceramic)

125

100

75

I_OUT= 150mA

I_OUT= 100 mA

I_OUT= 0mA

4

3.01

3.00

2.99

2.98

I_OUT= 100mA

50

2

4

6

8

10

12

14

5µs/div

V_IN(V)

10

REV. 1.0.7 4/3/03

ILC7080/81

Typical Performance Characteristics

Unless otherwise speciﬁed T_A=25˚C, V_IN=V_OUT(NOM), + 1V, ON/OFF pin tied to V_IN.

Characterization at output currents above 50mA applies to ILC7081.

Line Transient Response ILC7081

Line Transient Response

V

: tr/tf = 2 µs

= 3.0V

= 100 mA

IN

OUT

V_IN: tr/tf = 2 µs

V_OUT= 3.0V

5

4

5

4

I

OUT

I_OUT= 50 mA

C

= 0.47 µF (Ceramic)

C_OUT= 0.47 µF (Ceramic)

OUT

3.01

3.00

2.99

2.98

3.01

3.00

2.99

2.98

2.97

5µs/div

Load Transient Response

Load Transient Response ILC7081

3.06

3.15

V_OUT= 3.0 V

V_OUT= 3.0V

3.04

3.10

C_OUT= 0.47 µF (Ceramic)

3.02

3.00

3.05

3.00

2.98

50

1

100

1

100µs/div

Load Transient Response ILC7081

Short Circuit Current

3.15

3.10

V_OUT= 3.0V

Thermal Cycling

V_IN= 4V

C_OUT= 1 µF || 0.47 µF (Ceramic)

Output Shorted to Gnd

at time,

t = 0

1.5

1.0

3.05

3.00

2.95

0.5

0

100

1

100µs/div

t = 0

5ms/div

REV. 1.0.7 4/3/03

11

ILC7080/81

Typical Performance Characteristics

Unless otherwise speciﬁed T_A=25˚C, V_IN=V_OUT(NOM), + 1V, ON/OFF pin tied to V_IN.

Characterization at output currents above 50mA applies to ILC7081.

On/Off Transient Response

4

3

2

1

0

V_OUT= 3.0V

I_OUT= 10mA

V_OUT= 3.0 V

I_OUT= 50mA

3

2

C_OUT= 0.47 µF (Ceramic)

1

0

1

5

0

5

0

500µs/div

200µs/div

On/Off Transient Response ILC7081

Spectral Noise Density

4

32.0

17.8

10.0

V_OUT= 3.0V

I_OUT= 100mA

V_OUT= 3.0 V

I_OUT= 50mA

3

2

CNOISE = 0.01 µF (ceramic)

5.6

3.2

1.8

1.0

0.6

1

0

C_OUT= 0.47 µF (Ceramic)

C_OUT= 1 µF (Ceramic)

C_OUT= 0.47 µF (Ceramic)

5

0

0.3

0.2

0.1

C_OUT= 2.2 µF (Ceramic)

C_OUT= 4.7 µF (Ceramic)

100

1K

10K

100K

1M

200µs/div

Freq (Hz)

Spectral Noise Density

with C_OUT= 10µF (Ceramic)

(For Ultra Low Noise)

Spectral Noise Density

6.0

32.0

17.8

10.0

V_OUT= 3.0 V

CNOISE = 1 µF (Ceramic)

5.4

4.8

4.2

3.6

3.0

2.4

1.8

1.2

0.6

0

C_OUT= 0.47µF (Ceramic)

C_NOISE= 0.01 µF (Ceramic)

5.6

3.2

1.8

1.0

0.6

V_IN= 3.5V

I_OUT= 1mA

V_IN= 4V

V_IN= 6V

I_OUT= 10 mA

0.3

0.2

0.1

I_OUT= 50mA

V

= 8V

IN

I_OUT= 100 mA

100

1K

10K

100K

1M

100

1K

10K

100K

Freq (Hz)

12

REV. 1.0.7 4/3/03

ILC7080/81

Typical Performance Characteristics

Unless otherwise speciﬁed T_A=25˚C, V_IN=V_OUT(NOM), + 1V, ON/OFF pin tied to V_IN.

Characterization at output currents above 50mA applies to ILC7081.

Ripple Rejection vs Frequency

100

90

100

90

V_OUT= 3.0V

I_OUT= 100mA

V_OUT= 3.0V

I_OUT= 10mA

80

C_OUT= 4.7 µF (Ceramic)

70

60

50

40

70

60

50

40

30

20

30

20

C_OUT= 2.2 µF (Ceramic)

10

0

10

0

1K

10K

100K

Frequency (Hz)

1M

10M

1K

10K

100K

1M

10M

Frequency (Hz)

REV. 1.0.7 4/3/03

13

ILC7080/81

Package Outline Dimensions

Dimensions shown in inches and (mm).

5-Lead plastic surface mount (SOT-23-5)

0.122 (3.10)

0.106 (2.70)

0.071 (1.80)

0.055 (1.40)

0.118 (3.00)

0.102 (2.60)

PIN 1

0.037 (0.95) BSC

0.055 (1.40)

0.0393 (1.0)

0.057 (1.45)

0.035 (0.90)

10°

0°

0.0217 (0.55)

0.0138 (0.35)

0.0078 (0.2)

0.0031 (0.08)

SEATING

PLANE

0.0059 (0.15)

0.0019 (0.05)

0.019 (0.50)

0.0138 (0.35)

14

REV. 1.0.7 4/3/03

ILC7080/81

Ordering Information (T_A= -40°C to +85°C)

ILC7080AIM5-xx

Output voltage (V) Grade

Order Information

ILC7080AIM526x

ILC7080AIM527x

ILC7080AIM528x

ILC7080AIM5285x

ILC7080AIM529x

ILC7080AIM530x

ILC7080AIM531x

ILC7080AIM533x

ILC7080AIM550x

*Package Marking

Supplied as:

2.6

2.7

2.8

2.85

2.9

3.0

3.1

3.3

5.0

A

CIx

CMx

CJ0x

CFx

CKx

CAx

CLx

CBx

CCx

3k Units on Tape and Reel

* Note: First two characters identify the product and the last character identifies the lot code

ILC7081AIM5-xx

Output voltage (V) Grade

Order Information

ILC7081AIM525x

ILC7081AIM526x

ILC7081AIM527x

ILC7081AIM528x

ILC7081AIM5285x

ILC7081AIM529x

ILC7081AIM530x

ILC7081AIM531x

ILC7081AIM533x

ILC7081AIM536x

ILC7081AIM547x

ILC7081AIM550x

ILC7081AIM5ADJx

*Package Marking

Supplied as:

2.5

2.6

2.7

2.8

2.85

2.9

3.0

3.1

3.3

3.6

4.7

5.0

ADJ

A

CXx

CPx

CNx

CJx

3k Units on Tape and Reel

CVx

COx

CQx

CYx

CRx

CTx

CWx

CSx

CUx

* Note: First two characters identify the product and the last character identifies the lot code

Summary

ILC7080AIM5xx

ILC7081AIM5xx

ILC7081AIM5ADJ

50mA, fixed voltage

100mA, fixed voltage

100mA, adjustable voltage

REV. 1.0.7 4/3/03

15

ILC7080/81

DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO

ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME

ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN;

NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES

OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR

CORPORATION. As used herein:

1. Life support devices or systems are devices or systems

which, (a) are intended for surgical implant into the body,

or (b) support or sustain life, and (c) whose failure to

perform when properly used in accordance with

instructions for use provided in the labeling, can be

reasonably expected to result in a significant injury of the

user.

2. A critical component in any component of a life support

device or system whose failure to perform can be

reasonably expected to cause the failure of the life support

device or system, or to affect its safety or effectiveness.

www.fairchildsemi.com

4/3/03 0.0m 001

Stock#DS30007080

2002 Fairchild Semiconductor Corporation


型号：	ILC7080AIM5285X
厂家：	FAIRCHILD SEMICONDUCTOR
描述：	Fixed Positive LDO Regulator, 2.85V, 0.15V Dropout, CMOS, PDSO5, PLASTIC, SOT-23, 5 PIN 光电二极管输出元件调节器
文件：	总16页 (文件大小：569K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

ILC7080AIM5285X [FAIRCHILD]

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