ZMD31010AG1-R [IDT]

Sensor/Transducer;
ZMD31010AG1-R
型号: ZMD31010AG1-R
厂家: INTEGRATED DEVICE TECHNOLOGY    INTEGRATED DEVICE TECHNOLOGY
描述:

Sensor/Transducer

文件: 总37页 (文件大小:306K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
ZMD31010  
RBicLiteTM Low-Cost Sensor Signal Conditioner  
Datasheet  
Features  
Benefits  
Digital compensation of sensor offset, sensitivity,  
No external trimming components required  
PC-controlled configuration and calibration via one-  
wire interface – simple, low cost  
temperature drift and non-linearity  
Accommodates differential sensor signal spans from  
1.2mV/V to 60mV/V  
ZACwireTM one-wire interface.  
High accuracy (±0.1% FSO @ -25 to 85°C; ±0.25%  
FSO @ -50 to 150°C)  
Internal temperature compensation and detection  
Single pass calibration – quick and precise  
Suitable for battery-powered applications  
Small SOP8 package  
via bandgap PTAT*  
Optional sequential output of both temperature and  
bridge readings on ZACwireTM digital output  
Output options: rail-to-rail analog output voltage,  
absolute analog voltage, digital one-wire interface  
Brief Description  
Supply voltage 2.7 to 5.5V, with external JFET 5.5V  
The RBicLite™ is a CMOS integrated circuit, which  
enables easy and precise calibration of resistive  
bridge sensors via EEPROM. When mated to a  
resistive bridge sensor, it will digitally correct offset  
and gain with the option to correct offset and gain  
coefficients and linearity over temperature. A second  
order compensation can be enabled for temperature  
coefficients of gain and offset or bridge linearity.  
RBicLite™ communicates via ZMD’s ZACwireTM serial  
interface to the host computer and is easily mass  
calibrated in a Windows® environment. Once cali-  
brated, the output SIG™ pin can provide selectable 0  
to 1V, rail-to-rail ratiometric analog output, or digital  
serial output of bridge data with optional temperature  
data.  
to 30V  
Current consumption, depending on adjusted  
sample rate: 0.25mA to 1mA  
Wide operational temperature: –50 to +150°C  
Fast response time 1ms (typical)  
High voltage protection up to 30V with external JFET  
Chopper-stabilized true differential ADC  
Buffered and chopper-stabilized output DAC  
* Proportional to absolute temperature  
Application Circuit  
Vsupply +4.5 V to 5.5V  
V+  
Development Kit available  
VDD  
Multi-Unit Calibrator Kit available  
Support for industrial mass calibration available  
Vgate  
ZMD31010  
Quick circuit customization possible for large  
production volumes  
OUT/OWI  
0.1µF  
VBP
SigTM  
VBN  
VSS  
GND  
Typical RBic LiteTM Application Circuit  
RBicLite™ Datasheet, Rev. 1.9, July 25, 2007  
Page 1 of 37  
© ZMD AG, 2007  
All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without the prior written  
consent of the copyright owner.  
ZMD31010  
RBicLiteTM Low-Cost Sensor Signal Conditioner  
Datasheet  
CONTENTS  
1
CIRCUIT DESCRIPTION ............................................................................................................................ 4  
1.1  
1.2  
1.2.1  
SIGNAL FLOW AND BLOCK DIAGRAM ..........................................................................................................................4  
ANALOG FRONT END ................................................................................................................................................5  
Bandgap/PTAT and PTAT Amplifier..............................................................................................................5  
Bridge Supply................................................................................................................................................5  
Pre-Amp Block ..............................................................................................................................................5  
Analog-to-Digital Converter (ADC) ................................................................................................................5  
DIGITAL SIGNAL PROCESSOR ....................................................................................................................................6  
EEPROM.......................................................................................................................................................7  
One-Wire Interface - ZACwireTM....................................................................................................................7  
OUTPUT STAGE .......................................................................................................................................................7  
Digital to Analog Converter (Output DAC).....................................................................................................7  
Output Buffer.................................................................................................................................................8  
Voltage Reference Block...............................................................................................................................8  
CLOCK GENERATOR / POWER ON RESET (CLKPOR) .................................................................................................9  
Trimming the Oscillator .................................................................................................................................9  
1.2.2  
1.2.3  
1.2.4  
1.3  
1.3.1  
1.3.2  
1.4  
1.4.1  
1.4.2  
1.4.3  
1.5  
1.5.1  
2
FUNCTIONAL DESCRIPTION.................................................................................................................. 10  
2.1  
2.2  
2.2.1  
GENERAL WORKING MODE .....................................................................................................................................10  
ZACWIRETM COMMUNICATION INTERFACE ................................................................................................................11  
Properties and Parameters .........................................................................................................................11  
Bit Encoding................................................................................................................................................11  
Write Operation from Master to RBicLiteTM ...................................................................................................12  
RBICLiteTM READ Operations.......................................................................................................................12  
High Level Protocol .....................................................................................................................................15  
COMMAND/DATA PAIR ENCODING............................................................................................................................15  
EEPROM BITS .....................................................................................................................................................19  
CALIBRATION MATH................................................................................................................................................21  
Correction Coefficients................................................................................................................................21  
Interpretation of Binary Numbers for Correction Coefficients: .....................................................................22  
READING EEPROM CONTENTS..............................................................................................................................25  
2.2.2  
2.2.3  
2.2.4  
2.2.5  
2.3  
2.4  
2.5  
2.5.1  
2.5.2  
2.6  
3
APPLICATION CIRCUIT EXAMPLES ...................................................................................................... 26  
3.1  
THREE-WIRE RAIL-TO-RAIL RATIOMETRIC OUTPUT ...................................................................................................26  
ABSOLUTE ANALOG VOLTAGE OUTPUT.....................................................................................................................27  
THREE-WIRE RATIOMETRIC OUTPUT WITH OVER-VOLTAGE PROTECTION ....................................................................28  
DIGITAL OUTPUT....................................................................................................................................................28  
OUTPUT SHORT PROTECTION .................................................................................................................................29  
3.2  
3.3  
3.4  
3.5  
RBicLite™ Datasheet, Rev. 1.9, July 25, 2007  
Page 2 of 37  
© ZMD AG, 2007  
All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without the prior  
written consent of the copyright owner.  
ZMD31010  
RBicLiteTM Low-Cost Sensor Signal Conditioner  
Datasheet  
4
5
6
ESD/LATCH-UP-PROTECTION............................................................................................................... 29  
PIN CONFIGURATION AND PACKAGE.................................................................................................. 30  
IC CHARACTERISTICS............................................................................................................................ 31  
6.1  
6.2  
6.3  
6.4  
6.5  
6.6  
ABSOLUTE MAXIMUM RATINGS ................................................................................................................................31  
RECOMMENDED OPERATING CONDITIONS.................................................................................................................31  
ELECTRICAL PARAMETERS......................................................................................................................................32  
ANALOG INPUTS.....................................................................................................................................................34  
TEMPERATURE COMPENSATION AND TEMPERATURE OUTPUT .....................................................................................35  
HIGH VOLTAGE OPERATION (NORMAL OPERATION MODE) .........................................................................................36  
7
8
9
TEST ......................................................................................................................................................... 36  
RELIABILITY............................................................................................................................................. 36  
CUSTOMIZATION..................................................................................................................................... 36  
10 RELATED DOCUMENTS.......................................................................................................................... 37  
RBicLite™ Datasheet, Rev. 1.9, July 25, 2007  
Page 3 of 37  
© ZMD AG, 2007  
All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without the prior  
written consent of the copyright owner.  
ZMD31010  
RBicLiteTM Low-Cost Sensor Signal Conditioner  
Datasheet  
1
Circuit Description  
1.1 Signal Flow and Block Diagram  
The RBicLiteTM series of resistive bridge sensor interface ICs were specifically designed as a cost-effective  
solution for sensing in building automation, industrial, office automation and white goods applications.  
The RBicLiteTM employs ZMD’s high precision bandgap with proportional-to-absolute-temperature (PTAT)  
output; low-power 14-bit analog-to-digital converter (ADC, A2D, A-to-D); and on-chip DSP core with EEPROM  
to precisely calibrate the bridge output signal.  
Three selectable outputs, two analog and one digital, offer the ultimate in versatility across many applications.  
The RBicLite™ rail-to-rail ratiometric analog output Vout signal (0 to 5V Vout @ VDD=5V) suits most building  
automation and automotive requirements.  
Typical office automation and white goods applications require the 0~1Vout signal, which in the RBicLite™ is  
referenced to the internal bandgap.  
Direct interfacing to μP controllers is facilitated via ZMD’s single-wire serial ZACwireTM digital interface.  
RBicLite™ is capable of running in high-voltage (5.5-30V) systems when combined with an external JFET.  
JFET  
Zener Diode  
R 100Ω  
(Optional; required with JFET)  
(Optional if supply is 2.7 to 5.5V)  
(Optional; required with JFET)  
S
D
VDD  
(2.7-5.5V)  
0.1µF  
ZD  
VSUPPLY = 5.5V to 30V  
Vgate  
5.6V  
Temperature  
Reference  
11-Bit DAC  
VDD  
Regulator  
RBicLite  
VBP  
A
SIG™  
VBN  
D
0V to1V  
INMUX  
PREAMP  
OUTBUF1  
14-Bit ADC  
Ratiometric  
Rail-to-Rail  
OWI/ZACwire  
Optional  
Bsink  
Power Save  
EEPROM  
W/ Charge Pump  
ZACwire™  
Interface  
Digital  
Core  
POR/Oscillator  
VSS  
Figure 1.1 – RBicLiteTM Block Diagram  
RBicLite™ Datasheet, Rev. 1.9, July 25, 2007  
Page 4 of 37  
© ZMD AG, 2007  
All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without the prior  
written consent of the copyright owner.  
ZMD31010  
RBicLiteTM Low-Cost Sensor Signal Conditioner  
Datasheet  
1.2 Analog Front End  
1.2.1 Bandgap/PTAT and PTAT Amplifier  
The Bandgap/PTAT provides the PTAT signal to the ADC, which allows accurate temperature conversion. In  
addition, the ultra-low ppm Bandgap provides a stable voltage reference over temperature for the operation of  
the rest of the IC.  
The PTAT signal is amplified through a path in the pre-amp and fed to the ADC for conversion. The most  
significant 12-bits of this converted result are used for temperature measurement and temperature correction  
of bridge readings. When temperature is output in digital mode only the most significant 8-bits are given.  
1.2.2 Bridge Supply  
The voltage driven bridge is usually connected to VDD and ground. As a power savings feature, the RBicLite  
also includes a switched transistor to interrupt the bridge current via pin 1 (Bsink). The transistor switching is  
synchronized to the A-to-D conversion and released after finishing the conversion. To utilize this feature, the  
low supply of the bridge should be connected to Bsink instead of ground.  
Depending on the programmable update rate, the average current consumption (including bridge current) can  
be reduced to approximately 20%, 5% or 1%.  
1.2.3 Pre-Amp Block  
The differential signal from the bridge is amplified through a chopper-stabilized instrumentation amplifier with  
very high input impedance designed for low noise and low drift. This pre-amp provides gain for the differential  
signal and re-centers its DC to VDD/2. The output of the Pre-Amp block is fed into the analog-to-digital  
converter. The calibration sequence performed by the digital core includes an auto zero sequence to null any  
drift in the Pre-Amp state over temperature.  
The Pre-Amp is nominally set to a gain of 24. Other possible gain settings are 6, 12, and 48.  
The inputs to the Pre-Amp from (VBN/VBP pins) can be reversed via an EEPROM configuration bit.  
1.2.4 Analog-to-Digital Converter (ADC)  
A 14-bit/1ms 2nd order charge-balancing ADC is used to convert signals coming from the pre-amplifier. The  
converter, designed in full differential switched capacitor technique, is used for converting the various signals  
in the digital domain. This principle offers the following advantages:  
High noise immunity because of the differential signal path and integrating behavior  
Independent from clock frequency drift and clock jitter  
Fast conversion time owing to second order mode  
Four selectable values for the zero point of the input voltage allow conversion to adapt to the sensor’s offset  
parameter.  
The conversion rate varies with the programmed update rate. The fastest conversation rate is 1k samples/s  
and the response time is then 1ms. Based on a best fit, the Integral Nonlinearity (INL) is less then 4 LSB14Bit.  
RBicLite™ Datasheet, Rev. 1.9, July 25, 2007  
Page 5 of 37  
© ZMD AG, 2007  
All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without the prior  
written consent of the copyright owner.  
ZMD31010  
RBicLiteTM Low-Cost Sensor Signal Conditioner  
Datasheet  
1.3 Digital Signal Processor  
A digital signal processor (DSP) is used for processing the converted bridge data as well as performing  
temperature correction and computing the temperature value for output on the digital channel.  
The digital core reads correction coefficients from EEPROM and can correct for  
1. Bridge Offset  
2. Bridge Gain  
3. Variation of Bridge Offset over Temperature (Tco)  
4. Variation of Bridge Gain over Temperature (Tcg)  
5. A Single Second Order Effect (SOT) (Second Order Term)  
The EEPROM contains a single SOT that can be applied to correct one and only one of the following:  
2nd Order behavior of bridge measurement  
2
2
nd Order behavior of Tco  
nd Order behavior of Tcg  
(For more details, see section 2.5.1.)  
If the SOT applies to correcting the bridge reading then the correction formula for the bridge reading is  
represented as a two step process as follows:  
ZB = GainB[1 + ΔT*Tcg]*[BR_Raw + OffsetB + ΔT*Tco]  
BR = ZB*(1.25+SOT*ZB)  
Where: BR  
=
=
=
=
=
=
=
=
=
=
=
=
Corrected Bridge reading that is output as digital or analog on SIGTM pin  
Intermediate result in the calculations  
Raw Bridge reading from ADC  
ZB  
BR_Raw  
T_Raw  
Gain_B  
Offset_B  
Tcg  
Raw Temp reading converted from PTAT signal  
Bridge gain term  
Bridge offset term  
Temperature coefficient gain  
Tco  
Temperature coefficient offset  
ΔT  
T_Raw  
TSETL  
(T_Raw - TSETL)  
Raw Temp reading converted from PTAT signal  
T_Raw reading at which low calibration was performed (typically 25C)  
Second Order Term  
SOT  
Note: See section 2.5.2.7 for limitations.  
If the SOT applies to correcting 2nd Order behavior of Tco then the formula for bridge correction is as follows:  
BR  
= Gain_B[1 + ΔT*Tcg]*[BR_Raw + Offset_B + ΔT(SOT*ΔT + Tco)]  
Note: See section 2.5.2.7 for limitations.  
RBicLite™ Datasheet, Rev. 1.9, July 25, 2007  
Page 6 of 37  
© ZMD AG, 2007  
All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without the prior  
written consent of the copyright owner.  
ZMD31010  
RBicLiteTM Low-Cost Sensor Signal Conditioner  
Datasheet  
If the SOT applies to correcting 2nd Order behavior of Tcg then the formula for bridge correction is as follows:  
BR  
= Gain_B[1 + ΔT(SOT*ΔT + Tcg)]*[BR_Raw + Offset_B_ + ΔT*Tco)]  
The bandgap reference gives a very linear PTAT signal, so temperature correction can always simply be  
accomplished with a linear gain and offset term.  
Corrected Temp Reading:  
T
= Gain_T*[T_Raw + Offset_T]  
Where  
T_Raw  
=
=
=
Raw Temp reading converted from PTAT signal  
Offset_T  
Gain_T  
TempSensor offset coefficient  
TempSensor gain coefficient  
1.3.1 EEPROM  
The EEPROM contains the calibration coefficients for gain and offset, etc., and the configuration bits, such as  
output mode, update rate, etc. When programming the EEPROM, an internal charge pump voltage is used so  
a high voltage supply is not needed. The EEPROM is implemented as a shift register. During an EEPROM  
read, the contents are shifted 8 bits before each transmission of one byte occurs. Because the oscillator trim  
and the JFET configuration are part of the shift register, the contents affect the transmission speed and  
regulator setting during the EEPROM reading/writing (for more details see section 2.6).  
The charge pump is internally regulated to 12.5V and the programming time is typically 6ms.  
Note: EEPROM writing can only be performed at temperatures lower then 85ºC.  
1.3.2 One-Wire Interface - ZACwireTM  
The IC communicates via a one-wire serial interface. There are different commands available for the  
following:  
Reading the conversion result of the ADC (Get_BR_Raw, Get_T_Raw)  
Calibration Commands  
Reading from the EEPROM (dump of entire contents)  
Writing to the EEPROM (trim setting, configuration, and coefficients)  
1.4 Output Stage  
1.4.1 Digital to Analog Converter (Output DAC)  
An 11-bit DAC based on sub-ranging resistor strings is used for the digital-to-analog output conversion in the  
analog ratiometric and absolute analog voltage modes. Selection during calibration configures the system to  
operate in either of these modes. The design allows for excellent testability as well as low power  
consumption.  
RBicLite™ Datasheet, Rev. 1.9, July 25, 2007  
Page 7 of 37  
© ZMD AG, 2007  
All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without the prior  
written consent of the copyright owner.  
ZMD31010  
RBicLiteTM Low-Cost Sensor Signal Conditioner  
Datasheet  
Important: For all analog output configurations, the highest update rate setting, 00 (1 kHz), is required to  
ensure the specified accuracy.  
Figure 1.2 shows the data timing of the DAC output with the 1kHz update rate setting.  
Settling Time  
64µs  
ADC Conversion  
768µs  
Calculation  
160µs  
Settling Time  
64µs  
ADC Conversion  
768µs  
Calculation  
160µs  
DAC output  
occurs here  
DAC output  
next update  
Figure 1.2 – DAC Output Timing for Highest Update Rate  
1.4.2 Output Buffer  
A rail-to-rail op amp configured as a unity gain buffer can drive resistive loads (whether pull-up or pull-down)  
as low as 2.5kΩ and capacitances up to 15nF. In addition, to limit the error due to amplifier offset voltage, an  
error compensation circuit is included which tracks and reduces offset voltage to < 1mV.  
1.4.3 Voltage Reference Block  
This block uses the absolute reference voltage provided by the bandgap to produce two regulated on-chip  
voltage references. A 1V reference is used for the output DAC high reference when the part is configured in  
0-1V analog output mode. For this reason, the 1V reference must be very accurate and includes trim so that  
its value can be trimmed within +/-3mV of 1.00V. The 1V reference is also used as the on-chip reference for  
the JFET regulator block so the regulation set point of the JFET regulator can be fine tuned using the 1V trim.  
The 5V reference can be trimmed within +/-15mV. The following table shows the order of trim code with 0111  
for the lowest reference voltage and 1000 for the highest reference voltage.  
1V Reference Trim (1V vs. Trim for Nominal Process Run):  
1Vref/  
1Vref  
1Vreft  
1Vref  
5Vref__trim3  
5Vref_trim2  
5Vref_trim1  
5Vref_trim0  
1
1
1
1
1
1
1
1
0
0
0
0
0
1
1
1
1
0
0
0
1
1
0
0
1
1
0
0
1
0
1
0
1
0
1
0
RBicLite™ Datasheet, Rev. 1.9, July 25, 2007  
Page 8 of 37  
© ZMD AG, 2007  
All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without the prior  
written consent of the copyright owner.  
ZMD31010  
RBicLiteTM Low-Cost Sensor Signal Conditioner  
Datasheet  
1Vref/  
1Vref  
1Vreft  
1Vref  
5Vref__trim3  
5Vref_trim2  
5Vref_trim1  
5Vref_trim0  
0
0
0
0
0
0
0
0
0
0
1
1
1
1
0
1
1
0
0
1
1
1
0
1
0
1
0
1
1.5 Clock Generator / Power On Reset (CLKPOR)  
If the power supply exceeds 2.5V (maximum), the reset signal de-asserts and the clock generator starts  
operating at a frequency of approximately 512kHz (+17% / -22%). The exact value only influences the  
conversion cycle time and communication to the outside world but not the accuracy of signal processing. In  
addition, to minimize the oscillator error as the VDD voltage changes, an on-chip regulator is used to supply  
the oscillator block.  
1.5.1 Trimming the Oscillator  
Trimming is performed at wafer level, and it is strongly recommended that this not be changed during  
calibration because ZACwireTM communication is no longer guaranteed at different oscillator frequencies.  
Trimming Bits Delta Frequency (KHz)  
100  
101  
+385  
+235  
110  
+140  
111  
000  
001  
010  
011  
+65  
Nominal  
-40  
-76  
-110  
Sample: Programming “011” the trimmed frequency = nominal value – 110KHz  
RBicLite™ Datasheet, Rev. 1.9, July 25, 2007  
Page 9 of 37  
© ZMD AG, 2007  
All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without the prior  
written consent of the copyright owner.  
ZMD31010  
RBicLiteTM Low-Cost Sensor Signal Conditioner  
Datasheet  
2
Functional Description  
2.1 General Working Mode  
The command/data transfer takes place via the one-wire SIGpin using the ZACwireTM serial communication  
protocol.  
After Power ON the IC waits for 6ms(=Command window) for the Start_CM command.  
Without this command, the Normal Operation Mode (NOM) starts. In this mode, raw bridge values are  
converted, and the corrected values are presented on the output in analog or digital format (depending on the  
configuration stored in EEPROM).  
Command Mode (CM) can only be entered during the 6ms command window after Power ON. If the IC  
receives the Start_CM command during the command window, it remains in the Command Mode. The CM  
allows changing to one of the other modes via command. After command Start_RW, the IC is in the Raw  
Mode. Without correction, the raw values are transmitted to the digital output in a predefined order. The RM  
can only be stopped by Power OFF. Raw Mode is used by the calibration software for collection of raw bridge  
and temperature data so the correction coefficients can be calculated.  
Power  
ON  
Command  
Window (6ms)  
Send Start CM  
Start_CM  
No Command  
Start_NOM  
Start_RM  
Raw Mode  
Normal Operation Mode  
Command Mode  
No commands possible  
Measurement cycle  
Conditioning calculation  
(Corrected bridge and  
temperature values)  
Measurement cycle  
stopped  
Full command set  
Command routine will be  
processed after each  
command  
Measurement cycle  
SigTM pin provides raw  
bridge and temperature  
values in the format  
Bridge_high (1st Byte)  
Bridge_low  
Temp  
(2nd Byte)  
(3rd Byte)  
Depending on the con-  
figuration, the SigTM pin is  
0V-1V  
Rail-to-rail ratiometric  
Digital output  
Power OFF  
Figure 2.1 – General Working Mode  
RBicLite™ Datasheet, Rev. 1.9, July 25, 2007  
Page 10 of 37  
© ZMD AG, 2007  
All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without the prior  
written consent of the copyright owner.  
ZMD31010  
RBicLiteTM Low-Cost Sensor Signal Conditioner  
Datasheet  
2.2 ZACwireTM Communication Interface  
2.2.1 Properties and Parameters  
Parameter  
Symbol Min Typ Max Unit Comments  
1
2
Pull-up resistor  
(on-chip)  
RZAC,pu  
30  
On-chip pull-up resistor switched on  
during Digital Output Mode and  
during CM Mode (first 6ms power up)  
kΩ  
ZACwireTM rise time  
TZAC,rise  
5
Any user RC network included in  
SIGTM path must meet this rise time  
μs  
3
4
5
6
ZACwireline resistance  
ZACwireTM load capacitance  
Voltage level - low  
RZAC,line  
CZAC,load  
VZAC,low  
VZAC,high  
3.91  
151  
0.2  
Also see section 6.3  
kΩ  
0
1
0
1
nF Also see section 6.3  
VDD Rail-to-rail CMOS driver  
VDD Rail-to-rail CMOS driver  
Voltage level - high  
0.8  
1 The rise time must be TZAC,rise = 2 RZAC,line * CZACload 5μs . If using a pull up resistor instead of a line resistor, it must meet this  
specification.  
Bit Window  
2.2.2 Bit Encoding  
125µsec @ 8kHz baud  
31.3µsec @ 32kHz baud  
Start Bit  
Start bit => 50% duty cycle used to set up strobe time  
Logic 1 => 75% duty cycle  
Logic 0 => 25% duty cycle  
Stop Bit  
Logic 1  
Logic 0  
Stop ½ Bit  
(High)  
For the time of a half a bit width, the signal level is high.  
There is a half stop bit time between bytes in a packet.  
Figure 2.2 – Duty Cycle Manchester  
RBicLite™ Datasheet, Rev. 1.9, July 25, 2007  
Page 11 of 37  
© ZMD AG, 2007  
All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without the prior  
written consent of the copyright owner.  
ZMD31010  
RBicLiteTM Low-Cost Sensor Signal Conditioner  
Datasheet  
TM  
2.2.3 Write Operation from Master to RBicLite  
The calibration master sends a 19-bit packet frame to the IC.  
S
Start Bit  
19-Bit Frame (WRITE)  
P
Parity Bit Command Byte  
or Parity Bit Data Byte  
S 7 6 5 4 3 2 1 0 P 7 6 5 4 3 2 1 0 P  
2
Command Bit (Example: Bit 2)  
Data Bit (Example: Bit 2)  
2
Data Byte  
Command Byte  
Figure 2.3 – 19-Bit Write Frame  
The incoming serial signal will be sampled at a 512kHz clock rate. This protocol is very tolerant to clock skew  
and can easily tolerate baud rates in the 6kHz to 48kHz range.  
2.2.4 RBICLiteTM READ Operations  
The incoming frame will be checked for proper parity on both command and data bytes, as well as for any  
edge timeouts prior to a full frame being received.  
Once a command/data pair is received, the RBicLiteTM will perform that command. Once the command has  
been successfully executed by the IC, it will acknowledge success by a transmission of an A5H byte back to  
the master. If the master does not receive an A5H transmission within 130msec of issuing the command, it  
must assume the command was either improperly received or could not be executed.  
S
P
0
Start Bit  
1 DATA Byte Packet  
10-Bit Byte A5H  
Parity Bit Data Byte  
Data Bit (Low)  
Data Bit (High)  
S 1 0 1 0 0 1 0 1 P  
1
Data Byte  
Figure 2.4 – Read Acknowledge  
The RBicLiteTM transmits 10-bit bytes (1 start bit, 8 data, 1 parity). During calibration and configuration,  
transmissions are normally either A5H or data. A5H indicates successful completion of a command. There are  
two different digital output modes configurable (digital output with temperature and digital output with only  
bridge data). During Normal Operation Mode, if the part is configured for digital output of the bridge reading, it  
first transmits the high byte of bridge data followed by the low byte. The bridge data is 14-bits in resolution, so  
the upper two bits of the high byte are always zero padded. There is a half stop bit time between bytes in a  
packet. That means for the time of a half a bit width, the signal level is high.  
RBicLite™ Datasheet, Rev. 1.9, July 25, 2007  
Page 12 of 37  
© ZMD AG, 2007  
All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without the prior  
written consent of the copyright owner.  
ZMD31010  
RBicLiteTM Low-Cost Sensor Signal Conditioner  
Datasheet  
2 DATA Byte Packet  
Digital Bridge Output  
S
P
2
Start Bit  
Parity Bit Data Byte  
Data Bit (Example: Bit 2)  
½ Stop Bit  
½
Stop  
S 0 0 5 4 3 2 1 0 P  
Data Byte Bridge High  
S 7 6 5 4 3 2 1 0 P  
Data Byte Bridge Low  
½
Stop  
Figure 2.5 – Digital Output (NOM) Bridge Readings  
The second different digital output mode is digital output bridge reading with temperature. It will be transmitted  
as a 3-data-byte packet. The temperature byte represents an 8-bit temperature quantity spanning from –50°C  
to 150°C.  
3 DATA Byte Packet  
Digital Bridge Output with Temperature  
½
Stop  
½
Stop  
S 0 0 5 4 3 2 1 0 P  
S 7 6 5 4 3 2 1 0 P  
S 7 6 5 4 3 2 1 0 P  
Data Byte Bridge High  
Data Byte Bridge Low  
Data Byte Temperature  
Figure 2.6 – Digital Output (NOM) Bridge Readings with Temperature  
The EEPROM transmission occurs in a packet with 14 data bytes as shown in Figure 2.7.  
Figure 2.7 – Read EEPROM Contents  
RBicLite™ Datasheet, Rev. 1.9, July 25, 2007  
Page 13 of 37  
© ZMD AG, 2007  
All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without the prior  
written consent of the copyright owner.  
ZMD31010  
RBicLiteTM Low-Cost Sensor Signal Conditioner  
Datasheet  
There is a variable idle time between packets. This idle time varies with the update rate setting in EEPROM.  
Packet Transmission  
(This example shows 2 data packets.)  
IDLE  
TIME  
½
Stop  
IDLE  
TIME  
½
Stop  
IDLE  
S 0 0 5 4 3  
7
TIME  
6 5 4 3 2 1 0 P  
S 0 0 5 4 3 2 1 0 P  
S 7 6 5 4 3 2 1 0 P  
S 0 0 5 4 3 2 1 0 P  
S 7 6 5 4 3 2 1 0 P  
7
7
Figure 2.8 – Transmission of a Number of Data Packets  
The table below shows the idle time between packets versus update rate. This idle time can vary by nominal  
+/-15% between parts and over a temperature range of –50°C to 150ºC  
Update Rate Setting  
Idle Time between Packets  
00  
01  
10  
11  
1ms  
4.85ms  
22.5ms  
118ms  
Transmissions from the IC occur at one of two speeds depending on the update rate programmed in  
EEPROM. If the user chooses one of the two fastest update rates (1ms or 5ms) then the baud rate of digital  
transmission will be 32kHz. If however, the user chooses one of the two slower update rates (25ms or  
125ms), then the baud rate of digital transmission will be 8kHz.  
The total transmission time for both digital output configurations is shown in Table 2.1.  
Table 2.1 – Total Transmission Time for Different Update Rate Settings and Output Configuration  
Baud  
Rate  
Transmission Time –  
Bridge Only Readings  
Transmission Time –  
Bridge & Temperature Readings  
Update Rate  
Idle Time  
1ms (1kHz)  
5ms (200Hz)  
25ms (40Hz)  
125ms (8Hz)  
32kHz  
32kHz  
8kHz  
1.00ms  
4.85ms  
20.5 bits  
31.30µs  
31.30µs  
1.64ms  
31.0 bits  
31.0 bits  
31.0 bits  
31.0 bits  
31.30µs  
31.30µs  
1.97ms  
5.82ms  
20.5 bits  
20.5 bits  
20.5 bits  
5.49ms  
25.06ms  
120.56ms  
22.50ms  
118.00ms  
125.00µs  
125.00µs  
125.00µs  
125.00µs  
26.38ms  
121.88ms  
8kHz  
It is easy to program any standard μcontroller to communicate with the RBicLiteTM. ZMDA can provide sample  
code for a MicroChip PIC μController.  
RBicLite™ Datasheet, Rev. 1.9, July 25, 2007  
Page 14 of 37  
© ZMD AG, 2007  
All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without the prior  
written consent of the copyright owner.  
ZMD31010  
RBicLiteTM Low-Cost Sensor Signal Conditioner  
Datasheet  
For update rates less than 1kHz, which can only be used in the digital output modes without loss of accuracy,  
the output is followed by a power-down as shown in Figure 2.9.  
Calculation  
160µs  
ZACwire™  
Output  
Power Down  
Determined by  
Update Rate  
Power-On  
Settling  
128µs  
Settling Time  
64µs  
ADC  
Conversion  
768µs  
Calculation  
160µs  
ZACwire™  
Output  
Figure 2.9 – ZACwire™ Output Timing for Lower Update Rates  
2.2.5 High Level Protocol  
The RBicLiteTM will listen for a command/data pair to be transmitted for the 6ms after the de-assert of its  
internal Power On Reset (POR). If a transmission is not received within this time frame, then it will transition  
to Normal Operation Mode (NOM). In NOM, it will output bridge data in 0-1V analog, rail-to-rail ratiometric  
analog output, or digital depending on how the part is currently configured.  
If the RBicLiteTM receives a Start CM command within the first 6ms after the de-assert of POR, then it will go  
TM  
into Command Mode (CM). In this mode, calibration/configuration commands will be executed. The RBicLite  
will acknowledge successful execution of commands by transmission of an A5H. The calibrating/configuring  
master will know a command was not successfully executed if no response is received after 130ms of issuing  
the command. Once in command interpreting/executing mode, the RBicLiteTM will stay in this mode until power  
is removed, or a Start NOM (Start Normal Operation Mode) command is received. The START CM command  
is used as an interlock mechanism to prevent a spurious entry into command mode on power up. The first  
command received within the 6ms window of POR must be a START CM command to enter into command  
interpreting mode. Any other commands will be ignored.  
2.3 Command/Data Pair Encoding  
The 16-bit command/data stream sent to the RBicLiteTM can be broken into four 4-bit nibbles. The most  
significant two nibbles encode the command. The last two nibbles encode the data byte. (H=Hex)  
RBicLite™ Datasheet, Rev. 1.9, July 25, 2007  
Page 15 of 37  
© ZMD AG, 2007  
All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without the prior  
written consent of the copyright owner.  
ZMD31010  
RBicLiteTM Low-Cost Sensor Signal Conditioner  
Datasheet  
Command  
Byte  
Data  
Description  
00H  
20H  
XXH  
5XH  
Read EEPROM Command via SIGTM pin1.  
Enter Test Mode (Subset of Command Mode for test purposes only): SIGTM pin  
will assume the value of different internal test points, depending on the most  
significant nibble of data sent.  
DAC Ramp Test Mode. Gain_B[13:3] contains the starting point, and the increment  
is (Offset_B/8). The increment will be added every 125µsec.  
30H  
WDH  
Trim/Configure: 3rd nibble determines what is trimmed/configured.  
4th nibble is data to be programmed.  
3rd Nibble 4th Nibble  
Data  
Description  
X => Don’t  
care  
W =>  
What  
0H  
1H  
2H  
3H  
4H  
5H  
6H  
XH  
XH  
XH  
XH  
XH  
XH  
XH  
Trim oscillator least significant 3 bits of data used.  
Trim 1V reference. Least significant 4 bits of data used.  
Offset Mode. Least significant 2 bits of data used.  
Set output mode. Least significant 2 bits used.  
Set update rate. Least significant 2 bits used.  
Configure JFET regulation2  
H => Hex  
D =>  
Data  
H =>  
Hex  
Program the Tc_cfg register. Least significant 3-bits used.  
Most significant bit of data nibble should be 0.  
7H  
XH  
Program bits [99:96] of EEPROM. {SOT_cfg,Pamp_Gain}  
40H  
40H  
00H  
10H  
Start NOM => Ends Command Mode, transition to Normal Operation Mode  
Start Raw Mode (RM)  
In this mode if Gain_B = 800H and Gain_T = 80H, then the digital output will simply  
be the raw values of the A2D for the Bridge reading, and the PTAT conversion.  
50H  
60H  
70H  
80H  
90H  
A0H  
B0H  
C0H  
D0H  
00H  
START CM => Start the Command Mode, used to enter command interpret mode  
Program SOT (2nd Order Term)  
YYH  
YYH  
YYH  
YYH  
YYH  
YYH  
YYH  
YYH  
Program TSETL  
Program Gain_B upper 7 bits (Set MSB of YY to 0.)  
Program Gain_B lower 8 bits  
Program Offset_B upper 6 bits (Set two MSBs of YY to 0.)  
Program Offset_B lower 8-bits  
Program Gain_T  
Program Offset_T  
1 For more details, refer to section 2.6.  
2 Note that an additional Zener diode is required for JFET regulation (for more details, see section 3.2, 3.3).  
RBicLite™ Datasheet, Rev. 1.9, July 25, 2007  
Page 16 of 37  
© ZMD AG, 2007  
All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without the prior  
written consent of the copyright owner.  
ZMD31010  
RBicLiteTM Low-Cost Sensor Signal Conditioner  
Datasheet  
Command  
Byte  
Data  
Description  
E0H  
F0H  
YYH  
YYH  
Program Tco  
Program Tcg  
*SDO: Scan Data Out  
Calibration Sequence  
Although the RBicLiteTM can function with many different types of resistive bridges, assume it is connected to a  
pressure bridge for the following calibration example.  
In this case, calibration essentially involves collecting raw bridge and temperature data from the RBicLiteTM for  
different known pressures and temperatures. This raw data can then be processed by the calibration master  
TM  
(the PC), and the calculated coefficients can then be written to the EEPROM of the RBicLite  
.
ZMDA can provide software and hardware with samples to perform the calibration.  
There are three main steps to calibration:  
1. Assigning a unique identification to the IC. This identification is programmed in EEPROM and can be  
used as an index into the database stored on the calibration PC. This database will contain all the raw  
values of bridge readings and temp reading for that part, as well as the known pressure and  
temperature the bridge was exposed to. This unique identification can be stored in a combination of  
the following EEPROM registers TSETL, Tcg, Tco. These registers will be overwritten at the end of the  
calibration process, so this unique identification is not a permanent serial number.  
2. Data collection. Data collection involves getting raw data from the bridge at different known pressures  
and temperatures. This data is then stored on the calibration PC using the unique identification of the  
IC as the index to the database.  
3. Coefficient calculation and write. Once enough data points have been collected to calculate all the  
desired coefficients then the coefficients can be calculated by the calibrating PC and written to the IC.  
Step 1 Assigning Unique Identification  
Assigning a unique identification number is as simple as using the commands Program TSETL, Program Tcg,  
and Program Tco. These 3 8-bit registers will allow for 16Meg unique devices. In addition Gain_B needs to be  
programmed to 800H (unity) and Gain_T needs to be programmed to 80H (unity).  
Step 2 Data Collection  
The number of different unique (pressure, temperature) points that calibration needs to be performed at  
depends on the customer’s needs. The minimum is a 2-point calibration, and the maximum is a 5-point  
calibration. To acquire raw data from the part one has to get RBicLiteTM to enter Raw Mode. This is done by  
issuing a Start CM (Start Command Mode 5000H) command to the IC followed by a Start RM (Start Raw  
Mode 4010H) command with the LSB of the upper data nibble set. Now if the Gain_B term was set to unity  
(800H) and the Gain_T term was also set to unity (80H) then the part will be in the Raw Mode and will be  
outputting raw data on its SIGTM pin instead of corrected bridge and temperature. The calibration system  
should now grab several of these data points (16 each of bridge and temperature is recommended) and  
average them. These raw bridge and temperature setting should be stored in the database along with the  
RBicLite™ Datasheet, Rev. 1.9, July 25, 2007  
Page 17 of 37  
© ZMD AG, 2007  
All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without the prior  
written consent of the copyright owner.  
ZMD31010  
RBicLiteTM Low-Cost Sensor Signal Conditioner  
Datasheet  
known pressure and temperature. The output format during Raw Mode is Bridge_High, Bridge_Low, Temp,  
each of these being 8-bit quantities. The upper 2-bits of Bridge_High are zero filled. The Temp data (8-bits  
only) would not really be enough info for accurate temperature calibration. Therefore the upper three bits of  
temp information are not given, but rather assumed known. Therefore effectively 11 bits of temperature  
information is provided in this mode.  
Step 3 Coefficient Calculations  
The math to perform the coefficient calculation is very complicated and will not be discussed in detail. There is  
a rough overview in the “Calibration Math” section. Rather ZMDA will provide software to perform the  
coefficient calculation. ZMDA can also provide source code of the algorithms in a C code format. Once the  
TM  
coefficients are calculated the final step is to write them to the EEPROM of the RBicLite  
.
The number of calibration points required can be as few as two or as many as five. This depends on the  
precision desired, and the behavior of the resistive bridge in use.  
1. 2-point calibration would be used to obtain only a gain and offset term for bridge compensation with  
no temperature compensation for either term.  
2. 3-point calibration would be used to also obtain the Tco term for 1st order temperature compensation  
of the bridge offset term.  
3. 3-point calibration could also be used to obtain the additional term SOT for 2nd order correction for the  
bridge (SOT_BR), but no temperature compensation of the bridge output.  
4. 4-point calibration would be used to also obtain both the Tco term and the Tcg term, which provides  
1st order temperature compensation of the bridge offset gain term.  
5. 4-point calibration could also be used to obtain the Tco term and the SOT_BR term.  
6. 5-point calibration would be used to obtain Tco, Tcg and an SOT term that provides 2nd order  
correction applied to one and only one of the following: 2nd order Tco (SOT_Tco), 2nd order Tcg  
(SOT_Tcg), or 2nd order bridge (SOT_BR).  
RBicLite™ Datasheet, Rev. 1.9, July 25, 2007  
Page 18 of 37  
© ZMD AG, 2007  
All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without the prior  
written consent of the copyright owner.  
ZMD31010  
RBicLiteTM Low-Cost Sensor Signal Conditioner  
Datasheet  
2.4 EEPROM Bits  
Programmed through the serial interface:  
EEPROM  
Description  
Range  
Note  
2:0  
Osc_Trim  
See the table in section 1.5.1 for complete data.  
100 => Fastest  
101 => 3 clicks faster than nominal  
110 => 2 clicks faster than nominal  
111 => 1 click faster than nominal  
000 => Nominal  
001 => 1 click slower than nominal  
010 => 2 clicks slower than nominal  
011 => Slowest  
6:3  
8:7  
1V_Trim/JFET_Trim See table in the “Voltage Reference Block” section.  
A2D_Offset  
Offset selection:  
11 => [-1/2,1/2] mode bridge inputs  
10 => [-1/4,3/4] mode bridge inputs  
01 => [-1/8,7/8] mode bridge inputs  
00 => [-1/16,15/16] mode bridge inputs  
To change the bridge signal polarity, set Tc_cfg[3](=Bit 87).  
10:9  
Output_Select  
00 => Digital (3-bytes with parity)  
Bridge High {00,[5:0]}  
Bridge Low [7:0]  
Temp [7:0]  
01 => 0-1V Analog 1  
10 => Rail-to-rail ratiometric analog output1  
11 => Digital (2-bytes with parity) (No Temp)  
Bridge High {00,[5:0]}  
Bridge Low [7:0]  
1 Important: The 1kHz update rate setting (00) must be used with all analog output modes to ensure specified accuracy.  
RBicLite™ Datasheet, Rev. 1.9, July 25, 2007  
Page 19 of 37  
© ZMD AG, 2007  
All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without the prior  
written consent of the copyright owner.  
ZMD31010  
RBicLiteTM Low-Cost Sensor Signal Conditioner  
Datasheet  
EEPROM  
Description  
Range  
Note  
12:11  
Update_Rate  
00 => 1 msec (1kHz)1  
01 => 5 msec (200Hz)  
10 => 25 msec (40Hz)  
11 => 125 msec (8 Hz)  
14:13  
JFET_Cfg  
00 => No JFET regulation (lower power)  
01 => No JFET regulation (lower power)  
10 => JFET regulation1 centered around 5.0V  
11 => JFET regulation1 centered around 5.5V (i.e. over-voltage  
protection).  
29:15  
Gain_B  
Bridge Gain:  
Gain_B[14] => mult x 8  
Gain_B[13:0] => 14-bit unsigned number representing a number in the  
range [0,8).  
43:30  
51:44  
59:52  
67:60  
Offset_B  
Gain_T  
Offset_T  
TSETL  
Signed 14-bit offset for bridge correction  
Temperature gain coefficient used to correct PTAT reading.  
Temperature offset coefficient used to correct PTAT reading.  
Stores Raw PTAT reading at temperature in which low calibration  
points were taken  
75:68  
83:76  
87:84  
Tcg  
Coefficient for temperature correction of bridge gain term.  
Tcg = 8-bit magnitude of Tcg term. Sign is determined by  
Tc_cfg (bits 87:84)  
Tco  
Coefficient for temperature correction of bridge offset term.  
Tco = 8-bit magnitude of Tco term. Sign and scaling are determined by  
Tc_cfg (bits 87:84)  
Tc_cfg  
This 4-bit term determines options for Temperature compensation of  
the bridge.  
Tc_cfg[3] => If set, Bridge Signal Polarity flips  
Tc_cfg[2] => If set, Tcg is negative  
Tc_cfg[1] => Scale magnitude of Tco term by 8, and if SOT applies to  
Tco, scale SOT by 8.  
Tc_cfg[0] => If set, Tco is negative  
1 Note that an additional Zener diode is required (for more details, see section 3.2, 3.3).  
RBicLite™ Datasheet, Rev. 1.9, July 25, 2007  
Page 20 of 37  
© ZMD AG, 2007  
All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without the prior  
written consent of the copyright owner.  
ZMD31010  
RBicLiteTM Low-Cost Sensor Signal Conditioner  
Datasheet  
EEPROM  
Description  
Range  
Note  
95:88  
99:96  
SOT  
2nd Order Term. This term is a 7-bit magnitude with sign.  
SOT[7] = 1 Î negative  
SOT[7] = 0 Î positive  
SOT[6:0] = magnitude [0-127]  
This term can apply to a 2nd order Tcg, Tco or bridge correction.  
(See Tc_cfg above)  
{SOT_cfg,  
Bits [99:98] = SOT_cfg (For more details, see section 2.5.1.)  
00 = SOT applies to Bridge  
01 = SOT applies to Tcg  
10 = SOT applies to Tco  
11 = Prohibited  
Pamp_Gain}  
Bits [97:96] = Pre-Amp Gain  
00 => 6  
01 => 24 (default setting)  
10 => 12  
11 => 48  
(Only the default gain setting (24) is tested at the factory, all other gain  
settings are not guaranteed)  
2.5 Calibration Math  
2.5.1 Correction Coefficients  
(All terms are calculated external to the DUT and then programmed to EEPROM through serial interface.)  
Gain_B =  
Offset_B=  
Gain_T =  
Gain term used to compensate span of Bridge reading.  
Offset term used to compensate offset of Bridge reading  
Gain term used to compensate span of Temp reading  
Offset_T = Offset term used to compensate offset of Temp reading  
SOT =  
Second Order Term. This term can be used applied as a second order correction term for  
1. The bridge measurement  
2. Temperature coefficient of offset (Tco)  
3. Temperature coefficient of gain (Tcg)  
EEPROM bits 99:98 determine what SOT applies to.  
Note: There are limitations for the SOT for the bridge measurement and for the SOT for the Tco which are  
explained in section 2.5.2.7.  
TSETL  
=
RAW PTAT reading at low temperature at which calibration was performed (typically room temp)  
RBicLite™ Datasheet, Rev. 1.9, July 25, 2007  
Page 21 of 37  
© ZMD AG, 2007  
All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without the prior  
written consent of the copyright owner.  
ZMD31010  
RBicLiteTM Low-Cost Sensor Signal Conditioner  
Datasheet  
Tcg =  
Temperature correction coefficient of bridge gain term  
This term has a 8-bit magnitude and a sign bit (Tc_cfg[2]).  
Tco =  
Temperature correction coefficient of bridge offset term  
This term has a 8-bit magnitude, a sign bit (Tc_cfg[0]) and a scaling bit (Tc_cfg[1])which can  
multiply its magnitude by 8.  
2.5.2 Interpretation of Binary Numbers for Correction Coefficients:  
BR_Raw should be interpreted as an unsigned number in the set [0,16383] with resolution of 1.  
T_Raw should be interpreted as an unsigned number in the set [0,16383] with resolution of 4  
2.5.2.1 Gain_B Interpretation  
Gain_B should be interpreted as a number in the set [0,64). The MSB (bit 14) is a scaling bit that will multiply  
the effect of the remaining bits Gain_B[13:0] by 8. Bits Gain_B[13:0] represent a number in the range of [0,8)  
with Gain_B[13] having a weighting of 4 and each subsequent bit has a weighting of ½ the previous bit.  
Table 2.2 – Gain_B Weightings  
Bit Position:  
Weighting:  
13  
12  
11  
...  
1
4
2
1
...  
2-10  
2-11  
0
Examples:  
The binary number: 010010100110001 = 4.6489; The scaling number is 0 so there is no multiply by 8 of the  
number represented by Gain_B[13:0]  
The binary number: 101100010010110 = 24.586; The scaling number is 1 so there is a multiply by 8 of the  
number represented by Gain_B[13:0]  
Limitation: Using the 5-point calibration 5pt-Tcg&Tco&SOT_Tco (including the second order SOT_Tco), the  
Gain_B is limited to a value equal or less than 8 (instead of 64).  
RBicLite™ Datasheet, Rev. 1.9, July 25, 2007  
Page 22 of 37  
© ZMD AG, 2007  
All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without the prior  
written consent of the copyright owner.  
ZMD31010  
RBicLiteTM Low-Cost Sensor Signal Conditioner  
Datasheet  
2.5.2.2 Offset_B Interpretation  
Offset_B is a 14-bit signed binary number in two’s complement form. The MSB has a weighting of –8192. The  
following bits then have a weighting of: 4096, 2048, 1024, …  
Table 2.3 – Offset_B Weightings  
Bit Position:  
Weighting:  
13  
12  
11  
...  
1
-8192  
4096  
2048  
...  
21 = 2  
20 = 1  
0
Thus the binary number: 11111111111100 = -4  
2.5.2.3 Gain_T Interpretation  
Gain_T should be interpreted as a number in the set [0,2). Gain_T[7] has a weighting of 1, and each  
subsequent bit has a weighting of ½ the previous bit.  
Table 2.4 – Gain_T Weightings  
Bit Position:  
Weighting:  
7
6
1
0.5  
0.25  
...  
5
...  
1
2-6  
0
2-7  
2.5.2.4 Offset_T Interpretation  
Offset_T is an 8-bit signed binary number in two’s complement form. The MSB has a weighting of –128. The  
following bits then have a weighting of: 64, 32, 16 …  
Table 2.5 – Offset_T Weightings  
Bit Position:  
Weighting:  
7
6
-128  
64  
...  
1
...  
21 = 2  
20 = 1  
0
For example, the binary number 00101001 = 41  
RBicLite™ Datasheet, Rev. 1.9, July 25, 2007  
Page 23 of 37  
© ZMD AG, 2007  
All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without the prior  
written consent of the copyright owner.  
ZMD31010  
RBicLiteTM Low-Cost Sensor Signal Conditioner  
Datasheet  
2.5.2.5 Tco Interpretation  
Tco is specified as an 8-bit magnitude with an additional sign bit (Tc_cfg[0]) and a scalar bit (Tc_cfg[1]). When  
the scalar bit is set, the signed Tco is multiplied by 8.  
Tco Resolution:  
Tco Range:  
0.175uV/V/oC  
+/- 44.6uV/V/oC  
(input referred)  
(input referred)  
If the scaling bit is used then the above resolution and range are scaled by 8 to give  
Tco Scaled Resolution:  
Tco Scaled Range:  
1.40uV/V/oC input referred  
+/- 357uV/V/oC input referred  
2.5.2.6 Tcg Interpretation  
Tcg is specified as an 8-bit magnitude with an additional sign bit (Tc_cfg[2]).  
The resolution of Tcg is:  
The range of Tcg is:  
17.0ppm/oC  
+/- 4335ppm/oC  
2.5.2.7 SOT Interpretation  
SOT is a second order term that can apply to one and only one of the following: bridge non-linearity  
correction, Tco non-linearity correction, or Tcg non-linearity correction.  
As it applies to bridge non-linearity correction:  
The resolution is:  
The range is:  
0.25% @ Full Scale  
+25% @ Full Scale to -25% @ Full Scale  
(Saturation in internal arithmetic will occur at greater negative non-linearities)  
Limitation: Using the 5-point calibration method for which SOT_BR is applied to the bridge measurement,  
there is a possibility of calibration math overflow. This only occurs if the sensor input exceeds 200% of the  
calibrated full span, which means the highest applied pressure should never go higher than this value.1  
As it applies to Tcg:  
The resolution is:  
The range is:  
0.3 ppm/(oC)2  
+/- 38ppm/(oC)2  
As it applies to Tco:  
1 Example of the Limitation When SOT is Applied to the Bridge Reading  
This example of the limitation when SOT is applied to the bridge reading uses a pressure sensor bridge that outputs  
-10mv at the lowest pressure of interest. That point is calibrated to read 0%. The same sensor outputs +40mV at the  
highest pressure of interest. That point is calibrated to read 100%.  
This sensor has a 50mV span over the pressure range of interest. If the sensor were to experience an over-pressure  
event that took the sensor output up to 90mV (200% of span), the internal calculations could overflow. The result would be  
a corrected bridge reading that would not be saturated at 100% as expected but instead read a value lower than 100%.  
This problem only occurs when SOT is applied to correct the bridge reading.  
RBicLite™ Datasheet, Rev. 1.9, July 25, 2007  
Page 24 of 37  
© ZMD AG, 2007  
All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without the prior  
written consent of the copyright owner.  
ZMD31010  
RBicLiteTM Low-Cost Sensor Signal Conditioner  
Datasheet  
2 settings are possible. It is possible to scale the effect of SOT by 8. If Tc_cfg[1] is set, then both Tco and  
SOT’s contribution to Tco are multiplied by 8.  
Resolution at unity scaling:  
Range:  
1.51nV/V/(oC)2  
+/- 0.192μV/V/(oC)2  
(input referred)  
(input referred)  
Resolution at 8x scaling: 12.1nV/V/(oC)2  
(input referred)  
(input referred)  
Range:  
+/- 1.54μV/V/(oC)2  
Limitation: If the second order term SOT applies to Tco, the bridge gain Gain_B is limited to values equal or  
less than 8 (instead of 64).  
2.6 Reading EEPROM Contents  
The contents of the entire EEPROM memory can be read out using the Read EEPROM Command (00H).  
This command will cause the IC to output consecutive bytes on the ZACwireTM. After each transmission, the  
EEPROM contents are shifted 8 bits. The bit order of these bytes is given in the following table. The fields  
marked in blue text in the table below affect the operation of the IC. Therefore when an EEPROM read/write  
is performed, the values are data dependent.  
Read EEPROM (Bit order):  
Bit 7  
Bit 6  
Bit 5  
Bit 4  
Bit 3  
Bit 2  
Bit 1  
Bit 0  
Byte 1:  
Byte 2:  
Byte 3:  
Byte 4:  
Byte 5:  
Byte 6:  
Byte 7:  
Byte 8:  
Byte 9:  
Offset_B[7:0]  
Gain_T[1:0]  
Offset_B[13:8]  
Gain_T[7:2]  
Offset_T[7:2]  
TSETL[7:2]  
Offset_T[1:0]  
TSETL[1:0]  
Tcg[1:0]  
Tco[1:0]  
Tcg[7:2]  
Tc_cfg[1:0]  
Tco[7:2]  
SOT[5:0]  
Tc_cfg[3:2]  
Osc_Trim[1:0]  
A2D_offset[1:0]  
Gain_B[2:0]  
SOT_cfg[3:0]*  
1V_Trim[3:0]**  
JFET_Cfg[1:0] Update_Rate[1:0]  
SOT[7:6]  
Byte 10: Output_Select[0]  
Osc_Trim[2]  
Output_Select[1]  
Byte 11:  
Byte 12:  
Byte 13:  
Byte 14:  
Gain_B[10:3]  
Offset_B[3:0]***  
Gain_B[14:11]  
A5H  
* SOT_cfg/Pamp_Gain  
** 1V_Trim/JFET_Trim  
*** Duplicates first 4 bits of Byte 1  
RBicLite™ Datasheet, Rev. 1.9, July 25, 2007  
Page 25 of 37  
© ZMD AG, 2007  
All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without the prior  
written consent of the copyright owner.  
ZMD31010  
RBicLiteTM Low-Cost Sensor Signal Conditioner  
Datasheet  
3
Application Circuit Examples  
Typical output analog load resistor RL= 10kΩ (minimum 2.5kΩ). This optional load resistor can be configured  
as a pull-up or pull-down. If it is configured as a pull-down, it cannot be part of the module to be calibrated  
because this would prevent proper operation of the ZACwireTM. If a pull-down load is desired, it must be  
added to system after module calibration.  
There is no output load capacitance needed.  
EEPROM contents: OUTPUT_select, JFET_Cfg, 1V_Trim/JFET-Trim  
3.1 Three-Wire Rail-to-Rail Ratiometric Output  
Figure 3.1 – Rail-to-Rail Ratiometric Voltage Output, Temperature Compensation via Internal PTAT  
The optional bridge sink allows a power savings of bridge current. The output voltage can be either  
a) Rail-to-rail ratiometric analog output VDD(=Vsupply).  
b) 0 to 1V analog output is also possible. The absolute voltage output reference is trimmable 1V (+/-2mV) in  
the 1V output mode via a 4-bit EEPROM field. (See section 1.4.3.)  
RBicLite™ Datasheet, Rev. 1.9, July 25, 2007  
Page 26 of 37  
© ZMD AG, 2007  
All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without the prior  
written consent of the copyright owner.  
ZMD31010  
RBicLiteTM Low-Cost Sensor Signal Conditioner  
Datasheet  
3.2 Absolute Analog Voltage Output  
+5.5V to +30 V  
Vsupply  
S
D
BSS169  
100Ω  
1 Bsink  
2 VBP  
VSS 8  
SigTM  
7
OUT  
VDD 6  
3 N/C  
Vgate 5  
4 VBN  
ZD  
5.6V  
Optional  
Bsink  
0.1u  
Ground  
Figure 3.2 – Absolute Voltage Output with Temperature Compensation via Internal  
Temperature PTAT External JFET Regulation for all Industry Standard Applications  
The output signal range is either  
a) 0 to 1V analog output. The absolute voltage output reference is trimmable 1V (+/-2mV) in the 1V output  
mode via a 4-bit EEPROM field. (See section 1.4.3.)  
b) Rail-to-rail analog output. The on-chip reference for the JFET regulator block is trimmable 5V (+/-~10mV)  
in the ratiometric output mode via a 4-bit EEPROM field. (See section 1.4.3.)  
Figure 3.3 – Current Limitation  
300  
Notes: JFET regulation requires a Zener diode and an  
additional resistor to protect the IC against over-voltage  
82  
Ω
Ω
250  
200  
150  
100  
50  
during the start window (for more details, refer to the  
ZMD31010 Errata Sheet). This work-around is based  
on the assumption that the IC is not powered ON/OFF  
with a frequency higher than 1Hz.  
100  
120 Ω  
150 Ω  
In this configuration, the duty cycle is 6ms/1s= 0.006.  
The resistor limits the current for the worse case in the  
initial 6ms to  
180 Ω  
220Ω  
Imax = (Vsupply - VZ)/R  
12 V  
15 V  
18 V  
21 V  
24 V  
27 V  
30 V  
Supply Voltage  
RBicLite™ Datasheet, Rev. 1.9, July 25, 2007  
Page 27 of 37  
© ZMD AG, 2007  
All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without the prior  
written consent of the copyright owner.  
ZMD31010  
RBicLiteTM Low-Cost Sensor Signal Conditioner  
Datasheet  
The Power dissipation for the resistor is limited to  
PR = 0.006 (Vsupply -5V) Imax  
(e.g. R=100Ω/Vsupply=30V PR=37mW)  
and for the Zener Diode  
PZD = 0.006 (VZ) Imax.  
Before using this limitation method, verify that the rush-in-current in the initial 6ms does not disrupt the  
application.  
3.3 Three-Wire Ratiometric Output with Over-Voltage Protection  
S
D
+4.5 to+5.5 V  
Vsupply  
J107  
Vishay  
1 Bsink  
2 VBP  
3 N/C  
VSS 8  
SigTM  
7
OUT  
VDD 6  
Vgate 5  
4 VBN  
Optional  
Bsink  
ZD  
0.1u 6.2V  
Ground  
Figure 3.4 – Ratiometric Output, Temperature Compensation via Internal Diode  
In this application, the JFET is used for over-voltage protection. The JFET_Cfg bits (14:13) in EEPROM are  
configured to 5.5V. There is an additional maximum error of 8mV caused by non-zero rON of the limiter JFET.  
Note: JFET regulation requires a Zener diode to protect the IC against over-voltage during the start window  
(for more details refer to the ZMD31010 Errata Sheet). This work-around is based on the assumption that the  
IC is not powered ON/OFF with a frequency higher than 0.01Hz. Over-voltage events must be lower than 20V  
during the initial 6ms after power on.  
The 6.2 V Zener diode is selected to guarantee ratiometricity up to 5.5V.  
3.4 Digital Output  
For all three circuits the output signal can also be digital. Depending from the output select bits bridge signal  
or the bridge signal and temperature signal are sent.  
For the digital output no load resistor or load capacity are necessary. No pull down resistor is allowed. If a line  
resistor or pull up resistor is used, the requirement for the rise time must be met (5 μs). The IC output  
RBicLite™ Datasheet, Rev. 1.9, July 25, 2007  
Page 28 of 37  
© ZMD AG, 2007  
All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without the prior  
written consent of the copyright owner.  
ZMD31010  
RBicLiteTM Low-Cost Sensor Signal Conditioner  
Datasheet  
includes a pull up resistor of about 30kΩ. The digital output can easily be read by firmware from a  
microcontroller and ZMD can provide the customer with software in developing the interface.  
3.5 Output Short Protection  
Table 3.1 -- Resistor for Short Protection  
The output of the RBicLiteTM has no short protection.  
Therefore, a resistor RSP in series with the output must  
be added in the application module. Refer to Table 3.1 to  
determine the value of RSP. To minimize additional error  
caused by this resistor for the analog output voltage, the  
load impedance must meet the following requirement:  
1
Temperature Range  
(TAMBMAX  
Resistor RSP  
)
Up to 85ºC  
Up to 125ºC  
Up to 150 ºC  
51 Ω  
100 Ω  
240 Ω  
RL >> RSP.  
4
ESD/Latch-Up-Protection  
All pins have an ESD protection of >4000V and a latch-up protection of ±100mA or of +8V/ –4V (to  
VSS/VSSA). ESD protection referred to the Human Body Model is tested with devices in SOP-8 packages  
during product qualification. The ESD test follows the Human Body Model with 1.5kOhm/100pF based on MIL  
883, Method 3015.7.  
1 RSP = VDD/Imax with Imax = [(170ºC - TAMBMAX)/(163 ºC/mW )} - VDD* IDD  
RBicLite™ Datasheet, Rev. 1.9, July 25, 2007  
Page 29 of 37  
© ZMD AG, 2007  
All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without the prior  
written consent of the copyright owner.  
ZMD31010  
RBicLiteTM Low-Cost Sensor Signal Conditioner  
Datasheet  
5
Pin Configuration and Package  
Figure 5.1 – RBicLiteTM Pin-Out Diagram  
8
7
6
1
2
3
4
5
The standard package of the RBicLiteTM is SOP-8 (3.81mm body (150mil) wide) with lead-pitch. 1.27mm  
(50mil).  
Pin-No.  
Name  
Bsink  
Description  
Optional ground connection for bridge ground.  
Used for power savings  
1
2
3
4
VBP  
N/C  
Positive Bridge Connection  
No Connection  
VBN  
Negative Bridge Connection  
Gate control for external JFET regulation/over-  
voltage protection  
5
6
7
8
Vgate  
VDD  
Supply voltage (2.7-5.5V)  
ZACwireTM interface (analog out, digital out,  
calibration interface)  
SIGTM  
VSS  
Ground supply  
RBicLite™ Datasheet, Rev. 1.9, July 25, 2007  
Page 30 of 37  
© ZMD AG, 2007  
All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without the prior  
written consent of the copyright owner.  
ZMD31010  
RBicLiteTM Low-Cost Sensor Signal Conditioner  
Datasheet  
6
IC Characteristics  
6.1 Absolute Maximum Ratings  
PARAMETER  
SYMBOL MIN TYP  
MAX  
6.0  
UNITS  
VDD  
VINA  
Analog Supply Voltage  
-0.3  
-0.3  
-0.3  
-50  
V
V
Voltages at Analog I/O – In Pin  
Voltages at Analog I/O – Out Pin  
Storage Temperature Range  
Storage Temperature Range  
VDD+0.3  
VDD+0.3  
150  
VOUTA  
TSTG  
V
°C  
°C  
TSTG<10h  
-50  
170  
6.2 Recommended Operating Conditions  
PARAMETER  
SYMBOL MIN TYP  
MAX  
UNITS  
Analog Supply Voltage to Gnd  
VDD  
2.7  
5.5  
5.0  
7
5.5  
V
Analog Supply Voltage (with external JFET  
Regulator) 1  
VSUPP  
30  
V
VDDA-1.3  
150  
Common Mode Voltage  
VCM  
1
V
Ambient Temperature Range 2&3  
TAMB  
-50  
°C  
External Capacitance between VDD and  
Gnd  
CVDD  
100 220  
470  
nF  
4
Output Load Resistance to VSS or VDD  
RL,OUT  
CL,OUT  
RBR  
2.5  
10  
10  
kΩ  
nF  
kΩ  
ms  
Output Load Capacitance5  
Bridge Resistance 6  
15  
0.2  
100  
100  
Power ON Rise Time  
tPON  
1 Depending on the application, a Zener diode and resistor are required.  
2 Note that the maximum calibration temperature is 85°C.  
3 If buying die, designers should use caution not to exceed maximum junction temperature by proper package selection.  
4 When using the output for digital calibration, no pull down resistor is allowed.  
5 Using the output for digital calibration, CL,OUT is limited by the maximum rise time TZAC,rise  
.
6 Note: Minimum bridge resistance is only a factor if using the Bsink feature. The nominal RDS(ON) of the Bsink transistor is 10when  
operating at VDD=5V, and 15when operating at VDD=3.0V. This does give rise to a ratiometricity inaccuracy that becomes greater with  
low bridge resistances.  
RBicLite™ Datasheet, Rev. 1.9, July 25, 2007  
Page 31 of 37  
© ZMD AG, 2007  
All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without the prior  
written consent of the copyright owner.  
ZMD31010  
RBicLiteTM Low-Cost Sensor Signal Conditioner  
Datasheet  
6.3 Electrical Parameters  
See important footnotes at the end of the following table.  
PARAMETER  
SYMBOL CONDITIONS  
SUPPLY VOLTAGE / REGULATION  
MIN  
TYP  
MAX  
UNITS  
Supply Voltage  
VDD  
IDD  
2.7  
5.0  
5.5  
V
At minimum update rate.  
250  
Supply Current (varies with  
μΑ  
update rate and output mode)1  
At maximum update rate.  
1000  
35  
ppm/K*  
ppm/K*  
Temperature Coefficient –  
Regulator (worst case)  
Temperature -10°C to 120°C  
Temperature <-10°C and>120°C  
TCREG  
PSRR  
100  
DC < 100 Hz (JFET regulation  
loop using mmbf4392 and 0.1μF  
decoupling cap)  
Power Supply Rejection Ratio  
60  
dB*  
AC < 100 kHz (JFET regulation  
loop using mmbf4392 and 0.1μF  
decoupling cap)  
Power Supply Rejection Ratio  
Power-On Reset Level  
PSRR  
POR  
45  
dB*  
V
1.4  
2.6  
ANALOG TO DIGITAL CONVERTER (ADC)  
rADC  
14  
1
Bits  
LSB2  
LSB*  
ms  
Resolution  
Integral Nonlinearity (INL)  
Differential Nonlinearity (DNL)  
Response Time  
INLADC  
DNLADC  
TRES,ADC  
Based on ideal slope  
-4  
-1  
+4  
+1  
Varies with update rate. Value  
given at fastest rate.  
ANALOG OUTPUT PARAMETERS (DAC + BUFFER)  
Max current maintaining  
accuracy  
Max. Output Current  
IOUT  
2.2  
mA  
Referenced to VDD  
DAC input to output  
No missing codes  
RL =2.5kΩ  
Resolution  
rOUT  
EABS  
DNL  
VOUT  
VOUT  
11  
Bit  
Absolute Error  
-10  
-0.9  
95%  
+10  
+1.5  
mV  
Differential Nonlinearity  
Upper Output Voltage Limit  
Lower Output Voltage Limit  
LSB11Bit  
VDD  
*
2.5  
mV  
RBicLite™ Datasheet, Rev. 1.9, July 25, 2007  
Page 32 of 37  
© ZMD AG, 2007  
All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without the prior  
written consent of the copyright owner.  
ZMD31010  
RBicLiteTM Low-Cost Sensor Signal Conditioner  
Datasheet  
PARAMETER  
SYMBOL CONDITIONS  
ZACwireSerial Interface*  
MIN  
TYP  
MAX  
UNITS  
ZACwireLine Resistance  
ZACwireLoad Capacitance  
RZAC,line  
See important limitations in  
footnote 3 below.  
3.9  
15  
kΩ  
CZAC,load  
See important limitations in  
footnote 3 below.  
0
1
nF  
ZACwireRise Time  
Voltage Level Low  
Voltage Level High  
TZAC,rise  
VZAC,low  
VZAC,low  
5
μs  
0
1
0.2  
VDD  
VDD  
0.8  
TOTAL SYSTEM  
Start-Up-Time  
tSTA  
tRESP  
fS  
Power-up to output  
10  
2
ms  
ms  
Hz  
mA  
%
Update_rate=1kHz (1ms)  
Update_rate=1kHz (1ms)  
Update_rate=1kHz (1ms)  
Bridge input to output -- Digital  
Bridge input to output -- Analog  
Not using Bsink feature  
Response Time  
1
1000  
1
Sampling Rate  
Supply Current  
IDD  
Overall Linearity Error  
Overall Linearity Error  
Overall Ratiometricity Error  
ELIND  
ELINA  
REout  
0.025  
0.1  
0.04  
0.2  
%
0.035  
%
-25°C to 85°C  
-50°C to 150°C  
±0.1%  
%FSO  
%FSO  
Overall Accuracy – Digital  
(only IC, without sensor bridge)  
ACoutD  
ACoutA  
±0.25%  
-25°C to 85°C  
-40°C to 125°C  
-50°C to 150°C  
±0.25%  
±0.35%  
±0.5%  
Overall Accuracy – Analog 4  
(only IC, without sensor bridge)  
%FSO  
%FSO  
* The parameters with an * under “Units” are tested by design.  
1 Note that for analog output mode configurations, the specified accuracy is only guaranteed for the highest update rate, 1ms (1kHz).  
2 Note: This is +/- 4 LSBs to the 14-bit A-to-D conversion. This implies absolute accuracy to 12-bits on the A-to-D result. Non-linearity is  
typically better at temperatures less than 125°C.  
3 The rise time must be TZAC,rise = 2 RZAC,line * CZACload 5μs . If using a pull up resistor instead of a line resistor, it must meet this specification.  
4 Not included is the quantization noise of the DAC. The 11-bit DAC has a quantization noise of – ½ LSB = 1.22mV (5V VDD) = 0.25%.  
RBicLite™ Datasheet, Rev. 1.9, July 25, 2007  
Page 33 of 37  
© ZMD AG, 2007  
All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without the prior  
written consent of the copyright owner.  
ZMD31010  
RBicLiteTM Low-Cost Sensor Signal Conditioner  
Datasheet  
6.4 Analog Inputs  
RBic LiteTM incorporates an extended 14-bit charge-balanced ADC which allows for a single gain setting on the  
Pre-Amplifier to handle bridge sensitivities from 1.2 to 36mV/V while maintaining 8 to 12 bits of output  
resolution (default analog gain 24). The tables below illustrate the minimum resolution achievable for a variety  
of bridge sensitivities.  
Analog Gain 6  
Input Span (mV/V)  
Allowed Offset  
(+/- % of Span)1  
Minimum Guaranteed  
Resolution (Bits)  
Min  
57.3  
50.6  
43.4  
36.1  
28.9.5  
21.7  
Typ  
80.0  
70.0  
60.0  
50.0  
40.0  
30.0  
Max  
105.8  
92.6  
79.4  
66.1  
52.9  
39.7  
38%  
53%  
13.3  
13.1  
12.9  
12.6  
12.3  
11.9  
73%  
101%  
142%  
212%  
Analog Gain 12  
Input Span (mV/V)  
Allowed Offset  
(+/- % of Span)1  
Minimum Guaranteed  
Resolution (Bits)  
Min  
Typ  
Max  
43.3  
36.1  
25.3  
18.0  
14.5  
7.2  
60.0  
50.0  
35.0  
25.0  
20.0  
10.0  
5.0  
79.3  
66.1  
46.3  
33.0  
26.45  
13.22  
6.6  
3%  
17%  
13.0  
12.7  
12.2  
11.7  
11.4  
10.4  
9.4  
53%  
101%  
142%  
351%  
767%  
3.6  
1In addition to Tco,Tcg  
RBicLite™ Datasheet, Rev. 1.9, July 25, 2007  
Page 34 of 37  
© ZMD AG, 2007  
All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without the prior  
written consent of the copyright owner.  
ZMD31010  
RBicLiteTM Low-Cost Sensor Signal Conditioner  
Datasheet  
Analog Gain 24  
Input Span (mV/V)  
Allowed Offset  
(+/- % of Span)1  
Minimum Guaranteed  
Min  
Typ  
Max  
Resolution (Bits)  
16  
25.0  
20.0  
10.0  
5.0  
36  
25%  
50%  
12.6  
12  
11  
10  
9
12.8  
6.4  
3.2  
1.6  
0.8  
28.8  
14.4  
7.2  
150%  
400%  
900%  
2000%  
2.5  
3.6  
1.2  
1.7  
8
1In addition to Tco,Tcg  
Analog Gain = 48  
Input Span (mV/V)  
Allowed Offset  
(+/- % of Span)1  
Minimum Guaranteed  
Resolution (Bits)  
Min  
Typ  
15.0  
10.0  
6.0  
Max  
10.8  
7.2  
4.3  
2.9  
1.8  
1.0  
19.8  
13.2  
7.9  
3%  
35%  
13  
12.4  
11.7  
11.1  
10.4  
9.6  
100%  
190%  
350%  
675%  
975%  
4.0  
5.3  
2.5  
3.3  
1.4  
1.85  
1.32  
0.72  
1.0  
9.1  
1In addition to Tco,Tcg  
6.5 Temperature Compensation and Temperature Output  
A highly-linear Bandgap/PTAT circuit is used in order to produce a signal which can be used in compensation  
of the bridge over temperature. In addition, when digital mode is activated both bridge and temperature  
signals (8-bit temperature quantity) can be broadcast on the ZACwireTM pin.  
RBicLite™ Datasheet, Rev. 1.9, July 25, 2007  
Page 35 of 37  
© ZMD AG, 2007  
All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without the prior  
written consent of the copyright owner.  
ZMD31010  
RBicLiteTM Low-Cost Sensor Signal Conditioner  
Datasheet  
6.6 High Voltage Operation (Normal Operation Mode)  
A linear regulator control circuit is included on the IC to interface with an external JFET to allow for operation  
in systems where the supply voltage exceeds 5.5V. This circuit can also be used for over-voltage protection.  
The regulator set point has a coarse adjust (EEPROM bit) that can adjust the set point around 5.0 or 5.5V. In  
addition, the 1V trim will also act as a fine adjust for the regulation set point. Note: If using the external JFET  
for over-voltage protection purposes (i.e., 5V at JFET drain and expecting 5V at JFET source), there will be a  
voltage drop across the JFET, thus ratiometricity will be compromised somewhat depending on the rds(on) of  
the chosen JFET. A Vishay J107 is the best choice that would produce only an 8mV drop worst case. If using  
as regulation instead of over-voltage, a MMBF4392 or BSS169 also works well.  
7
Test  
The test program is based on this datasheet. The final parameters that will be tested during series production  
are listed in the tables of section 6.3.  
The digital part of the IC includes a scan path, which can be activated and controlled during wafer test. It  
guarantees failure coverage more than 98%. Further test support for testing of the analog parts on wafer level  
is included in the DSP.  
8
Reliability  
The RBicLite™ has successfully passed AEC Q100 automotive qualification testing, which includes reliability  
testing for the temperature range from -50 to 150ºC.  
9
Customization  
For high-volume applications, which require an upgraded or downgraded functionality compared to the  
ZM31010, ZMD can customize the circuit design by adding or removing certain functional blocks. ZMD can  
provide a custom solution quickly because it has a considerable library of sensor-dedicated circuitry blocks.  
Please contact ZMD for further information.  
RBicLite™ Datasheet, Rev. 1.9, July 25, 2007  
Page 36 of 37  
© ZMD AG, 2007  
All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without the prior  
written consent of the copyright owner.  
ZMD31010  
RBicLiteTM Low-Cost Sensor Signal Conditioner  
Datasheet  
10 Related Documents  
ƒ
ƒ
ƒ
ƒ
ƒ
ƒ
ZMD31010 RBicLiteTM Development Kit Documentation  
ZMD31010 RBicLiteTM SSC Kits Feature Sheet (includes ordering codes and price information)  
ZMD31010 RBicLiteTM Errata Sheet – Rev_A_Production  
ZMD31010 RBicLiteTM Application Notes – In-Circuit Programming Boards  
ZMD31010 RBicLiteTM Die Dimensions and Pad Coordinates  
ZMD31010 RBicLiteTM Mass Calibrator Kit Documentation  
For the most recent revisions of this document and of the related documents, please go to www.zmd.biz  
This information applies to a product under development. Its characteristics and specifications are subject to change without notice. ZMD  
assumes no obligation regarding future manufacture unless otherwise agreed in writing. The information furnished hereby is believed to  
be correct and accurate. However, ZMD shall not be liable to any customer, licensee or any other third party for any damages in  
connection with or arising out of the furnishing, performance or use of this technical data. No obligation or liability to any customer,  
licensee or any other third party shall result from ZMD’s rendering of technical or other services.  
ZMD AG  
ZMD America, Inc.  
ZMD Far East  
For further  
information:  
Grenzstrasse 28  
01109 Dresden, Germany  
201 Old Country Road, Suite 204 1F, No.14, Lane 268  
Melville, NY 11747, USA  
Sec. 1 Guangfu Road  
HsinChu City 300  
Taiwan  
Phone +49 (0)351-8822-366 Phone +01 (631) 549-2666  
Fax +49 (0)351-8822-337  
Fax +01 (631) 549-2882  
Phone +886.3.563.1388  
Fax +886.3.563.6385  
sales@zmd.de  
www.zmd.biz  
sales@zmda.com  
www.zmd.biz  
sales@zmd.de  
www.zmd.biz  
RBicLite™ Datasheet, Rev. 1.9, July 25, 2007  
Page 37 of 37  
© ZMD AG, 2007  
All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without the prior  
written consent of the copyright owner.  

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