ZMD31010BIF-R_技术文档

ZMD31010

RBic_Lite™ Low-Cost Sensor Signal Conditioner

Data Sheet

Rev. 2.2 / February 2, 2009

Data Sheet

RBic_Lite^TMLow-Cost Sensor Signal Conditioner

ZMD31010

Brief Description

Benefits

The RBic_Lite™ ZMD31010 is a sensor signal con-

ditioner circuit, which enables easy and precise

calibration of resistive bridge sensors via EEPROM.

When mated to a resistive bridge sensor, it will

digitally correct offset and gain with the option to

correct offset and gain coefficients and linearity over

temperature. A second order compensation can be

enabled for temperature coefficients of gain or offset

or bridge linearity. RBic_Lite™ communicates via

ZMD’s ZACwire™ serial interface to the host

computer and is easily mass calibrated in a

Windows^®environment. Once calibrated, the output

pin Sig™ can provide selectable 0 to 1 V, rail-to-rail

ratiometric analog output, or digital serial output of

bridge data with optional temperature data.

• No external trimming components

required

• PC-controlled configuration and

calibration via One-Wire Interface –

simple, low cost

• High accuracy (±0.1% FSO @ -25 to

85°C; ±0.25% FSO @ -50 to 150°C)

• Single pass calibration – quick and

precise

• Suitable for battery-powered applications

• Small SOP8 package

Features

Available Support

• Digital compensation of sensor offset,

sensitivity, temperature drift, and non-linearity

• Accommodates differential sensor signal

spans, from 1.2 mV/V to 60 mV/V

• ZACwire™ One-Wire Interface (OWI)

• Internal temperature compensation and

detection via bandgap PTAT (proportional to

absolute temperature)

• Development Kit available

• Multi-Unit Calibrator Kit available

• Support for industrial mass calibration

available

• Quick circuit customization possible for large

production volumes

• Optional sequential output of both,

temperature and bridge readings, on

ZACwire™ digital output

ZMD31010 Application Circuit

• Output options: rail-to-rail analog output

voltage, absolute analog voltage, digital One-

Wire Interface (OWI)

V_supply

+4.5 to +5.5 V

VDD

• Supply voltage 2.7 to 5.5 V, with external

JFET 5.5V to 30 V

Bsink

Sig^TM

OUT/OWI

• Current consumption depending on adjusted

sample rate: 0.25 mA to 1 mA

• Wide operational temperature: –50 to +150°C

• Fast response time, 1 ms (typical)

• High voltage protection up to 30 V with

external JFET

ZMD31010

VBP

Vgate

VBN

0.1 μF

VSS

• Chopper-stabilized true differential ADC

• Buffered and chopper-stabilized output DAC

Ground

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February 9, 2009

Data Sheet

RBic_Lite^TMLow-Cost Sensor Signal Conditioner

ZMD31010

Contents

List of Figures .....................................................................................................................................................4

List of Tables ......................................................................................................................................................4

1

Electrical Characteristics.............................................................................................................................6

1.1.

1.2.

1.3.

Absolute Maximum Ratings ..............................................................................................................6

Recommended Operating Conditions...............................................................................................6

Electrical Parameters........................................................................................................................7

1.3.1. Supply / Regulation Characteristics..............................................................................................7

1.3.2. Analog Front-End (AFE) Characteristics ......................................................................................7

1.3.3. A/D Converter Characteristics ......................................................................................................8

1.3.4. Analog Output (DAC and Buffer) Characteristics .........................................................................8

1.3.5. ZACwire™ Serial Interface ...........................................................................................................8

1.3.6. System Response Characteristics................................................................................................9

1.4.

Analog Inputs versus Output Resolution...........................................................................................9

2

Circuit Description .....................................................................................................................................12

2.1.

2.2.

Signal Flow and Block Diagram ......................................................................................................12

Analog Front End ............................................................................................................................13

2.2.1. Bandgap/PTAT and PTAT Amplifier...........................................................................................13

2.2.2. Bridge Supply..............................................................................................................................13

2.2.3. PREAMP Block...........................................................................................................................13

2.2.4. Analog-to-Digital Converter (ADC) .............................................................................................13

2.3.

Digital Signal Processor..................................................................................................................14

2.3.1. EEPROM ....................................................................................................................................15

2.3.2. One-Wire Interface - ZACwire™.................................................................................................15

2.4.

Output Stage ...................................................................................................................................16

2.4.1. Digital to Analog Converter (Output DAC)..................................................................................16

2.4.2. Output Buffer...............................................................................................................................16

2.4.3. Voltage Reference Block ............................................................................................................16

2.5.

Clock Generator / Power-On Reset (CLKPOR)..............................................................................17

2.5.1. Trimming the Oscillator...............................................................................................................18

Functional Description...............................................................................................................................19

3

3.1.

3.2.

General Working Mode ...................................................................................................................19

ZACwire™ Communication Interface..............................................................................................20

3.2.1. Properties and Parameters.........................................................................................................20

3.2.2. Bit Encoding................................................................................................................................20

3.2.3. Write Operation from Master to RBic_Lite™ ..................................................................................21

3.2.4. RBIC_Lite™ Read Operations........................................................................................................21

3.2.5. High Level Protocol.....................................................................................................................24

3.3.

Command/Data Bytes Encoding.....................................................................................................24

Calibration Sequence......................................................................................................................26

EEPROM Bits..................................................................................................................................28

Calibration Math ..............................................................................................................................30

3.4.

3.5.

3.6.

3.6.1. Correction Coefficients................................................................................................................30

3.6.2. Interpretation of Binary Numbers for Correction Coefficients.....................................................31

3.7.

Reading EEPROM Contents...........................................................................................................35

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Data Sheet

RBic_Lite^TMLow-Cost Sensor Signal Conditioner

ZMD31010

4

Application Circuit Examples.....................................................................................................................36

4.1.

4.2.

4.3.

4.4.

4.5.

Three-Wire Rail-to-Rail Ratiometric Output ....................................................................................36

Absolute Analog Voltage Output.....................................................................................................37

Three-Wire Ratiometric Output with Over-Voltage Protection........................................................38

Digital Output...................................................................................................................................38

Output Short Protection...................................................................................................................39

5

6

7

8

9

Default EEPROM Settings ........................................................................................................................40

Pin Configuration and Package.................................................................................................................41

ESD/Latch-Up-Protection..........................................................................................................................42

Test............................................................................................................................................................42

Quality and Reliability................................................................................................................................42

10 Customization............................................................................................................................................42

11 Related Documents...................................................................................................................................42

12 Definitions of Acronyms.............................................................................................................................43

List of Figures

Figure 2.1 RBic_Lite™ ZMD31010 Block Diagram ..........................................................................................12

Figure 2.2 DAC Output Timing for Highest Update Rate .............................................................................16

Figure 3.1 General Working Mode ...............................................................................................................19

Figure 3.2 Manchester Duty Cycle ...............................................................................................................20

Figure 3.3 19-Bit Write Frame ......................................................................................................................21

Figure 3.4 Read Acknowledge .....................................................................................................................21

Figure 3.5 Digital Output (NOM) Bridge Readings.......................................................................................22

Figure 3.6 Digital Output (NOM) Bridge Readings with Temperature..........................................................22

Figure 3.7 Read EEPROM Contents............................................................................................................23

Figure 3.8 Transmission of a Number of Data Packets................................................................................23

Figure 3.9 ZACwire™ Output Timing for Lower Update Rates ....................................................................24

Figure 4.1 Rail-to-Rail Ratiometric Voltage Output ......................................................................................36

Figure 4.2 Absolute Analog Voltage Output .................................................................................................37

Figure 4.3 Ratiometric Output, Temperature Compensation via Internal Diode ..........................................38

Figure 6.1 RBic_Lite™ Pin-Out Diagram..........................................................................................................41

List of Tables

Table 1.1

Table 1.2

Table 1.3

Table 1.4

Table 1.5

Table 1.6

Table 1.7

Absolute Maximum Ratings...........................................................................................................6

Recommended Operating Conditions...........................................................................................6

Supply / Regulation Characteristics ..............................................................................................7

Parameters for Analog Front-End (AFE).......................................................................................7

Parameters for A/D Converter.......................................................................................................8

Parameters for Analog Output (DAC and Buffer)..........................................................................8

Parameters for ZACwire™ Serial Interface...................................................................................8

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Data Sheet

RBic_Lite^TMLow-Cost Sensor Signal Conditioner

ZMD31010

Table 1.8

Table 1.9

Parameters for System Response ................................................................................................9

ADC Resolution Characteristics for an Analog Gain of 6..............................................................9

Table 1.10 ADC Resolution Characteristics for an Analog Gain of 12..........................................................10

Table 1.11 ADC Resolution Characteristics for an Analog Gain of 24..........................................................10

Table 1.12 ADC Resolution Characteristics for an Analog Gain of 48..........................................................11

Table 2.1

Table 2.2

Table 3.1

Table 3.2

Table 3.3

Table 3.4

Table 3.5

Table 3.6

Table 3.7

Table 3.8

Table 3.9

Order of Trim Codes....................................................................................................................17

Oscillator Trimming......................................................................................................................18

Pin Configuration and Latch-Up Conditions................................................................................20

Total Transmission Time for Different Update Rate Settings and Output Configuration ............23

Command/Data Bytes Encoding .................................................................................................24

Programming Details for Command 30_H.....................................................................................25

ZMD31010 EEPROM Bits...........................................................................................................28

Correction Coefficients................................................................................................................30

Gain_B[13:0] Weightings.............................................................................................................31

Offset_B Weightings....................................................................................................................32

Gain_T Weightings......................................................................................................................32

Table 3.10 Offset_T Weightings....................................................................................................................33

Table 3.11 EEPROM Read Order.................................................................................................................35

Table 4.1

Table 5.1

Table 6.1

Resistor Values for Short Protection...........................................................................................39

Factory Settings for the ZMD31010 EEPROM............................................................................40

RBic_Lite™ Pin Configuration.........................................................................................................41

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Data Sheet

RBic_Lite^TMLow-Cost Sensor Signal Conditioner

ZMD31010

1

Electrical Characteristics

1.1.

Absolute Maximum Ratings

Table 1.1 Absolute Maximum Ratings

Symbol

V_DD

Parameter

Min

Max

Unit Conditions

Analog Supply Voltage

-0.3

6.0

V

V_INA

Voltages at Analog I/O – In

-0.3

VDD+0.3

V

V_OUTA

Voltages at Analog I/O – Out

T_STG

Storage Temperature Range

-50

150

170

°C

T_{STG <10h}

°C For periods < 10 hours

1.2.

Recommended Operating Conditions

Table 1.2 Recommended Operating Conditions

Symbol

Parameter

Min

Typ

Max

Unit Conditions

Analog Supply Voltage to

Ground

V_DD

2.7

5.0

5.5

V

Analog Supply Voltage (with

external JFET Regulator)

V_SUPP

V_CM

5.5

1

7

30

V_DDA- 1.3

150

V

Common Mode Voltage

Ambient Temperature

Range ^{1, 2)}

T_AMB

-50

°C

External Capacitance

between V_DDand Ground

C_VDD

100

2.5

220

470

nF

Output Load Resistance to

R_L,OUT

10

kΩ

3)

V_SSor V_DD

C_L,OUT

R_BR

Output Load Capacitance ⁴⁾

Bridge Resistance ⁵⁾

15

nF

kΩ

ms

0.2

100

t_PON

Power ON Rise Time

1)

2)

3)

4)

5)

Note that the maximum calibration temperature is 85°C.

If buying die, designers should use caution not to exceed maximum junction temperature by proper package selection.

When using the output for digital calibration, no pull down resistor is allowed.

Using the output for digital calibration, C_L,OUTis limited by the maximum rise time T_ZAC,rise

.

Note: Minimum bridge resistance is only a factor if using the Bsink feature. The nominal R_DS(ON) of the Bsink transistor is 10 Ω when

operating at V_DD= 5 V, and 15 Ω when operating at V_DD= 3.0 V. This does give rise to a ratiometricity inaccuracy that becomes

greater with low bridge resistances.

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Data Sheet

RBic_Lite^TMLow-Cost Sensor Signal Conditioner

ZMD31010

1.3.

Electrical Parameters

1.3.1. Supply / Regulation Characteristics

Table 1.3 Supply / Regulation Characteristics

Parameter

Symbol

V_DD

Min

Typ

5.0

Max

Unit Conditions

Supply Voltage

2.7

5.5

V

I_DD

0.25

1.0

At minimum update rate

Supply Current (varies with

update rate and output mode)

mA

1.2

35

At maximum update rate

Tem. -10°C to 120°C

TC_REG

Temperature Coefficient –

Regulator (worst case) *

ppm/K

100

Temp. < -10°C and > 120°C

Power Supply Rejection Ratio ^*PSRR

DC < 100 Hz (JFET regulation loop

using mmbf4392 and 0.1 µF

decoupling cap)

60

dB

AC < 100 kHz (JFET regulation

loop using mmbf4392 and 0.1 μF

decoupling cap)

45

dB

V

Power-On Reset Level

POR

1.4

2.6

1.3.2. Analog Front-End (AFE) Characteristics

Table 1.4 Parameters for Analog Front-End (AFE)

Parameter

Symbol

Min

Typ

Max

±10

Unit Conditions

Leakage Current Pin VBP,VBN

I_{IN_LEAK}

nA

* No verification in mass production; parameter is guaranteed by design and/or quality observation.

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Data Sheet

RBic_Lite^TMLow-Cost Sensor Signal Conditioner

ZMD31010

1.3.3. A/D Converter Characteristics

Table 1.5 Parameters for A/D Converter

Parameter

Symbol

r_ADC

Min

Typ

Max

Unit Conditions

ADC Resolution

14

Bit

Integral Nonlinearity (INL) ¹⁾

Differential Nonlinearity (DNL) ^*

Response Time

INL_ADC

DNL_ADC

T_RES,ADC

-4

-1

+4

+1

LSB

1

ms Varies with update rate. Value

given at fastest rate.

1)

Note: This is ± 4 LSBs to the 14-bit A-to-D conversion. This implies absolute accuracy to 12 bits on the A-to-D result. Non-linearity is

typically better at temperatures less than 125°C.

1.3.4. Analog Output (DAC and Buffer) Characteristics

Table 1.6 Parameters for Analog Output (DAC and Buffer)

Parameter

Symbol

I_OUT

Min

Typ

Max

Unit Conditions

Max. Output Current

Resolution

2.2

mA

Bit

Max. current maintaining accuracy

r_OUT

11

Referenced to V_DD

DAC input to output

Absolute Error

E_ABS

DNL

V_OUT

-10

-0.9

95%

+10

+1.5

mV

Differential Nonlinearity †

Upper Output Voltage Limit

Lower Output Voltage Limit

LSB_11BitNo missing codes

V_DD

mV

R_L= 2.5 kΩ

16.5

1.3.5. ZACwire™ Serial Interface

Table 1.7 Parameters for ZACwire™ Serial Interface

Parameter

Symbol Min

Typ

Max

Unit Conditions

ZACwire^™Line Resistance *

ZACwire^™Load Capacitance *

R_ZAC,line

3.9

15

kΩ The rise time must be T_ZAC,rise

=

2 ∗ R_ZAC,line∗ C_ZACload≤ 5µs . If using

a pull-up resistor instead of a line

resistor, it must meet this specification.

C_ZAC,load

0

1

nF

ZACwire^™Rise Time *

Voltage Level Low *

Voltage Level High *

T_ZAC,rise

V_ZAC,low

5

µs

0

1

0.2

V_DD

0.8

† No verification in mass production; parameter is guaranteed by design and/or quality observation.

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Data Sheet

RBic_Lite^TMLow-Cost Sensor Signal Conditioner

ZMD31010

1.3.6. System Response Characteristics

Table 1.8 Parameters for System Response

Parameter

Symbol

t_STA

Min

Typ

Max

10

2

Unit Conditions

Start-Up-Time

ms Power-up to output

Response Time

t_RESP

f_S

1

ms Update_rate = 1 kHz (1 ms)

Hz Update_rate = 1 kHz (1 ms)

Sampling Rate

1000

0.025

0.1

Overall Linearity Error

Overall Ratiometricity Error

E_LIND

E_LINA

RE_out

AC_outD

0.04

0.2

%

Bridge input to output – Digital

Bridge input to output – Analog

Not using Bsink feature

-25°C to 85°C

0.035

±0.1%

±0.25%

±0.35%

±0.5%

Overall Accuracy – Digital

(only IC, without sensor bridge)

%FSO

-50°C to 150°C

-25°C to 85°C

AC_outA

Overall Accuracy – Analog

%FSO -40°C to 125°C

-50°C to 150°C

(only IC, without sensor bridge) ¹⁾

1)

Not included is the quantization noise of the DAC. The 11-bit DAC has a quantization noise of ± ½ LSB = 1.22 mV (5V V_DD) = 0.025%.

1.4.

Analog Inputs versus Output Resolution

The RBic _Lite™ incorporates an extended 14-bit charge-balanced ADC, which allows for a single gain setting on

the pre-amplifier to handle bridge sensitivities from 1.2 to 36 mV/V while maintaining 8 to 12 bits of output reso-

lution (default analog gain is 24). The tables below illustrate the minimum resolution achievable for a variety of

bridge sensitivities. The yellow shadowed fields indicate that for these input spans with the selected analog gain

setting, the quantization noise is higher than 0.1% FSO.

Table 1.9 ADC Resolution Characteristics for an Analog Gain of 6

Analog Gain 6

Input Span [mV/V]

Allowed Offset

Minimum Guaranteed

Resolution [Bits]

(+/- % of Span) ¹⁾

Min

57.3

50.6

43.4

36.1

28.9.5

21.7

Typ

80.0

70.0

60.0

50.0

40.0

30.0

Max

105.8

92.6

79.4

66.1

52.9

39.7

38%

53%

13.3

13.1

12.9

12.6

12.3

11.9

73%

101%

142%

212%

1)

In addition to Tco, Tcg

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Data Sheet

RBic_Lite^TMLow-Cost Sensor Signal Conditioner

ZMD31010

Table 1.10 ADC Resolution Characteristics for an Analog Gain of 12

Analog Gain 12

Input Span [mV/V]

Allowed Offset

Minimum Guaranteed

Resolution [Bits]

(+/- % of Span) ¹⁾

Min

43.3

36.1

25.3

18.0

14.5

7.2

Typ

60.0

50.0

35.0

25.0

20.0

10.0

5.0

Max

79.3

66.1

46.3

33.0

26.45

13.22

6.6

3%

13.0

12.7

12.2

11.7

11.4

10.4

9.4

17%

53%

101%

142%

351%

767%

3.6 ²⁾

1)

2)

In addition to Tco, Tcg

Yellow shadowing indicates that for these input spans with the selected analog gain setting, the quantization noise is > 0.1% FSO.

Table 1.11 ADC Resolution Characteristics for an Analog Gain of 24

Analog Gain 24

Input Span [mV/V]

Allowed Offset

Minimum Guaranteed

Resolution [Bits]

(+/- % of Span) ¹⁾

Min

16

Typ

25.0

20.0

10.0

5.0

Max

36

25%

50%

12.6

12

11

10

9

12.8

6.4

28.8

14.4

7.2

150%

400%

900%

2000%

3.2

1.6 ²⁾

0.8 ²⁾

2.5

3.6

1.2

1.7

8

1)

2)

In addition to Tco,Tcg

Yellow shadowing indicates that for these input spans with the selected analog gain setting, the quantization noise is > 0.1% FSO.

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Data Sheet

RBic_Lite^TMLow-Cost Sensor Signal Conditioner

ZMD31010

Table 1.12 ADC Resolution Characteristics for an Analog Gain of 48

Analog Gain 48

Input Span [mV/V]

Allowed Offset

Minimum Guaranteed

Resolution [Bits]

(+/- % of Span) ¹⁾

Min

10.8

7.2

Typ

15.0

10.0

6.0

Max

19.8

13.2

7.9

3%

13

35%

12.4

11.7

11.1

10.4

9.6

4.3

100%

190%

350%

675%

975%

2.9

4.0

5.3

1.8

2.5

3.3

1.0 ²⁾

0.72 ²⁾

1.4

1.85

1.32

1.0

9.1

1)

2)

In addition to Tco,Tcg

Yellow shadowing indicates that for these input spans with the selected analog gain setting, the quantization noise is > 0.1% FSO.

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Data Sheet

RBic_Lite^TMLow-Cost Sensor Signal Conditioner

ZMD31010

2

Circuit Description

2.1.

Signal Flow and Block Diagram

The RBic_Lite™ series of resistive bridge sensor interface ICs were specifically designed as a cost-effective solu-

tion for sensing in building automation, industrial, office automation, and white goods applications.

The RBic_Lite™ employs ZMD’s high precision bandgap with proportional-to-absolute temperature (PTAT) output;

a low-power 14-bit analog-to-digital converter (ADC, A2D, A-to-D); and an on-chip DSP core with EEPROM to

precisely calibrate the bridge output signal.

Three selectable output modes, two analog and one digital, offer the ultimate in versatility across many

applications.

The RBic_Lite™ rail-to-rail ratiometric analog output V_outsignal (0 to 5 V, V_out@ V_DD= 5 V) suits most building

automation and automotive requirements. Typical office automation and white goods applications require the

0 to 1 V_outsignal, which in the RBic_Lite™ is referenced to the internal bandgap. Direct interfacing to μP controllers

is facilitated via ZMD’s single-wire serial ZACwire™ digital interface.

The RBic_Lite™ is capable of running in high-voltage (5.5 to 30 V) systems when combined with an external JFET.

Figure 2.1 RBic_Lite™ ZMD31010 Block Diagram

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Data Sheet

RBic_Lite^TMLow-Cost Sensor Signal Conditioner

ZMD31010

2.2.

Analog Front End

2.2.1. Bandgap/PTAT and PTAT Amplifier

The highly-linear Bandgap/PTAT provides the PTAT signal to the ADC, which allows accurate temperature con-

version. In addition, the ultra-low ppm-Bandgap provides a stable voltage reference over temperature for the

operation of the rest of the IC.

The PTAT signal is amplified through a path in the pre-amplifier (PREAMP) and fed to the ADC for conversion.

The most significant 12 bits of this converted result are used for temperature measurement and temperature

correction of bridge readings. When temperature is output in Digital Mode, only the most significant 8 bits are

given.

2.2.2. Bridge Supply

The voltage driven bridge is usually connected to V_DDand ground. As a power savings feature, the RBic_Lite

™

also includes a switched transistor to interrupt the bridge current via the Bsink pin. The transistor switching is

synchronized to the A/D-conversion and released after finishing the conversion. To utilize this feature, the low

supply of the bridge should be connected to Bsink instead of ground.

Depending on the programmable update rate, the average current consumption (including bridge current) can be

reduced to approximately 20%, 5% or 1%.

2.2.3. PREAMP Block

The differential signal from the bridge is amplified through a chopper-stabilized instrumentation amplifier with

very high input impedance, designed for low noise and low drift. This PREAMP provides gain for the differential

signal and re-centers its DC to V_DD/2. The output of the PREAMP block is fed into the A/D-converter. The

calibration sequence performed by the digital core includes an auto-zero sequence to null any drift in the

PREAMP state over temperature.

The PREAMP is nominally set to a gain of 24. Other possible gain settings are 6, 12, and 48.

The inputs to the PREAMP from the VBN/VBP pins can be reversed via an EEPROM configuration bit.

2.2.4. Analog-to-Digital Converter (ADC)

A 14-bit/1 ms 2^nd-order charge-balancing ADC is used to convert signals coming from the PREAMP. The con-

verter, designed in full differential switched-capacitor technique, is used for converting the various signals to the

digital domain. This principle offers the following advantages:

• High noise immunity because of the differential signal path and integrating behavior

• Independent from clock frequency drift and clock jitter

• Fast conversion time owing to second order mode

Four selectable values for the zero point of the input voltage allow the conversion to adapt to the sensor’s offset

parameter. The conversion rate varies with the programmed update rate. The fastest conversion rate is

1 k samples/s; the response time is then 1 ms. Based on a best fit, the Integral Nonlinearity (INL) is < 4 LSB_14Bit

.

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Data Sheet

RBic_Lite^TMLow-Cost Sensor Signal Conditioner

ZMD31010

2.3.

Digital Signal Processor

A digital signal processor (DSP) is used for processing the converted bridge data as well as for performing

temperature correction and for computing the temperature value for output on the digital channel.

The DSP reads correction coefficients from the EEPROM and can correct for

• Bridge Offset

• Bridge Gain

• Variation of Bridge Offset over Temperature (Tco)

• Variation of Bridge Gain over Temperature (Tcg)

• A Single Second Order Effect (SOT - Second Order Term)

The EEPROM contains a single SOT that can be applied to correct one and only one of the following:

• 2^ndorder behavior of bridge measurement

• 2^ndorder behavior of Tco

• 2^ndorder behavior of Tcg

(For more details, see section 3.6.1.)

If the SOT applies to correcting the bridge reading, then the correction formula for the bridge reading is

represented as a two step process, as follows:

(1)

ZB = Gain _ B(1+ ΔT ∗Tcg)∗(BR _ Raw +Offset _ B + ΔT ∗Tco)

RB = ZB(1.25+ SOT ∗ZB)

(2)

Where: BR

ZB

BR_Raw = Raw Bridge reading from ADC

= Corrected Bridge reading that is fed as digital or analog output on Sig™ pin

= Intermediate result in the calculations

T_Raw

Gain_B

= Raw Temperature reading converted from PTAT signal

= Bridge gain term

Offset_B = Bridge offset term

Tcg

= Temperature coefficient gain

= Temperature coefficient offset

= (T_Raw - T_SETL

Tco

ΔT

)

T_Raw

T_SETL

SOT

= Raw Temperature reading converted from PTAT signal

= T_Raw reading at which low calibration was performed (typically 25°C)

= Second Order Term

Note:

See section 3.6.2.7 for limitations when SOT applies to the bridge reading.

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ZMD31010

If the SOT applies to correcting the 2^ndorder behavior of Tco, then the formula for bridge correction is as follows:

(3)

BR = Gain _ B(1+ ΔT ∗Tcg)∗[BR _ Raw +Offset _ B + ΔT(SOT ∗ΔT +Tco)]

Note: See section 3.6.2.7 for limitations when SOT applies to Tco.

If the SOT applies to correcting the 2^ndorder behavior of Tcg, then the formula for bridge correction is as follows:

(4)

BR = Gain _ B[1+ ΔT(SOT ∗ΔT +Tcg)]∗[BR _ Raw +Offset _ B + ΔT ∗Tco]

The bandgap reference gives a very linear PTAT signal, so temperature correction can always simply be

accomplished with a linear gain and offset term.

Corrected Temp Reading:

(5)

T = Gain _T(T _ Raw +Offset _T)

Where: T_Raw

Offset_T = Temperature sensor offset coefficient

Gain_T = Temperature gain coefficient

= Raw Temperature reading converted from PTAT signal

2.3.1. EEPROM

The EEPROM contains the calibration coefficients for gain and offset, etc., and the configuration bits, such as

output mode, update rate, etc. When programming the EEPROM, an internal charge-pump voltage is used, so a

high voltage supply is not needed. The EEPROM is implemented as a shift register. During an EEPROM read,

the contents are shifted 8 bits before each transmission of one byte occurs.

The charge-pump is internally regulated to 12.5 V, and the programming time is typically 6 ms.

Note:

EEPROM writing can only be performed at temperatures lower than 85°C.

2.3.2. One-Wire Interface - ZACwire™

The IC communicates via a One-Wire Serial Interface (OWI, ZACwire™). There are different commands

available for the following:

• Reading the conversion result of the ADC (Get_BR_Raw, Get_T_Raw)

• Calibration commands

• Reading from the EEPROM (dump of entire contents)

• Writing to the EEPROM (trim setting, configuration, and coefficients)

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ZMD31010

2.4.

Output Stage

2.4.1. Digital to Analog Converter (Output DAC)

An 11-bit DAC, based on sub-ranging resistor strings, is used for the digital-to-analog output conversion in the

analog ratiometric and absolute analog voltage modes. Selection during calibration configures the system to

operate in either of these modes. The design allows for excellent testability as well as low power consumption.

Figure 2.2 shows the data timing of the DAC output with the 1 kHz update rate setting.

Figure 2.2 DAC Output Timing for Highest Update Rate

Settling Time

AD Conversion

Calculation

Settling Time

AD Conversion

Calculation

64 μs

768 μs

160 μs

64 μs

768 μs

160 μs

DAC output

occurs here

DAC output

next update

2.4.2. Output Buffer

A rail-to-rail operational amplifier (OpAmp) configured as a unity gain buffer can drive resistive loads (whether

pull-up or pull-down) as low as 2.5 kΩ and capacitances up to 15 nF. To limit the error due to amplifier offset

voltage, an error compensation circuit is included which tracks and reduces the offset voltage to < 1 mV.

2.4.3. Voltage Reference Block

A linear regulator control circuit is included in the Voltage Reference Block to interface with an external JFET

to allow operation in systems where the supply voltage exceeds 5.5 V. This circuit can also be used for over-

voltage protection. The regulator set point has a coarse adjustment via an EEPROM bit (see section 2.3.1),

which can adjust the set point around 5.0 V or 5.5 V. In addition, the 1 V trim setting (see below) can also act

as a fine adjustment for the regulation set point.

Note:

If using the external JFET for over-voltage protection purposes (i.e., 5 V at JFET drain and expecting

5 V at JFET source), there will be a voltage drop across the JFET; therefore ratiometricity will be

compromised somewhat depending on the rds(on) of the chosen JFET. A Vishay J107 is the best

choice, because it has only an 8 mV drop worst case. If using as regulation instead of over-voltage, an

MMBF4392 also works well.

The Voltage Reference Block uses the absolute reference voltage provided by the Bandgap to produce two

regulated on-chip voltage references. A 1 V reference is used for the output DAC high reference, when the part

is configured for 0 to 1 V analog output. For this reason, the 1 V reference must be very accurate and includes

trim, such that its value can be trimmed within +/-3 mV of 1.0 V. The 1 V reference is also used as the on-chip

reference for the JFET regulator block, so the regulation set point of the JFET regulator can be fine-tuned, using

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RBic_Lite^TMLow-Cost Sensor Signal Conditioner

ZMD31010

the 1 V trim. The 5 V reference can be trimmed within +/-15 mV. Table 2.1 shows the order of trim codes with

0111_Bfor the lowest reference voltage, and 1000_Bfor the highest reference voltage.

Table 2.1 Order of Trim Codes

Order

1Vref/

5Vref__trim3

5Vref_trim2

5Vref_trim1

5Vref_trim0

Highest Reference Voltage

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

...

Lowest Reference Voltage

2.5.

Clock Generator / Power-On Reset (CLKPOR)

If the power supply exceeds 2.5 V (maximum), the reset signal de-asserts, and the clock generator starts oper-

ating at a frequency of approximately 512 kHz (+17% / -22%). The exact value only influences the conversion

cycle time and the communication to the outside world, but not the accuracy of signal processing. In addition, to

minimize the oscillator error as the V_DDvoltage changes, an on-chip regulator is used to supply the oscillator

block.

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RBic_Lite^TMLow-Cost Sensor Signal Conditioner

ZMD31010

2.5.1. Trimming the Oscillator

Trimming is performed at wafer level, and it is strongly recommended that this is not to be changed during

calibration, because ZACwire™ communication is no longer guaranteed at different oscillator frequencies.

Table 2.2 Oscillator Trimming

Trimming Bits

Delta Frequency (kHz)

100

101

110

111

000

001

010

011

+385

+235

+140

+65

Nominal

-40

-76

-110

Example: Programming 011_B→ the trimmed frequency = nominal value - 110 kHz.

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ZMD31010

3

Functional Description

3.1.

General Working Mode

The command/data transfer takes place via the one-wire Sig™ pin, using the ZACwire™ serial communication

protocol. After power-on, the IC waits for 6 ms (i.e., the command window) for the Start_CM command. Without

this command, the Normal Operation Mode (NOM) starts. In this mode, raw bridge values are converted, and the

corrected values are presented on the output in analog or digital format (depending on the configuration stored

in EEPROM).

Command Mode (CM) can only be entered during the 6 ms command window after power-on. If the IC receives

the Start_CM command during the command window, it remains in the Command Mode. The CM allows

changing to one of the other modes via command. After command Start_RM, the IC is in the Raw Mode (RM).

Without correction, the raw values are transmitted to the digital output in a predefined order. The RM can only be

stopped by power-off. Raw Mode is used by the calibration software for collection of raw bridge and temperature

data, so the correction coefficients can be calculated.

Figure 3.1 General Working Mode

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RBic_Lite^TMLow-Cost Sensor Signal Conditioner

ZMD31010

3.2.

ZACwire™ Communication Interface

3.2.1. Properties and Parameters

Table 3.1 Pin Configuration and Latch-Up Conditions

No.

Parameter

Symbol Min

Typ

Max

Unit

Comments

1

Pull-up resistor (on-chip)

R_ZAC,pu

30

kꢀ

On-chip pull-up resistor switched on

during Digital Output Mode and during

CM Mode (first 6 ms after power up)

2

Pull-up resistor (external)

R_{ZAC,pu_ext}150

ꢀ

If the master communicates via a push-

pull stage, no pull-up resistor is needed;

otherwise, a pull-up resistor with a value

of at least 150 ꢀ must be connected.

3

ZACwire™ rise time

T_ZAC,rise

R_ZAC,line

5

µs

Any user RC network included in Sig™

path must meet this rise time

4

5

6

ZACwire™ line resistance

3.9 ¹⁾

15 ¹⁾

0.2

kꢀ

Also see Table 1.7

ZACwire™ load capacitance C_ZAC,load

0

1

0

1

nF

Voltage low level

Voltage high level

V_ZAC,low

V_ZAC,high

V_DDRail-to-rail CMOS driver

7

0.8

1)

The rise time must be T_ZAC,rise= 2 ∗ R_ZAC,line∗ C_ZACload≤ 5 μs . If using a pull-up resistor instead of a line resistor, it must meet this

specification.

3.2.2. Bit Encoding

Figure 3.2 Manchester Duty Cycle

Bit Window

125µsec @ 8kHz baud

31.3µsec @ 32kHz baud

Start bit = 50% duty cycle used to set up strobe time

Logic 1 = 75% duty cycle

Start Bit

Logic 1

Logic 0

Logic 0 = 25% duty cycle

Stop Bit = high signal level for half a bit width

Stop ½ Bit

(High)

There is a half stop bit time between bytes in a packet.

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Data Sheet

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ZMD31010

3.2.3. Write Operation from Master to RBic_Lite

™

The calibration master sends a 19-bit packet frame to the IC.

Figure 3.3 19-Bit Write Frame

The incoming serial signal will be sampled at a 512 kHz clock rate. This protocol is very tolerant to clock skew,

and can easily tolerate baud rates in the 6 kHz to 48 kHz range.

3.2.4. RBIC_Lite™ Read Operations

The incoming frame will be checked for proper parity on both, command and data bytes, as well as for any edge

time-outs prior to a full frame being received.

Once a command/data pair is received, the RBic_Lite™ will perform that command. After the command has been

successfully executed by the IC, the IC will acknowledge success by a transmission of an A5_H-byte back to the

master. If the master does not receive an A5_Htransmission within 130 ms of issuing the command, it must

assume the command was either improperly received or could not be executed.

Figure 3.4 Read Acknowledge

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ZMD31010

The RBic_Lite™ transmits 10-bit bytes (1 start bit, 8 data bits, 1 parity bit). During calibration and configuration,

transmissions are normally either A5_Hor data. A5_Hindicates successful completion of a command. There are

two different digital output modes configurable (digital output with temperature, and digital output with only bridge

data). During Normal Operation Mode, if the part is configured for digital output of the bridge reading, it first

transmits the high byte of bridge data, followed by the low byte. The bridge data is 14 bits in resolution, so the

upper two bits of the high byte are always zero-padded. There is a half stop bit time between bytes in a packet.

That means, for the time of a half a bit width, the signal level is high.

Figure 3.5 Digital Output (NOM) Bridge Readings

2 DATA Byte Packet

(Digital Bridge Output)

S

P

2

Start Bit

½

Stop

S 0 0 5 4 3 2 1 0 P

S 7 6 5 4 3 2 1 0 P

Parity Bit of Data Byte

Data Bit (example: Bit 2)

½ Stop Bit

Data Byte

Bridge High

Bridge Low

½

Stop

The second digital output mode is digital output bridge reading with temperature. It will be transmitted as a

3-data-byte packet. The temperature byte represents an 8-bit temperature quantity, spanning from -50 to 150°C.

Figure 3.6 Digital Output (NOM) Bridge Readings with Temperature

3 DATA Byte Packet

(Digital Bridge Output with Temperature)

½

Stop

½

Stop

S 0 0 5 4 3 2 1 0 P

S 7 6 5 4 3 2 1 0 P

Data Byte

Bridge High

Bridge Low

Temperature

The EEPROM transmission occurs in a packet with 14 data bytes, as shown below.

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ZMD31010

Figure 3.7 Read EEPROM Contents

14 DATA Byte Packet

(Read EEPROM)

½

Stop

½

Stop

½

Stop

...

S 7 6 5 4 3 2 1 0 P

S 7 6 5 4 3

5 4 3 2 1 0 P

S 7 6 5 4 3 2 1 0 P

S 1 0 1 0 0 1 0 1 P

EEPROM

Byte 1

EEPROM

Byte 2

EEPROM

Byte 12

EEPROM

Byte 13

Data Byte A5_H

There is a variable idle time between packets, which varies with the update rate setting in the EEPROM.

Figure 3.8 Transmission of a Number of Data Packets

Packet Transmission

(this example shows 2 DATA packets)

IDLE

Time

½

Stp

IDLE

Time

½

Stp

IDLE

Time

2 1 0 P

S 0 0 5 4 3 2 1 0 P

S 7 6 5 4 3 2 1 0 P

S 0 0 5 4 3 2 1 0 P

S 7 6 5 4 3 2 1 0 P

S 0 0 5 4

The table below shows the idle time between packets versus the update rate. This idle time can vary by nominal

+/-15% between parts, and over a temperature range of -50 to 150ºC.

Transmissions from the IC occur at one of two speeds depending on the update rate programmed in EEPROM.

If the user chooses one of the two fastest update rates (1 ms or 5 ms) then the baud rate of the digital transmis-

sion will be 32 kHz. If, however, the user chooses one of the two slower update rates (25 ms or 125 ms), then

the baud rate of the digital transmission will be 8 kHz.

The total transmission time for both digital output configurations is shown in the following table.

Table 3.2 Total Transmission Time for Different Update Rate Settings and Output Configuration

Transmission Time –

Bridge Only Readings

Transmission Time –

Bridge & Temperature Readings

Update Rate Baud Rate

Idle Time

1 ms (1 kHz)

5 ms (200 Hz)

25 ms (40 Hz)

125 ms (8 Hz)

32 kHz

8 kHz

1.0 ms

4.85 ms

22.5 ms

118.0 ms

20.5 bits

31.30 µs

1.64 ms

5.49 ms

31.0 bits

31.30 µs

1.97 ms

5.82 ms

20.5 bits 125.00 µs 25.06 ms

31.0 bits 125.00 µs 26.38 ms

8 kHz

20.5 bits 125.00 µs 120.56 ms 31.0 bits 125.00 µs 121.88 ms

It is easy to program any standard microcontroller to communicate with the RBic_Lite™. ZMD can provide sample

code for a MicroChip PIC microcontroller.

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For update rates less than 1 kHz, the output is followed by a power-down, as shown below.

Figure 3.9 ZACwire™ Output Timing for Lower Update Rates

3.2.5. High Level Protocol

The RBic_Lite™ will listen for a command/data pair to be transmitted for the 6 ms after the de-assertion of its

internal Power-On Reset (POR). If a transmission is not received within this time frame, then it will transition to

Normal Operation Mode (NOM). In NOM, it will output bridge data in 0 to 1 V analog, rail-to-rail ratiometric

analog output, or digital output, depending on how the part is currently configured.

If the RBic_Lite™ receives a Start CM command within the first 6 ms after the de-assertion of POR, then it will go

into Command Mode (CM). In this mode, calibration/configuration commands will be executed. The RBic_Lite

™

will acknowledge successful execution of commands by transmission of an A5_H. The calibrating/ configuring

master will know that a command was not successfully executed if no response is received after 130 ms of

issuing the command. Once in command interpreting/executing mode, the RBic_Lite™ will stay in this mode until

power is removed, or a Start NOM (Start Normal Operation Mode) command is received. The Start CM

command is used as an interlock mechanism, to prevent a spurious entry into command mode on power-up. The

first command received within the 6 ms window of POR must be a Start CM command to enter into command

interpreting mode. Any other commands will be ignored.

3.3.

Command/Data Bytes Encoding

The 16-bit command/data stream sent to the RBic_Lite™ can be broken into 2 bytes, shown in Table 3.3. The most

significant byte encodes the command byte. The least significant byte represents the data byte.

Table 3.3 Command/Data Bytes Encoding

Command

Byte

Data

Byte

Description

00_H

20_H

XX_H

5X_H

Read EEPROM command via Sig™ pin; for more details, refer to section 3.7.

Enter Test Mode (subset of Command Mode for test purposes only): Sig™ pin will assume the

value of different internal test points depending on the most significant nibble of data sent.

DAC Ramp Test Mode. Gain_B[13:3] contains the starting point, and the increment is

(Offset_B/8). The increment will be added every 125 µsec.

30_H

dd_H

Trim/Configure: higher nibble of data byte determines what is trimmed/configured. Lower

nibble is data to be programmed. See Table 3.4 for configuration details of data byte dd_H.

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ZMD31010

Command

Byte

Data

Byte

Description

00_H

10_H

Start NOM => Ends Command Mode, transition to Normal Operation Mode

Start Raw Mode (RM)

In this mode, if Gain_B = 800_Hand Gain_T = 80_H, then the digital output will simply be the raw

values of the ADC for the Bridge reading and the PTAT conversion.

40H

50_H

60_H

70_H

80_H

90_H

A0_H

B0_H

C0_H

D0_H

E0_H

F0_H

XX_H

dd_H

Start_CM => Start the Command Mode; used to enter command interpret mode

Program SOT (2^ndorder term)

Program T_SETL

Program Gain_B, upper 7 bits (set MSB of dd_Hto 0_B)

Program Gain_B, lower 8 bits

Program Offset_B, upper 6 bits (set the two MSBs of dd_Hto 00_B)

Program Offset_B, lower 8 bits

Program Gain_T

Program Offset_T

Program Tco

Program Tcg

Table 3.4 Programming Details for Command 30_H

3^rdNibble 4^thNibble Description

0_H

1_H

2_H

3_H

4_H

5_H

6_H

7_H

Xbbb_B

bbbb_B

XXbb_B

bbbb_B

Trim oscillator; only least significant 3 bits of data used (Xbbb_B).

Trim 1 V reference; least significant 4 bits of data used (bbbb_B).

Offset Mode; only least significant 2 bits of data used (XXbb_B).

Set output mode; only least significant 2 bits of data used (XXbb_B).

Set update rate; only least significant 2 bits of data used (XXbb_B).

Configure JFET regulation

Program the Tc_cfg register.

Program bits [99:96] of EEPROM. (SOT_cfg, Pamp_Gain)

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Data Sheet

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ZMD31010

3.4.

Calibration Sequence

Although the RBic_Lite™ can function with many different types of resistive bridges, assume it is connected to a

pressure bridge for the following calibration example.

In this case, calibration essentially involves collecting raw bridge and temperature data from the RBic_Lite™ for

different known pressures and temperatures. This raw data can then be processed by the calibration master (the

PC), and the calculated coefficients can then be written to the EEPROM of the RBic_Lite™.

ZMD can provide software and hardware with samples to perform the calibration.

There are three main steps to calibration:

• Assigning a unique identification to the IC. This identification is programmed into the EEPROM and can be

used as an index into the database stored on the calibration PC. This database will contain all the raw

values of bridge readings and temperature reading for that part, as well as the known pressure and

temperature the bridge was exposed to. This unique identification can be stored in a combination of the

following EEPROM registers: T_SETL, Tcg, Tco. These registers will be overwritten at the end of the

calibration process, so this unique identification is not a permanent serial number.

• Data collection. Data collection involves getting raw data from the bridge at different known pressures and

temperatures. This data is then stored on the calibration PC using the unique identification of the IC as the

index to the database.

• Coefficient calculation and write. Once enough data points have been collected to calculate all the desired

coefficients, then the coefficients can be calculated by the calibrating PC and written to the IC.

Step 1: Assigning Unique Identification

Assigning a unique identification number is as simple as using the commands Program TSETL, Program Tcg,

and Program Tco. These three 8-bit registers will allow for 16M unique devices. In addition, Gain_B must be

programmed to 800_H(unity), and Gain_T must be programmed to 80_H(unity).

Step 2: Data Collection

The number of different unique (pressure, temperature) points that calibration needs to be performed at depends

on the customer’s needs. The minimum is a 2-point calibration, and the maximum is a 5-point calibration. To

acquire raw data from the part, instruct the RBic_Lite™ to enter Raw Mode. This is done by issuing a Start_CM

(Start Command Mode, 5000_H) command to the IC, followed by a Start_RM (Start Raw Mode, 4010_H) command

with the LSB of the upper data nibble set. Now, if the Gain_B term was set to unity (800_H) and the Gain_T term

was also set to unity (80_H), then the part will be in Raw Mode and will be outputting raw data on its Sig™ pin,

instead of corrected bridge and temperature values. The calibration system should now collect several of these

data points (16 each of bridge and temperature is recommended) and average them. These raw bridge and

temperature measurements should be stored in the database, along with the known pressure and temperature.

The output format during Raw Mode is Bridge_High, Bridge_Low, Temp, each of these being 8-bit quantities.

The upper 2 bits of Bridge_High are zero-filled. The Temp data (8-bit only) would not really be enough data for

accurate temperature calibration. Therefore, the upper 3 bits of temperature information are not given, but rather

assumed known. Thus, effectively 11 bits of temperature information are provided in this mode.

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ZMD31010

Step 3: Coefficient Calculations

The math to perform the coefficient calculation is very complicated and will not be discussed in detail here.

There is a rough overview in section 3.6. Instead ZMD will provide software to perform the coefficient calculation.

ZMD can also provide source code of the algorithms in a C-code format. Once the coefficients are calculated,

the final step is to write them to the EEPROM of the RBic_Lite™.

The number of calibration points required can be as few as two or as many as five. This depends on the

precision desired, and the behavior of the resistive bridge in use.

• 2-point calibration would be used to obtain only a gain and offset term for bridge compensation with no

temperature compensation for either term.

• 3-point calibration would be used to also obtain the Tco term for 1^storder temperature compensation of

the bridge offset term.

• 3-point calibration could also be used to obtain the additional term SOT for 2^ndorder correction for the

bridge (SOT_BR), but no temperature compensation of the bridge output; see section 3.6.2.7 for

limitations.

• 4-point calibration would be used to also obtain both, the Tco term and the Tcg term, which provides

1^storder temperature compensation of the bridge offset gain term.

• 4-point calibration could also be used to obtain the Tco term and the SOT_BR term; see section 3.6.2.7

for limitations.

• 5-point calibration would be used to obtain Tco, Tcg, and an SOT term that provides 2^ndorder correction

applied to one and only one of the following: 2^ndorder Tco (SOT_Tco), 2^ndorder Tcg (SOT_Tcg), or

2

^ndorder bridge (SOT_BR); see section 3.6.2.7 for limitations.

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Data Sheet

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3.5.

EEPROM Bits

Table 3.5 shows the bit order in the EEPROM, which are programmed through the serial interface. See Table

5.1 for the ZMD31010 default settings.

Table 3.5 ZMD31010 EEPROM Bits

EEPROM

Range

Description

Notes

2:0

Osc_Trim

See the table in section 2.5.1 for complete data.

100 => Fastest

101 => 3 clicks faster than nominal

110 => 2 clicks faster than nominal

111 => 1 click faster than nominal

000 => Nominal

001 => 1 click slower than nominal

010 => 2 clicks slower than nominal

011 => Slowest

6:3

8:7

1V_Trim/JFET_Trim See the table in section 2.4.3.

A2D_Offset

Offset selection:

11 => [-1/2,1/2] mode bridge inputs

10 => [-1/4,3/4] mode bridge inputs

01 => [-1/8,7/8] mode bridge inputs

00 => [-1/16,15/16] mode bridge inputs

To change the bridge signal polarity, set Tc_cfg[3](=Bit 87).

10:9

Output_Select

00 => Digital (3-bytes with parity):

Bridge High {00,[5:0]}

Bridge Low [7:0]

Temp [7:0]

01 => 0-1 V Analog

10 => Rail-to-rail ratiometric analog output

11 => Digital (2-bytes with parity) (No Temp)

Bridge High {00,[5:0]}

Bridge Low [7:0]

12:11

Update_Rate

00 => 1 msec (1 kHz)

01 => 5 msec (200 Hz)

10 => 25 msec (40 Hz)

11 => 125 msec (8 Hz)

Datasheet

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February 9, 2009

Data Sheet

RBic_Lite^TMLow-Cost Sensor Signal Conditioner

ZMD31010

EEPROM

Description

Range

Notes

14:13

JFET_Cfg

00 => No JFET regulation (lower power)

01 => No JFET regulation (lower power)

10 => JFET regulation centered around 5.0 V

11 => JFET regulation centered around 5.5 V (i.e. over-voltage

protection).

29:15

Gain_B

Bridge Gain:

Gain_B[14] => multiply x 8

Gain_B[13:0] => 14-bit unsigned number representing a number

in the range [0,8)

43:30

51:44

59:52

67:60

Offset_B

Gain_T

Offset_T

T_SETL

Signed 14-bit offset for bridge correction

Temperature gain coefficient used to correct PTAT reading.

Temperature offset coefficient used to correct PTAT reading.

Stores Raw PTAT reading at temperature in which low calibration

points were taken.

75:68

83:76

87:84

Tcg

Coefficient for temperature correction of bridge gain term.

Tcg = 8-bit magnitude of Tcg term.

Sign is determined by Tc_cfg (bits 87:84).

Tco

Coefficient for temperature correction of bridge offset term.

Tco = 8-bit magnitude of Tco term.

Sign and scaling are determined by Tc_cfg (bits 87:84).

Tc_cfg

This 4-bit term determines options for temperature compensation

of the bridge:

Tc_cfg[3] => If set, bridge signal polarity flips.

Tc_cfg[2] => If set, Tcg is negative.

Tc_cfg[1] => Scale magnitude of Tco term by 8, and if SOT

applies to Tco, scale SOT by 8.

Tc_cfg[0] => If set, Tco is negative.

95:88

SOT

2^ndOrder Term. This term is a 7-bit magnitude with sign.

SOT[7] = 1 Î negative

SOT[7] = 0 Î positive

SOT[6:0] = magnitude [0-127]

This term can apply to a 2^ndorder Tcg, Tco or bridge correction^‡.

(See Tc_cfg above.)

^‡The SOT range for the bridge correction is limited for the negative value to 0xC0 by the MathLib.DLL.

Datasheet

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February 9, 2009

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changes without notice.

Data Sheet

RBic_Lite^TMLow-Cost Sensor Signal Conditioner

ZMD31010

EEPROM

Description

Range

Notes

99:96

{SOT_cfg,

Pamp_Gain}

Bits [99:98] = SOT_cfg (For more details, see section 3.6.1.)

00 = SOT applies to Bridge

01 = SOT applies to Tcg

10 = SOT applies to Tco

11 = Prohibited

Bits [97:96] = PreAmp Gain

00 => 6

01 => 24 (default setting)

10 => 12

11 => 48

(Only the default gain setting (24) is tested at the factory;

all other gain settings are not guaranteed.)

3.6.

Calibration Math

3.6.1. Correction Coefficients

All terms are calculated external to the IC and then programmed to the EEPROM through the serial interface.

Table 3.6 Correction Coefficients

Coefficient

Gain_B

Offset_B

Gain_T

Offset_T

SOT

Description

Gain term used to compensate span of Bridge reading

Offset term used to compensate offset of Bridge reading

Gain term used to compensate span of Temp reading

Offset term used to compensate offset of Temp reading

Second Order Term. The SOT can be applied as a second order correction term for the following:

-

Bridge measurement

Temperature coefficient of offset (Tco)

Temperature coefficient of gain (Tcg)

The EEPROM bits 99:98 determine what SOT applies to.

Note: There are limitations for the SOT for the bridge measurement and for the SOT for the Tco,

which are explained in section 3.6.2.7.

T_SETL

Tcg

RAW PTAT reading at low temperature, at which calibration was performed (typically room

temperature)

Temperature correction coefficient of bridge gain term (this term has an 8-bit magnitude and a sign bit

(Tc_cfg[2]).

Tco

Temperature correction coefficient of bridge offset term (this term has an 8-bit magnitude, a sign bit

(Tc_cfg[0]), and a scaling bit (Tc_cfg[1]), which can multiply its magnitude by 8).

Datasheet

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February 9, 2009

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Data Sheet

RBic_Lite^TMLow-Cost Sensor Signal Conditioner

ZMD31010

3.6.2. Interpretation of Binary Numbers for Correction Coefficients

BR_Raw should be interpreted as an unsigned number in the set [0, 16383] with a resolution of 1.

T_Raw should be interpreted as an unsigned number in the set [0, 16383], with a resolution of 4.

3.6.2.1. Gain_B Interpretation

Gain_B should be interpreted as a number in the set [0, 64]. The MSB (bit 14) is a scaling bit that will multiply

the effect of the remaining bits Gain_B[13:0] by 8. Bits Gain_B[13:0] represent a number in the range of [0, 8],

with Gain_B[13] having a weighting of 4, and each subsequent bit has a weighting of ½ the previous bit.

Table 3.7 Gain_B[13:0] Weightings

Bit Position

Weighting

2²= 4

2¹= 2

2⁰= 1

2^-1

13

12

11

10

...

3

...

2^-8

2

2^-9

1

2^-10

0

2^-11

Examples:

The binary number: 010010100110001_B= 4.6489; Gain_B[14] is 0_B, so the number represented by

Gain_B[13:0] is not multiplied by 8.

The binary number: 101100010010110_B= 24.586; Gain_B[14] is 1_B, so the number represented by

Gain_B[13:0] is multiplied by 8.

Limitation: Using the 5-point calibration 5pt-Tcg&Tco&SOT_Tco (including the second order SOT_Tco), the

Gain_B is limited to a value equal or less than 8 (instead of 64).

Datasheet

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changes without notice.

Data Sheet

RBic_Lite^TMLow-Cost Sensor Signal Conditioner

ZMD31010

3.6.2.2. Offset_B Interpretation

Offset_B is a 14-bit signed binary number in two’s complement form. The MSB has a weighting of -8192. The

following bits then have a weighting of 4096, 2048, 1024, …

Table 3.8 Offset_B Weightings

Bit Position

Weighting

-8192

2¹²= 4096

2¹¹= 2048

2¹⁰= 1024

...

13

12

11

10

...

3

2³= 8

2

2²= 4

1

2¹= 2

0

2⁰= 1

For example, the binary number 11111111111100_B= -4

3.6.2.3. Gain_T Interpretation

Gain_T should be interpreted as a number in the set [0,2]. Gain_T[7] has a weighting of 1, and each subsequent

bit has a weighting of ½ the previous bit.

Table 3.9 Gain_T Weightings

Bit Position

Weighting

7

6

5

4

3

2

1

0

2⁰= 1

2^-1

2^-2

2^-3

2^-4

2^-5

2^-6

2^-7

Datasheet

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32 of 43

Data Sheet

RBic_Lite^TMLow-Cost Sensor Signal Conditioner

ZMD31010

3.6.2.4. Offset_T Interpretation

Offset_T is an 8-bit signed binary number in two’s complement form. The MSB has a weighting of -128. The

following bits then have a weighting of 64, 32, 16 …

Table 3.10 Offset_T Weightings

Bit Position

Weighting

-128

2⁶= 64

2⁵= 32

2⁴= 16

2³= 8

2²= 4

2¹= 2

2⁰= 1

7

6

5

4

3

2

1

0

For example, the binary number 00101001_B= 41.

3.6.2.5. Tco Interpretation

Tco is specified as an 8-bit magnitude with an additional sign bit (Tc_cfg[0]), and a scalar bit (Tc_cfg[1]). When

the scalar bit is set, the signed Tco is multiplied by 8.

• Tco Resolution: 0.175 μV/V/^oC

• Tco Range:

(input referred)

± 44.6 μV/V/^oC

If the scaling bit is used, then the above resolution and range are scaled by 8 to give the following results:

• Tco Scaled Resolution: 1.40 μV/V/^oC (input referred)

• Tco Scaled Range:

± 357 μV/V/^oC (input referred)

3.6.2.6. Tcg Interpretation

Tcg is specified as an 8-bit magnitude with an additional sign bit (Tc_cfg[2]).

• Tcg Resolution: 17.0 ppm/^oC

• Tcg Range:

±4335 ppm/^oC

Datasheet

February 9, 2009

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33 of 43

Data Sheet

RBic_Lite^TMLow-Cost Sensor Signal Conditioner

ZMD31010

3.6.2.7. SOT Interpretation

SOT is a 2^ndorder term that can apply to one and only one of the following: bridge non-linearity correction, Tco

non-linearity correction, or Tcg non-linearity correction.

As it applies to bridge non-linearity correction:

• Resolution:

0.25% @ Full Scale

2

^ndorder correction SOT_BR is possible up to +5%/-6.2% full scale difference from the ideal fit (straight line),

because the SOT coefficient values are limited to the range of (0xC0 = -0.25_dec) to (0x7F = 0.4960938_dec).

(Saturation in internal arithmetic will occur at greater negative non-linearities.)

Limitation: Using any calibration method for which SOT is applied to the bridge measurement (SOT_BR), there

is a possibility of calibration math overflow. This only occurs if the sensor input exceeds 200% of the calibrated

full span, which means the highest applied sensor input should never go higher than this value.

Example: This example of the limitation when SOT is applied to the bridge reading uses a pressure sensor

bridge that outputs -10 mV at the lowest pressure of interest. That point is calibrated to read 0%. The same

sensor outputs +40 mV at the highest pressure of interest. That point is calibrated to read 100%. This sensor

has a 50 mV span over the pressure range of interest. If the sensor were to experience an over-pressure event

that took the sensor output up to 90 mV (200% of span), the internal calculations could overflow. The result

would be a corrected bridge reading that would not be saturated at 100% as expected, but instead read a value

lower than 100%. This problem only occurs when SOT is applied to correct the bridge reading.

As SOT applies to Tcg:

• Resolution: 0.3 ppm/(^oC)²

• Range:

±38 ppm/(^oC)²

As it applies to Tco:

Two settings are possible. It is possible to scale the effect of SOT by 8. If Tc_cfg[1] is set, then both, Tco and

SOT’s contribution to Tco, are multiplied by 8.

• Resolution at unity scaling: 1.51 nV/V/(^oC)²

• Range:

• Resolution at 8x scaling:

• Range:

(input referred)

±0.192 μV/V/(^oC)²

12.1 nV/V/(^oC)²

±1.54 μV/V/(^oC)²

Limitation: If the second order term SOT applies to Tco, the bridge gain Gain_B is limited to values equal or

less than 8 (instead of 64).

Datasheet

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February 9, 2009

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Data Sheet

RBic_Lite^TMLow-Cost Sensor Signal Conditioner

ZMD31010

3.7.

Reading EEPROM Contents

The contents of the entire EEPROM memory can be read out using the Read EEPROM command (00_H). This

command causes the IC to output consecutive bytes on the ZACwire™. After each transmission, the EEPROM

contents are shifted by 8 bits. The bit order of these bytes is given in Table 3.11.

Table 3.11 EEPROM Read Order

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

Byte 1

Byte 2

Byte 3

Byte 4

Byte 5

Byte 6

Byte 7

Byte 8

Byte 9

Byte 10

Byte 11

Byte 12

Byte 13

Byte 14

Offset_B[7:0]

Gain_T[1:0]

Offset_B[13:8]

Offset_T[1:0]

T_SETL[1:0]

Tcg[1:0]

Gain_T[7:2]

Offset_T[7:2]

T_SETL[7:2]

Tcg[7:2]

Tco[1:0]

Tc_cfg[1:0]

Tco[7:2]

SOT[5:0]

Tc_cfg[3:2]

Osc_Trim[1:0]

SOT_cfg[3:0] *

SOT[7:6]

Output_

Select[0]

A2D_Offset[1:0]

1V_Trim[3:0] **

Osc_Trim[2]

Output_

Select[1]

Gain_B[2:0]

JFET_Cfg[1:0]

Update_Rate[1:0]

Gain_B[10:3]

Offset_B[3:0] ***

Gain_B[14:11]

A5_H

* SOT_cfg/Pamp_Gain

** 1V_Trim/JFET_Trim

*** Duplicates first 4 bits of Byte 1

Datasheet

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February 9, 2009

Data Sheet

RBic_Lite^TMLow-Cost Sensor Signal Conditioner

ZMD31010

4

Application Circuit Examples

Note: The typical output analog load resistor R_L= 10 kΩ (minimum 2.5 kΩ). This optional load resistor can be

configured as a pull-up or pull-down. If it is configured as a pull-down, it cannot be part of the module to be

calibrated because this would prevent proper operation of the ZACwire™. If a pull-down load is desired, it must

be added to the system after module calibration.

There is no output load capacitance needed.

EEPROM contents: OUTPUT_select, JFET_Cfg, 1V_Trim/JFET-Trim

4.1.

Three-Wire Rail-to-Rail Ratiometric Output

This example shows an application circuit for rail-to-rail ratiometric voltage output configuration with temperature

compensation via internal PTAT.

Figure 4.1 Rail-to-Rail Ratiometric Voltage Output

The optional bridge sink allows power savings switching off the bridge current. The output voltage can be one of

the following options:

• Rail-to-rail ratiometric analog output V_DD(= V_supply).

• 0 to 1 V analog output. The absolute voltage output reference is trimmable 1 V (±2 mV) in the 1 V output

mode via a 4-bit EEPROM field (see section 2.4.3).

Datasheet

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Data Sheet

RBic_Lite^TMLow-Cost Sensor Signal Conditioner

ZMD31010

4.2.

Absolute Analog Voltage Output

The figure below shows an application circuit for an absolute voltage output configuration with temperature

compensation via internal temperature PTAT, and external JFET regulation for all industry standard applications.

The gate-source cutoff voltage (V_GS) of the selected JFET must be ≤ -2 V.

Figure 4.2 Absolute Analog Voltage Output

The output signal range can be one of the following options:

• 0 to 1 V analog output. The absolute voltage output reference is trimmable: 1 V (+/-2 mV) in the 1 V output

mode via a 4-bit EEPROM field (see section 2.4.3).

• Rail-to-rail analog output. The on-chip reference for the JFET regulator block is trimmable: 5 V (±~10 mV)

in the ratiometric output mode via a 4-bit EEPROM field (see section 2.4.3).

Datasheet

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Data Sheet

RBic_Lite^TMLow-Cost Sensor Signal Conditioner

ZMD31010

4.3.

Three-Wire Ratiometric Output with Over-Voltage Protection

The figure below shows an application circuit for a ratiometric output configuration with temperature

compensation via an internal diode.

Figure 4.3 Ratiometric Output, Temperature Compensation via Internal Diode

J107 Vishay

V_supply

S

D

+4.5 to +5.5 V

1

2

3

4

8

7

6

5

Bsink

VBP

N/C

VSS

SIG^TM

VDD

OUT

VBN

Vgate

Optional Bsink

0.1

F

ZMD31010

Ground

In this application, the JFET is used for over-voltage protection. JFET_Cfg bits [14:13] in EEPROM are con-

figured to 5.5 V. There is an additional maximum error of 8 mV caused by the non-zero r_ONof the limiter JFET.

4.4.

Digital Output

For all three circuits, the output signal can also be digital. Depending on the output select bits, the bridge signal,

or the bridge signal and temperature signal are sent.

For the digital output, no load resistor or load capacity are necessary. No pull-down resistor is allowed. If a line

resistor or pull-up resistor is used, the requirement for the rise time must be met (≤ 5 µs). The IC output includes

a pull-up resistor of about 30 kꢀ. The digital output can easily be read by firmware from a microcontroller, and

ZMD can provide the customer with software in developing the interface.

Datasheet

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Data Sheet

RBic_Lite^TMLow-Cost Sensor Signal Conditioner

ZMD31010

4.5.

Output Short Protection

The output of the RBic_Lite™ has no short protection. Therefore, a resistor R_SPin series with the output must be

added in the application module. Refer to Table 4.1 to determine the value of R_SP.

To minimize additional error caused by this resistor for the analog output voltage, the load impedance must meet

the following requirement:

R_L>> R_SP

Table 4.1 Resistor Values for Short Protection

Temperature Range (T_AMBMAX

Up to 85°C

)

Resistor R_SPNote

51 ꢀ

Up to125°C

100 ꢀ

240 ꢀ

R_SP= V_DD/I_maxwith I_max= [(170°C - T_AMBMAX)/(163°C/mW)] - V_DD∗ I_DD

Up to 150°C

Datasheet

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Data Sheet

RBic_Lite^TMLow-Cost Sensor Signal Conditioner

ZMD31010

5

Default EEPROM Settings

If needed, the default setting for the ZMD31010 can be reprogrammed as described in section 3.

Table 5.1 Factory Settings for the ZMD31010 EEPROM

Default Values (Hex)

Until Week 9/2006

Default Values (Hex)

Since Week10/2006

EEPROM Range

Name

Osc_Trim

2:0

0xX

0x0

0xX

0x3

6:3

1V_Trim/JFET_Trim

A2D_Offset

Output_Select

Update_Rate

JFET_Cfg

Gain_B

8:7

10:9

0x3

0x2

12:11

14:13

29:15

43:30

51:44

59:52

67:60

0x2

0x1

0x2

0x800

0x0

Offset_B

0x203

0x80

0x0

Gain_T

0x80

0x0

Offset_T

T_SETL

0x0

75:68

83:76

87:84

95:88

99:96

Tcg

0x0

0xE

0x0

0x1

0x0

0x5

Tco

Tc_cfg

SOT

{SOT_cfg,

Pamp_Gain}

Datasheet

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Data Sheet

RBic_Lite^TMLow-Cost Sensor Signal Conditioner

ZMD31010

6

Pin Configuration and Package

The standard package of the RBic_Lite™ is an SOP-8 (3.81 mm / 150 mil body) with a lead-pitch 1.27 mm / 50 mil.

Figure 6.1 RBic_Lite™ Pin-Out Diagram

Table 6.1 RBic_Lite™ Pin Configuration

Pin No.

Name

Bsink

VBP

Description

1

2

3

4

5

6

7

8

Optional ground connection for bridge ground. Used for power savings.

Positive bridge connection

N/C

No connection

VBN

Negative bridge connection

Vgate

VDD

SIG™

VSS

Gate control for external JFET regulation/over-voltage protection

Supply voltage (2.7 - 5.5 V)

ZACwire™ interface (analog out, digital out, calibration interface)

Ground supply

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Data Sheet

RBic_Lite^TMLow-Cost Sensor Signal Conditioner

ZMD31010

7

ESD/Latch-Up-Protection

All pins have an ESD protection of > 4000 V and a latch-up protection of ±100 mA or of +8V/-4 V (to

VSS/VSSA). ESD protection referred to the Human Body Model is tested with devices in SOP-8 packages

during product qualification. The ESD test follows the Human Body Model with 1.5 kꢀ/100 pF based on MIL 883,

Method 3015.7.

8

Test

The test program is based on this datasheet. The final parameters that will be tested during series production

are listed in the tables of section 1. The digital part of the IC includes a scan path, which can be activated and

controlled during wafer test. It guarantees failure coverage of more than 98%. Further test support for testing of

the analog parts on wafer level is included in the DSP.

9

Quality and Reliability

The RBic_Lite™ has successfully passed AEC Q100 automotive qualification testing, which includes reliability

testing for the temperature range from -50 to 150°C.

10

Customization

For high-volume applications which require an upgraded or downgraded functionality compared to the

ZMD31010, ZMD can customize the circuit design by adding or removing certain functional blocks. ZMD can

provide a custom solution quickly because it has a considerable library of sensor-dedicated circuitry blocks.

Please contact ZMD for further information.

11


型号：	ZMD31010BIF-R
厂家：	INTEGRATED DEVICE TECHNOLOGY
描述：	Sensor/Transducer,
文件：	总43页 (文件大小：1120K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

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