IDTVP386GLFT [IDT]
Converter;
| 型号： | IDTVP386GLFT |
| 厂家： | 
INTEGRATED DEVICE TECHNOLOGY |
| 描述： | Converter |
| 文件： | 总12页 (文件大小：112K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
DATASHEET
ADVANCE INFORMATION
8/28-BIT LVDS RECEIVER FOR VIDEO
IDTVP386
General Description
Features
• Wide clock frequency range from 20 MHz to 100 MHz
The VP386 is an ideal LVDS receiver that converts 4-pair
LVDS data streams into parallel 28 bits of CMOS/TTL data
with bandwidth up to 2.8 Gbps throughput or 350 Mbytes
per second.
• Pin compatible with the National DS90CF386, THine
THC63LVDF84, TISN65LVDS94
• Converts 4-pair LVDS data streams into parallel 28 bits of
CMOS/TTL data
This chip is an ideal means to solve EMI and cable size
problems associated with wide, high-speed TTL interfaces
through very low-swing LVDS signals.
• Fully spread spectrum compatible
• LVDS voltage swing of 350 mV for low EMI
• On-chip PLL requires no external components
• Low-power CMOS design
• Falling edge clock triggered outputs
• Power-down control function
• Compatible with TIA/EIA-644 LVDS standards
• Packaged in a 56-pin TSSOP (Pb free available)
Block Diagram
8
RED
RxIN0+
RxIN0-
8
GREEN
8
BLUE
RxIN1+
RxIN1-
RxIN2+
RxIN2-
RxIN3+
RxIN3-
LVDS to TTL
De-serializer
HSYNC
VSYNC
DATA ENABLE
CONTROL
RxCLKIN+
RxCLKIN-
RxCLKOUT
PLL
PWRDWN
VP386
8/28-BIT LVDS RECEIVER FOR VIDEO
1
IDTVP386
7129/3
IDTVP386
8/28-BIT LVDS RECEIVER FOR VIDEO
COMMERCIAL TEMPERATURE RANGE
Pin Assignment
RxOUT22
1
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
VCC
RxOUT23
2
RxOUT21
RxOUT20
RxOUT19
GND
3
RxOUT24
GND
4
5
RxOUT25
RxOUT26
RxOUT27
LVDS_GND
RxIN0-
6
RxOUT18
RxOUT17
RxOUT16
VCC
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
RxIN0+
RxOUT15
RxOUT14
RxOUT13
GND
RxIN1-
RxIN1+
LVDS_VCC
LVDS_GND
RxIN2-
RxOUT12
RxOUT11
RxOUT10
VCC
RxIN2+
RxCLKIN-
RxICLKN+
RxIN3-
RxOUT9
RxOUT8
RxOUT7
GND
RxIN3+
LVDS_GND
RxOUT6
RxOUT5
RxOUT4
RxOUT3
PLL_GND
PLL_VCC
PLL_GND
PWRDWN
RxCLKOUT
RxOUT0
GND
VCC
RxOUT2
RxOUT1
56-pin TSSOP
VP386
8/28-BIT LVDS RECEIVER FOR VIDEO
2
IDTVP386
7129/3
IDTVP386
8/28-BIT LVDS RECEIVER FOR VIDEO
COMMERCIAL TEMPERATURE RANGE
Pin Descriptions
Pin No.
1
Pin Name
RxOUT22
RxOUT23
RxOUT24
GND
Pin Type
OUT
Pin Description
2
Data outputs on pins (RxOUT0..27)
Digital ground
3
4
Ground
OUT
5
RxOUT25
RxOUT26
RxOUT27
LVDS_GND
RxIN0-
6
Data outputs on pins (RxOUT0..27)
7
8
Ground
Analog ground
LVDS input (-)
LVDS input (+)
LVDS input (-)
LVDS input (+)
Analog power
Analog ground
LVDS input (-)
LVDS input (+)
LVDS input (-)
LVDS input (+)
LVDS input (-)
LVDS input (+)
Analog ground
PLL ground
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
RxIN0+
LVDS IN
RxIN1-
RxIN1+
LVDS_VCC
LVDS_GND
RxIN2-
Power
Ground
RxIN2+
RxCLKIN-
RxCLKIN+
RxIN3-
LVDS IN
RxIN3+
LVDS_GND
PLL_GND
PLL_VCC
PLL_GND
Ground
Power
PLL power
Ground
PLL ground
Power-down control input.
H: Nomal
25
PWRDWN
IN
L: Power down, all ouputs are pulled low.
26
27
28
29
30
31
32
33
34
RxCLKOUT
RxOUT0
GND
Clock output
OUT
Data outputs on pins (RxOUT0..27)
Digital ground
Ground
OUT
RxOUT1
RxOUT2
VCC
Data outputs on pins (RxOUT0..27)
Power
Digital power
RxOUT3
RxOUT4
RxOUT5
OUT
Data outputs on pins (RxOUT0..27)
8/28-BIT LVDS RECEIVER FOR VIDEO
3
IDTVP386
7129/3
IDTVP386
8/28-BIT LVDS RECEIVER FOR VIDEO
COMMERCIAL TEMPERATURE RANGE
Pin No.
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
Pin Name
RxOUT6
GND
Pin Type
OUT
Pin Description
Data outputs on pins (RxOUT0..27)
Digital ground
Ground
RxOUT7
RxOUT8
RxOUT9
VCC
OUT
Data outputs on pins (RxOUT0..27)
Digital power
Power
OUT
RxOUT10
RxOUT11
RxOUT12
GND
Data outputs on pins (RxOUT0..27)
Digital ground
Ground
OUT
RxOUT13
RxOUT14
RxOUT15
VCC
Data outputs on pins (RxOUT0..27)
Digital power
Power
OUT
RxOUT16
RxOUT17
RxOUT18
GND
Data outputs on pins (RxOUT0..27)
Digital ground
Ground
OUT
RxOUT19
RxOUT20
RxOUT21
VCC
Data outputs on pins (RxOUT0..27)
Digital power
Power
8/28-BIT LVDS RECEIVER FOR VIDEO
4
IDTVP386
7129/3
IDTVP386
8/28-BIT LVDS RECEIVER FOR VIDEO
COMMERCIAL TEMPERATURE RANGE
Absolute Maximum Ratings
Item
Supply Voltage, VCC
Rating1
-0.3 V to +4 V
CMOS/TTL Output Voltage
LVDS Receiver Input Voltage
Ambient Operating Temperature
Storage Temperature
-0.3 V to (VCC+0.3 V)
-0.3 V to (VCC+0.3 V)
0 to +70°C
-65 to +150°C
Junction Temperature
150°C
Soldering Temperature (10 seconds max.)
Maximum Package Power
260°C
1.61 W (VP386)
12.4 mW/°C above +25°C
15 mW/°C above +25°C
Package Derating
1. Stresses greater than those listed under Absolute Maximum Ratings may cause permanent damage to the device.
This is a stress rating only and functional operation of the device at these or any other conditions above those indi-
cated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions
for extended periods may affect reliability.
Recommended Operation Conditions
Parameter
Ambient Operating Temperature (Ta)
3.3 V Supply Voltage (VCC)
Receiver Input Range (VIN)
Min.
Typ.
25
Max.
70
Units
°C
0
3
0
3.3
3.6
V
2.4
V
Supply Noise Voltage (VN)
100
mVpp
8/28-BIT LVDS RECEIVER FOR VIDEO
5
IDTVP386
7129/3
IDTVP386
8/28-BIT LVDS RECEIVER FOR VIDEO
COMMERCIAL TEMPERATURE RANGE
Electrical Characteristics
VDD=3.3 V ±10%, Ambient temperature 0 to 70°C
Parameter
CMOS/TTL DC Specifications
Input High Voltage
Symbol
Conditions
Min.
Typ.
Max.
Units
VIH
VIL
2.0
GND
2.7
VCC
0.8
V
V
Input Low Voltage
Output High Voltage
Output Low Voltage
Input Clamp Voltage
Input Current
VOH
VOL
VCL
IIN
IOH = -0.4 mA
3.3
VCC
0.3
V
IOL = 2 mA
ICL = -18mA
VCC
0.06
-0.79
V
-1.5
±15
±10
-60
V
µA
0V
Output Short Circuit Current
IOS
VOUT = 0V
mA
LVDS Receiver DC Specifications
Differential Input High Threshold
Differential Input Low Threshold
VTH
VTL
VCM = +1.2 V
+100
mV
mV
µA
-100
VIN = +2.4 V, VCC = 3.6 V
VIN = 0V, VCC = 3.6 V
±10
±15
Input Current
IIN
µA
Receiver Supply Current
CL = 8 pF, f = 65 MHz,
worst case pattern
220
240
125
140
mA
mA
mA
mA
Receiver Supply Current (worst case)
ICCRW
CL = 8 pF, f = 100 MHz,
worst case pattern
CL= 8 pF, f = 65 MHz, 16
Grayscale pattern
Receiver Supply Current (16 Grayscale) ICCRG
CL= 8 pF, f = 100 MHz, 16
Grayscale pattern
Power_Down = Low,
Receiver Supply Current (Power Down)
ICCRZ Receiver outputs stay low
during Power-down mode
140
400
µA
Receiver Switching Characteristics
20% to 80% VCC, CL= 8
pF
CMOS/TTL Low-to-High Transition Time CLHT
CMOS/TTL High-to-Low Transition Time CHLT
2
3.5
ns
ns
80% to 20% VCC, CL= 8
pF
1.8
3.5
50
CLKOUT period
RCOP
RCOH
RCOL
RSRC
RHRC
10
T
ns
ns
ns
ns
ns
CLKOUT High Time
CLKOUT Low Time
Data Setup to CLKOUT
Data Hold to CLKOUT
4T/7
3T/7
0.35T-0.3
0.45T-1.6
8/28-BIT LVDS RECEIVER FOR VIDEO
6
IDTVP386
7129/3
IDTVP386
8/28-BIT LVDS RECEIVER FOR VIDEO
COMMERCIAL TEMPERATURE RANGE
Parameter
Symbol
Conditions
Min.
Typ.
Max.
Units
ns
RCK+/- to CLKOUT Delay
RCCD 25°C / 3.3 V, 85MHz
14.6
Receiver PLL Setup Time
RPLLS
10
1
ms
µs
Receiver Power Down Delay
RPDD
Receiver Input Strobe Position for Bit0
Receiver Input Strobe Position for Bit1
Receiver Input Strobe Position for Bit2
Receiver Input Strobe Position for Bit3
Receiver Input Strobe Position for Bit4
Receiver Input Strobe Position for Bit5
Receiver Input Strobe Position for Bit6
RSPos0
-0.25
T/7-0.25
2T/7-0.25
3T/7-0.25
4T/7-0.25
5T/7-0.25
6T/7-0.25
250
0
0.25
ns
RSPos1
T/7
T/7+0.25
ns
RSPos2
2T/7 2T/7+0.25
3T/7 3T/7+0.25
4T/7 4T/7+0.4
5T/7 5T/7+0.25
6T/7 6T/7+0.25
ns
RSPos3 f = 100 MHz, T = 10 ns
RSPos4
ns
ns
RSPos5
ns
RSPos6
ns
Rskm f = 100 MHz, T = 10 ns
f = 65 MHz, T = 15.38 ns
ps
RxIn Skew Margin
(see note and Figure 8)
500
ps
Note: The skew margins mean the maximum timing tolerance between the clock and data channel when the receiver still
works well. This margin takes into acount the receiver input setup and hold time, and internal clock jitter (i.e., internal data
sampling window - RSPos). Thyis margin allows for LVDS transmitter pulse position, interconnect skew, inter-symbol
interference and intrinsic channel mismatch which will cause the skew between clock (RC+ and RCK-) and data (RX[n]+
and RX[n]- ; n =0, 1, 2, 3) channels.
Thermal Characteristics
Parameter
Symbol
θJA
Conditions
Still air
Min.
Typ.
84
Max. Units
°C/W
Thermal Resistance Junction to Ambient
θJA
1 m/s air flow
2 m/s air flow
76
°C/W
θJA
67
°C/W
Thermal Resistance Junction to Case
θJA
50
°C/W
8/28-BIT LVDS RECEIVER FOR VIDEO
7
IDTVP386
7129/3
IDTVP386
8/28-BIT LVDS RECEIVER FOR VIDEO
COMMERCIAL TEMPERATURE RANGE
Timing Diagrams
CLKIN/CLKOUT
ODD Data In/Data Out
EVEN Data In/Data Out
T
Figure 1. “Worst Case” Test Pattern
CLKOUT
D0, 8, 16
D1, 9, 17
D2, 10, 18
D3, 11, 19
D4-7, 12-15, 20-23
D24-27
Figure 2. 16-Grayscale Test-Pattern Waveforms
CMOS/TTL Output
80%
80%
20%
20%
8 pF
CLHT
CHLT
Figure 3. VP386 CMOS/TTL Output Load and Transition Time
RCOP
2.0 V
2.0 V
2.0 V
0.8 V
0.8 V
CLKOUT
RCOH
RSRC
RCOL
RHRC
2.0 V
HOLD
2.0 V
SETUP
D0 - D27 Out
Figure 4. VP386 SETUP/HOLD and High/Low Times
8/28-BIT LVDS RECEIVER FOR VIDEO
8
IDTVP386
7129/3
IDTVP386
8/28-BIT LVDS RECEIVER FOR VIDEO
COMMERCIAL TEMPERATURE RANGE
Vdiff=0V
RCK
RCOP
1.5V
CLKOUT
Figure 5. VP386 Clock In to Clock Out Delay
2.0 V
PWRDWN
3.6 V
3.0 V
VCC
RPLLS
RCK
CLKOUT
Figure 6. VP386 Phase Lock Loop Set Time
1.5 V
PWRDWN
RCK IN
RPDD
Low
Figure 7. VP386 Power Down Delay
8/28-BIT LVDS RECEIVER FOR VIDEO
9
IDTVP386
7129/3
IDTVP386
8/28-BIT LVDS RECEIVER FOR VIDEO
COMMERCIAL TEMPERATURE RANGE
ClocK
Previous Cycle
Next Cycle
Data
Rspos0 Min
Rspos0 Max
Rspos1 Min
Rspos1 Max
Rspos2 Min
Rspos2 Max
Rspos3 Min
Rspos3 Max
Rspos4 Min
Rspos4 Max
Rspos5 Min
Rspos5 Max
Rspos6 Min
Rspos6 Max
Figure 8. VP386 LVDS Input Strobe Position
RCK+/RCK-
Skew Margin
RX[n]+/RX[n]-
N = 0, 1, 2, 3
Figure 9. Receiver Input Skew Margin
8/28-BIT LVDS RECEIVER FOR VIDEO
10
IDTVP386
7129/3
IDTVP386
8/28-BIT LVDS RECEIVER FOR VIDEO
COMMERCIAL TEMPERATURE RANGE
Package Outline and Package Dimensions (56-pin TSSOP)
Package dimensions are kept current with JEDEC Publication No. 95
56
E
E1
INDEX
AREA
1
2
C
D
α
L
A2
A
A1
- C -
SEATING
PLANE
e
b
aaa C
SYMBOL
In Millimeters
COMMON DIMENSIONS
In Inches1
COMMON DIMENSIONS
MIN
—
MAX
1.20
0.15
1.05
0.27
0.20
14.10
MIN
—
MAX
.047
.006
.041
.011
.008
.555
A
A1
A2
b
0.05
0.80
0.17
0.09
13.90
.002
.0032
.007
.0035
.547
C
D
E
8.10 BASIC
0.50 BASIC
.319 BASIC
.020 BASIC
E1
e
6.00
6.20
.236
.244
L
0.45
0°
0.75
8°
.018
0°
.030
8°
α
aaa
—
0.10
—
.004
1. For reference only. Controlling dimensions are in mm.
8/28-BIT LVDS RECEIVER FOR VIDEO
11
IDTVP386
7129/3
IDTVP386
8/28-BIT LVDS RECEIVER FOR VIDEO
COMMERCIAL TEMPERATURE RANGE
Ordering Information
IDTVP
XXXX
XX
X
X
Device Type Package Temp. Range Shipping
Carrier
8
Tape and Reel
Tube
Blank
Blank
PAG
Commercial (0°C to +70°C)
56-pin TSSOP
386
8-Bit LVDS Receiver
CORPORATE HEADQUARTERS
6024 Silver Creek Valley Road
San Jose, CA 95138
for SALES:
for Tech Support:
email: videohelp@idt.com
800-345-7015 or 408-284-8200
fax: 408-284-2775
www.idt.com
© 2007 Integrated Device Technology, Inc. All rights reserved. Product specifications subject to change without notice. IDT and the IDT logo are trademarks of Integrated Device Technology,
Inc. Accelerated Thinking is a service mark of Integrated Device Technology, Inc. All other brands, product names and marks are or may be trademarks or registered trademarks used to identify
products or services of their respective owners.
Printed in USA
相关型号：
IDTXXLVT4245APG
CMOS OCTAL BUS TRANSCEIVER AND 3.3V TO 5V SHIFTER WITH 3-STATE OUT-PUTS AND 5 VOLT TOLERANT I/O
IDT
©2020 ICPDF网 联系我们和版权申明