IDT74LVC16646APA [IDT]
3.3V CMOS 16-BIT BUS TRANSCEIVER/REGISTER WITH 3-STATE OUTPUTS, 5 VOLT TOLERANT I/O; 3.3V CMOS 16位总线收发器/寄存器，三态输出， 5V兼容的I / O
| 型号： | IDT74LVC16646APA |
| 厂家： | 
INTEGRATED DEVICE TECHNOLOGY |
| 描述： | 3.3V CMOS 16-BIT BUS TRANSCEIVER/REGISTER WITH 3-STATE OUTPUTS, 5 VOLT TOLERANT I/O |
| 文件： | 总8页 (文件大小：214K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
IDT74LVC16646A
3.3V CMOS 16-BIT BUS
TRANSCEIVER/REGISTER
WITH 3-STATE OUTPUTS,
5 VOLT TOLERANT I/O
FEATURES:
DESCRIPTION:
tSK(0)
(Output Skew) < 250ps
–
–
Typical
TheLVC16646A16-bitbus transceiver/registeris builtusingadvanced
dual metal CMOS technology. This high-speed, low power device is
organizedastwoindependent8-bitD-typetransceiverswith3-stateD-type
registers.Thecontrolcircuitryis organizedformultiplexedtransmissionof
databetweentheAbusandBbuseitherdirectlyorfromtheinternalstorage
registers.Each8-bittransceiver/registerfeatures directioncontrol(DIR),
over-ridingOutputEnablecontrol(OE)andSelectlines (SABandSBA)to
select either real-time data or stored data. Separate clock inputs are
provided for A and B port registers. Data on the A or B data bus, or both,
canbe storedinthe internalregisters bythe low-to-hightransitions atthe
appropriateclockpins.Flow-throughorganizationofsignalpins simplifies
layout.Allinputs are designedwithhysteresis forimprovednoise margin.
ESD > 2000V per MIL-STD-883, Method 3015;
> 200V using machine model (C = 200pF, R = 0)
0.635mm pitch SSOP, 0.50mm pitch TSSOP
and 0.40mm pitch TVSOP packages
Extended commercial range of -40°C to +85°C
VCC = 3.3V ±0.3V, Normal Range
VCC = 2.7V to 3.6V, Extended Range
CMOS power levels (0.4µW typ. static)
All inputs, outputs and I/O are 5 Volt tolerant
Supports hot insertion
–
–
–
–
–
–
–
Drive Features for LVC16646A:
–
–
High Output Drivers: ±24mA
Reduced system switching noise
Allpinscanbedrivenfromeither3.3Vor5Vdevices. Thisfeatureallows
the use of this device as a translator in a mixed 3.3V/5V supply system.
APPLICATIONS:
• 5V and 3.3V mixed voltage systems
• Data communication and telecommunication systems
The LVC16646A has been designed with a ±24mA output driver. The
driver is capable of driving a moderate to heavy load while maintaining
speedperformance.
Functional Block Diagram
29
56
2OE
1OE
1
28
1DIR
DIR
2
55
30
2CLKBA
1CLKBA
54
1SBA
31
27
2SBA
2
2CLKAB
1CLKAB
26
3
2SAB
1SAB
B REG
1D
B REG
1D
C1
C1
5
15
42
52
2A1
A REG
1D
2B1
1A1
A REG
1D
1B1
C1
C1
TO SEVEN OTHER CHANNELS
TO SEVEN OTHER CHANNELS
EXTENDED COMMERCIAL TEMPERATURE RANGE
APRIL 1999
1
c
1998 Integrated Device Technology, Inc.
DSC-4488/1
IDT74LVC16646A
3.3VCMOS16-BITBUSTRANSCEIVER/REGISTER
EXTENDEDCOMMERCIALTEMPERATURERANGE
ABSOLUTE MAXIMUM RATINGS (1)
PINCONFIGURATION
Symbol
Description
Max.
Unit
(2)
VTERM
Terminal Voltage with Respect to GND
– 0.5 to +6.5
V
(3)
VTERM
Terminal Voltage with Respect to GND
Storage Temperature
– 0.5 to +6.5
– 65 to +150
– 50 to +50
– 50
V
TSTG
IOUT
°C
1
2
56
55
54
53
52
1OE
1DIR
DC Output Current
mA
mA
1CLKBA
1CLKAB
IIK
Continuous Clamp Current,
VI < 0 or VO < 0
IOK
ICC
3
1SBA
1SAB
Continuous Current through
±100
mA
4
5
6
GND
1B1
GND
1A1
ISS
each VCC or GND
LVC Link
NOTES:
1B2
VCC
1A2
VCC
51
50
49
48
1. Stresses greater than those listed under ABSOLUTE MAXIMUM
RATINGS may cause permanent damage to the device. This is a
stress rating only and functional operation of the device at these or
any other conditions above those indicated in the operational sections
of this specification is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect reliability.
2. VCC terminals.
7
8
1B3
1B4
1A3
1A4
9
3. All terminals except VCC.
10
47
46
45
44
1B5
1A5
GND
1A6
11
12
13
14
15
16
17
18
GND
1B6
CAPACITANCE (TA = +25OC, f = 1.0MHz)
1A7
1B7
1B8
2B1
SO56-1
SO56-2
SO56-3
Symbol
Parameter(1)
Conditions
Typ. Max. Unit
43
42
1A8
2A1
CIN
Input Capacitance
VIN = 0V
4.5
6
pF
COUT
CI/O
Output
Capacitance
I/O Port
VOUT = 0V
VIN = 0V
6.5
8
pF
41
2B2
2A2
6.5
8
pF
40
39
38
2B3
2A3
Capacitance
GND
GND
LVC Link
NOTE:
19
20
21
22
23
2
B4
2A4
2A5
1. As applicable to the device type.
37
36
35
34
33
2B5
2B6
VCC
2A6
VCC
2A7
PIN DESCRIPTION
2B7
Pin Names
Description
Data Register A Inputs
Data Register B 3-State Outputs
Data Register B Inputs
24
2B8
2A8
xAx
xBx
GND
GND
25
26
27
32
31
30
29
2SBA
2SAB
Data Register A 3-State Outputs
Clock Pulse Inputs
2CLKBA
2CLKAB
xCLKAB, xCLKBA
xSAB, xSBA
xOE
Output Data Source Select Inputs
Output Enable Inputs
28
2OE
2DIR
xDIR
Direction Control Inputs
SSOP/ TSSOP/ TVSOP
TOP VIEW
c
1998 Integrated Device Technology, Inc.
2
DSC-123456
IDT74LVC16646A
3.3VCMOS16-BITBUSTRANSCEIVER/REGISTER
EXTENDEDCOMMERCIALTEMPERATURERANGE
FUNCTION TABLE (1)
(2)
Data I/O
Inputs
xOE
xDIR
xCLKAB
xCLKBA
xSAB
xSBA
xAx
xBx
Operation or Function
Store A, B unspecified(2)
Store B, A unspecified(2)
X
X
H
H
L
L
L
L
X
X
X
X
L
↑
X
X
↑
X
X
X
X
X
X
L
X
X
X
X
L
H
X
X
Input
Unspecified(2)
Input
Unspecified(2)
Input
↑
↑
Input
Input
Store A and B Data
H or L
X
X
H or L
X
H or L
X
Input
Isolation, hold storage
Real Time B Data to A Bus
Stored B Data to A Bus
Real Time A Data to B Bus
Stored A Data to B Bus
Output
Output
Input
Input
Input
L
H
H
X
H or L
Output
Output
X
H
Input
NOTES:
1. H = HIGH Voltage Level
L = LOW Voltage Level
X = Don’t Care
↑ = LOW-to-HIGH Transition
2. The data output functions may be enabled or disabled by various signals at the xOE or xDIR inputs. Data input functions are always enabled, i.e.
data at the bus pins will be stored on every LOW-to-HIGH transition of the clock inputs.
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified:
O
O
A
Operating Condition: T = –40 C to +85 C
Symbol
Parameter
Test Conditions
Min.
Typ.(1)
Max. Unit
VIH
Input HIGH Voltage Level
VCC = 2.3V to 2.7V
VCC = 2.7V to 3.6V
VCC = 2.3V to 2.7V
VCC = 2.7V to 3.6V
VCC = 3.6V
1.7
—
—
—
V
2
—
—
—
—
VIL
Input LOW Voltage Level
Input Leakage Current
—
—
—
0.7
0.8
±5
V
IIH
VI = 0 to 5.5V
µA
µA
IIL
IOZH
High Impedance Output Current
(3-State Output pins)
VCC = 3.6V
VO = 0 to 5.5V
—
—
±10
IOZL
IOFF
VIK
VH
Input/Output Power Off Leakage
Clamp Diode Voltage
VCC = 0V, VIN or VO ≤ 5.5V
VCC = 2.3V, IIN = – 18mA
VCC = 3.3V
—
—
—
—
—
– 0.7
100
—
±50
– 1.2
—
µA
V
Input Hysteresis
mV
µA
ICCL
ICCH
ICCZ
Quiescent Power Supply Current
VCC = 3.6V
VIN = GND or VCC
10
(2)
—
—
—
—
10
3.6 ≤ VIN ≤ 5.5V
∆ICC
Quiescent Power Supply
Current Variation
One input at VCC - 0.6V
other inputs at VCC or GND
500
µA
LVC Link
NOTES:
1. Typical values are at VCC = 3.3V, +25°C ambient.
2. This applies in the disabled state only.
3
IDT74LVC16646A
3.3VCMOS16-BITBUSTRANSCEIVER/REGISTER
EXTENDEDCOMMERCIALTEMPERATURERANGE
BUS
A
BUS
B
BUS
A
BUS
B
xCLKBA xSAB
xOE
L
xCLKAB
X
xSBA
L
xDIR
L
xCLKBA xSAB
xOE
L
xCLKAB
X
xSBA
X
xDIR
H
X
X
X
L
REAL-TIME TRANSFER
BUS B TO A
REAL-TIME TRANSFER
BUS A TO B
BUS
A
BUS
A
BUS
B
BUS
B
(1) xOE
xCLKAB
X
H or L
xSBA
H
X
xCLKBA xSAB
xOE
X
X
xCLKAB
xSBA
xCLKBA xSAB
xDIR
xDIR
L
H
X
↑
X
X
X
X
X
X
X
X
X
L
L
H or L
X
X
H
↑
X
↑
H
↑
STORAGE FROM
A, B, OR A AND B
TRANSFER STORED
DATA TO A AND/OR B
NOTE:
1. Cannot transfer data to A Bus and B Bus simultaneously.
4
IDT74LVC16646A
3.3VCMOS16-BITBUSTRANSCEIVER/REGISTER
EXTENDEDCOMMERCIALTEMPERATURERANGE
OUTPUT DRIVE CHARACTERISTICS
Symbol
Parameter
Output HIGH Voltage
Test Conditions(1)
IOH = – 0.1mA
Min.
Max.
Unit
VOH
VCC = 2.3V to 3.6V
VCC = 2.3V
VCC – 0.2
—
V
IOH = – 6mA
IOH = – 12mA
2
—
—
VCC = 2.3V
1.7
2.2
2.4
2.2
—
—
—
—
—
VCC = 2.7V
—
VCC = 3.0V
—
VCC = 3.0V
IOH = – 24mA
IOL = 0.1mA
IOL = 6mA
—
VOL
Output LOW Voltage
VCC = 2.3V to 3.6V
VCC = 2.3V
0.2
0.4
0.7
0.4
0.55
V
IOL = 12mA
IOL = 12mA
IOL = 24mA
VCC = 2.7V
VCC = 3.0V
LVC Link
NOTE:
1. VIH and VIL must be within the min. or max. range shown in the DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE table for the
appropriate VCC range. TA = – 40°C to +85°C.
OPERATING CHARACTERISTICS, V
CC
= 3.3V ± 0.3V, T = 25°C
A
Symbol
Parameter
Test Conditions
Typical
Unit
CPD
Power Dissipation Capacitance per Transceiver Outputs enabled
Power Dissipation Capacitance per Transceiver Outputs disabled
CL = 0pF, f = 10Mhz
60
pF
CPD
12
pF
5
IDT74LVC16646A
3.3VCMOS16-BITBUSTRANSCEIVER/REGISTER
EXTENDEDCOMMERCIALTEMPERATURERANGE
SWITCHING CHARACTERISTICS (1)
VCC = 2.7V
VCC = 3.3V±0.3V
Symbol
Parameter
Min.
Max.
Min.
Max.
Unit
fMAX
150
—
150
1.3
—
MHz
tPLH
tPHL
tPLH
tPHL
tPLH
tPHL
tPZH
tPZL
tPZH
tPZL
tPHZ
tPLZ
tPHZ
tPLZ
tSU
Propagation Delay
xAx to xBx or xBx to xAx
Propagation Delay
CLKBA to xAx or CLKAB to xBx
Propagation Delay
xSBA or xSAB to xAx or xBx
Output Enable Time
—
—
—
—
—
—
—
3.2
—
3.3
—
6.8
7.9
9.2
8.5
8.5
7.7
7.8
—
—
—
—
5.7
6.7
7.7
6.9
7.2
6.9
7
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ps
1.8
1.7
1.3
1.4
2.1
2
x
OE
to xAx or xBx
Output Enable Time
xDIR to xAx or xBx
Output Disable Time
x
OE
to xAx or xBx
Output Disable Time
xDIR to xAx or xBx
Set-up Time HIGH or LOW
xAx or xBx before CLKAB or CLKBA
2.9
0.3
3.3
—
—
—
—
500
↑
↑
tH
Hold Time HIGH or LOW
xAx or xBx after CLKAB or CLKBA
↑
↑
tW
Clock Pulse Width
HIGH or LOW
(2)
tSK(o)
Output Skew
NOTES:
1. See test circuits and waveforms. TA = – 40°C to + 85°C.
2. Skew between any two outputs of the same package and switching in the same direction.
6
IDT74LVC16646A
3.3VCMOS16-BITBUSTRANSCEIVER/REGISTER
EXTENDEDCOMMERCIALTEMPERATURERANGE
TESTCIRCUITSANDWAVEFORMS:
PROPAGATIONDELAY
TESTCONDITIONS
Symbol
(1)
(1)
(2)
VCC = 3.3V ±0.3V VCC = 2.7V VCC = 2.5V ±0.2V
Unit
VLOAD
6
6
2 xVcc
Vcc
V
VIH
VT
0V
SAME PHASE
INPUT TRANSITION
VIH
VT
2.7
1.5
300
300
50
2.7
1.5
300
300
50
V
V
tPHL
tPHL
VCC / 2
150
tPLH
tPLH
VOH
VT
OUTPUT
VLZ
VHZ
CL
mV
mV
VOL
150
VIH
VT
0V
30
pF
LVC Link
OPPOSITE PHASE
INPUT TRANSITION
LVC Link
TESTCIRCUITSFORALLOUTPUTS
VLOAD
ENABLEANDDISABLETIMES
VCC
Open
GND
DISABLE
ENABLE
VIH
VT
500Ω
CONTROL
INPUT
VIN
VOUT
0V
Pulse (1, 2)
Generator
tPZL
tPLZ
D.U.T.
VLOAD/2
VT
VLOAD/2
OUTPUT
NORMALLY
LOW
SWITCH
CLOSED
500Ω
VOL+VLZ
VOL
RT
CL
tPHZ
tPZH
VOH
OUTPUT
NORMALLY
HIGH
SWITCH
OPEN
LVC Link
VT
0V
VOH-VHZ
DEFINITIONS:
CL = Load capacitance: includes jig and probe capacitance.
0V
RT = Termination resistance: should be equal to ZOUT of the Pulse
Generator.
LVC Link
NOTE:
1. Diagram shown for input Control Enable-LOW and input Control
Disable-HIGH.
NOTES:
1. Pulse Generator for All Pulses: Rate ≤ 10MHz; tF ≤ 2.5ns; tR ≤ 2.5ns.
2. Pulse Generator for All Pulses: Rate ≤ 10MHz; tF ≤ 2ns; tR ≤ 2ns.
SWITCHPOSITION
SET-UP, HOLD, AND RELEASE TIMES
Test
Switch
VIH
VT
0V
DATA
INPUT
Open Drain
Disable Low
Enable Low
Disable High
Enable High
All Other tests
VLOAD
tSU
tH
VIH
VT
0V
TIMING
INPUT
GND
Open
tREM
VIH
VT
0V
ASYNCHRONOUS
CONTROL
LVC Link
VIH
VT
0V
SYNCHRONOUS
CONTROL
OUTPUT SKEW - tsk (x)
tSU
tH
LVC Link
VIH
VT
0V
INPUT
PULSEWIDTH
tPLH1
tPHL1
VOH
LOW-HIGH-LOW
PULSE
VT
VT
OUTPUT 1
OUTPUT 2
VOL
tSK (x)
tSK (x)
tW
VOH
VT
HIGH-LOW-HIGH
PULSE
VT
VOL
LVC Link
tPLH2
tPHL2
tSK(x) = tPLH2 - tPLH1 or tPHL2 - tPHL1
LVC Link
NOTES:
1. For tSK(o) OUTPUT1 and OUTPUT2 are any two outputs.
2. For tSK(b) OUTPUT1 and OUTPUT2 are in the same bank.
7
IDT74LVC16646A
3.3VCMOS16-BITBUSTRANSCEIVER/REGISTER
EXTENDEDCOMMERCIALTEMPERATURERANGE
ORDERINGINFORMATION
XX
X
XX
XXXX
IDT
XX
LVC
Device Type Package
Bus-Hold
Family
Temp. Range
Shrink Small Outline Package (SO56-1)
Thin Shrink Small Outline Package (SO56-2)
Thin Very Small Outline Package (SO56-3)
PV
PA
PF
16-Bit Bus Transceiver/Register
646A
16
Double-Density with Resistors, ±24mA
Blank No Bus-hold
74
-40°C to +85°C
CORPORATE HEADQUARTERS
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Santa Clara, CA 95054
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www.idt.com*
*To search for sales office near you, please click the sales button found on our home page or dial the 800# above and press 2.
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
8
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