IDT74LVC16601APV8 [IDT]

Registered Bus Transceiver, LVC/LCX/Z Series, 1-Func, 18-Bit, True Output, CMOS, PDSO56, SSOP-56;


型号：	IDT74LVC16601APV8
厂家：	INTEGRATED DEVICE TECHNOLOGY
描述：	Registered Bus Transceiver, LVC/LCX/Z Series, 1-Func, 18-Bit, True Output, CMOS, PDSO56, SSOP-56 光电二极管
文件：	总6页 (文件大小：81K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

IDT74LVC16601A

3.3VCMOS18-BITUNIVERSALBUSTRANSCEIVER

INDUSTRIALTEMPERATURERANGE

IDT74LVC16601A

3.3V CMOS

18-BIT UNIVERSAL BUS

TRANSCEIVER WITH 3 STATE OUTPUTS,

5 VOLT TOLERANT I/O

DESCRIPTION:

FEATURES:

The LVC16601A18-bit universal bus transceiver is built using advanced

• Typical tSK(o) (Output Skew) < 250ps

• ESD > 2000V per MIL-STD-883, Method 3015; > 200V using

machine model (C = 200pF, R = 0)

dual metal CMOS technology. This 18-bit universal bus transceiver com-

bines D-type latches and D-type flip-flops to allow data flow in transparent,

• VCC = 3.3V ± 0.3V, Normal Range

• VCC = 2.7V to 3.6V, Extended Range

• CMOS power levels (0.4μ W typ. static)

• All inputs, outputs, and I/O are 5V tolerant

• Supports hot insertion

latched and clocked modes.

Data flow in each direction is controlled by output-enable (OEAB and

OEBA), latch-enable (LEABandLEBA), andclock(CLKABandCLKBA)

inputs. The clock can be controlled by the clock-enable (CLKENAB and

CLKENBA)inputs.

• Available in SSOP and TSSOP packages

ForA-to-Bdataflow,thedeviceoperates inthetransparentmodewhen

LEABis high. WhenLEABis low,the Adata is latchedifCLKABis heldat

ahighorlowlogiclevel. IfLEABis low,theA-bus datais storedinthelatch/

flip-flopontheLOW-to-HIGHtransitionofCLKAB.OutputenableOEABis

activelow. WhenOEABislow,theoutputsareactive. WhenOEABishigh,

the outputs are inthe high-impedance state.Data flowforBtoAis similar

to that of A to B but uses OEBA, LEBA, CLKBA and CLKENBA.

Allpinscanbedrivenfromeither3.3Vor5Vdevices. Thisfeatureallows

the use of this device as a translator in a mixed 3.3V/5V supply system.

The LVC16601Ahas beendesignedwitha ±24mAoutputdriver. This

driver is capable of driving a moderate to heavy load while maintaining

speedperformance.

DRIVE FEATURES:

• High Output Drivers: ±24mA

• Reduced system switching noise

APPLICATIONS:

• 5V and 3.3V mixed voltage systems

• Data communication and telecommunication systems

FUNCTIONALBLOCKDIAGRAM

OEAB

CLKENAB

CLKAB

LEAB

LEBA

CLKBA

CLKENBA

OEBA

CLK

TO 17 OTHER CHANNELS

TheIDTlogoisaregisteredtrademarkofIntegratedDeviceTechnology,Inc.

INDUSTRIAL TEMPERATURE RANGE

JUNE 2006

2006 Integrated Device Technology, Inc.

DSC-4599/5

IDT74LVC16601A

3.3VCMOS18-BITUNIVERSALBUSTRANSCEIVER

INDUSTRIALTEMPERATURERANGE

ABSOLUTEMAXIMUMRATINGS⁽¹⁾

PINCONFIGURATION

Symbol

VTERM

TSTG

Description

Terminal Voltage with Respect to GND

Storage Temperature

Max

Unit

–0.5 to +6.5

–65 to +150

–50 to +50

–50

OEAB

LEAB

° C

CLKENAB

CLKAB

IOUT

DC Output Current

IIK

IOK

Continuous Clamp Current,

VI < 0 or VO < 0

GND

ICC

ISS

Continuous Current through each

VCC or GND

±100

NOTE:

1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause

permanent damage to the device. This is a stress rating only and functional operation

of the device at these or any other conditions above those indicated in the operational

sections of this specification is not implied. Exposure to absolute maximum rating

conditions for extended periods may affect reliability.

VCC

A⁶

PINDESCRIPTION

GND

Pin Names

OEAB

OEBA

LEAB

Description

A-to-B Output Enable Input (Active LOW)

B-to-AOutputEnable Input(Active LOW)

A-to-BLatchEnableInput

GND

LEBA

B-to-ALatchEnableInput

A10

A11

B10

CLKAB

CLKBA

A-to-B Clock Input

B¹¹

B-to-A Clock Input

A12

GND

A13

A-to-BDataInputsorB-to-A3-StateOutputs

B-to-ADataInputsorA-to-B3-StateOutputs

A-to-B Clock Enable Input (Active LOW)

B12

GND

B13

CLKENAB

CLKENBA

B-to-A Clock Enable Input (Active LOW)

A14

A15

B14

B¹⁵

VCC

B16

FUNCTIONTABLE^(1,2)

VCC

A16

Inputs

Outputs

CLKENAB

OEAB

LEAB

CLKAB

A17

B17

↑

GND

B¹⁸

A18

(3)

CLKBA

OEBA

LEBA

CLKENBA

↑

(3)

SSOP/ TSSOP

TOP VIEW

(4)

NOTES:

1. H = HIGH Voltage Level

X = Don’t Care

L = LOW Voltage Level

Z = High-Impedance

↑ = LOW-to-HIGH transition

2. A-to-B data flow is shown. B-to-A data flow is similar but uses OEBA, LEBA, CLKBA,

and CLKENBA.

3. Output level before the indicated steady-state input conditions were established.

4. Output level before the indicated steady-state input conditions were established,

provided that CLKAB was HIGH before LEAB went LOW.

CAPACITANCE (TA = +25°C, F = 1.0MHz)

Symbol

Parameter⁽¹⁾

Conditions

VIN = 0V

VOUT = 0V

VIN = 0V

Typ.

Max. Unit

CIN

Input Capacitance

Output Capacitance

I/O Port Capacitance

4.5

COUT

CI/O

6.5

NOTE:

1. As applicable to the device type.

IDT74LVC16601A

3.3VCMOS18-BITUNIVERSALBUSTRANSCEIVER

INDUSTRIALTEMPERATURERANGE

DCELECTRICALCHARACTERISTICSOVEROPERATINGRANGE

FollowingConditionsApplyUnlessOtherwiseSpecified:

OperatingCondition:TA = –40°C to +85°C

Symbol

Parameter

Test Conditions

Min.

1.7

Typ.⁽¹⁾

—

Max.

—

Unit

VIH

Input HIGH Voltage Level

VCC = 2.3V to 2.7V

VCC = 2.7V to 3.6V

—

VIL

Input LOW Voltage Level

Input Leakage Current

VCC = 2.3V to 2.7V

VCC = 2.7V to 3.6V

—

0.7

0.8

IIH

IIL

VCC = 3.6V

VI = 0 to 5.5V

—

µA

µ A

IOZH

IOZL

High Impedance Output Current

(3-State Output pins)

VCC = 3.6V

VO = 0 to 5.5V

—

IOFF

VIK

Input/Output Power Off Leakage

Clamp Diode Voltage

VCC = 0V, VIN or VO ≤ 5.5V

—

µ A

VCC = 2.3V, IIN = –18mA

–0.7

–1.2

Input Hysteresis

VCC = 3.3V

VCC = 3.6V

—

100

—

µA

ICCL

ICCH

ICCZ

Quiescent Power Supply Current

VIN = GND or VCC

(2)

3.6 ≤ VIN ≤ 5.5V

—

ΔICC

Quiescent Power Supply Current

Variation

One input at VCC - 0.6V, other inputs at VCC or GND

500

µ A

NOTES:

1. Typical values are at VCC = 3.3V, +25°C ambient.

2. This applies in the disabled state only.

OUTPUTDRIVECHARACTERISTICS

Symbol

Parameter

TestConditions⁽¹⁾

Min.

VCC – 0.2

Max.

—

Unit

VOH

OutputHIGHVoltage

VCC = 2.3V to 3.6V

IOH = – 0.1mA

IOH = – 6mA

IOH = – 12mA

VCC = 2.3V

VCC = 2.7V

VCC = 3V

—

1.7

—

2.2

—

2.4

—

VCC = 3V

IOH = – 24mA

IOL = 0.1mA

IOL = 6mA

2.2

—

VOL

OutputLOWVoltage

VCC = 2.3V to 3.6V

VCC = 2.3V

—

0.2

0.4

0.7

0.4

0.55

—

IOL = 12mA

IOL = 24mA

—

VCC = 2.7V

VCC = 3V

—

NOTE:

1. VIH and VIL must be within the min. or max. range shown in the DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE table for the appropriate VCC range.

TA = – 40°C to + 85°C.

IDT74LVC16601A

3.3VCMOS18-BITUNIVERSALBUSTRANSCEIVER

INDUSTRIALTEMPERATURERANGE

OPERATING CHARACTERISTICS, VCC = 3.3V ± 0.3V, TA = 25°C

Symbol

Parameter

Test Conditions

Typical

Unit

CPD

PowerDissipationCapacitanceperTransceiverOutputsenabled

PowerDissipationCapacitanceperTransceiverOutputsdisabled

CL = 0pF, f = 10Mhz

CPD

SWITCHINGCHARACTERISTICS⁽¹⁾

VCC = 2.7V

Max.

VCC = 3.3V ± 0.3V

Symbol

tPLH

tPHL

tPLH

tPHL

tPLH

tPHL

tPZH

tPZL

tPHZ

tPLZ

tSU

Parameter

Min.

Max.

Unit

PropagationDelay

—

5.4

—

4.6

Ax to Bx or Bx to Ax

PropagationDelay

—

6.2

6.3

6.8

—

5.2

5.3

5.6

5.2

LEBA to Ax, LEAB to Bx

PropagationDelay

CLKBA to Ax, CLKAB to Bx

OutputEnableTime

OEBA to Ax, OEAB to Bx

OutputDisableTime

OEBA to Ax, OEAB to Bx

Set-up Time HIGH or LOW, Ax to CLKAB, Bx to CLKBA

Hold Time HIGH or LOW, Ax to CLKAB, Bx to CLKBA

1.5

0.8

—

1.5

0.8

—

500

tSU

Set-up Time HIGH or LOW

Clock LOW

Clock HIGH

Ax to LEAB, Bx to LEBA

tSU

Set-up Time, CLKENAB to CLKAB

Set-up Time, CLKENBA to CLKBA

2.1

1.8

0.5

2.1

1.8

0.5

Hold Time HIGH or LOW, Ax after LEAB, Bx after LEBA

Hold Time, CLKENAB after CLKAB

Hold Time, CLKENBA after CLKBA

LEAB or LEBA Pulse Width HIGH

CLKAB or CLKBA Pulse Width HIGH or LOW

(2)

tSK(o)

OutputSkew

—

NOTES:

1. See TEST CIRCUITS AND WAVEFORMS. TA = – 40°C to + 85°C.

2. Skew between any two outputs of the same package and switching in the same direction.

IDT74LVC16601A

3.3VCMOS18-BITUNIVERSALBUSTRANSCEIVER

INDUSTRIALTEMPERATURERANGE

TESTCIRCUITSANDWAVEFORMS

TESTCONDITIONS

VIH

SAME PHASE

INPUT TRANSITION

(1)

(2)

Symbol VCC =3.3V±0.3V VCC =2.7V VCC =2.5V±0.2V Unit

tPHL

VLOAD

VIH

2 x Vcc

Vcc

tPLH

VOH

VOL

OUTPUT

2.7

1.5

300

2.7

1.5

300

Vcc / 2

150

tPHL

tPLH

VLZ

VHZ

VIH

OPPOSITE PHASE

INPUT TRANSITION

150

LVC Link

VLOAD

Open

GND

Propagation Delay

VCC

DISABLE

ENABLE

VIH

500Ω

CONTROL

INPUT

VIN

VOUT

(1, 2)

Pulse

tPZL

tPLZ

D.U.T.

Generator

VLOAD/2

V^OL+VLZ

VOL

OUTPUT

NORMALLY

LOW

SWITCH

CLOSED

500Ω

tPHZ

tPZH

VOH

VOH-VHZ

OUTPUT

NORMALLY

HIGH

SWITCH

OPEN

LVC Link

Test Circuit for All Outputs

LVC Link

DEFINITIONS:

CL = Load capacitance: includes jig and probe capacitance.

RT = Termination resistance: should be equal to ZOUT of the Pulse Generator.

Enable and Disable Times

NOTE:

1. Diagram shown for input Control Enable-LOW and input Control Disable-HIGH.

NOTES:

1. Pulse Generator for All Pulses: Rate ≤ 10MHz; tF ≤ 2.5ns; tR ≤ 2.5ns.

2. Pulse Generator for All Pulses: Rate ≤ 10MHz; tF ≤ 2ns; tR ≤ 2ns.

VIH

SWITCHPOSITION

DATA

INPUT

Test

Switch

V^LOAD

GND

Open

t^SU

VIH

TIMING

INPUT

Open Drain

Disable Low

Enable Low

tREM

VIH

ASYNCHRONOUS

CONTROL

Disable High

Enable High

VIH

SYNCHRONOUS

CONTROL

All Other Tests

tSU

LVC Link

VIH

Set-up, Hold, and Release Times

INPUT

tPLH1

t^PHL1

V^OH

LOW-HIGH-LOW

VOL

PULSE

OUTPUT 1

tSK (x)

VOH

VOL

HIGH-LOW-HIGH

PULSE

OUTPUT 2

LVC Link

tPLH2

tPHL2

Pulse Width

tSK(x) = tPLH2 - tPLH1 or tPHL2 - tPHL1

LVC Link

Output Skew - tSK(X)

NOTES:

1. For tSK(o) OUTPUT1 and OUTPUT2 are any two outputs.

2. For tSK(b) OUTPUT1 and OUTPUT2 are in the same bank.

IDT74LVC16601A

3.3VCMOS18-BITUNIVERSALBUSTRANSCEIVER

INDUSTRIALTEMPERATURERANGE

ORDERINGINFORMATION

Device Type Package

XXXX

LVC

IDT

Bus-Hold

Family

Temp. Range

Shrink Small Outline Package

PVG SSOP - Green

Thin Shrink Small Outline Package

PAG TSSOP - Green

601A 18-Bit Universal Bus Transceiver

Double-Density, 24mA

Blank

No Bus-hold

-40°C to +85°C

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San Jose, CA 95138

for SALES:

800-345-7015 or 408-284-8200

fax: 408-284-2775

for Tech Support:

logichelp@idt.com

www.idt.com

IDT74LVC16601APV8 [IDT]

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