IDT74ALVCH16245PA8 [IDT]
Bus Transceiver, ALVC/VCX/A Series, 2-Func, 8-Bit, True Output, CMOS, PDSO48, TSSOP-48;型号: | IDT74ALVCH16245PA8 |
厂家: | INTEGRATED DEVICE TECHNOLOGY |
描述: | Bus Transceiver, ALVC/VCX/A Series, 2-Func, 8-Bit, True Output, CMOS, PDSO48, TSSOP-48 光电二极管 逻辑集成电路 |
文件: | 总6页 (文件大小:130K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
3.3V CMOS 16-BIT BUS
TRANSCEIVER WITH
IDT74ALVCH16245
3-STATE OUTPUTS
AND BUS-HOLD
DESCRIPTION:
FEATURES:
–
–
–
0.5 MICRON CMOS Technology
TypicaltSK(0) (Output Skew) < 250ps
This 16-bit bus transceiver is built using advanced dual metal CMOS
technology. The ALVCH16245 is designed for asynchronous commu-
nication between data buses. The control-function implementation
minimizes external timing requirements.
ESD > 2000V per MIL-STD-883, Method 3015;
> 200V using machine model (C = 200pF, R = 0)
0.635mm pitch SSOP, 0.50mm pitch TSSOP,
and 0.40mm pitch TVSOP packages
Extended commercial range of – 40°C to + 85°C
VCC = 3.3V ± 0.3V, Normal Range
VCC = 2.7V to 3.6V, Extended Range
VCC = 2.5V ± 0.2V
CMOS power levels (0.4µW typ. static)
–
This device can be used as two 8-bit transceivers or one 16-bit
transceiver. It allows data transmission from the A bus to the B bus or
from the B bus to the A bus, depending on the logic level at the direction-
control (DIR) input. The output-enable (OE) input can be used to disable
the device so that the buses are effectively isolated.
–
–
–
–
–
–
Rail-to-Rail output swing for increased noise margin
The ALVCH16245 has been designed with a ±24mA output driver.
This driver is capable of driving a moderate to heavy load while
maintaining speed performance.
Drive Features for ALVCH16245:
–
–
High Output Drivers: ±24mA
Suitable for heavy loads
The ALVCH16245 has “bus-hold” which retains the inputs’ last state
whenever the input bus goes to a high impedance. This prevents floating
inputs and eliminates the need for pull-up/down resistors.
APPLICATIONS:
• 3.3V High Speed Systems
• 3.3V and lower voltage computing systems
Functional Block Diagram
1
24
1DIR
2DIR
48
2
25
13
OE
OE
2
1
47
36
35
33
32
30
1A1
2A1
B
1
1
B
2
1
46
1A2
2A2
2A3
3
14
16
17
1B2
1B3
2B2
44
1A3
5
B
2
3
43
A
A
2 4
1
4
6
1B4
2B4
2B5
2B6
41
40
38
1A5
2A5
2A6
8
19
20
22
B
5
1
29
27
A
1
6
9
B
6
1
1A7
1A8
A
2
7
11
B
7
1
2B7
2B8
37
26
2A8
12
23
1B8
EXTENDED COMMERCIAL TEMPERATURE RANGE
MARCH1999
1
c
1999 Integrated Device Technology, Inc.
DSC-4697/-
IDT74ALVCH16245
3.3V CMOS 16-BIT BUS TRANSCEIVER WITH 3-STATE OUTPUTS
EXTENDED COMMERCIAL TEMPERATURE RANGE
PIN CONFIGURATION
ABSOLUTE MAXIMUM RATING (1)
Symbol
Description
Terminal Voltage
Max.
Unit
(2)
VTERM
– 0.5 to + 4.6
V
with Respect to GND
Terminal Voltage
1DIR
1B1
1
2
48
47
46
45
44
1OE
(3)
VTERM
– 0.5 to
VCC + 0.5
V
1A1
with Respect to GND
Storage Temperature
3
1B2
TSTG
IOUT
IIK
– 65 to + 150
°C
1A2
GND
1A3
1A4
DC Output Current
– 50 to + 50
± 50
mA
mA
4
5
GND
1B3
Continuous Clamp Current,
VI < 0 or VI > VCC
Continuous Clamp Current, VO < 0
6
IOK
– 50
mA
mA
1B4
43
42
41
40
ICC
ISS
Continuous Current through
each VCC or GND
±100
7
VCC
1B5
VCC
1A5
8
NEW16link
NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM
RATINGS may cause permanent damage to the device. This is a
stress rating only and functional operation of the device at these or
any other conditions above those indicated in the operational sections
of this specification is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect reliability.
2. VCC terminals.
9
1B6
GND
1B7
1A6
GND
1A7
1A8
2A1
10
39
38
37
36
11
12
13
14
15
16
17
18
SO48-1
SO48-2
SO48-3
1B8
3. All terminals except VCC.
2B1
2B2
GND
2B3
35
34
2A2
GND
2A3
2A4
VCC
CAPACITANCE (TA = +25oC, f = 1.0MHz)
Symbol
Parameter(1)
Conditions
Typ.
Max.
Unit
33
CIN
Input Capacitance
VIN = 0V
5
7
pF
2B4
32
31
30
COUT
CI/O
Output
Capacitance
I/O Port
VOUT = 0V
VIN = 0V
7
7
9
9
pF
pF
VCC
19
20
21
22
23
2B5
2A5
Capacitance
NEW16link
29
28
27
26
25
2B6
2A6
NOTE:
1. As applicable to the device type.
GND
GND
2B7
2B8
2A7
2A8
2OE
FUNCTION TABLE (each 8-bit section)(1)
24
2DIR
Inputs
xOE
xDIR
Outputs
Bus B Data to Bus A
SSOP/
TSSOP/TVSOP
TOP VIEW
L
L
L
H
X
Bus A Data to Bus B
High Z State
H
NOTE:
1. H = HIGH Voltage Level
L = LOW Voltage Level
X = Don’t Care
PIN DESCRIPTION
Pin Names
Description
Z = High-Impedance
xOE
xDIR
xAx
Output Enable Inputs (Active LOW)
Direction Control Inputs
Side A Inputs or 3-State Outputs(1)
Side B Inputs or 3-State Outputs(1)
xBx
NOTE:
1. These pins have “Bus-Hold.” All other pins are standard inputs,
outputs, or I/Os.
2
IDT74ALVCH16245
3.3V CMOS 16-BIT BUS TRANSCEIVER WITH 3-STATE OUTPUTS
EXTENDED COMMERCIAL TEMPERATURE RANGE
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified:
Operating Condition: TA = – 40°C to +85°C
Symbol
Parameter
Test Conditions
Min.
Typ.(1)
Max.
Unit
VIH
Input HIGH Voltage Level
VCC = 2.3V to 2.7V
VCC = 2.7V to 3.6V
VCC = 2.3V to 2.7V
VCC = 2.7V to 3.6V
VCC = 3.6V
1.7
—
—
V
2
—
—
—
0.7
VIL
Input LOW Voltage Level
—
—
—
—
—
—
—
—
—
V
—
0.8
IIH
Input HIGH Current
VI = VCC
—
± 5
± 5
± 10
± 10
– 1.2
—
µA
IIL
Input LOW Current
VCC = 3.6V
VI = GND
VO = VCC
VO = GND
—
IOZH
IOZL
VIK
VH
High Impedance Output Current
(3-State Output pins)
Clamp Diode Voltage
Input Hysteresis
VCC = 3.6V
—
µA
µA
V
—
VCC = 2.3V, IIN = – 18mA
VCC = 3.3V
– 0.7
100
0.1
mV
µA
ICCL
ICCH
ICCZ
∆ICC
VCC = 3.6V
VIN = GND or VCC
40
Quiescent Power Supply Current
Quiescent Power Supply
Current Variation
One input at VCC − 0.6V,
other inputs at VCC or GND
—
—
750
µA
NEW16link
NOTE:
1. Typical values are at VCC = 3.3V, +25°C ambient.
BUS-HOLD CHARACTERISTICS
Symbol
Parameter(1)
Test Conditions
Min.
Typ.(2)
Max.
Unit
IBHH
Bus-Hold Input Sustain Current
VCC = 3.0V
VCC = 2.3V
VCC = 3.6V
VI = 2.0V
VI = 0.8V
VI = 1.7V
VI = 0.7V
VI = 0 to 3.6V
– 75
—
—
µA
IBHL
75
– 45
45
—
—
—
—
—
—
IBHH
IBHL
Bus-Hold Input Sustain Current
Bus-Hold Input Overdrive Current
µA
—
IBHHO
IBHLO
—
± 500
µA
NEW16link
NOTES:
1. Pins with Bus-hold are identified in the pin description.
2. Typical values are at VCC = 3.3V, +25°C ambient.
3
IDT74ALVCH16245
3.3V CMOS 16-BIT BUS TRANSCEIVER WITH 3-STATE OUTPUTS
EXTENDED COMMERCIAL TEMPERATURE RANGE
OUTPUT DRIVE CHARACTERISTICS
Symbol
Parameter
Output HIGH Voltage
Test Conditions(1)
IOH = – 0.1mA
Min.
Max.
Unit
VOH
VCC = 2.3V to 3.6V
VCC = 2.3V
VCC – 0.2
—
V
IOH = – 6mA
IOH = – 12mA
2
—
—
VCC = 2.3V
1.7
2.2
2.4
2
VCC = 2.7V
—
VCC = 3.0V
—
VCC = 3.0V
IOH = – 24mA
IOL = 0.1mA
IOL = 6mA
—
VOL
Output LOW Voltage
VCC = 2.3V to 3.6V
VCC = 2.3V
—
—
—
—
—
0.2
0.4
0.7
0.4
0.55
V
IOL = 12mA
IOL = 12mA
IOL = 24mA
VCC = 2.7V
VCC = 3.0V
NEW16link
NOTE:
1. VIH and VIL must be within the min. or max. range shown in the DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE table for the
appropriate VCC range. TA = – 40°C to + 85°C.
o
OPERATING CHARACTERISTICS, T = 25 C
A
VCC = 2.5V ± 0.2V
VCC = 3.3V ± 0.3V
Unit
Symbol
Parameter
Power Dissipation Capacitance
Outputs enabled
Test Conditions
Typical
Typical
CPD
CL = 0pF, f = 10Mhz
22
29
pF
CPD
Power Dissipation Capacitance
Outputs disabled
4
5
pF
(1)
SWITCHING CHARACTERISTICS
VCC = 2.5V ± 0.2V
VCC = 2.7V
VCC = 3.3V ± 0.3V
Symbol
tPLH
Parameter
Propagation Delay
Min.
Max.
Min.
Max.
Min.
Max.
Unit
1
3.7
—
3.6
1
3
ns
tPHL
xAx to xBx or xBx to xAx
Output Enable Time
xOE to xAx or xBx
tPZH
1
1
5.7
5.2
—
—
—
—
5.4
4.6
—
1
1
4.4
4.1
500
ns
tPZL
tPHZ
Output Disable Time
xOE to xAx or xBx
ns
ps
tPLZ
(2)
tSK(o)
Output Skew
—
—
NOTES:
1. See test circuits and waveforms. TA = – 40°C to + 85°C.
2. Skew between any two outputs of the same package and switching in the same direction.
4
IDT74ALVCH16245
3.3V CMOS 16-BIT BUS TRANSCEIVER WITH 3-STATE OUTPUTS
EXTENDED COMMERCIAL TEMPERATURE RANGE
TEST CIRCUITS AND WAVEFORMS:
PROPAGATION DELAY
TEST CONDITIONS
Symbol
(1)
(1)
(2)
VCC = 3.3V±0.3V VCC = 2.7V VCC = 2.5V±0.2V
Unit
V
IH
VLOAD
6
6
2 x Vcc
Vcc
V
SAME PHASE
INPUT TRANSITION
VT
0V
VIH
VT
2.7
1.5
300
300
50
2.7
1.5
300
300
50
V
V
tPHL
tPLH
VOH
VT
Vcc / 2
150
OUTPUT
VLZ
VHZ
CL
mV
mV
VOL
tPHL
tPLH
150
VIH
VT
0V
OPPOSITE PHASE
INPUT TRANSITION
30
pF
NEW16link
ALVC Link
TEST CIRCUITS FOR ALL OUTPUTS ENABLE AND DISABLE TIMES
VLOAD
DISABLE
VCC
ENABLE
VIH
VT
Open
GND
CONTROL
INPUT
500Ω
0V
tPZL
tPLZ
VIN
VOUT
Pulse(1, 2)
Generator
VLOAD/2
VT
D.U.T.
VLOAD/2
OUTPUT
NORMALLY
LOW
SWITCH
CLOSED
VLZ
VOL
500Ω
tPHZ
t
PZH
RT
CL
OUTPUT
NORMALLY
HIGH
VOH
VHZ
SWITCH
OPEN
VT
0V
ALVC Link
DEFINITIONS:
0V
CL= Load capacitance: includes jig and probe capacitance.
RT = Termination resistance: should be equal to ZOUT of the Pulse
ALVC Link
NOTE:
1. Diagram shown for input Control Enable-LOW and input Control
Disable-HIGH.
Generator.
NOTES:
1. Pulse Generator for All Pulses: Rate ≤ 10MHz; tF ≤ 2.5ns; tR ≤ 2.5ns.
2. Pulse Generator for All Pulses: Rate ≤ 10MHz; tF ≤ 2ns; tR ≤ 2ns.
SET-UP, HOLD, AND RELEASE TIMES
VIH
DATA
INPUT
SWITCH POSITION
VT
0V
tSU
tH
Test
Switch
VIH
VT
0V
TIMING
INPUT
Open Drain
Disable Low
Enable Low
Disable High
Enable High
All Other tests
VLOAD
tREM
VIH
VT
0V
ASYNCHRONOUS
CONTROL
GND
Open
VIH
VT
0V
SYNCHRONOUS
CONTROL
tSU
tH
NEW16link
ALVC Link
OUTPUT SKEW - TSK (x)
VIH
VT
0V
INPUT
PULSE WIDTH
tPLH1
tPHL1
VOH
VT
LOW-HIGH-LOW
PULSE
VT
OUTPUT 1
tSK (x)
VOL
tSK (x)
tW
VOH
VT
HIGH-LOW-HIGH
PULSE
VT
OUTPUT 2
VOL
ALVC Link
tPLH2
tSK(x) = tPLH2 - tPLH1 or tPHL2 - tPHL1
tPHL2
ALVC Link
NOTES:
1. For tSK(o) OUTPUT1 and OUTPUT2 are any two outputs.
2. For tSK(b) OUTPUT1 and OUTPUT2 are in the same bank.
5
IDT74ALVCH16245
3.3V CMOS 16-BIT BUS TRANSCEIVER WITH 3-STATE OUTPUTS
EXTENDED COMMERCIAL TEMPERATURE RANGE
ORDERINGINFORMATION
IDT
XX
ALVC
X
XX
XXX
XX
Bus-Hold
Family Device Type Package
Temp. Range
PV
PA
PF
Shrink Small Outline Package (SO48-1)
Thin Shrink Small Outline Package (SO48-2)
Thin Very Small Outline Package (SO48-3)
245
16-Bit Bus Transceiver with 3-State Outputs
16
Double-Density with Resistors, ±24mA
H
Bus-Hold
–40°C to +85°C
74
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6
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