ICS8545AG [IDT]
Low Skew Clock Driver, 4 True Output(s), 4 Inverted Output(s), PDSO20, MO-153, TSSOP-20;
| 型号： | ICS8545AG |
| 厂家： | 
INTEGRATED DEVICE TECHNOLOGY |
| 描述： | Low Skew Clock Driver, 4 True Output(s), 4 Inverted Output(s), PDSO20, MO-153, TSSOP-20 驱动 光电二极管 逻辑集成电路 |
| 文件： | 总7页 (文件大小：90K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
PRELIMINARY
ICS8545
Integrated
Circuit
Systems, Incꢀ
LOW SKEW, 1-TO-4
LVCMOS-TO-LVDS FANOUT BUFFER
GENERAL DESCRIPTION
FEATURES
The ICS8545 is a low skew, high performance • 4 LVDS outputs
,&6
1-to-4 clock fanout buffer and a member of
• Designed to meet or exceed the requirements ofANSI TIA/
EIA-644
HiPerClockS™
the HiPerClockS™ family of High Performance
Clock Solutions from ICS. Utilizing Low Voltage
Differential Signaling (LVDS) the ICS8545
• Multiple LVCMOS clock inputs to support redundant or
provides a low power, low noise, solution for distributing
clock signals over controlled impedances of 100Ω. The
ICS8545 accepts a LVCMOS input level and translates it
to 3.3V LVDS output levels.
selectable frequency fanout applications
• Translates LVCMOS input signals to LVDS levels
• LVCMOS / LVTTL control inputs
• 3.3V operating supply
Guaranteed output and part-to-part skew characteristics
make the ICS8545 ideal for those applications demanding
well defined performance and repeatability.
• 20 lead TSSOP
• 0°C to 70°C ambient operating temperature
BLOCK DIAGRAM
PIN ASSIGNMENT
1
2
3
4
5
6
7
8
20
19
18
17
16
15
14
13
12
11
Q0
VEE
CLK_EN
CLK_SEL
CLK1
nc
nD
LE
CLK_EN
nQ0
VDD
Q1
nQ1
Q2
nQ2
VEE
Q3
Q
CLK1
CLK2
0
1
Q0
nQ0
CLK2
nc
OE
VEE
VDD
Q1
nQ1
9
10
CLK_SEL
nQ3
Q2
nQ2
ICS8545
Q3
nQ3
20-Lead TSSOP
G Package
Top View
OE
The Preliminary Information presented herein represents a product in prototyping or pre-production. The noted characteristics are based on initial
product characterization. Integrated Circuit Systems, Incorporated (ICS) reserves the right to change any circuitry or specifications without notice.
8545
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REV. A FEBRUARY 23, 2001
1
PRELIMINARY
ICS8545
Integrated
Circuit
Systems, Incꢀ
LOW SKEW, 1-TO-4
LVCMOS-TO-LVDS FANOUT BUFFER
TABLE 1. PIN DESCRIPTIONS
Number
Name
Type
Description
1, 9, 13
VEE
Power
Input
Power supply ground. Connect to ground.
Synchronous clock enable. When HIGH clock outputs follows clock
input. When LOW, Q outputs are force low, nQ outputs are force high.
LVCMOS / LVTTL interface levels.
Clock select input. When HIGH selects CLK2 input.
When LOW selects CLK1 input. LVCMOS / LVTTL interface levels.
2
CLK_EN
Pullup
Pulldown
3
CLK_SEL
Input
4
5, 7
6
CLK1
nc
Input
Unused
Input
Pulldown LVCMOS / LVTTL clock input.
Unused pins.
CLK2
Pulldown LVCMOS / LVTTL clock input.
Output enable. Controls enabling and disabling of outputs Q0, nQ0
thru Q3, nQ3
8
OE
Input
Pullup
10, 18
11, 12
14, 15
16, 17
19, 20
VDD
Power
Output
Output
Output
Output
Power supply pin. Connect to 3.3V.
nQ3, Q3
nQ2, Q2
nQ1, Q1
nQ0, Q0
Differential clock outputs. LVDS interface levels.
Differential clock outputs. LVDS interface levels.
Differential clock outputs. LVDS interface levels.
Differential clock outputs. LVDS interface levels.
TABLE 2. PIN CHARACTERISTICS
Symbol
Parameter
Test Conditions
Minimum
Typical
Maximum Units
CLK1, CLK2
pF
Input
Capacitance
CIN
CLK_EN,
CLK_SEL
pF
COUT
Output Capacitance
Input Pullup Resistor
TBD
51
pF
KΩ
KΩ
RPULLUP
RPULLDOWN Input Pulldown Resistor
51
8545
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REV. A FEBRUARY 23, 2001
2
PRELIMINARY
ICS8545
Integrated
Circuit
Systems, Incꢀ
LOW SKEW, 1-TO-4
LVCMOS-TO-LVDS FANOUT BUFFER
TABLE 3A. CONTROL INPUTS FUNCTION TABLE
Inputs
Outputs
OE
0
CLK_EN
CLK_SEL
Q1 thru Q3
Hi Z
nQ1 thru nQ3
Hi Z
X
0
0
1
1
X
0
1
0
1
1
Low
High
1
Low
High
1
ACTIVE
ACTIVE
ACTIVE
ACTIVE
1
In the active mode the state of the output is a function of the CLK1 and CLK2 inputs as described in Table 3B.
TABLE 3B. CLOCK INPUTS FUNCTION TABLE
Inputs
Outputs
CLK1
CLK2
Q0 thru Q3
LOW
nQ0 thru nQ3
HIGH
0
1
1
0
HIGH
LOW
8545
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REV. A FEBRUARY 23, 2001
3
PRELIMINARY
ICS8545
Integrated
Circuit
Systems, Incꢀ
LOW SKEW, 1-TO-4
LVCMOS-TO-LVDS FANOUT BUFFER
ABSOLUTE MAXIMUM RATINGS
Supply Voltage
4.6V
Inputs
Outputs
Ambient Operating Temperature
Storage Temperature
-0.5V to VDD + 0.5V
-0.5V to VDD + 0.5V
0°C to 70°C
-65°C to 150°C
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These
ratings are stress specifications only and functional operation of product at these condition or any conditions beyond
those listed in the DC Characteristics or AC Characteristics is not implied. Exposure to absolute maximum rating conditions
for extended periods may affect product reliability.
TABLE 4A. POWER SUPPLY DC CHARACTERISTICS, VDD = 3.3V±5%, TA=0°C TO 70°C
Symbol
VDD
Parameter
Test Conditions
Minimum
Typical
Maximum Units
Power Supply Voltage
Power Supply Current
3.135
3.3
3.465
50
V
IEE
mA
TABLE 4B. LVCMOS / LVTTL DC CHARACTERISTICS, VDD = 3.3V±5%, TA=0°C TO 70°C
Symbol Parameter
Test Conditions
Minimum
Typical
Maximum Units
CLK1. CLK2
2
3.765
3.765
1.3
V
V
V
V
VIH
VIL
IIH
Input High Voltage
CLK_EN, CLK_SEL,
OE
2
CLK1. CLK2
-0.3
Input Low Voltage
Input High Current
Input Low Current
CLK_EN, CLK_SEL,
OE
0.8
CLK1, CLK2,
CLK_SEL
150
5
µA
µA
µA
µA
CLK_EN, OE
CLK1, CLK2,
CLK_SEL
-5
IIL
CLK_EN, OE
-150
TABLE 4C. LVDS DC CHARACTERISTICS, VDD = 3.3V±5%, TA=0°C TO 70°C
Symbol
VOD
Parameter
Test Conditions
Minimum
Typical
350
4
Maximum Units
Differential Output Voltage
VOD Magnitude Change
Offset Voltage
250
450
35
mV
mV
V
∆ VOD
VOS
1.125
1.25
5
1.375
25
∆ VOS
IOZ
VOS Magnitude Change
High Impedance Leakage Current
Output Crossover Voltage
mV
µA
V
-10
±1
+10
TBD
VOX
TBD
8545
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REV. A FEBRUARY 23, 2001
4
PRELIMINARY
ICS8545
Integrated
Circuit
Systems, Incꢀ
LOW SKEW, 1-TO-4
LVCMOS-TO-LVDS FANOUT BUFFER
TABLE 5. AC CHARACTERISTICS, VDD = 3.3V±5%, TA=0°C TO 70°C
Symbol
fMAX
tpLH
Parameter
Test Conditions
Minimum
Typical
Maximum Units
Maximum Input Frequency
Propagation Delay, Low-to-High
Propagation Delay, High-to-Low
Output Skew; NOTE 2
650
2.9
MHz
ns
0 ≤ f ≤ 650MHz
0 ≤ f ≤ 650MHz
1.9
1.9
-50
tpHL
2.9
ns
tsk(o)
50
ps
CLK1
CLK2
TBD
ps
tsk(pp)
Part-to-Part Skew; NOTE 3
tR
tF
Output Rise Time
Output Fall Time
R
L
L
= 100Ω
= 100Ω
200
200
400
400
600
600
ps
ps
R
tCYCLE/2
- TBD
tCYCLE/2
+ TBD
tPW
Output Pulse Width
30ps
ns
tEN
Output Enable Time
Output Disable Time
TBD
TBD
ns
ns
tDIS
NOTE 1: All parameters measured at fMAX unless noted otherwise.
NOTE 2: Defined as skew across outputs at the same supply voltages and with equal load conditions.
Measured from the 50% point of the input to the differential output crossing point.
NOTE 3: Defined as skew at different outputs on different devices operating at the same supply voltages
and with equal load conditions. Measured from 50% of like inputs to the differential output crossing point.
8545
www.icst.com/products/hiperclocks.html
REV. A FEBRUARY 23, 2001
5
PRELIMINARY
ICS8545
Integrated
Circuit
Systems, Incꢀ
LOW SKEW, 1-TO-4
LVCMOS-TO-LVDS FANOUT BUFFER
PACKAGE OUTLINE - G SUFFIX
c
20
1
111
L
E1
E
10
α
D
A2
A
A1
-c-
e
b
SEATING
PLANE
c
aaa
TABLE 6. PACKAGE DIMENSIONS
Millimeters
Inches
SYMBOL
MIN
MAX
MIN
MAX
N
A
20
--
1.20
0.15
1.05
0.30
0.20
6.60
--
.047
.006
.041
.012
.008
.260
A1
A2
b
0.05
0.80
0.19
0.09
6.40
.002
.032
.007
.0035
.252
c
D
E
6.40 BASIC
0.252 BASIC
E1
e
4.30
4.50
.169
.177
0.65 BASIC
.0256 BASIC
L
0.45
0°
0.75
8°
.018
0°
.030
8°
α
aaa
--
0.10
--
.004
Reference Document: JEDEC Publication 95, MO-153
8545
www.icst.com/products/hiperclocks.html
REV. A FEBRUARY 23, 2001
6
PRELIMINARY
ICS8545
Integrated
Circuit
Systems, Incꢀ
LOW SKEW, 1-TO-4
LVCMOS-TO-LVDS FANOUT BUFFER
TABLE 7. ORDERING INFORMATION
Part/Order Number
ICS8545AG
Marking
Package
Count
75 per tube
2500
Temperature
0°C to 70°C
0°C to 70°C
ICS8545AG
ICS8545AG
20 lead TSSOP
ICS8545AGT
20 lead TSSOP on Tape and Reel
While the information presented herein has been checked for both accuracy and reliability, Integrated Circuit Systems, Incorporated (ICS) assumes no responsibility for either its use
or for infringement of any patents or other rights of third parties, which would result from its use. No other circuits, patents, or licenses are implied. This product is intended for use
in normal commercial applications. Any other applications such as those requiring extended temperature range, high reliability, or other extraordinary environmental requirements are
not recommended without additional processing by ICS. ICS reserves the right to change any circuitry or specifications without notice. ICS does not authorize or warrant any ICS
product for use in life support devices or critical medical instruments.
8545
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REV. A FEBRUARY 23, 2001
7
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